Merge pull request #288 from YoeDistro/yoe/mut

Add riscv32/riscv64 support
This commit is contained in:
Steven Walter
2021-01-12 10:09:33 -05:00
committed by GitHub
3 changed files with 13 additions and 2 deletions
+4
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@@ -8,6 +8,10 @@ RUSTLIB_DEP = ""
inherit cargo
DEPENDS_append_libc-musl = " libunwind"
# rv32 does not have libunwind ported yet
DEPENDS_remove_riscv32 = "libunwind"
DEPENDS_remove_riscv64 = "libunwind"
# Needed so cargo can find libbacktrace
RUSTFLAGS += "-L ${STAGING_LIBDIR} -C link-arg=-Wl,-soname,libstd.so"
+1 -1
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@@ -19,7 +19,7 @@ LLVM_DIR = "llvm${LLVM_RELEASE}"
EXTRA_OECMAKE = " \
-DCMAKE_BUILD_TYPE=Release \
-DLLVM_TARGETS_TO_BUILD='X86;ARM;AArch64;PowerPC;Mips' \
-DLLVM_TARGETS_TO_BUILD='ARM;AArch64;Mips;PowerPC;RISCV;X86' \
-DLLVM_BUILD_DOCS=OFF \
-DLLVM_ENABLE_TERMINFO=OFF \
-DLLVM_ENABLE_ZLIB=OFF \
+8 -1
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@@ -97,7 +97,8 @@ def llvm_features_from_tune(d):
f.append("+a15")
if 'cortexa17' in feat:
f.append("+a17")
if ('riscv64' in feat) or ('riscv32' in feat):
f.append("+a,+c,+d,+f,+m")
return f
# TARGET_CC_ARCH changes from build/cross/target so it'll do the right thing
@@ -291,6 +292,8 @@ def llvm_cpu(d):
trans['powerpc'] = "powerpc"
trans['mips64'] = "mips64"
trans['mips64el'] = "mips64"
trans['riscv64'] = "generic-rv64"
trans['riscv32'] = "generic-rv32"
if target in ["mips", "mipsel"]:
feat = frozenset(d.getVar('TUNE_FEATURES').split())
@@ -337,6 +340,10 @@ def rust_gen_target(d, thing, wd, features, cpu):
tspec['env'] = "musl"
else:
tspec['env'] = "gnu"
if "riscv64" in tspec['llvm-target']:
tspec['llvm-abiname'] = "lp64d"
if "riscv32" in tspec['llvm-target']:
tspec['llvm-abiname'] = "ilp32d"
tspec['vendor'] = "unknown"
tspec['target-family'] = "unix"
tspec['linker'] = "{}{}gcc".format(d.getVar('CCACHE'), prefix)