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ti-rtos-firmware: Update M4F binary for AM64x SoCs

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AM64x SoCs have a Cortex-M4F core in MCU domain. This core is used a
standalone device for safety applications. For non safety applications,
the device is exposed as a remote processor with Linux rpmsg framework.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Yogesh Siraswar <yogeshs@ti.com>
Signed-off-by: Denys Dmytriyenko <denys@konsulko.com>
Signed-off-by: Yogesh Siraswar <yogeshs@ti.com>
This commit is contained in:
Hari Nagalla
2021-11-01 15:33:12 -04:00
committed by Yogesh Siraswar
parent cac1d81b98
commit 15326435dd
1 changed files with 6 additions and 0 deletions
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6
recipes-ti/ti-rtos-bin/ti-rtos-firmware.bb
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@@ -62,6 +62,7 @@ do_install:prepend:am64xx() {
mv am64-main-r5f0_1-fw ipc_echo_baremetal_test_mcu1_1_release_strip.xer5f; \
mv am64-main-r5f1_0-fw ipc_echo_baremetal_test_mcu2_0_release_strip.xer5f; \
mv am64-main-r5f1_1-fw ipc_echo_baremetal_test_mcu2_1_release_strip.xer5f; \
mv am64-mcu-m4f0_0-fw ipc_echo_baremetal_test_mcu3_0_release_strip.xer5f; \
)
}
@@ -111,6 +112,7 @@ do_install:am64xx() {
install -m 0644 ${RTOS_IPC_FW_DIR}/ipc_echo_baremetal_test_mcu1_1_release_strip.xer5f ${LEGACY_IPC_FW_DIR}
install -m 0644 ${RTOS_IPC_FW_DIR}/ipc_echo_baremetal_test_mcu2_0_release_strip.xer5f ${LEGACY_IPC_FW_DIR}
install -m 0644 ${RTOS_IPC_FW_DIR}/ipc_echo_baremetal_test_mcu2_1_release_strip.xer5f ${LEGACY_IPC_FW_DIR}
install -m 0644 ${RTOS_IPC_FW_DIR}/ipc_echo_baremetal_test_mcu3_0_release_strip.xer5f ${LEGACY_IPC_FW_DIR}
}
# Set up names for the firmwares
@@ -124,6 +126,7 @@ ALTERNATIVE:${PN}:am64xx = "\
am64-main-r5f0_1-fw \
am64-main-r5f1_0-fw \
am64-main-r5f1_1-fw \
am64-mcu-m4f0_0-fw \
"
ALTERNATIVE:${PN}:j7 = "\
@@ -154,6 +157,7 @@ TARGET_MAIN_R5FSS0_0:am64xx = "am64-main-r5f0_0-fw"
TARGET_MAIN_R5FSS0_1:am64xx = "am64-main-r5f0_1-fw"
TARGET_MAIN_R5FSS1_0:am64xx = "am64-main-r5f1_0-fw"
TARGET_MAIN_R5FSS1_1:am64xx = "am64-main-r5f1_1-fw"
TARGET_MCU_M4FSS0_0:am64xx = "am64-mcu-m4f0_0-fw"
TARGET_MCU_R5FSS0_0:j7 = "j7-mcu-r5f0_0-fw"
TARGET_MCU_R5FSS0_1:j7 = "j7-mcu-r5f0_1-fw"
@@ -177,6 +181,7 @@ ALTERNATIVE_LINK_NAME[am64-main-r5f0_0-fw] = "${base_libdir}/firmware/${TARGET_M
ALTERNATIVE_LINK_NAME[am64-main-r5f0_1-fw] = "${base_libdir}/firmware/${TARGET_MAIN_R5FSS0_1}"
ALTERNATIVE_LINK_NAME[am64-main-r5f1_0-fw] = "${base_libdir}/firmware/${TARGET_MAIN_R5FSS1_0}"
ALTERNATIVE_LINK_NAME[am64-main-r5f1_1-fw] = "${base_libdir}/firmware/${TARGET_MAIN_R5FSS1_1}"
ALTERNATIVE_LINK_NAME[am64-mcu-m4f0_0-fw] = "${base_libdir}/firmware/${TARGET_MCU_M4FSS0_0}"
ALTERNATIVE_LINK_NAME[j7-mcu-r5f0_0-fw] = "${base_libdir}/firmware/${TARGET_MCU_R5FSS0_0}"
ALTERNATIVE_LINK_NAME[j7-mcu-r5f0_1-fw] = "${base_libdir}/firmware/${TARGET_MCU_R5FSS0_1}"
@@ -202,6 +207,7 @@ ALTERNATIVE_TARGET[am64-main-r5f0_0-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_e
ALTERNATIVE_TARGET[am64-main-r5f0_1-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_baremetal_test_mcu1_1_release_strip.xer5f"
ALTERNATIVE_TARGET[am64-main-r5f1_0-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_baremetal_test_mcu2_0_release_strip.xer5f"
ALTERNATIVE_TARGET[am64-main-r5f1_1-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_baremetal_test_mcu2_1_release_strip.xer5f"
ALTERNATIVE_TARGET[am64-mcu-m4f0_0-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_baremetal_test_mcu3_0_release_strip.xer5f"
ALTERNATIVE_TARGET[j7-mcu-r5f0_0-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_testb_mcu1_0_release_strip.xer5f"
ALTERNATIVE_TARGET[j7-mcu-r5f0_1-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_test_mcu1_1_release_strip.xer5f"