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common-csl-ip: Updating to version 03.03.00.10

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Signed-off-by: Mahesh Radhakrishnan <m-radhakrishnan2@ti.com>
Signed-off-by: Jacob Stiffler <j-stiffler@ti.com>
Signed-off-by: Denys Dmytriyenko <denys@ti.com>
This commit is contained in:
Mahesh Radhakrishnan
2018-04-13 23:01:57 +00:00
committed by Denys Dmytriyenko
parent 2bb8aeeccb
commit 6cad2e10cd
2 changed files with 4 additions and 4 deletions
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2
recipes-bsp/common-csl-ip/common-csl-ip-rtos_git.bb
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@@ -18,4 +18,4 @@ export DEST_ROOT="${S}"
PDK_COMP_LINK_TEXT = "CSL-Chip Support Library"
# Workaround: dra7xx build requires am57xx CSL libraries for opencl-monitor
TI_PDK_LIMIT_SOCS_append_dra7xx = " am571x am572x"
TI_PDK_LIMIT_SOCS_append_dra7xx = " am571x am572x am574x"

6
recipes-bsp/common-csl-ip/common-csl-ip.inc
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@@ -4,7 +4,7 @@ LIC_FILES_CHKSUM = "file://COPYING.txt;md5=5857833e20836213677fac33f9aded21"
COMPATIBLE_MACHINE = "keystone|dra7xx|ti33x|ti43x|omapl1"
PV = "03.03.00.09"
PV = "03.03.00.10"
INC_PR = "r0"
CSL_GIT_URI = "git://git.ti.com/keystone-rtos/common-csl-ip.git"
@@ -12,8 +12,8 @@ CSL_GIT_PROTOCOL ="git"
CSL_GIT_BRANCH = "master"
CSL_GIT_DESTSUFFIX = "git"
# Below commit ID corresponding to "DEV.CSL_PROCESSOR-SDK.03.03.00.09"
CSL_SRCREV = "7a7ef0633d9e305072b79ac978738c48e46583cc"
# Below commit ID corresponding to "DEV.CSL_PROCESSOR-SDK.03.03.00.10"
CSL_SRCREV = "b252ed25443938ff59a6622aee2de7bc36304787"
BRANCH="${CSL_GIT_BRANCH}"
SRC_URI = "${CSL_GIT_URI};protocol=${CSL_GIT_PROTOCOL};branch=${BRANCH};destsuffix=${CSL_GIT_DESTSUFFIX}"