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recipes-kernel: cmem.dtsi: Update memory sections for DDR and MSMC
cmem.dtsi splits the already defined dsp_common_mpm_area DDR memory into a smaller MPM segment and other CMEM blocks. The mpm_block_mem is removed and instead the original memory sections dsp_common_mpm_area and mpm_mem in the kernel dtb are updated to reflect On the MSMC memory, cmem.dtsi defines a sram subnode instead of the reserved memory. mpm MSMC areas are already captured in the kernel dtb. Signed-off-by: Sam Nelson <sam.nelson@ti.com> Signed-off-by: Denys Dmytriyenko <denys@ti.com>
This commit is contained in:
committed by
Denys Dmytriyenko
parent
117de86440
commit
a8af1cd2e6
@@ -1,22 +1,10 @@
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/ {
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reserved-memory {
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mpm_block_mem_0: mpm_block_mem@820000000 {
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reg = <0x00000008 0x20000000 0x00000000 0x02000000>;
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no-map;
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status = "okay";
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};
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cmem_block_mem_0: cmem_block_mem@829000000 {
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reg = <0x00000008 0x22000000 0x00000000 0x1E000000>;
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no-map;
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status = "okay";
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};
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cmem_block_mem_1: cmem_block_mem@00c080000 {
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reg = <0x00000000 0x0c080000 0x00000000 0x000c0000>;
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no-map;
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status = "okay";
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};
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};
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cmem {
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@@ -36,7 +24,20 @@
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cmem_block_1: cmem_block@1 {
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reg = <1>;
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memory-region = <&cmem_block_mem_1>;
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sram = <&sram_cmem>;
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};
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};
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};
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&dsp_common_mpm_area {
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reg = <0x00000008 0x20000000 0x00000000 0x02000000>;
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};
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&mpm_mem {
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reg = <0xa0000000 0x02000000>;
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};
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&msm_ram {
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sram_cmem: sram-cmem@80000 {
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reg = <0x80000 0xc0000>;
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};
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};
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@@ -1,54 +1,55 @@
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/ {
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reserved-memory {
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mpm_block_mem_0: mpm_block_mem@820000000 {
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reg = <0x00000008 0x20000000 0x00000000 0x02000000>;
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no-map;
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status = "okay";
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};
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reserved-memory {
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cmem_block_mem_0: cmem_block_mem@829000000 {
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reg = <0x00000008 0x29000000 0x00000000 0x17000000>;
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no-map;
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status = "okay";
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};
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cmem_block_mem_0: cmem_block_mem@829000000 {
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reg = <0x00000008 0x29000000 0x00000000 0x17000000>;
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no-map;
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status = "okay";
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};
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cmem_block_mem_1: cmem_block_mem@00c000000 {
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reg = <0x00000000 0x0c000000 0x00000000 0x00100000>;
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no-map;
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status = "okay";
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};
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cmem_block_mem_2: cmem_block_mem@822000000 {
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reg = <0x00000008 0x22000000 0x00000000 0x07000000>;
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no-map;
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status = "okay";
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};
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};
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cmem_block_mem_2: cmem_block_mem@822000000 {
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reg = <0x00000008 0x22000000 0x00000000 0x07000000>;
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no-map;
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status = "okay";
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};
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};
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cmem {
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compatible = "ti,cmem";
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#address-cells = <1>;
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#size-cells = <0>;
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cmem {
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compatible = "ti,cmem";
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#address-cells = <1>;
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#size-cells = <0>;
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#pool-size-cells = <2>;
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status = "okay";
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status = "okay";
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cmem_block_0: cmem_block@0 {
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reg = <0>;
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memory-region = <&cmem_block_mem_0>;
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cmem-buf-pools = <1 0x00000000 0x17000000>;
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};
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cmem_block_0: cmem_block@0 {
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reg = <0>;
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memory-region = <&cmem_block_mem_0>;
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cmem-buf-pools = <1 0x00000000 0x17000000>;
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};
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cmem_block_1: cmem_block@1 {
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reg = <1>;
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memory-region = <&cmem_block_mem_1>;
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};
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cmem_block_2: cmem_block@2 {
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reg = <2>;
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memory-region = <&cmem_block_mem_2>;
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};
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};
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cmem_block_1: cmem_block@1 {
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reg = <1>;
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sram = <&sram_cmem>;
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};
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cmem_block_2: cmem_block@2 {
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reg = <2>;
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memory-region = <&cmem_block_mem_2>;
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};
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};
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};
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&dsp_common_mpm_area {
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reg = <0x00000008 0x20000000 0x00000000 0x02000000>;
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};
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&mpm_mem {
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reg = <0xa0000000 0x02000000>;
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};
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&msm_ram {
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sram_cmem: sram-cmem@a0000 {
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reg = <0xa0000 0x57000>;
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};
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};
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@@ -1,54 +1,55 @@
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/ {
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reserved-memory {
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mpm_block_mem_0: mpm_block_mem@820000000 {
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reg = <0x00000008 0x20000000 0x00000000 0x02000000>;
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no-map;
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status = "okay";
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};
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reserved-memory {
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cmem_block_mem_0: cmem_block_mem@829000000 {
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reg = <0x00000008 0x29000000 0x00000000 0x17000000>;
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no-map;
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status = "okay";
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};
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cmem_block_mem_0: cmem_block_mem@829000000 {
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reg = <0x00000008 0x29000000 0x00000000 0x17000000>;
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no-map;
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status = "okay";
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};
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cmem_block_mem_1: cmem_block_mem@00c100000 {
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reg = <0x00000000 0x0c100000 0x00000000 0x00480000>;
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no-map;
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status = "okay";
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};
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cmem_block_mem_2: cmem_block_mem@822000000 {
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reg = <0x00000008 0x22000000 0x00000000 0x07000000>;
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no-map;
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status = "okay";
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};
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};
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cmem_block_mem_2: cmem_block_mem@822000000 {
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reg = <0x00000008 0x22000000 0x00000000 0x07000000>;
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no-map;
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status = "okay";
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};
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};
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cmem {
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compatible = "ti,cmem";
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#address-cells = <1>;
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#size-cells = <0>;
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cmem {
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compatible = "ti,cmem";
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#address-cells = <1>;
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#size-cells = <0>;
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#pool-size-cells = <2>;
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status = "okay";
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status = "okay";
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cmem_block_0: cmem_block@0 {
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reg = <0>;
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memory-region = <&cmem_block_mem_0>;
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cmem-buf-pools = <1 0x00000000 0x17000000>;
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};
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cmem_block_0: cmem_block@0 {
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reg = <0>;
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memory-region = <&cmem_block_mem_0>;
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cmem-buf-pools = <1 0x00000000 0x17000000>;
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};
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cmem_block_1: cmem_block@1 {
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reg = <1>;
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memory-region = <&cmem_block_mem_1>;
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};
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cmem_block_2: cmem_block@2 {
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reg = <2>;
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memory-region = <&cmem_block_mem_2>;
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};
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};
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cmem_block_1: cmem_block@1 {
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reg = <1>;
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sram = <&sram_cmem>;
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};
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cmem_block_2: cmem_block@2 {
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reg = <2>;
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memory-region = <&cmem_block_mem_2>;
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};
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};
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};
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&dsp_common_mpm_area {
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reg = <0x00000008 0x20000000 0x00000000 0x02000000>;
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};
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&mpm_mem {
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reg = <0xa0000000 0x02000000>;
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};
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&msm_ram {
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sram_cmem: sram-cmem@100000 {
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reg = <0x100000 0x480000>;
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};
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};
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@@ -1,10 +1,5 @@
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/ {
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reserved-memory {
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mpm_block_mem_0: mpm_block_mem@820000000 {
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reg = <0x00000008 0x20000000 0x00000000 0x02000000>;
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no-map;
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status = "okay";
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};
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cmem_block_mem_0: cmem_block_mem@829000000 {
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reg = <0x00000008 0x22000000 0x00000000 0x1E000000>;
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@@ -36,7 +31,20 @@
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cmem_block_1: cmem_block@1 {
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reg = <1>;
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memory-region = <&cmem_block_mem_1>;
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sram = <&sram_cmem>;
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};
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};
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};
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&dsp_common_mpm_area {
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reg = <0x00000008 0x20000000 0x00000000 0x02000000>;
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};
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&mpm_mem {
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reg = <0xa0000000 0x02000000>;
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};
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&msm_ram {
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sram_cmem: sram-cmem@80000 {
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reg = <0x80000 0xc0000>;
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};
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};
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