mirror of
https://git.yoctoproject.org/meta-ti
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linux 3.0: updates
* Bump SRCREV to latest 3.0rc from Linux * Merge in pm-voltdm patches * Merge in ABB support * Merge in expansion-board support (unfished) * Add hack for switch to GPTIMER1 * Set default cpufreq governor to performance Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
This commit is contained in:
+14
-14
@@ -1,7 +1,7 @@
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From 033514238d4b2b59b1507f39372dbabe7365c102 Mon Sep 17 00:00:00 2001
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From fa563f291feaed45803ae17db71514928a17a6a6 Mon Sep 17 00:00:00 2001
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From: Fernandes, Joel A <joelagnel@ti.com>
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Date: Tue, 7 Jun 2011 15:54:45 -0500
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Subject: [PATCH] OMAP3: beagle: add support for beagleboard xM revision C
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Subject: [PATCH 1/3] OMAP3: beagle: add support for beagleboard xM revision C
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OMAP3: beagle: add support for beagleboard xM revision C
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@@ -17,10 +17,10 @@ Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
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1 files changed, 51 insertions(+), 27 deletions(-)
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diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
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index 7f21d24..4b113b2 100644
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index 34f8411..32f5f89 100644
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--- a/arch/arm/mach-omap2/board-omap3beagle.c
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+++ b/arch/arm/mach-omap2/board-omap3beagle.c
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@@ -61,7 +61,8 @@
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@@ -60,7 +60,8 @@
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* AXBX = GPIO173, GPIO172, GPIO171: 1 1 1
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* C1_3 = GPIO173, GPIO172, GPIO171: 1 1 0
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* C4 = GPIO173, GPIO172, GPIO171: 1 0 1
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@@ -30,7 +30,7 @@ index 7f21d24..4b113b2 100644
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*/
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enum {
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OMAP3BEAGLE_BOARD_UNKN = 0,
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@@ -69,14 +70,26 @@ enum {
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@@ -68,14 +69,26 @@ enum {
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OMAP3BEAGLE_BOARD_C1_3,
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OMAP3BEAGLE_BOARD_C4,
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OMAP3BEAGLE_BOARD_XM,
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@@ -61,7 +61,7 @@ index 7f21d24..4b113b2 100644
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static struct gpio omap3_beagle_rev_gpios[] __initdata = {
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{ 171, GPIOF_IN, "rev_id_0" },
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@@ -111,18 +124,32 @@ static void __init omap3_beagle_init_rev(void)
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@@ -110,18 +123,32 @@ static void __init omap3_beagle_init_rev(void)
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case 7:
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printk(KERN_INFO "OMAP3 Beagle Rev: Ax/Bx\n");
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omap3_beagle_version = OMAP3BEAGLE_BOARD_AXBX;
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@@ -95,7 +95,7 @@ index 7f21d24..4b113b2 100644
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break;
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default:
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printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", beagle_rev);
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@@ -234,7 +261,7 @@ static struct omap2_hsmmc_info mmc[] = {
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@@ -225,7 +252,7 @@ static struct omap2_hsmmc_info mmc[] = {
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{
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.mmc = 1,
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.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
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@@ -104,7 +104,7 @@ index 7f21d24..4b113b2 100644
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},
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{} /* Terminator */
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};
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@@ -252,17 +279,11 @@ static struct gpio_led gpio_leds[];
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@@ -243,17 +270,11 @@ static struct gpio_led gpio_leds[];
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static int beagle_twl_gpio_setup(struct device *dev,
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unsigned gpio, unsigned ngpio)
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{
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@@ -127,7 +127,7 @@ index 7f21d24..4b113b2 100644
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/* gpio + 0 is "mmc0_cd" (input/IRQ) */
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mmc[0].gpio_cd = gpio + 0;
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omap2_hsmmc_init(mmc);
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@@ -276,9 +297,8 @@ static int beagle_twl_gpio_setup(struct device *dev,
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@@ -263,9 +284,8 @@ static int beagle_twl_gpio_setup(struct device *dev,
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* high / others active low)
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* DVI reset GPIO is different between beagle revisions
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*/
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@@ -139,7 +139,7 @@ index 7f21d24..4b113b2 100644
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/*
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* gpio + 1 on Xm controls the TFP410's enable line (active low)
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* gpio + 2 control varies depending on the board rev as below:
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@@ -296,8 +316,6 @@ static int beagle_twl_gpio_setup(struct device *dev,
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@@ -283,8 +303,6 @@ static int beagle_twl_gpio_setup(struct device *dev,
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pr_err("%s: unable to configure DVI_LDO_EN\n",
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__func__);
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} else {
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@@ -148,7 +148,7 @@ index 7f21d24..4b113b2 100644
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/*
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* REVISIT: need ehci-omap hooks for external VBUS
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* power switch and overcurrent detect
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@@ -305,8 +323,10 @@ static int beagle_twl_gpio_setup(struct device *dev,
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@@ -292,8 +310,10 @@ static int beagle_twl_gpio_setup(struct device *dev,
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if (gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC"))
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pr_err("%s: unable to configure EHCI_nOC\n", __func__);
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}
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@@ -160,7 +160,7 @@ index 7f21d24..4b113b2 100644
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/* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
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gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
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@@ -458,7 +478,8 @@ static struct platform_device leds_gpio = {
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@@ -404,7 +424,8 @@ static struct platform_device leds_gpio = {
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static struct gpio_keys_button gpio_buttons[] = {
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{
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.code = BTN_EXTRA,
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@@ -170,7 +170,7 @@ index 7f21d24..4b113b2 100644
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.desc = "user",
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.wakeup = 1,
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},
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@@ -525,8 +546,8 @@ static void __init beagle_opp_init(void)
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@@ -468,8 +489,8 @@ static void __init beagle_opp_init(void)
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return;
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}
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@@ -181,7 +181,7 @@ index 7f21d24..4b113b2 100644
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struct omap_hwmod *mh = omap_hwmod_lookup("mpu");
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struct omap_hwmod *dh = omap_hwmod_lookup("iva");
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struct device *dev;
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@@ -566,6 +587,9 @@ static void __init omap3_beagle_init(void)
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@@ -509,6 +530,9 @@ static void __init omap3_beagle_init(void)
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omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
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omap3_beagle_init_rev();
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omap3_beagle_i2c_init();
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+313
@@ -0,0 +1,313 @@
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From 04557e8b744e8e6f8ab8b7c4fc715cecd585f2ab Mon Sep 17 00:00:00 2001
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From: Koen Kooi <koen@dominion.thruhere.net>
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Date: Thu, 21 Jul 2011 14:29:42 +0200
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Subject: [PATCH 2/3] UNFINISHED: OMAP3: beagle: add support for expansionboards
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Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
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---
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arch/arm/mach-omap2/board-omap3beagle.c | 246 +++++++++++++++++++++++++++++++
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1 files changed, 246 insertions(+), 0 deletions(-)
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diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
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index 32f5f89..e542df0 100644
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--- a/arch/arm/mach-omap2/board-omap3beagle.c
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+++ b/arch/arm/mach-omap2/board-omap3beagle.c
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@@ -21,6 +21,7 @@
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#include <linux/io.h>
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#include <linux/leds.h>
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#include <linux/gpio.h>
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+#include <linux/irq.h>
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#include <linux/input.h>
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#include <linux/gpio_keys.h>
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#include <linux/opp.h>
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@@ -156,6 +157,167 @@ static void __init omap3_beagle_init_rev(void)
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}
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}
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+char expansionboard_name[16];
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+
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+#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE)
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+#include <linux/regulator/fixed.h>
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+#include <linux/wl12xx.h>
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+
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+#define OMAP_BEAGLE_WLAN_EN_GPIO (139)
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+#define OMAP_BEAGLE_BT_EN_GPIO (138)
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+#define OMAP_BEAGLE_WLAN_IRQ_GPIO (137)
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+#define OMAP_BEAGLE_FM_EN_BT_WU (136)
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+
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+struct wl12xx_platform_data omap_beagle_wlan_data __initdata = {
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+ .irq = OMAP_GPIO_IRQ(OMAP_BEAGLE_WLAN_IRQ_GPIO),
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+ .board_ref_clock = 2, /* 38.4 MHz */
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+};
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+
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+static int gpios[] = {OMAP_BEAGLE_BT_EN_GPIO, OMAP_BEAGLE_FM_EN_BT_WU, -1};
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+static struct platform_device wl12xx_device = {
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+ .name = "kim",
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+ .id = -1,
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+ .dev.platform_data = &gpios,
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+};
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+
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+static struct omap2_hsmmc_info mmcbbt[] = {
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+ {
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+ .mmc = 1,
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+ .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
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+ .gpio_wp = 29,
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+ },
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+ {
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+ .name = "wl1271",
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+ .mmc = 2,
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+ .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
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+ .gpio_wp = -EINVAL,
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+ .gpio_cd = -EINVAL,
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+ .ocr_mask = MMC_VDD_165_195,
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+ .nonremovable = true,
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+ },
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+ {} /* Terminator */
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+ };
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+
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+static struct regulator_consumer_supply beagle_vmmc2_supply =
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+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1");
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+
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+static struct regulator_init_data beagle_vmmc2 = {
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+ .constraints = {
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+ .min_uV = 1850000,
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+ .max_uV = 1850000,
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+ .apply_uV = true,
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+ .valid_modes_mask = REGULATOR_MODE_NORMAL
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+ | REGULATOR_MODE_STANDBY,
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+ .valid_ops_mask = REGULATOR_CHANGE_MODE
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+ | REGULATOR_CHANGE_STATUS,
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+ },
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+ .num_consumer_supplies = 1,
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+ .consumer_supplies = &beagle_vmmc2_supply,
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+};
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+
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+static struct fixed_voltage_config beagle_vwlan = {
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+ .supply_name = "vwl1271",
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+ .microvolts = 1800000, /* 1.8V */
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+ .gpio = OMAP_BEAGLE_WLAN_EN_GPIO,
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+ .startup_delay = 70000, /* 70ms */
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+ .enable_high = 1,
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+ .enabled_at_boot = 0,
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+ .init_data = &beagle_vmmc2,
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+};
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+
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+static struct platform_device omap_vwlan_device = {
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+ .name = "reg-fixed-voltage",
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+ .id = 1,
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+ .dev = {
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+ .platform_data = &beagle_vwlan,
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+ },
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+};
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+#endif
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+
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+#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
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+
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+#include <plat/mcspi.h>
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+#include <linux/spi/spi.h>
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+
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+#define OMAP3BEAGLE_GPIO_ENC28J60_IRQ 157
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+
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+static struct omap2_mcspi_device_config enc28j60_spi_chip_info = {
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+ .turbo_mode = 0,
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+ .single_channel = 1, /* 0: slave, 1: master */
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+};
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+
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+static struct spi_board_info omap3beagle_zippy_spi_board_info[] __initdata = {
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+ {
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+ .modalias = "enc28j60",
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+ .bus_num = 4,
|
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+ .chip_select = 0,
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+ .max_speed_hz = 20000000,
|
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+ .controller_data = &enc28j60_spi_chip_info,
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+ },
|
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+};
|
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+
|
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+static void __init omap3beagle_enc28j60_init(void)
|
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+{
|
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+ if ((gpio_request(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, "ENC28J60_IRQ") == 0) &&
|
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+ (gpio_direction_input(OMAP3BEAGLE_GPIO_ENC28J60_IRQ) == 0)) {
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+ gpio_export(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, 0);
|
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+ omap3beagle_zippy_spi_board_info[0].irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_ENC28J60_IRQ);
|
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+ irq_set_irq_type(omap3beagle_zippy_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING);
|
||||
+ } else {
|
||||
+ printk(KERN_ERR "could not obtain gpio for ENC28J60_IRQ\n");
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ spi_register_board_info(omap3beagle_zippy_spi_board_info,
|
||||
+ ARRAY_SIZE(omap3beagle_zippy_spi_board_info));
|
||||
+}
|
||||
+
|
||||
+#else
|
||||
+static inline void __init omap3beagle_enc28j60_init(void) { return; }
|
||||
+#endif
|
||||
+
|
||||
+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE)
|
||||
+
|
||||
+#include <plat/mcspi.h>
|
||||
+#include <linux/spi/spi.h>
|
||||
+
|
||||
+#define OMAP3BEAGLE_GPIO_KS8851_IRQ 157
|
||||
+
|
||||
+static struct omap2_mcspi_device_config ks8851_spi_chip_info = {
|
||||
+ .turbo_mode = 0,
|
||||
+ .single_channel = 1, /* 0: slave, 1: master */
|
||||
+};
|
||||
+
|
||||
+static struct spi_board_info omap3beagle_zippy2_spi_board_info[] __initdata = {
|
||||
+ {
|
||||
+ .modalias = "ks8851",
|
||||
+ .bus_num = 4,
|
||||
+ .chip_select = 0,
|
||||
+ .max_speed_hz = 36000000,
|
||||
+ .controller_data = &ks8851_spi_chip_info,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static void __init omap3beagle_ks8851_init(void)
|
||||
+{
|
||||
+ if ((gpio_request(OMAP3BEAGLE_GPIO_KS8851_IRQ, "KS8851_IRQ") == 0) &&
|
||||
+ (gpio_direction_input(OMAP3BEAGLE_GPIO_KS8851_IRQ) == 0)) {
|
||||
+ gpio_export(OMAP3BEAGLE_GPIO_KS8851_IRQ, 0);
|
||||
+ omap3beagle_zippy2_spi_board_info[0].irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_KS8851_IRQ);
|
||||
+ irq_set_irq_type(omap3beagle_zippy2_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING);
|
||||
+ } else {
|
||||
+ printk(KERN_ERR "could not obtain gpio for KS8851_IRQ\n");
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ spi_register_board_info(omap3beagle_zippy2_spi_board_info,
|
||||
+ ARRAY_SIZE(omap3beagle_zippy2_spi_board_info));
|
||||
+}
|
||||
+
|
||||
+#else
|
||||
+static inline void __init omap3beagle_ks8851_init(void) { return; }
|
||||
+#endif
|
||||
+
|
||||
static struct mtd_partition omap3beagle_nand_partitions[] = {
|
||||
/* All the partition sizes are listed in terms of NAND block size */
|
||||
{
|
||||
@@ -254,6 +416,12 @@ static struct omap2_hsmmc_info mmc[] = {
|
||||
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
|
||||
.gpio_wp = -EINVAL,
|
||||
},
|
||||
+ {
|
||||
+ .mmc = 2,
|
||||
+ .caps = MMC_CAP_4_BIT_DATA,
|
||||
+ .transceiver = true,
|
||||
+ .ocr_mask = 0x00100000, /* 3.3V */
|
||||
+ },
|
||||
{} /* Terminator */
|
||||
};
|
||||
|
||||
@@ -277,7 +445,15 @@ static int beagle_twl_gpio_setup(struct device *dev,
|
||||
mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp;
|
||||
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
|
||||
mmc[0].gpio_cd = gpio + 0;
|
||||
+#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE)
|
||||
+ if(!strcmp(expansionboard_name, "bbtoys-wifi")) {
|
||||
+ omap2_hsmmc_init(mmcbbt);
|
||||
+ } else {
|
||||
+ omap2_hsmmc_init(mmc);
|
||||
+ }
|
||||
+#else
|
||||
omap2_hsmmc_init(mmc);
|
||||
+#endif
|
||||
|
||||
/*
|
||||
* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active
|
||||
@@ -479,6 +655,15 @@ static struct omap_board_mux board_mux[] __initdata = {
|
||||
};
|
||||
#endif
|
||||
|
||||
+static int __init expansionboard_setup(char *str)
|
||||
+{
|
||||
+ if (!str)
|
||||
+ return -EINVAL;
|
||||
+ strncpy(expansionboard_name, str, 16);
|
||||
+ printk(KERN_INFO "Beagle expansionboard: %s\n", expansionboard_name);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
static void __init beagle_opp_init(void)
|
||||
{
|
||||
int r = 0;
|
||||
@@ -542,6 +727,65 @@ static void __init omap3_beagle_init(void)
|
||||
/* REVISIT leave DVI powered down until it's needed ... */
|
||||
gpio_request_one(170, GPIOF_OUT_INIT_HIGH, "DVI_nPD");
|
||||
|
||||
+ if(!strcmp(expansionboard_name, "zippy"))
|
||||
+ {
|
||||
+ printk(KERN_INFO "Beagle expansionboard: initializing enc28j60\n");
|
||||
+ omap3beagle_enc28j60_init();
|
||||
+ printk(KERN_INFO "Beagle expansionboard: assigning GPIO 141 and 162 to MMC1\n");
|
||||
+ mmc[1].gpio_wp = 141;
|
||||
+ mmc[1].gpio_cd = 162;
|
||||
+ }
|
||||
+
|
||||
+ if(!strcmp(expansionboard_name, "zippy2"))
|
||||
+ {
|
||||
+ printk(KERN_INFO "Beagle expansionboard: initializing ks_8851\n");
|
||||
+ omap3beagle_ks8851_init();
|
||||
+ printk(KERN_INFO "Beagle expansionboard: assigning GPIO 141 and 162 to MMC1\n");
|
||||
+ mmc[1].gpio_wp = 141;
|
||||
+ mmc[1].gpio_cd = 162;
|
||||
+ }
|
||||
+
|
||||
+ if(!strcmp(expansionboard_name, "trainer"))
|
||||
+ {
|
||||
+ printk(KERN_INFO "Beagle expansionboard: exporting GPIOs 130-141,162 to userspace\n");
|
||||
+ gpio_request(130, "sysfs");
|
||||
+ gpio_export(130, 1);
|
||||
+ gpio_request(131, "sysfs");
|
||||
+ gpio_export(131, 1);
|
||||
+ gpio_request(132, "sysfs");
|
||||
+ gpio_export(132, 1);
|
||||
+ gpio_request(133, "sysfs");
|
||||
+ gpio_export(133, 1);
|
||||
+ gpio_request(134, "sysfs");
|
||||
+ gpio_export(134, 1);
|
||||
+ gpio_request(135, "sysfs");
|
||||
+ gpio_export(135, 1);
|
||||
+ gpio_request(136, "sysfs");
|
||||
+ gpio_export(136, 1);
|
||||
+ gpio_request(137, "sysfs");
|
||||
+ gpio_export(137, 1);
|
||||
+ gpio_request(138, "sysfs");
|
||||
+ gpio_export(138, 1);
|
||||
+ gpio_request(139, "sysfs");
|
||||
+ gpio_export(139, 1);
|
||||
+ gpio_request(140, "sysfs");
|
||||
+ gpio_export(140, 1);
|
||||
+ gpio_request(141, "sysfs");
|
||||
+ gpio_export(141, 1);
|
||||
+ gpio_request(162, "sysfs");
|
||||
+ gpio_export(162, 1);
|
||||
+ }
|
||||
+
|
||||
+ if(!strcmp(expansionboard_name, "bbtoys-wifi"))
|
||||
+ {
|
||||
+ if (wl12xx_set_platform_data(&omap_beagle_wlan_data))
|
||||
+ pr_err("error setting wl12xx data\n");
|
||||
+ printk(KERN_INFO "Beagle expansionboard: registering wl12xx bt platform device\n");
|
||||
+ platform_device_register(&wl12xx_device);
|
||||
+ printk(KERN_INFO "Beagle expansionboard: registering wl12xx wifi platform device\n");
|
||||
+ platform_device_register(&omap_vwlan_device);
|
||||
+ }
|
||||
+
|
||||
usb_musb_init(NULL);
|
||||
usbhs_init(&usbhs_bdata);
|
||||
omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions,
|
||||
@@ -558,6 +802,8 @@ static void __init omap3_beagle_init(void)
|
||||
beagle_opp_init();
|
||||
}
|
||||
|
||||
+early_param("buddy", expansionboard_setup);
|
||||
+
|
||||
MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
|
||||
/* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */
|
||||
.boot_params = 0x80000100,
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
@@ -0,0 +1,26 @@
|
||||
From dcdb487041d64eab8369b477311553f3c9fc9157 Mon Sep 17 00:00:00 2001
|
||||
From: Koen Kooi <koen@dominion.thruhere.net>
|
||||
Date: Thu, 21 Jul 2011 12:59:20 +0200
|
||||
Subject: [PATCH 3/3] HACK: OMAP3: beagle: switch to GPTIMER1
|
||||
|
||||
Breaks with B3 and older due to clock noise
|
||||
|
||||
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
|
||||
---
|
||||
arch/arm/mach-omap2/board-omap3beagle.c | 2 +-
|
||||
1 files changed, 1 insertions(+), 1 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
index e542df0..f4b01a9 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
@@ -812,5 +812,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
|
||||
.init_early = omap3_beagle_init_early,
|
||||
.init_irq = omap3_beagle_init_irq,
|
||||
.init_machine = omap3_beagle_init,
|
||||
- .timer = &omap3_secure_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
@@ -319,7 +319,7 @@ CONFIG_OMAP_PM_NOOP=y
|
||||
CONFIG_ARCH_OMAP2PLUS_TYPICAL=y
|
||||
# CONFIG_ARCH_OMAP2 is not set
|
||||
CONFIG_ARCH_OMAP3=y
|
||||
# CONFIG_ARCH_OMAP4 is not set
|
||||
CONFIG_ARCH_OMAP4=y
|
||||
CONFIG_SOC_OMAP3430=y
|
||||
# CONFIG_SOC_OMAPTI816X is not set
|
||||
CONFIG_OMAP_PACKAGE_CBB=y
|
||||
@@ -463,9 +463,9 @@ CONFIG_CPU_FREQ_TABLE=y
|
||||
# CONFIG_CPU_FREQ_DEBUG is not set
|
||||
CONFIG_CPU_FREQ_STAT=y
|
||||
CONFIG_CPU_FREQ_STAT_DETAILS=y
|
||||
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
|
||||
# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
|
||||
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
|
||||
# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
|
||||
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
|
||||
# CONFIG_CPU_FREQ_DEFAULT_GOV_HOTPLUG is not set
|
||||
|
||||
+93
@@ -0,0 +1,93 @@
|
||||
From d6bdaaceafadfc31441e8dd14696da5ea683424b Mon Sep 17 00:00:00 2001
|
||||
From: Mike Turquette <mturquette@ti.com>
|
||||
Date: Wed, 29 Jun 2011 17:25:53 -0700
|
||||
Subject: [PATCH 1/8] OMAP3630: PRM: add ABB PRM register definitions
|
||||
|
||||
OMAP3630 supports an Adaptive Body-Bias ldo as well as some MPU interrupts
|
||||
related to voltage control that are not present on OMAP34XX. This patch
|
||||
adds the offsets, register addresses, bitfield shifts and masks to support
|
||||
this feature.
|
||||
|
||||
Signed-off-by: Mike Turquette <mturquette@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap2/prm-regbits-34xx.h | 34 ++++++++++++++++++++++++++++++++
|
||||
arch/arm/mach-omap2/prm2xxx_3xxx.h | 4 +++
|
||||
2 files changed, 38 insertions(+), 0 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
|
||||
index 64c087a..0309ff6 100644
|
||||
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
|
||||
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
|
||||
@@ -216,6 +216,12 @@
|
||||
/* PRM_SYSCONFIG specific bits */
|
||||
|
||||
/* PRM_IRQSTATUS_MPU specific bits */
|
||||
+#define OMAP3630_VC_BYPASS_ACK_ST_SHIFT 28
|
||||
+#define OMAP3630_VC_BYPASS_ACK_ST_MASK (1 << 28)
|
||||
+#define OMAP3630_VC_VP1_ACK_ST_SHIFT 27
|
||||
+#define OMAP3630_VC_VP1_ACK_ST_MASK (1 << 27)
|
||||
+#define OMAP3630_ABB_LDO_TRANXDONE_ST_SHIFT 26
|
||||
+#define OMAP3630_ABB_LDO_TRANXDONE_ST_MASK (1 << 26)
|
||||
#define OMAP3430ES2_SND_PERIPH_DPLL_ST_SHIFT 25
|
||||
#define OMAP3430ES2_SND_PERIPH_DPLL_ST_MASK (1 << 25)
|
||||
#define OMAP3430_VC_TIMEOUTERR_ST_MASK (1 << 24)
|
||||
@@ -248,6 +254,12 @@
|
||||
#define OMAP3430_FS_USB_WKUP_ST_MASK (1 << 1)
|
||||
|
||||
/* PRM_IRQENABLE_MPU specific bits */
|
||||
+#define OMAP3630_VC_BYPASS_ACK_EN_SHIFT 28
|
||||
+#define OMAP3630_VC_BYPASS_ACK_EN_MASK (1 << 28)
|
||||
+#define OMAP3630_VC_VP1_ACK_EN_SHIFT 27
|
||||
+#define OMAP3630_VC_VP1_ACK_EN_MASK (1 << 27)
|
||||
+#define OMAP3630_ABB_LDO_TRANXDONE_EN_SHIFT 26
|
||||
+#define OMAP3630_ABB_LDO_TRANXDONE_EN_MASK (1 << 26)
|
||||
#define OMAP3430ES2_SND_PERIPH_DPLL_RECAL_EN_SHIFT 25
|
||||
#define OMAP3430ES2_SND_PERIPH_DPLL_RECAL_EN_MASK (1 << 25)
|
||||
#define OMAP3430_VC_TIMEOUTERR_EN_MASK (1 << 24)
|
||||
@@ -587,6 +599,28 @@
|
||||
|
||||
/* PRM_VP2_STATUS specific bits */
|
||||
|
||||
+/* PRM_LDO_ABB_SETUP specific bits */
|
||||
+#define OMAP3630_SR2_IN_TRANSITION_SHIFT 6
|
||||
+#define OMAP3630_SR2_IN_TRANSITION_MASK (1 << 6)
|
||||
+#define OMAP3630_SR2_STATUS_SHIFT 3
|
||||
+#define OMAP3630_SR2_STATUS_MASK (3 << 3)
|
||||
+#define OMAP3630_OPP_CHANGE_SHIFT 2
|
||||
+#define OMAP3630_OPP_CHANGE_MASK (1 << 2)
|
||||
+#define OMAP3630_OPP_SEL_SHIFT 0
|
||||
+#define OMAP3630_OPP_SEL_MASK (3 << 0)
|
||||
+
|
||||
+/* PRM_LDO_ABB_CTRL specific bits */
|
||||
+#define OMAP3630_SR2_WTCNT_VALUE_SHIFT 8
|
||||
+#define OMAP3630_SR2_WTCNT_VALUE_MASK (0xff << 8)
|
||||
+#define OMAP3630_SLEEP_RBB_SEL_SHIFT 3
|
||||
+#define OMAP3630_SLEEP_RBB_SEL_MASK (1 << 3)
|
||||
+#define OMAP3630_ACTIVE_FBB_SEL_SHIFT 2
|
||||
+#define OMAP3630_ACTIVE_FBB_SEL_MASK (1 << 2)
|
||||
+#define OMAP3630_ACTIVE_RBB_SEL_SHIFT 1
|
||||
+#define OMAP3630_ACTIVE_RBB_SEL_MASK (1 << 1)
|
||||
+#define OMAP3630_SR2EN_SHIFT 0
|
||||
+#define OMAP3630_SR2EN_MASK (1 << 0)
|
||||
+
|
||||
/* RM_RSTST_NEON specific bits */
|
||||
|
||||
/* PM_WKDEP_NEON specific bits */
|
||||
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
|
||||
index cef533d..408d1c7 100644
|
||||
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
|
||||
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
|
||||
@@ -167,6 +167,10 @@
|
||||
#define OMAP3430_PRM_VP2_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e0)
|
||||
#define OMAP3_PRM_VP2_STATUS_OFFSET 0x00e4
|
||||
#define OMAP3430_PRM_VP2_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e4)
|
||||
+#define OMAP3_PRM_LDO_ABB_SETUP_OFFSET 0x00f0
|
||||
+#define OMAP3630_PRM_LDO_ABB_SETUP OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00f0)
|
||||
+#define OMAP3_PRM_LDO_ABB_CTRL_OFFSET 0x00f4
|
||||
+#define OMAP3630_PRM_LDO_ABB_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00f4)
|
||||
|
||||
#define OMAP3_PRM_CLKSEL_OFFSET 0x0040
|
||||
#define OMAP3430_PRM_CLKSEL OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0040)
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+263
@@ -0,0 +1,263 @@
|
||||
From 8e6411258660b08ee55b4148cca37f841d9c9568 Mon Sep 17 00:00:00 2001
|
||||
From: Nishanth Menon <nm@ti.com>
|
||||
Date: Wed, 29 Jun 2011 17:25:54 -0700
|
||||
Subject: [PATCH 2/8] OMAP3+: PM: VP: generalize PRM interrupt helpers
|
||||
|
||||
We have multiple interrupt status hidden in the PRM interrupt status
|
||||
reg. Make this handling generic to allow us to pull out LDO status such
|
||||
as those for ABB from it using the same data structure and indexing. We
|
||||
hence rename accordingly.
|
||||
|
||||
We also fix a trivial warning as the variable does not need exporting:
|
||||
arch/arm/mach-omap2/prm2xxx_3xxx.c:172:22: warning: symbol
|
||||
'omap3_prm_irqs' was not declared. Should it be static?
|
||||
|
||||
Signed-off-by: Nishanth Menon <nm@ti.com>
|
||||
Signed-off-by: Mike Turquette <mturquette@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap2/prm2xxx_3xxx.c | 22 +++++++++++-----------
|
||||
arch/arm/mach-omap2/prm2xxx_3xxx.h | 7 +++++--
|
||||
arch/arm/mach-omap2/prm44xx.c | 28 ++++++++++++++--------------
|
||||
arch/arm/mach-omap2/prm44xx.h | 7 +++++--
|
||||
arch/arm/mach-omap2/vp.h | 9 ---------
|
||||
arch/arm/mach-omap2/vp3xxx_data.c | 4 ++--
|
||||
arch/arm/mach-omap2/vp44xx_data.c | 6 +++---
|
||||
7 files changed, 40 insertions(+), 43 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
|
||||
index 3b83763..8a20242 100644
|
||||
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
|
||||
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
|
||||
@@ -162,39 +162,39 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
|
||||
/* PRM VP */
|
||||
|
||||
/*
|
||||
- * struct omap3_vp - OMAP3 VP register access description.
|
||||
+ * struct omap3_prm_irq - OMAP3 PRM IRQ register access description.
|
||||
* @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
|
||||
*/
|
||||
-struct omap3_vp {
|
||||
+struct omap3_prm_irq {
|
||||
u32 tranxdone_status;
|
||||
};
|
||||
|
||||
-struct omap3_vp omap3_vp[] = {
|
||||
- [OMAP3_VP_VDD_MPU_ID] = {
|
||||
+static struct omap3_prm_irq omap3_prm_irqs[] = {
|
||||
+ [OMAP3_PRM_IRQ_VDD_MPU_ID] = {
|
||||
.tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK,
|
||||
},
|
||||
- [OMAP3_VP_VDD_CORE_ID] = {
|
||||
+ [OMAP3_PRM_IRQ_VDD_CORE_ID] = {
|
||||
.tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK,
|
||||
},
|
||||
};
|
||||
|
||||
#define MAX_VP_ID ARRAY_SIZE(omap3_vp);
|
||||
|
||||
-u32 omap3_prm_vp_check_txdone(u8 vp_id)
|
||||
+u32 omap3_prm_vp_check_txdone(u8 irq_id)
|
||||
{
|
||||
- struct omap3_vp *vp = &omap3_vp[vp_id];
|
||||
+ struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id];
|
||||
u32 irqstatus;
|
||||
|
||||
irqstatus = omap2_prm_read_mod_reg(OCP_MOD,
|
||||
OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
|
||||
- return irqstatus & vp->tranxdone_status;
|
||||
+ return irqstatus & irq->tranxdone_status;
|
||||
}
|
||||
|
||||
-void omap3_prm_vp_clear_txdone(u8 vp_id)
|
||||
+void omap3_prm_vp_clear_txdone(u8 irq_id)
|
||||
{
|
||||
- struct omap3_vp *vp = &omap3_vp[vp_id];
|
||||
+ struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id];
|
||||
|
||||
- omap2_prm_write_mod_reg(vp->tranxdone_status,
|
||||
+ omap2_prm_write_mod_reg(irq->tranxdone_status,
|
||||
OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
|
||||
}
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
|
||||
index 408d1c7..d90b23f 100644
|
||||
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
|
||||
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
|
||||
@@ -307,9 +307,12 @@ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift);
|
||||
extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift);
|
||||
extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift);
|
||||
|
||||
+#define OMAP3_PRM_IRQ_VDD_MPU_ID 0
|
||||
+#define OMAP3_PRM_IRQ_VDD_CORE_ID 1
|
||||
/* OMAP3-specific VP functions */
|
||||
-u32 omap3_prm_vp_check_txdone(u8 vp_id);
|
||||
-void omap3_prm_vp_clear_txdone(u8 vp_id);
|
||||
+u32 omap3_prm_vp_check_txdone(u8 irq_id);
|
||||
+void omap3_prm_vp_clear_txdone(u8 irq_id);
|
||||
+
|
||||
|
||||
/*
|
||||
* OMAP3 access functions for voltage controller (VC) and
|
||||
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
|
||||
index 495a31a..b77d331 100644
|
||||
--- a/arch/arm/mach-omap2/prm44xx.c
|
||||
+++ b/arch/arm/mach-omap2/prm44xx.c
|
||||
@@ -57,49 +57,49 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
|
||||
/* PRM VP */
|
||||
|
||||
/*
|
||||
- * struct omap4_vp - OMAP4 VP register access description.
|
||||
+ * struct omap4_prm_irq - OMAP4 VP register access description.
|
||||
* @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP
|
||||
* @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
|
||||
*/
|
||||
-struct omap4_vp {
|
||||
+struct omap4_prm_irq {
|
||||
u32 irqstatus_mpu;
|
||||
u32 tranxdone_status;
|
||||
};
|
||||
|
||||
-static struct omap4_vp omap4_vp[] = {
|
||||
- [OMAP4_VP_VDD_MPU_ID] = {
|
||||
+static struct omap4_prm_irq omap4_prm_irqs[] = {
|
||||
+ [OMAP4_PRM_IRQ_VDD_MPU_ID] = {
|
||||
.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET,
|
||||
.tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK,
|
||||
},
|
||||
- [OMAP4_VP_VDD_IVA_ID] = {
|
||||
+ [OMAP4_PRM_IRQ_VDD_IVA_ID] = {
|
||||
.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
|
||||
.tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK,
|
||||
},
|
||||
- [OMAP4_VP_VDD_CORE_ID] = {
|
||||
+ [OMAP4_PRM_IRQ_VDD_CORE_ID] = {
|
||||
.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
|
||||
.tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK,
|
||||
},
|
||||
};
|
||||
|
||||
-u32 omap4_prm_vp_check_txdone(u8 vp_id)
|
||||
+u32 omap4_prm_vp_check_txdone(u8 irq_id)
|
||||
{
|
||||
- struct omap4_vp *vp = &omap4_vp[vp_id];
|
||||
+ struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id];
|
||||
u32 irqstatus;
|
||||
|
||||
irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
|
||||
OMAP4430_PRM_OCP_SOCKET_INST,
|
||||
- vp->irqstatus_mpu);
|
||||
- return irqstatus & vp->tranxdone_status;
|
||||
+ irq->irqstatus_mpu);
|
||||
+ return irqstatus & irq->tranxdone_status;
|
||||
}
|
||||
|
||||
-void omap4_prm_vp_clear_txdone(u8 vp_id)
|
||||
+void omap4_prm_vp_clear_txdone(u8 irq_id)
|
||||
{
|
||||
- struct omap4_vp *vp = &omap4_vp[vp_id];
|
||||
+ struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id];
|
||||
|
||||
- omap4_prminst_write_inst_reg(vp->tranxdone_status,
|
||||
+ omap4_prminst_write_inst_reg(irq->tranxdone_status,
|
||||
OMAP4430_PRM_PARTITION,
|
||||
OMAP4430_PRM_OCP_SOCKET_INST,
|
||||
- vp->irqstatus_mpu);
|
||||
+ irq->irqstatus_mpu);
|
||||
};
|
||||
|
||||
u32 omap4_prm_vcvp_read(u8 offset)
|
||||
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
|
||||
index 3d66ccd..858ee53 100644
|
||||
--- a/arch/arm/mach-omap2/prm44xx.h
|
||||
+++ b/arch/arm/mach-omap2/prm44xx.h
|
||||
@@ -751,9 +751,12 @@ extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx);
|
||||
extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx);
|
||||
extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
|
||||
|
||||
+#define OMAP4_PRM_IRQ_VDD_CORE_ID 0
|
||||
+#define OMAP4_PRM_IRQ_VDD_IVA_ID 1
|
||||
+#define OMAP4_PRM_IRQ_VDD_MPU_ID 2
|
||||
/* OMAP4-specific VP functions */
|
||||
-u32 omap4_prm_vp_check_txdone(u8 vp_id);
|
||||
-void omap4_prm_vp_clear_txdone(u8 vp_id);
|
||||
+u32 omap4_prm_vp_check_txdone(u8 irq_id);
|
||||
+void omap4_prm_vp_clear_txdone(u8 irq_id);
|
||||
|
||||
/*
|
||||
* OMAP4 access functions for voltage controller (VC) and
|
||||
diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h
|
||||
index d9bc4f1..ee31e2f 100644
|
||||
--- a/arch/arm/mach-omap2/vp.h
|
||||
+++ b/arch/arm/mach-omap2/vp.h
|
||||
@@ -21,15 +21,6 @@
|
||||
|
||||
struct voltagedomain;
|
||||
|
||||
-/*
|
||||
- * Voltage Processor (VP) identifiers
|
||||
- */
|
||||
-#define OMAP3_VP_VDD_MPU_ID 0
|
||||
-#define OMAP3_VP_VDD_CORE_ID 1
|
||||
-#define OMAP4_VP_VDD_CORE_ID 0
|
||||
-#define OMAP4_VP_VDD_IVA_ID 1
|
||||
-#define OMAP4_VP_VDD_MPU_ID 2
|
||||
-
|
||||
/* XXX document */
|
||||
#define VP_IDLE_TIMEOUT 200
|
||||
#define VP_TRANXDONE_TIMEOUT 300
|
||||
diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c
|
||||
index 260c554..7bd8181 100644
|
||||
--- a/arch/arm/mach-omap2/vp3xxx_data.c
|
||||
+++ b/arch/arm/mach-omap2/vp3xxx_data.c
|
||||
@@ -57,7 +57,7 @@ static const struct omap_vp_common omap3_vp_common = {
|
||||
};
|
||||
|
||||
struct omap_vp_instance omap3_vp_mpu = {
|
||||
- .id = OMAP3_VP_VDD_MPU_ID,
|
||||
+ .id = OMAP3_PRM_IRQ_VDD_MPU_ID,
|
||||
.common = &omap3_vp_common,
|
||||
.vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET,
|
||||
.vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET,
|
||||
@@ -68,7 +68,7 @@ struct omap_vp_instance omap3_vp_mpu = {
|
||||
};
|
||||
|
||||
struct omap_vp_instance omap3_vp_core = {
|
||||
- .id = OMAP3_VP_VDD_CORE_ID,
|
||||
+ .id = OMAP3_PRM_IRQ_VDD_CORE_ID,
|
||||
.common = &omap3_vp_common,
|
||||
.vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET,
|
||||
.vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET,
|
||||
diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c
|
||||
index b4e7704..6de8ed6 100644
|
||||
--- a/arch/arm/mach-omap2/vp44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/vp44xx_data.c
|
||||
@@ -56,7 +56,7 @@ static const struct omap_vp_common omap4_vp_common = {
|
||||
};
|
||||
|
||||
struct omap_vp_instance omap4_vp_mpu = {
|
||||
- .id = OMAP4_VP_VDD_MPU_ID,
|
||||
+ .id = OMAP4_PRM_IRQ_VDD_MPU_ID,
|
||||
.common = &omap4_vp_common,
|
||||
.vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET,
|
||||
.vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET,
|
||||
@@ -67,7 +67,7 @@ struct omap_vp_instance omap4_vp_mpu = {
|
||||
};
|
||||
|
||||
struct omap_vp_instance omap4_vp_iva = {
|
||||
- .id = OMAP4_VP_VDD_IVA_ID,
|
||||
+ .id = OMAP4_PRM_IRQ_VDD_IVA_ID,
|
||||
.common = &omap4_vp_common,
|
||||
.vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET,
|
||||
.vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET,
|
||||
@@ -78,7 +78,7 @@ struct omap_vp_instance omap4_vp_iva = {
|
||||
};
|
||||
|
||||
struct omap_vp_instance omap4_vp_core = {
|
||||
- .id = OMAP4_VP_VDD_CORE_ID,
|
||||
+ .id = OMAP4_PRM_IRQ_VDD_CORE_ID,
|
||||
.common = &omap4_vp_common,
|
||||
.vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET,
|
||||
.vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET,
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+202
@@ -0,0 +1,202 @@
|
||||
From 6dd3408940048af572773518f8646226828e7275 Mon Sep 17 00:00:00 2001
|
||||
From: Nishanth Menon <nm@ti.com>
|
||||
Date: Wed, 29 Jun 2011 17:25:55 -0700
|
||||
Subject: [PATCH 3/8] OMAP3+: PRM: add tranxdone IRQ handlers for ABB
|
||||
|
||||
OMAP3 and more recent platforms support a PRM interrupt to the MPU for
|
||||
Adapative Body-Bias ldo transitions.
|
||||
|
||||
Add helpers to the OMAP3 & OMAP4 PRM code to check the status of the
|
||||
interrupt and also to clear it. These will be called from the ABB code
|
||||
as part of the greater voltage scaling sequence.
|
||||
|
||||
Signed-off-by: Nishanth Menon <nm@ti.com>
|
||||
Signed-off-by: Mike Turquette <mturquette@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap2/prm2xxx_3xxx.c | 35 ++++++++++++++++++++++++++-----
|
||||
arch/arm/mach-omap2/prm2xxx_3xxx.h | 3 ++
|
||||
arch/arm/mach-omap2/prm44xx.c | 40 +++++++++++++++++++++++++++++------
|
||||
arch/arm/mach-omap2/prm44xx.h | 3 ++
|
||||
4 files changed, 68 insertions(+), 13 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
|
||||
index 8a20242..49e9719 100644
|
||||
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
|
||||
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
|
||||
@@ -163,18 +163,23 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
|
||||
|
||||
/*
|
||||
* struct omap3_prm_irq - OMAP3 PRM IRQ register access description.
|
||||
- * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
|
||||
+ * @vp_tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
|
||||
+ * @abb_tranxdone_status: ABB_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
|
||||
+ * (ONLY for OMAP3630)
|
||||
*/
|
||||
struct omap3_prm_irq {
|
||||
- u32 tranxdone_status;
|
||||
+ u32 vp_tranxdone_status;
|
||||
+ u32 abb_tranxdone_status;
|
||||
};
|
||||
|
||||
static struct omap3_prm_irq omap3_prm_irqs[] = {
|
||||
[OMAP3_PRM_IRQ_VDD_MPU_ID] = {
|
||||
- .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK,
|
||||
+ .vp_tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK,
|
||||
+ .abb_tranxdone_status = OMAP3630_ABB_LDO_TRANXDONE_ST_MASK,
|
||||
},
|
||||
[OMAP3_PRM_IRQ_VDD_CORE_ID] = {
|
||||
- .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK,
|
||||
+ .vp_tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK,
|
||||
+ /* no abb for core */
|
||||
},
|
||||
};
|
||||
|
||||
@@ -187,14 +192,32 @@ u32 omap3_prm_vp_check_txdone(u8 irq_id)
|
||||
|
||||
irqstatus = omap2_prm_read_mod_reg(OCP_MOD,
|
||||
OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
|
||||
- return irqstatus & irq->tranxdone_status;
|
||||
+ return irqstatus & irq->vp_tranxdone_status;
|
||||
}
|
||||
|
||||
void omap3_prm_vp_clear_txdone(u8 irq_id)
|
||||
{
|
||||
struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id];
|
||||
|
||||
- omap2_prm_write_mod_reg(irq->tranxdone_status,
|
||||
+ omap2_prm_write_mod_reg(irq->vp_tranxdone_status,
|
||||
+ OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
|
||||
+}
|
||||
+
|
||||
+u32 omap36xx_prm_abb_check_txdone(u8 irq_id)
|
||||
+{
|
||||
+ struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id];
|
||||
+ u32 irqstatus;
|
||||
+
|
||||
+ irqstatus = omap2_prm_read_mod_reg(OCP_MOD,
|
||||
+ OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
|
||||
+ return irqstatus & irq->abb_tranxdone_status;
|
||||
+}
|
||||
+
|
||||
+void omap36xx_prm_abb_clear_txdone(u8 irq_id)
|
||||
+{
|
||||
+ struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id];
|
||||
+
|
||||
+ omap2_prm_write_mod_reg(irq->abb_tranxdone_status,
|
||||
OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
|
||||
}
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
|
||||
index d90b23f..08d5f1e 100644
|
||||
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
|
||||
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
|
||||
@@ -313,6 +313,9 @@ extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift);
|
||||
u32 omap3_prm_vp_check_txdone(u8 irq_id);
|
||||
void omap3_prm_vp_clear_txdone(u8 irq_id);
|
||||
|
||||
+/* OMAP36xx-specific ABB functions */
|
||||
+u32 omap36xx_prm_abb_check_txdone(u8 irq_id);
|
||||
+void omap36xx_prm_abb_clear_txdone(u8 irq_id);
|
||||
|
||||
/*
|
||||
* OMAP3 access functions for voltage controller (VC) and
|
||||
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
|
||||
index b77d331..dd3776c 100644
|
||||
--- a/arch/arm/mach-omap2/prm44xx.c
|
||||
+++ b/arch/arm/mach-omap2/prm44xx.c
|
||||
@@ -59,25 +59,30 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
|
||||
/*
|
||||
* struct omap4_prm_irq - OMAP4 VP register access description.
|
||||
* @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP
|
||||
- * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
|
||||
+ * @vp_tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
|
||||
+ * @abb_tranxdone_status: ABB_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
|
||||
*/
|
||||
struct omap4_prm_irq {
|
||||
u32 irqstatus_mpu;
|
||||
- u32 tranxdone_status;
|
||||
+ u32 vp_tranxdone_status;
|
||||
+ u32 abb_tranxdone_status;
|
||||
};
|
||||
|
||||
static struct omap4_prm_irq omap4_prm_irqs[] = {
|
||||
[OMAP4_PRM_IRQ_VDD_MPU_ID] = {
|
||||
.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET,
|
||||
- .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK,
|
||||
+ .vp_tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK,
|
||||
+ .abb_tranxdone_status = OMAP4430_ABB_MPU_DONE_ST_MASK
|
||||
},
|
||||
[OMAP4_PRM_IRQ_VDD_IVA_ID] = {
|
||||
.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
|
||||
- .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK,
|
||||
+ .vp_tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK,
|
||||
+ .abb_tranxdone_status = OMAP4430_ABB_IVA_DONE_ST_MASK,
|
||||
},
|
||||
[OMAP4_PRM_IRQ_VDD_CORE_ID] = {
|
||||
.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
|
||||
- .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK,
|
||||
+ .vp_tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK,
|
||||
+ /* Core has no ABB */
|
||||
},
|
||||
};
|
||||
|
||||
@@ -89,19 +94,40 @@ u32 omap4_prm_vp_check_txdone(u8 irq_id)
|
||||
irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
|
||||
OMAP4430_PRM_OCP_SOCKET_INST,
|
||||
irq->irqstatus_mpu);
|
||||
- return irqstatus & irq->tranxdone_status;
|
||||
+ return irqstatus & irq->vp_tranxdone_status;
|
||||
}
|
||||
|
||||
void omap4_prm_vp_clear_txdone(u8 irq_id)
|
||||
{
|
||||
struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id];
|
||||
|
||||
- omap4_prminst_write_inst_reg(irq->tranxdone_status,
|
||||
+ omap4_prminst_write_inst_reg(irq->vp_tranxdone_status,
|
||||
OMAP4430_PRM_PARTITION,
|
||||
OMAP4430_PRM_OCP_SOCKET_INST,
|
||||
irq->irqstatus_mpu);
|
||||
};
|
||||
|
||||
+u32 omap4_prm_abb_check_txdone(u8 irq_id)
|
||||
+{
|
||||
+ struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id];
|
||||
+ u32 irqstatus;
|
||||
+
|
||||
+ irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
|
||||
+ OMAP4430_PRM_OCP_SOCKET_INST,
|
||||
+ irq->irqstatus_mpu);
|
||||
+ return irqstatus & irq->abb_tranxdone_status;
|
||||
+}
|
||||
+
|
||||
+void omap4_prm_abb_clear_txdone(u8 irq_id)
|
||||
+{
|
||||
+ struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id];
|
||||
+
|
||||
+ omap4_prminst_write_inst_reg(irq->abb_tranxdone_status,
|
||||
+ OMAP4430_PRM_PARTITION,
|
||||
+ OMAP4430_PRM_OCP_SOCKET_INST,
|
||||
+ irq->irqstatus_mpu);
|
||||
+}
|
||||
+
|
||||
u32 omap4_prm_vcvp_read(u8 offset)
|
||||
{
|
||||
return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
|
||||
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
|
||||
index 858ee53..8ce3207 100644
|
||||
--- a/arch/arm/mach-omap2/prm44xx.h
|
||||
+++ b/arch/arm/mach-omap2/prm44xx.h
|
||||
@@ -757,6 +757,9 @@ extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
|
||||
/* OMAP4-specific VP functions */
|
||||
u32 omap4_prm_vp_check_txdone(u8 irq_id);
|
||||
void omap4_prm_vp_clear_txdone(u8 irq_id);
|
||||
+/* OMAP4-specific ABB functions */
|
||||
+u32 omap4_prm_abb_check_txdone(u8 irq_id);
|
||||
+void omap4_prm_abb_clear_txdone(u8 irq_id);
|
||||
|
||||
/*
|
||||
* OMAP4 access functions for voltage controller (VC) and
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+240
@@ -0,0 +1,240 @@
|
||||
From cd3d2049b3c59b5b28efe81b91f4051fea51687b Mon Sep 17 00:00:00 2001
|
||||
From: Mike Turquette <mturquette@ti.com>
|
||||
Date: Wed, 29 Jun 2011 17:25:56 -0700
|
||||
Subject: [PATCH 4/8] OMAP3+: ABB: Adaptive Body-Bias structures & data
|
||||
|
||||
Due to voltage domain trimming and silicon characterstics some silicon
|
||||
may experience instability when operating at a high voltage. To
|
||||
compensate for this an Adaptive Body-Bias ldo exists. First featured in
|
||||
OMAP3630, the purpose of this ldo is to provide a voltage boost to PMOS
|
||||
backgates when a voltage domain is operating at a high OPP. In this
|
||||
mode the ldo is said to be in Forward Body-Bias. At OPPs within a
|
||||
nominal voltage range the ABB ldo is bypassed.
|
||||
|
||||
This patch introduces the data structures needed to represent the ABB
|
||||
ldo's in the voltage layer, and populates the appropriate data for 3630
|
||||
and OMAP4. Not all voltage domains have an ABB ldo, and OMAP34xx does
|
||||
not have it at all; in such cases the voltage data will be marked with
|
||||
OMAP_ABB_NO_LDO.
|
||||
|
||||
Signed-off-by: Mike Turquette <mturquette@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap2/Makefile | 5 +-
|
||||
arch/arm/mach-omap2/abb.h | 85 ++++++++++++++++++++++++++++++++++++
|
||||
arch/arm/mach-omap2/abb36xx_data.c | 38 ++++++++++++++++
|
||||
arch/arm/mach-omap2/abb44xx_data.c | 44 ++++++++++++++++++
|
||||
4 files changed, 170 insertions(+), 2 deletions(-)
|
||||
create mode 100644 arch/arm/mach-omap2/abb.h
|
||||
create mode 100644 arch/arm/mach-omap2/abb36xx_data.c
|
||||
create mode 100644 arch/arm/mach-omap2/abb44xx_data.c
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
|
||||
index 7927dd6..5bc306c 100644
|
||||
--- a/arch/arm/mach-omap2/Makefile
|
||||
+++ b/arch/arm/mach-omap2/Makefile
|
||||
@@ -82,14 +82,15 @@ endif
|
||||
# PRCM
|
||||
obj-$(CONFIG_ARCH_OMAP2) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o
|
||||
obj-$(CONFIG_ARCH_OMAP3) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o \
|
||||
- vc3xxx_data.o vp3xxx_data.o
|
||||
+ vc3xxx_data.o vp3xxx_data.o \
|
||||
+ abb36xx_data.o
|
||||
# XXX The presence of cm2xxx_3xxx.o on the line below is temporary and
|
||||
# will be removed once the OMAP4 part of the codebase is converted to
|
||||
# use OMAP4-specific PRCM functions.
|
||||
obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \
|
||||
cm44xx.o prcm_mpu44xx.o \
|
||||
prminst44xx.o vc44xx_data.o \
|
||||
- vp44xx_data.o
|
||||
+ vp44xx_data.o abb44xx_data.o
|
||||
|
||||
# OMAP voltage domains
|
||||
ifeq ($(CONFIG_PM),y)
|
||||
diff --git a/arch/arm/mach-omap2/abb.h b/arch/arm/mach-omap2/abb.h
|
||||
new file mode 100644
|
||||
index 0000000..74f2044
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/mach-omap2/abb.h
|
||||
@@ -0,0 +1,85 @@
|
||||
+/*
|
||||
+ * OMAP Adaptive Body-Bias structure and macro definitions
|
||||
+ *
|
||||
+ * Copyright (C) 2011 Texas Instruments, Inc.
|
||||
+ * Mike Turquette <mturquette@ti.com>
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License version 2 as
|
||||
+ * published by the Free Software Foundation.
|
||||
+ */
|
||||
+
|
||||
+#ifndef __ARCH_ARM_MACH_OMAP2_ABB_H
|
||||
+#define __ARCH_ARM_MACH_OMAP2_ABB_H
|
||||
+
|
||||
+#include <linux/kernel.h>
|
||||
+
|
||||
+#include "voltage.h"
|
||||
+
|
||||
+/* NOMINAL_OPP bypasses the ABB ldo, FAST_OPP sets it to Forward Body-Bias */
|
||||
+#define OMAP_ABB_NOMINAL_OPP 0
|
||||
+#define OMAP_ABB_FAST_OPP 1
|
||||
+#define OMAP_ABB_NO_LDO ~0
|
||||
+
|
||||
+/* Time for the ABB ldo to settle after transition (in micro-seconds) */
|
||||
+#define ABB_TRANXDONE_TIMEOUT 50
|
||||
+
|
||||
+/*
|
||||
+ * struct omap_abb_ops - per-OMAP operations needed for ABB transition
|
||||
+ *
|
||||
+ * @check_tranxdone: return status of ldo transition from PRM_IRQSTATUS
|
||||
+ * @clear_tranxdone: clear ABB transition status bit from PRM_IRQSTATUS
|
||||
+ */
|
||||
+struct omap_abb_ops {
|
||||
+ u32 (*check_tranxdone)(u8 irq_id);
|
||||
+ void (*clear_tranxdone)(u8 irq_id);
|
||||
+};
|
||||
+
|
||||
+/*
|
||||
+ * struct omap_abb_common - ABB data common to an OMAP family
|
||||
+ *
|
||||
+ * @opp_sel_mask: CTRL reg uses this to program next state of ldo
|
||||
+ * @opp_change_mask: CTRL reg uses this to initiate ldo state change
|
||||
+ * @sr2_wtcnt_value_mask: SETUP reg uses this to program ldo settling time
|
||||
+ * @sr2en_mask: SETUP reg uses this to enable/disable ldo
|
||||
+ * @active_fbb_sel_mask: SETUP reg uses this to enable/disable FBB operation
|
||||
+ * @settling_time: number of micro-seconds it takes for ldo to transition
|
||||
+ * @clock_cycles: settling_time is counted in multiples of clock cycles
|
||||
+ * @ops: pointer to common ops for manipulating PRM_IRQSTATUS bits
|
||||
+ */
|
||||
+struct omap_abb_common {
|
||||
+ u32 opp_sel_mask;
|
||||
+ u32 opp_change_mask;
|
||||
+ u32 sr2_wtcnt_value_mask;
|
||||
+ u32 sr2en_mask;
|
||||
+ u32 active_fbb_sel_mask;
|
||||
+ unsigned long settling_time;
|
||||
+ unsigned long clock_cycles;
|
||||
+ const struct omap_abb_ops *ops;
|
||||
+};
|
||||
+
|
||||
+/*
|
||||
+ * struct omap_abb_instance - data for each instance of ABB ldo
|
||||
+ *
|
||||
+ * @setup_offs: PRM register offset for initial configuration of ABB ldo
|
||||
+ * @ctrl_offs: PRM register offset for active programming of ABB ldo
|
||||
+ * @prm_irq_id: IRQ handle used to resolve IRQSTATUS offset & masks
|
||||
+ * @enabled: track whether ABB ldo is enabled or disabled
|
||||
+ * @common: pointer to common data for all ABB ldo's
|
||||
+ * @_opp_sel: internally track last programmed state of ABB ldo. DO NOT USE
|
||||
+ */
|
||||
+struct omap_abb_instance {
|
||||
+ u8 setup_offs;
|
||||
+ u8 ctrl_offs;
|
||||
+ u8 prm_irq_id;
|
||||
+ bool enabled;
|
||||
+ const struct omap_abb_common *common;
|
||||
+ u8 _opp_sel;
|
||||
+};
|
||||
+
|
||||
+extern struct omap_abb_instance omap36xx_abb_mpu;
|
||||
+
|
||||
+extern struct omap_abb_instance omap4_abb_mpu;
|
||||
+extern struct omap_abb_instance omap4_abb_iva;
|
||||
+
|
||||
+#endif
|
||||
diff --git a/arch/arm/mach-omap2/abb36xx_data.c b/arch/arm/mach-omap2/abb36xx_data.c
|
||||
new file mode 100644
|
||||
index 0000000..0bcfd66
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/mach-omap2/abb36xx_data.c
|
||||
@@ -0,0 +1,38 @@
|
||||
+/*
|
||||
+ * OMAP36xx Adaptive Body-Bias (ABB) data
|
||||
+ *
|
||||
+ * Copyright (C) 2011 Texas Instruments, Inc.
|
||||
+ * Mike Turquette <mturquette@ti.com>
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License version 2 as
|
||||
+ * published by the Free Software Foundation.
|
||||
+ */
|
||||
+
|
||||
+#include "abb.h"
|
||||
+#include "prm2xxx_3xxx.h"
|
||||
+#include "prm-regbits-34xx.h"
|
||||
+
|
||||
+static const struct omap_abb_ops omap36xx_abb_ops = {
|
||||
+ .check_tranxdone = &omap36xx_prm_abb_check_txdone,
|
||||
+ .clear_tranxdone = &omap36xx_prm_abb_clear_txdone,
|
||||
+};
|
||||
+
|
||||
+static const struct omap_abb_common omap36xx_abb_common = {
|
||||
+ .opp_sel_mask = OMAP3630_OPP_SEL_MASK,
|
||||
+ .opp_change_mask = OMAP3630_OPP_CHANGE_MASK,
|
||||
+ .sr2en_mask = OMAP3630_SR2EN_MASK,
|
||||
+ .active_fbb_sel_mask = OMAP3630_ACTIVE_FBB_SEL_MASK,
|
||||
+ .sr2_wtcnt_value_mask = OMAP3630_SR2_WTCNT_VALUE_MASK,
|
||||
+ .settling_time = 30,
|
||||
+ .clock_cycles = 8,
|
||||
+ .ops = &omap36xx_abb_ops,
|
||||
+};
|
||||
+
|
||||
+/* SETUP & CTRL registers swapped names in OMAP4; thus 36xx looks strange */
|
||||
+struct omap_abb_instance omap36xx_abb_mpu = {
|
||||
+ .setup_offs = OMAP3_PRM_LDO_ABB_CTRL_OFFSET,
|
||||
+ .ctrl_offs = OMAP3_PRM_LDO_ABB_SETUP_OFFSET,
|
||||
+ .prm_irq_id = OMAP3_PRM_IRQ_VDD_MPU_ID,
|
||||
+ .common = &omap36xx_abb_common,
|
||||
+};
|
||||
diff --git a/arch/arm/mach-omap2/abb44xx_data.c b/arch/arm/mach-omap2/abb44xx_data.c
|
||||
new file mode 100644
|
||||
index 0000000..a7cf855
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/mach-omap2/abb44xx_data.c
|
||||
@@ -0,0 +1,44 @@
|
||||
+/*
|
||||
+ * OMAP44xx Adaptive Body-Bias (ABB) data
|
||||
+ *
|
||||
+ * Copyright (C) 2011 Texas Instruments, Inc.
|
||||
+ * Mike Turquette <mturquette@ti.com>
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License version 2 as
|
||||
+ * published by the Free Software Foundation.
|
||||
+ */
|
||||
+
|
||||
+#include "abb.h"
|
||||
+#include "prm44xx.h"
|
||||
+#include "prm-regbits-44xx.h"
|
||||
+
|
||||
+static const struct omap_abb_ops omap4_abb_ops = {
|
||||
+ .check_tranxdone = &omap4_prm_abb_check_txdone,
|
||||
+ .clear_tranxdone = &omap4_prm_abb_clear_txdone,
|
||||
+};
|
||||
+
|
||||
+static const struct omap_abb_common omap4_abb_common = {
|
||||
+ .opp_sel_mask = OMAP4430_OPP_SEL_MASK,
|
||||
+ .opp_change_mask = OMAP4430_OPP_CHANGE_MASK,
|
||||
+ .sr2en_mask = OMAP4430_SR2EN_MASK,
|
||||
+ .active_fbb_sel_mask = OMAP4430_ACTIVE_FBB_SEL_MASK,
|
||||
+ .sr2_wtcnt_value_mask = OMAP4430_SR2_WTCNT_VALUE_MASK,
|
||||
+ .settling_time = 50,
|
||||
+ .clock_cycles = 16,
|
||||
+ .ops = &omap4_abb_ops,
|
||||
+};
|
||||
+
|
||||
+struct omap_abb_instance omap4_abb_mpu = {
|
||||
+ .setup_offs = OMAP4_PRM_LDO_ABB_MPU_SETUP_OFFSET,
|
||||
+ .ctrl_offs = OMAP4_PRM_LDO_ABB_MPU_CTRL_OFFSET,
|
||||
+ .prm_irq_id = OMAP4_PRM_IRQ_VDD_MPU_ID,
|
||||
+ .common = &omap4_abb_common,
|
||||
+};
|
||||
+
|
||||
+struct omap_abb_instance omap4_abb_iva = {
|
||||
+ .setup_offs = OMAP4_PRM_LDO_ABB_IVA_SETUP_OFFSET,
|
||||
+ .ctrl_offs = OMAP4_PRM_LDO_ABB_IVA_CTRL_OFFSET,
|
||||
+ .prm_irq_id = OMAP4_PRM_IRQ_VDD_IVA_ID,
|
||||
+ .common = &omap4_abb_common,
|
||||
+};
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+194
@@ -0,0 +1,194 @@
|
||||
From dbbe5cde8c8c9b055ba8bd22d329149b2a0a09e2 Mon Sep 17 00:00:00 2001
|
||||
From: Mike Turquette <mturquette@ti.com>
|
||||
Date: Wed, 29 Jun 2011 17:25:57 -0700
|
||||
Subject: [PATCH 5/8] OMAP3+: OPP: add ABB data to voltage tables
|
||||
|
||||
The operating mode of the Adaptive Body-Bias ldo maps directly to the
|
||||
voltage of its voltage domain. The two modes supported are bypass and
|
||||
Forward Body-Bias (FBB).
|
||||
|
||||
This patch models this relationship by adding an opp_sel paramter to
|
||||
struct omap_volt_data and populates this type in the 3630 and 4430
|
||||
voltage tables.
|
||||
|
||||
NOMINAL_OPP causes the ABB ldo to be in bypass at that specific voltage.
|
||||
FAST_OPP causes the ldo to operate in Forward Body-Bias mode.
|
||||
|
||||
Not all voltage domains have an ABB ldo and 3430 doesn't have one at
|
||||
all. In such cases voltages are marked with OMAP_ABB_NO_LDO.
|
||||
|
||||
Signed-off-by: Mike Turquette <mturquette@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap2/omap_opp_data.h | 5 ++-
|
||||
arch/arm/mach-omap2/opp3xxx_data.c | 37 ++++++++++++++++++-----------------
|
||||
arch/arm/mach-omap2/opp4xxx_data.c | 25 ++++++++++++-----------
|
||||
arch/arm/mach-omap2/voltage.h | 1 +
|
||||
4 files changed, 36 insertions(+), 32 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/omap_opp_data.h b/arch/arm/mach-omap2/omap_opp_data.h
|
||||
index c784c12..5dd4dea 100644
|
||||
--- a/arch/arm/mach-omap2/omap_opp_data.h
|
||||
+++ b/arch/arm/mach-omap2/omap_opp_data.h
|
||||
@@ -71,12 +71,13 @@ struct omap_opp_def {
|
||||
* Initialization wrapper used to define SmartReflex process data
|
||||
* XXX Is this needed? Just use C99 initializers in data files?
|
||||
*/
|
||||
-#define VOLT_DATA_DEFINE(_v_nom, _efuse_offs, _errminlimit, _errgain) \
|
||||
+#define VOLT_DATA_DEFINE(_v_nom, _efuse_offs, _errminlimit, _errgain, _opp_sel) \
|
||||
{ \
|
||||
.volt_nominal = _v_nom, \
|
||||
.sr_efuse_offs = _efuse_offs, \
|
||||
.sr_errminlimit = _errminlimit, \
|
||||
- .vp_errgain = _errgain \
|
||||
+ .vp_errgain = _errgain, \
|
||||
+ .opp_sel = _opp_sel \
|
||||
}
|
||||
|
||||
/* Use this to initialize the default table */
|
||||
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c
|
||||
index d95f3f9..12fc2da 100644
|
||||
--- a/arch/arm/mach-omap2/opp3xxx_data.c
|
||||
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
|
||||
@@ -24,6 +24,7 @@
|
||||
#include "control.h"
|
||||
#include "omap_opp_data.h"
|
||||
#include "pm.h"
|
||||
+#include "abb.h"
|
||||
|
||||
/* 34xx */
|
||||
|
||||
@@ -36,12 +37,12 @@
|
||||
#define OMAP3430_VDD_MPU_OPP5_UV 1350000
|
||||
|
||||
struct omap_volt_data omap34xx_vddmpu_volt_data[] = {
|
||||
- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c),
|
||||
- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c),
|
||||
- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18),
|
||||
- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18),
|
||||
- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18),
|
||||
- VOLT_DATA_DEFINE(0, 0, 0, 0),
|
||||
+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c, OMAP_ABB_NO_LDO),
|
||||
+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c, OMAP_ABB_NO_LDO),
|
||||
+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO),
|
||||
+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO),
|
||||
+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO),
|
||||
+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0),
|
||||
};
|
||||
|
||||
/* VDD2 */
|
||||
@@ -51,10 +52,10 @@ struct omap_volt_data omap34xx_vddmpu_volt_data[] = {
|
||||
#define OMAP3430_VDD_CORE_OPP3_UV 1150000
|
||||
|
||||
struct omap_volt_data omap34xx_vddcore_volt_data[] = {
|
||||
- VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c),
|
||||
- VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c),
|
||||
- VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18),
|
||||
- VOLT_DATA_DEFINE(0, 0, 0, 0),
|
||||
+ VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c, OMAP_ABB_NO_LDO),
|
||||
+ VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c, OMAP_ABB_NO_LDO),
|
||||
+ VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18, OMAP_ABB_NO_LDO),
|
||||
+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0),
|
||||
};
|
||||
|
||||
/* 36xx */
|
||||
@@ -67,11 +68,11 @@ struct omap_volt_data omap34xx_vddcore_volt_data[] = {
|
||||
#define OMAP3630_VDD_MPU_OPP1G_UV 1375000
|
||||
|
||||
struct omap_volt_data omap36xx_vddmpu_volt_data[] = {
|
||||
- VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c),
|
||||
- VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16),
|
||||
- VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23),
|
||||
- VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27),
|
||||
- VOLT_DATA_DEFINE(0, 0, 0, 0),
|
||||
+ VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c, OMAP_ABB_NOMINAL_OPP),
|
||||
+ VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16, OMAP_ABB_NOMINAL_OPP),
|
||||
+ VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23, OMAP_ABB_NOMINAL_OPP),
|
||||
+ VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27, OMAP_ABB_FAST_OPP),
|
||||
+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0),
|
||||
};
|
||||
|
||||
/* VDD2 */
|
||||
@@ -80,9 +81,9 @@ struct omap_volt_data omap36xx_vddmpu_volt_data[] = {
|
||||
#define OMAP3630_VDD_CORE_OPP100_UV 1200000
|
||||
|
||||
struct omap_volt_data omap36xx_vddcore_volt_data[] = {
|
||||
- VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c),
|
||||
- VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16),
|
||||
- VOLT_DATA_DEFINE(0, 0, 0, 0),
|
||||
+ VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c, OMAP_ABB_NO_LDO),
|
||||
+ VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16, OMAP_ABB_NO_LDO),
|
||||
+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0),
|
||||
};
|
||||
|
||||
/* OPP data */
|
||||
diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c
|
||||
index 2293ba2..efdbf91 100644
|
||||
--- a/arch/arm/mach-omap2/opp4xxx_data.c
|
||||
+++ b/arch/arm/mach-omap2/opp4xxx_data.c
|
||||
@@ -25,6 +25,7 @@
|
||||
#include "control.h"
|
||||
#include "omap_opp_data.h"
|
||||
#include "pm.h"
|
||||
+#include "abb.h"
|
||||
|
||||
/*
|
||||
* Structures containing OMAP4430 voltage supported and various
|
||||
@@ -37,11 +38,11 @@
|
||||
#define OMAP4430_VDD_MPU_OPPNITRO_UV 1375000
|
||||
|
||||
struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = {
|
||||
- VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c),
|
||||
- VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
|
||||
- VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23),
|
||||
- VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27),
|
||||
- VOLT_DATA_DEFINE(0, 0, 0, 0),
|
||||
+ VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c, OMAP_ABB_NOMINAL_OPP),
|
||||
+ VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16, OMAP_ABB_NOMINAL_OPP),
|
||||
+ VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23, OMAP_ABB_NOMINAL_OPP),
|
||||
+ VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27, OMAP_ABB_FAST_OPP),
|
||||
+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0),
|
||||
};
|
||||
|
||||
#define OMAP4430_VDD_IVA_OPP50_UV 1013000
|
||||
@@ -49,19 +50,19 @@ struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = {
|
||||
#define OMAP4430_VDD_IVA_OPPTURBO_UV 1300000
|
||||
|
||||
struct omap_volt_data omap44xx_vdd_iva_volt_data[] = {
|
||||
- VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c),
|
||||
- VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
|
||||
- VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23),
|
||||
- VOLT_DATA_DEFINE(0, 0, 0, 0),
|
||||
+ VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c, OMAP_ABB_NOMINAL_OPP),
|
||||
+ VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16, OMAP_ABB_NOMINAL_OPP),
|
||||
+ VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23, OMAP_ABB_NOMINAL_OPP),
|
||||
+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0),
|
||||
};
|
||||
|
||||
#define OMAP4430_VDD_CORE_OPP50_UV 1025000
|
||||
#define OMAP4430_VDD_CORE_OPP100_UV 1200000
|
||||
|
||||
struct omap_volt_data omap44xx_vdd_core_volt_data[] = {
|
||||
- VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c),
|
||||
- VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16),
|
||||
- VOLT_DATA_DEFINE(0, 0, 0, 0),
|
||||
+ VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c, OMAP_ABB_NO_LDO),
|
||||
+ VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16, OMAP_ABB_NO_LDO),
|
||||
+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0),
|
||||
};
|
||||
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
|
||||
index b4c6259..2aa6c43 100644
|
||||
--- a/arch/arm/mach-omap2/voltage.h
|
||||
+++ b/arch/arm/mach-omap2/voltage.h
|
||||
@@ -105,6 +105,7 @@ struct omap_volt_data {
|
||||
u32 sr_efuse_offs;
|
||||
u8 sr_errminlimit;
|
||||
u8 vp_errgain;
|
||||
+ u32 opp_sel;
|
||||
};
|
||||
|
||||
/**
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+83
@@ -0,0 +1,83 @@
|
||||
From 25458f46e77c4e816d313126a789d69f98f73af4 Mon Sep 17 00:00:00 2001
|
||||
From: Mike Turquette <mturquette@ti.com>
|
||||
Date: Thu, 21 Jul 2011 12:31:50 +0200
|
||||
Subject: [PATCH 6/8] OMAP3+: Voltage: add ABB data to voltage domains
|
||||
|
||||
Starting with OMAP36xx, some voltage domains have an ABB ldo meant to
|
||||
insure stability when that voltage domain is operating at a high OPP.
|
||||
|
||||
This patch adds struct omap_abb_instance to struct voltagedomain and
|
||||
populates the data for those voltage domains that have an ABB ldo on
|
||||
both 36xx and 44xx silicon.
|
||||
|
||||
Signed-off-by: Mike Turquette <mturquette@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap2/voltage.h | 1 +
|
||||
arch/arm/mach-omap2/voltagedomains3xxx_data.c | 3 +++
|
||||
arch/arm/mach-omap2/voltagedomains44xx_data.c | 3 +++
|
||||
3 files changed, 7 insertions(+), 0 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
|
||||
index 2aa6c43..4fe35d7 100644
|
||||
--- a/arch/arm/mach-omap2/voltage.h
|
||||
+++ b/arch/arm/mach-omap2/voltage.h
|
||||
@@ -69,6 +69,7 @@ struct voltagedomain {
|
||||
struct omap_vc_channel *vc;
|
||||
const struct omap_vfsm_instance *vfsm;
|
||||
struct omap_vp_instance *vp;
|
||||
+ struct omap_abb_instance *abb;
|
||||
struct omap_voltdm_pmic *pmic;
|
||||
|
||||
/* VC/VP register access functions: SoC specific */
|
||||
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
|
||||
index b0d0ae1..cdcfbdf 100644
|
||||
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
|
||||
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
|
||||
@@ -26,6 +26,7 @@
|
||||
#include "voltage.h"
|
||||
#include "vc.h"
|
||||
#include "vp.h"
|
||||
+#include "abb.h"
|
||||
|
||||
/*
|
||||
* VDD data
|
||||
@@ -90,6 +91,8 @@ void __init omap3xxx_voltagedomains_init(void)
|
||||
if (cpu_is_omap3630()) {
|
||||
omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data;
|
||||
omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data;
|
||||
+
|
||||
+ omap3_voltdm_mpu.abb = &omap36xx_abb_mpu;
|
||||
} else {
|
||||
omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data;
|
||||
omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data;
|
||||
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c
|
||||
index c4584e9..11e2458 100644
|
||||
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
|
||||
@@ -31,6 +31,7 @@
|
||||
#include "omap_opp_data.h"
|
||||
#include "vc.h"
|
||||
#include "vp.h"
|
||||
+#include "abb.h"
|
||||
|
||||
static const struct omap_vfsm_instance omap4_vdd_mpu_vfsm = {
|
||||
.voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET,
|
||||
@@ -53,6 +54,7 @@ static struct voltagedomain omap4_voltdm_mpu = {
|
||||
.vc = &omap4_vc_mpu,
|
||||
.vfsm = &omap4_vdd_mpu_vfsm,
|
||||
.vp = &omap4_vp_mpu,
|
||||
+ .abb = &omap4_abb_mpu,
|
||||
};
|
||||
|
||||
static struct voltagedomain omap4_voltdm_iva = {
|
||||
@@ -64,6 +66,7 @@ static struct voltagedomain omap4_voltdm_iva = {
|
||||
.vc = &omap4_vc_iva,
|
||||
.vfsm = &omap4_vdd_iva_vfsm,
|
||||
.vp = &omap4_vp_iva,
|
||||
+ .abb = &omap4_abb_iva,
|
||||
};
|
||||
|
||||
static struct voltagedomain omap4_voltdm_core = {
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+274
@@ -0,0 +1,274 @@
|
||||
From d9dd20e6220aa04f17ec44f64a0b1545407ae8f9 Mon Sep 17 00:00:00 2001
|
||||
From: Mike Turquette <mturquette@ti.com>
|
||||
Date: Wed, 29 Jun 2011 17:25:59 -0700
|
||||
Subject: [PATCH 7/8] OMAP3+: ABB: initialization & transition functions
|
||||
|
||||
The Adaptive Body-Bias ldo can be set to bypass or Forward Body-Bias
|
||||
after voltage scaling is performed.
|
||||
|
||||
This patch implements the Adaptive Body-Bias ldo initialization routine
|
||||
and the transition sequence which is needed after a vc_bypass or
|
||||
vp_forceupdate sequence completes.
|
||||
|
||||
Signed-off-by: Mike Turquette <mturquette@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap2/Makefile | 2 +-
|
||||
arch/arm/mach-omap2/abb.c | 218 ++++++++++++++++++++++++++++++++++++++++++
|
||||
arch/arm/mach-omap2/abb.h | 5 +
|
||||
3 files changed, 224 insertions(+), 1 deletions(-)
|
||||
create mode 100644 arch/arm/mach-omap2/abb.c
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
|
||||
index 5bc306c..d0dd488 100644
|
||||
--- a/arch/arm/mach-omap2/Makefile
|
||||
+++ b/arch/arm/mach-omap2/Makefile
|
||||
@@ -94,7 +94,7 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \
|
||||
|
||||
# OMAP voltage domains
|
||||
ifeq ($(CONFIG_PM),y)
|
||||
-voltagedomain-common := voltage.o vc.o vp.o
|
||||
+voltagedomain-common := voltage.o vc.o vp.o abb.o
|
||||
obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \
|
||||
voltagedomains2xxx_data.o
|
||||
obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \
|
||||
diff --git a/arch/arm/mach-omap2/abb.c b/arch/arm/mach-omap2/abb.c
|
||||
new file mode 100644
|
||||
index 0000000..4d42b67
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/mach-omap2/abb.c
|
||||
@@ -0,0 +1,218 @@
|
||||
+/*
|
||||
+ * OMAP Adaptive Body-Bias core
|
||||
+ *
|
||||
+ * Copyright (C) 2011 Texas Instruments, Inc.
|
||||
+ * Mike Turquette <mturquette@ti.com>
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License version 2 as
|
||||
+ * published by the Free Software Foundation.
|
||||
+ */
|
||||
+
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/delay.h>
|
||||
+
|
||||
+#include "abb.h"
|
||||
+#include "voltage.h"
|
||||
+
|
||||
+/*
|
||||
+ * omap_abb_set_opp - program ABB ldo based on new voltage
|
||||
+ *
|
||||
+ * @voltdm - pointer to voltage domain that just finished scaling voltage
|
||||
+ *
|
||||
+ * Look up the ABB ldo state for the new voltage that voltdm just finished
|
||||
+ * transitioning to and compare it to current ldo state. If a change is needed
|
||||
+ * then clear appropriate PRM_IRQSTATUS bit, transition ldo and then clear
|
||||
+ * PRM_IRQSTATUS bit again. Returns 0 on success, -EERROR otherwise.
|
||||
+ */
|
||||
+int omap_abb_set_opp(struct voltagedomain *voltdm)
|
||||
+{
|
||||
+ struct omap_abb_instance *abb = voltdm->abb;
|
||||
+ struct omap_volt_data *volt_data;
|
||||
+ int ret, timeout;
|
||||
+ u8 opp_sel;
|
||||
+
|
||||
+ /* fetch the ABB ldo OPP_SEL value for the new voltage */
|
||||
+ volt_data = omap_voltage_get_voltdata(voltdm, voltdm->nominal_volt);
|
||||
+
|
||||
+ if (IS_ERR_OR_NULL(volt_data))
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ opp_sel = volt_data->opp_sel;
|
||||
+
|
||||
+ /* bail early if no transition is necessary */
|
||||
+ if (opp_sel == abb->_opp_sel)
|
||||
+ return 0;
|
||||
+
|
||||
+ /* clear interrupt status */
|
||||
+ timeout = 0;
|
||||
+ while (timeout++ < ABB_TRANXDONE_TIMEOUT) {
|
||||
+ abb->common->ops->clear_tranxdone(abb->prm_irq_id);
|
||||
+
|
||||
+ ret = abb->common->ops->check_tranxdone(abb->prm_irq_id);
|
||||
+ if (!ret)
|
||||
+ break;
|
||||
+
|
||||
+ udelay(1);
|
||||
+ }
|
||||
+
|
||||
+ if (timeout>= ABB_TRANXDONE_TIMEOUT) {
|
||||
+ pr_warning("%s: vdd_%s ABB TRANXDONE timeout\n",
|
||||
+ __func__, voltdm->name);
|
||||
+ return -ETIMEDOUT;
|
||||
+ }
|
||||
+
|
||||
+ /* program next state of ABB ldo */
|
||||
+ voltdm->rmw(abb->common->opp_sel_mask,
|
||||
+ opp_sel << __ffs(abb->common->opp_sel_mask),
|
||||
+ abb->ctrl_offs);
|
||||
+
|
||||
+ /* initiate ABB ldo change */
|
||||
+ voltdm->rmw(abb->common->opp_change_mask,
|
||||
+ abb->common->opp_change_mask,
|
||||
+ abb->ctrl_offs);
|
||||
+
|
||||
+ /* clear interrupt status */
|
||||
+ timeout = 0;
|
||||
+ while (timeout++ < ABB_TRANXDONE_TIMEOUT) {
|
||||
+ abb->common->ops->clear_tranxdone(abb->prm_irq_id);
|
||||
+
|
||||
+ ret = abb->common->ops->check_tranxdone(abb->prm_irq_id);
|
||||
+ if (!ret)
|
||||
+ break;
|
||||
+
|
||||
+ udelay(1);
|
||||
+ }
|
||||
+
|
||||
+ if (timeout>= ABB_TRANXDONE_TIMEOUT) {
|
||||
+ pr_warning("%s: vdd_%s ABB TRANXDONE timeout\n",
|
||||
+ __func__, voltdm->name);
|
||||
+ return -ETIMEDOUT;
|
||||
+ }
|
||||
+
|
||||
+ /* track internal state */
|
||||
+ abb->_opp_sel = opp_sel;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+/*
|
||||
+ * omap_abb_enable - enable ABB ldo on a particular voltage domain
|
||||
+ *
|
||||
+ * @voltdm - pointer to particular voltage domain
|
||||
+ */
|
||||
+void omap_abb_enable(struct voltagedomain *voltdm)
|
||||
+{
|
||||
+ struct omap_abb_instance *abb = voltdm->abb;
|
||||
+
|
||||
+ if (abb->enabled)
|
||||
+ return;
|
||||
+
|
||||
+ abb->enabled = true;
|
||||
+
|
||||
+ voltdm->rmw(abb->common->sr2en_mask, abb->common->sr2en_mask,
|
||||
+ abb->setup_offs);
|
||||
+}
|
||||
+
|
||||
+/*
|
||||
+ * omap_abb_disable - disable ABB ldo on a particular voltage domain
|
||||
+ *
|
||||
+ * @voltdm - pointer to particular voltage domain
|
||||
+ *
|
||||
+ * Included for completeness. Not currently used but will be needed in the
|
||||
+ * future if ABB is converted to a loadable module.
|
||||
+ */
|
||||
+void omap_abb_disable(struct voltagedomain *voltdm)
|
||||
+{
|
||||
+ struct omap_abb_instance *abb = voltdm->abb;
|
||||
+
|
||||
+ if (!abb->enabled)
|
||||
+ return;
|
||||
+
|
||||
+ abb->enabled = false;
|
||||
+
|
||||
+ voltdm->rmw(abb->common->sr2en_mask,
|
||||
+ (0 << __ffs(abb->common->sr2en_mask)),
|
||||
+ abb->setup_offs);
|
||||
+}
|
||||
+
|
||||
+/*
|
||||
+ * omap_abb_init - Initialize an ABB ldo instance
|
||||
+ *
|
||||
+ * @voltdm: voltage domain upon which ABB ldo resides
|
||||
+ *
|
||||
+ * Initializes an individual ABB ldo for Forward Body-Bias. FBB is used to
|
||||
+ * insure stability at higher voltages. Note that some older OMAP chips have a
|
||||
+ * Reverse Body-Bias mode meant to save power at low voltage, but that mode is
|
||||
+ * unsupported and phased out on newer chips.
|
||||
+ */
|
||||
+void __init omap_abb_init(struct voltagedomain *voltdm)
|
||||
+{
|
||||
+ struct omap_abb_instance *abb = voltdm->abb;
|
||||
+ u32 sys_clk_rate;
|
||||
+ u32 sr2_wt_cnt_val;
|
||||
+ u32 clock_cycles;
|
||||
+ u32 settling_time;
|
||||
+ u32 val;
|
||||
+
|
||||
+ if(IS_ERR_OR_NULL(abb))
|
||||
+ return;
|
||||
+
|
||||
+ /*
|
||||
+ * SR2_WTCNT_VALUE is the settling time for the ABB ldo after a
|
||||
+ * transition and must be programmed with the correct time at boot.
|
||||
+ * The value programmed into the register is the number of SYS_CLK
|
||||
+ * clock cycles that match a given wall time profiled for the ldo.
|
||||
+ * This value depends on:
|
||||
+ * settling time of ldo in micro-seconds (varies per OMAP family)
|
||||
+ * # of clock cycles per SYS_CLK period (varies per OMAP family)
|
||||
+ * the SYS_CLK frequency in MHz (varies per board)
|
||||
+ * The formula is:
|
||||
+ *
|
||||
+ * ldo settling time (in micro-seconds)
|
||||
+ * SR2_WTCNT_VALUE = ------------------------------------------
|
||||
+ * (# system clock cycles) * (sys_clk period)
|
||||
+ *
|
||||
+ * Put another way:
|
||||
+ *
|
||||
+ * SR2_WTCNT_VALUE = settling time / (# SYS_CLK cycles / SYS_CLK rate))
|
||||
+ *
|
||||
+ * To avoid dividing by zero multiply both "# clock cycles" and
|
||||
+ * "settling time" by 10 such that the final result is the one we want.
|
||||
+ */
|
||||
+
|
||||
+ /* convert SYS_CLK rate to MHz & prevent divide by zero */
|
||||
+ sys_clk_rate = DIV_ROUND_CLOSEST(voltdm->sys_clk.rate, 1000000);
|
||||
+ clock_cycles = abb->common->clock_cycles * 10;
|
||||
+ settling_time = abb->common->settling_time * 10;
|
||||
+
|
||||
+ /* calculate cycle rate */
|
||||
+ clock_cycles = DIV_ROUND_CLOSEST(clock_cycles, sys_clk_rate);
|
||||
+
|
||||
+ /* calulate SR2_WTCNT_VALUE */
|
||||
+ sr2_wt_cnt_val = DIV_ROUND_CLOSEST(settling_time, clock_cycles);
|
||||
+
|
||||
+ voltdm->rmw(abb->common->sr2_wtcnt_value_mask,
|
||||
+ (sr2_wt_cnt_val << __ffs(abb->common->sr2_wtcnt_value_mask)),
|
||||
+ abb->setup_offs);
|
||||
+
|
||||
+ /* allow Forward Body-Bias */
|
||||
+ voltdm->rmw(abb->common->active_fbb_sel_mask,
|
||||
+ abb->common->active_fbb_sel_mask,
|
||||
+ abb->setup_offs);
|
||||
+
|
||||
+ /* did bootloader set OPP_SEL? */
|
||||
+ val = voltdm->read(abb->ctrl_offs);
|
||||
+ val &= abb->common->opp_sel_mask;
|
||||
+ abb->_opp_sel = val >> __ffs(abb->common->opp_sel_mask);
|
||||
+
|
||||
+ /* enable the ldo if not done by bootloader */
|
||||
+ val = voltdm->read(abb->setup_offs);
|
||||
+ val &= abb->common->sr2en_mask;
|
||||
+ if (val)
|
||||
+ abb->enabled = true;
|
||||
+ else
|
||||
+ omap_abb_enable(voltdm);
|
||||
+
|
||||
+ return;
|
||||
+}
|
||||
diff --git a/arch/arm/mach-omap2/abb.h b/arch/arm/mach-omap2/abb.h
|
||||
index 74f2044..c06c7d6 100644
|
||||
--- a/arch/arm/mach-omap2/abb.h
|
||||
+++ b/arch/arm/mach-omap2/abb.h
|
||||
@@ -82,4 +82,9 @@ extern struct omap_abb_instance omap36xx_abb_mpu;
|
||||
extern struct omap_abb_instance omap4_abb_mpu;
|
||||
extern struct omap_abb_instance omap4_abb_iva;
|
||||
|
||||
+void omap_abb_init(struct voltagedomain *voltdm);
|
||||
+void omap_abb_enable(struct voltagedomain *voltdm);
|
||||
+void omap_abb_disble(struct voltagedomain *voltdm);
|
||||
+int omap_abb_set_opp(struct voltagedomain *voltdm);
|
||||
+
|
||||
#endif
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+114
@@ -0,0 +1,114 @@
|
||||
From 5d8a37a58e5ad0bd385f023453277d9aebd4768a Mon Sep 17 00:00:00 2001
|
||||
From: Mike Turquette <mturquette@ti.com>
|
||||
Date: Thu, 21 Jul 2011 12:36:37 +0200
|
||||
Subject: [PATCH 8/8] OMAP3+: Voltage: add ABB to voltage scaling
|
||||
|
||||
Adaptive Body-Bias ldo state should be transitioned (if necessary) after
|
||||
a voltage scaling sequence completes via vc_bypass or vp_forceupdate
|
||||
methods.
|
||||
|
||||
This patch initializes the ABB ldo's as a part of the greater voltage
|
||||
initialization function and adds the ABB transition routine to both the
|
||||
vc_bypass and vp_forceupdate sequences.
|
||||
|
||||
Signed-off-by: Mike Turquette <mturquette@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap2/vc.c | 10 ++++++++--
|
||||
arch/arm/mach-omap2/voltage.c | 4 ++++
|
||||
arch/arm/mach-omap2/vp.c | 9 +++++++--
|
||||
3 files changed, 19 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
|
||||
index 16fa912..c5d8550 100644
|
||||
--- a/arch/arm/mach-omap2/vc.c
|
||||
+++ b/arch/arm/mach-omap2/vc.c
|
||||
@@ -6,6 +6,7 @@
|
||||
|
||||
#include "voltage.h"
|
||||
#include "vc.h"
|
||||
+#include "abb.h"
|
||||
#include "prm-regbits-34xx.h"
|
||||
#include "prm-regbits-44xx.h"
|
||||
#include "prm44xx.h"
|
||||
@@ -153,7 +154,7 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm,
|
||||
u32 loop_cnt = 0, retries_cnt = 0;
|
||||
u32 vc_valid, vc_bypass_val_reg, vc_bypass_value;
|
||||
u8 target_vsel, current_vsel;
|
||||
- int ret;
|
||||
+ int ret = 0;
|
||||
|
||||
ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel);
|
||||
if (ret)
|
||||
@@ -191,7 +192,12 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm,
|
||||
}
|
||||
|
||||
omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
|
||||
- return 0;
|
||||
+
|
||||
+ /* transition Adaptive Body-Bias ldo */
|
||||
+ if (voltdm->abb)
|
||||
+ ret = omap_abb_set_opp(voltdm);
|
||||
+
|
||||
+ return ret;
|
||||
}
|
||||
|
||||
static void __init omap3_vfsm_init(struct voltagedomain *voltdm)
|
||||
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
|
||||
index cebc8b1..25f8604 100644
|
||||
--- a/arch/arm/mach-omap2/voltage.c
|
||||
+++ b/arch/arm/mach-omap2/voltage.c
|
||||
@@ -40,6 +40,7 @@
|
||||
|
||||
#include "vc.h"
|
||||
#include "vp.h"
|
||||
+#include "abb.h"
|
||||
|
||||
static LIST_HEAD(voltdm_list);
|
||||
|
||||
@@ -279,6 +280,9 @@ int __init omap_voltage_late_init(void)
|
||||
voltdm->scale = omap_vp_forceupdate_scale;
|
||||
omap_vp_init(voltdm);
|
||||
}
|
||||
+
|
||||
+ if (voltdm->abb)
|
||||
+ omap_abb_init(voltdm);
|
||||
}
|
||||
|
||||
return 0;
|
||||
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
|
||||
index 66bd700..886be89 100644
|
||||
--- a/arch/arm/mach-omap2/vp.c
|
||||
+++ b/arch/arm/mach-omap2/vp.c
|
||||
@@ -5,6 +5,7 @@
|
||||
|
||||
#include "voltage.h"
|
||||
#include "vp.h"
|
||||
+#include "abb.h"
|
||||
#include "prm-regbits-34xx.h"
|
||||
#include "prm-regbits-44xx.h"
|
||||
#include "prm44xx.h"
|
||||
@@ -116,7 +117,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
|
||||
struct omap_vp_instance *vp = voltdm->vp;
|
||||
u32 vpconfig;
|
||||
u8 target_vsel, current_vsel;
|
||||
- int ret, timeout = 0;
|
||||
+ int ret = 0, timeout = 0;
|
||||
|
||||
ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel);
|
||||
if (ret)
|
||||
@@ -178,7 +179,11 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
|
||||
/* Clear force bit */
|
||||
voltdm->write(vpconfig, vp->vpconfig);
|
||||
|
||||
- return 0;
|
||||
+ /* transition Adaptive Body-Bias LDO */
|
||||
+ if (voltdm->abb)
|
||||
+ ret = omap_abb_set_opp(voltdm);
|
||||
+
|
||||
+ return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
-79
@@ -1,79 +0,0 @@
|
||||
From e38ec7b32ebb15b1e703743ea14ca7a29675a3ba Mon Sep 17 00:00:00 2001
|
||||
From: Kevin Hilman <khilman@ti.com>
|
||||
Date: Thu, 26 May 2011 14:48:19 -0700
|
||||
Subject: [PATCH 4/7] OMAP3: PM debug: remove sleep_while_idle feature
|
||||
|
||||
Remove the OMAP-specific PM debug 'sleep_while_idle' feature which is
|
||||
currently available as an OMAP-specific debugfs entry.
|
||||
|
||||
This duplicates existing ARM-generic functionality available as a
|
||||
boot-time option using the boot cmdline option 'hohlt'.
|
||||
|
||||
If runtime configuration of this is needed, then adding a debugfs
|
||||
entry for the ARM-generic hlt/nohlt interface should be added.
|
||||
|
||||
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
Acked-by: Jean Pihet <j-pihet@ti.com>
|
||||
Signed-off-by: Kevin Hilman <khilman@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap2/pm-debug.c | 3 ---
|
||||
arch/arm/mach-omap2/pm.h | 2 --
|
||||
arch/arm/mach-omap2/pm34xx.c | 2 --
|
||||
3 files changed, 0 insertions(+), 7 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
|
||||
index e01da45..d9f0821 100644
|
||||
--- a/arch/arm/mach-omap2/pm-debug.c
|
||||
+++ b/arch/arm/mach-omap2/pm-debug.c
|
||||
@@ -40,7 +40,6 @@
|
||||
|
||||
int omap2_pm_debug;
|
||||
u32 enable_off_mode;
|
||||
-u32 sleep_while_idle;
|
||||
u32 wakeup_timer_seconds;
|
||||
u32 wakeup_timer_milliseconds;
|
||||
|
||||
@@ -639,8 +638,6 @@ static int pm_dbg_init(void)
|
||||
|
||||
(void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUSR, d,
|
||||
&enable_off_mode, &pm_dbg_option_fops);
|
||||
- (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUSR, d,
|
||||
- &sleep_while_idle, &pm_dbg_option_fops);
|
||||
(void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUSR, d,
|
||||
&wakeup_timer_seconds, &pm_dbg_option_fops);
|
||||
(void) debugfs_create_file("wakeup_timer_milliseconds",
|
||||
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
|
||||
index 45bcfce..674eedc 100644
|
||||
--- a/arch/arm/mach-omap2/pm.h
|
||||
+++ b/arch/arm/mach-omap2/pm.h
|
||||
@@ -69,13 +69,11 @@ extern void omap2_pm_dump(int mode, int resume, unsigned int us);
|
||||
extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds);
|
||||
extern int omap2_pm_debug;
|
||||
extern u32 enable_off_mode;
|
||||
-extern u32 sleep_while_idle;
|
||||
#else
|
||||
#define omap2_pm_dump(mode, resume, us) do {} while (0);
|
||||
#define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0);
|
||||
#define omap2_pm_debug 0
|
||||
#define enable_off_mode 0
|
||||
-#define sleep_while_idle 0
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
|
||||
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
|
||||
index c155c9d..cb34244 100644
|
||||
--- a/arch/arm/mach-omap2/pm34xx.c
|
||||
+++ b/arch/arm/mach-omap2/pm34xx.c
|
||||
@@ -497,8 +497,6 @@ console_still_active:
|
||||
|
||||
int omap3_can_sleep(void)
|
||||
{
|
||||
- if (!sleep_while_idle)
|
||||
- return 0;
|
||||
if (!omap_uart_can_sleep())
|
||||
return 0;
|
||||
return 1;
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
-215
@@ -1,215 +0,0 @@
|
||||
From 51ea2570669b64adfaee2c4a757122f0376255dd Mon Sep 17 00:00:00 2001
|
||||
From: Kevin Hilman <khilman@ti.com>
|
||||
Date: Thu, 26 May 2011 14:07:41 -0700
|
||||
Subject: [PATCH 5/7] OMAP2: PM debug: remove register dumping
|
||||
|
||||
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
Signed-off-by: Kevin Hilman <khilman@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap2/pm-debug.c | 119 ----------------------------------------
|
||||
arch/arm/mach-omap2/pm.h | 4 -
|
||||
arch/arm/mach-omap2/pm24xx.c | 6 +-
|
||||
3 files changed, 2 insertions(+), 127 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
|
||||
index d9f0821..a8425d6 100644
|
||||
--- a/arch/arm/mach-omap2/pm-debug.c
|
||||
+++ b/arch/arm/mach-omap2/pm-debug.c
|
||||
@@ -38,129 +38,10 @@
|
||||
#include "prm2xxx_3xxx.h"
|
||||
#include "pm.h"
|
||||
|
||||
-int omap2_pm_debug;
|
||||
u32 enable_off_mode;
|
||||
u32 wakeup_timer_seconds;
|
||||
u32 wakeup_timer_milliseconds;
|
||||
|
||||
-#define DUMP_PRM_MOD_REG(mod, reg) \
|
||||
- regs[reg_count].name = #mod "." #reg; \
|
||||
- regs[reg_count++].val = omap2_prm_read_mod_reg(mod, reg)
|
||||
-#define DUMP_CM_MOD_REG(mod, reg) \
|
||||
- regs[reg_count].name = #mod "." #reg; \
|
||||
- regs[reg_count++].val = omap2_cm_read_mod_reg(mod, reg)
|
||||
-#define DUMP_PRM_REG(reg) \
|
||||
- regs[reg_count].name = #reg; \
|
||||
- regs[reg_count++].val = __raw_readl(reg)
|
||||
-#define DUMP_CM_REG(reg) \
|
||||
- regs[reg_count].name = #reg; \
|
||||
- regs[reg_count++].val = __raw_readl(reg)
|
||||
-#define DUMP_INTC_REG(reg, off) \
|
||||
- regs[reg_count].name = #reg; \
|
||||
- regs[reg_count++].val = \
|
||||
- __raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off)))
|
||||
-
|
||||
-void omap2_pm_dump(int mode, int resume, unsigned int us)
|
||||
-{
|
||||
- struct reg {
|
||||
- const char *name;
|
||||
- u32 val;
|
||||
- } regs[32];
|
||||
- int reg_count = 0, i;
|
||||
- const char *s1 = NULL, *s2 = NULL;
|
||||
-
|
||||
- if (!resume) {
|
||||
-#if 0
|
||||
- /* MPU */
|
||||
- DUMP_PRM_MOD_REG(OCP_MOD, OMAP2_PRM_IRQENABLE_MPU_OFFSET);
|
||||
- DUMP_CM_MOD_REG(MPU_MOD, OMAP2_CM_CLKSTCTRL);
|
||||
- DUMP_PRM_MOD_REG(MPU_MOD, OMAP2_PM_PWSTCTRL);
|
||||
- DUMP_PRM_MOD_REG(MPU_MOD, OMAP2_PM_PWSTST);
|
||||
- DUMP_PRM_MOD_REG(MPU_MOD, PM_WKDEP);
|
||||
-#endif
|
||||
-#if 0
|
||||
- /* INTC */
|
||||
- DUMP_INTC_REG(INTC_MIR0, 0x0084);
|
||||
- DUMP_INTC_REG(INTC_MIR1, 0x00a4);
|
||||
- DUMP_INTC_REG(INTC_MIR2, 0x00c4);
|
||||
-#endif
|
||||
-#if 0
|
||||
- DUMP_CM_MOD_REG(CORE_MOD, CM_FCLKEN1);
|
||||
- if (cpu_is_omap24xx()) {
|
||||
- DUMP_CM_MOD_REG(CORE_MOD, OMAP24XX_CM_FCLKEN2);
|
||||
- DUMP_PRM_MOD_REG(OMAP24XX_GR_MOD,
|
||||
- OMAP2_PRCM_CLKEMUL_CTRL_OFFSET);
|
||||
- DUMP_PRM_MOD_REG(OMAP24XX_GR_MOD,
|
||||
- OMAP2_PRCM_CLKSRC_CTRL_OFFSET);
|
||||
- }
|
||||
- DUMP_CM_MOD_REG(WKUP_MOD, CM_FCLKEN);
|
||||
- DUMP_CM_MOD_REG(CORE_MOD, CM_ICLKEN1);
|
||||
- DUMP_CM_MOD_REG(CORE_MOD, CM_ICLKEN2);
|
||||
- DUMP_CM_MOD_REG(WKUP_MOD, CM_ICLKEN);
|
||||
- DUMP_CM_MOD_REG(PLL_MOD, CM_CLKEN);
|
||||
- DUMP_CM_MOD_REG(PLL_MOD, CM_AUTOIDLE);
|
||||
- DUMP_PRM_MOD_REG(CORE_MOD, OMAP2_PM_PWSTST);
|
||||
-#endif
|
||||
-#if 0
|
||||
- /* DSP */
|
||||
- if (cpu_is_omap24xx()) {
|
||||
- DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_FCLKEN);
|
||||
- DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_ICLKEN);
|
||||
- DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_IDLEST);
|
||||
- DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_AUTOIDLE);
|
||||
- DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_CLKSEL);
|
||||
- DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_CM_CLKSTCTRL);
|
||||
- DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_RM_RSTCTRL);
|
||||
- DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_RM_RSTST);
|
||||
- DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_PM_PWSTCTRL);
|
||||
- DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_PM_PWSTST);
|
||||
- }
|
||||
-#endif
|
||||
- } else {
|
||||
- DUMP_PRM_MOD_REG(CORE_MOD, PM_WKST1);
|
||||
- if (cpu_is_omap24xx())
|
||||
- DUMP_PRM_MOD_REG(CORE_MOD, OMAP24XX_PM_WKST2);
|
||||
- DUMP_PRM_MOD_REG(WKUP_MOD, PM_WKST);
|
||||
- DUMP_PRM_MOD_REG(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
|
||||
-#if 1
|
||||
- DUMP_INTC_REG(INTC_PENDING_IRQ0, 0x0098);
|
||||
- DUMP_INTC_REG(INTC_PENDING_IRQ1, 0x00b8);
|
||||
- DUMP_INTC_REG(INTC_PENDING_IRQ2, 0x00d8);
|
||||
-#endif
|
||||
- }
|
||||
-
|
||||
- switch (mode) {
|
||||
- case 0:
|
||||
- s1 = "full";
|
||||
- s2 = "retention";
|
||||
- break;
|
||||
- case 1:
|
||||
- s1 = "MPU";
|
||||
- s2 = "retention";
|
||||
- break;
|
||||
- case 2:
|
||||
- s1 = "MPU";
|
||||
- s2 = "idle";
|
||||
- break;
|
||||
- }
|
||||
-
|
||||
- if (!resume)
|
||||
-#ifdef CONFIG_NO_HZ
|
||||
- printk(KERN_INFO
|
||||
- "--- Going to %s %s (next timer after %u ms)\n", s1, s2,
|
||||
- jiffies_to_msecs(get_next_timer_interrupt(jiffies) -
|
||||
- jiffies));
|
||||
-#else
|
||||
- printk(KERN_INFO "--- Going to %s %s\n", s1, s2);
|
||||
-#endif
|
||||
- else
|
||||
- printk(KERN_INFO "--- Woke up (slept for %u.%03u ms)\n",
|
||||
- us / 1000, us % 1000);
|
||||
-
|
||||
- for (i = 0; i < reg_count; i++)
|
||||
- printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val);
|
||||
-}
|
||||
-
|
||||
void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds)
|
||||
{
|
||||
u32 tick_rate, cycles;
|
||||
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
|
||||
index 674eedc..acac275 100644
|
||||
--- a/arch/arm/mach-omap2/pm.h
|
||||
+++ b/arch/arm/mach-omap2/pm.h
|
||||
@@ -65,14 +65,10 @@ extern u32 wakeup_timer_milliseconds;
|
||||
extern struct omap_dm_timer *gptimer_wakeup;
|
||||
|
||||
#ifdef CONFIG_PM_DEBUG
|
||||
-extern void omap2_pm_dump(int mode, int resume, unsigned int us);
|
||||
extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds);
|
||||
-extern int omap2_pm_debug;
|
||||
extern u32 enable_off_mode;
|
||||
#else
|
||||
-#define omap2_pm_dump(mode, resume, us) do {} while (0);
|
||||
#define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0);
|
||||
-#define omap2_pm_debug 0
|
||||
#define enable_off_mode 0
|
||||
#endif
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
|
||||
index df3ded6..bf089e7 100644
|
||||
--- a/arch/arm/mach-omap2/pm24xx.c
|
||||
+++ b/arch/arm/mach-omap2/pm24xx.c
|
||||
@@ -53,6 +53,8 @@
|
||||
#include "powerdomain.h"
|
||||
#include "clockdomain.h"
|
||||
|
||||
+static int omap2_pm_debug;
|
||||
+
|
||||
#ifdef CONFIG_SUSPEND
|
||||
static suspend_state_t suspend_state = PM_SUSPEND_ON;
|
||||
static inline bool is_suspending(void)
|
||||
@@ -123,7 +125,6 @@ static void omap2_enter_full_retention(void)
|
||||
omap2_gpio_prepare_for_idle(0);
|
||||
|
||||
if (omap2_pm_debug) {
|
||||
- omap2_pm_dump(0, 0, 0);
|
||||
getnstimeofday(&ts_preidle);
|
||||
}
|
||||
|
||||
@@ -160,7 +161,6 @@ no_sleep:
|
||||
getnstimeofday(&ts_postidle);
|
||||
ts_idle = timespec_sub(ts_postidle, ts_preidle);
|
||||
tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC;
|
||||
- omap2_pm_dump(0, 1, tmp);
|
||||
}
|
||||
omap2_gpio_resume_after_idle();
|
||||
|
||||
@@ -247,7 +247,6 @@ static void omap2_enter_mpu_retention(void)
|
||||
}
|
||||
|
||||
if (omap2_pm_debug) {
|
||||
- omap2_pm_dump(only_idle ? 2 : 1, 0, 0);
|
||||
getnstimeofday(&ts_preidle);
|
||||
}
|
||||
|
||||
@@ -259,7 +258,6 @@ static void omap2_enter_mpu_retention(void)
|
||||
getnstimeofday(&ts_postidle);
|
||||
ts_idle = timespec_sub(ts_postidle, ts_preidle);
|
||||
tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC;
|
||||
- omap2_pm_dump(only_idle ? 2 : 1, 1, tmp);
|
||||
}
|
||||
}
|
||||
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
-313
@@ -1,313 +0,0 @@
|
||||
From 2cb229bc89ac3f0b369ffcfb375bb1469f77d98b Mon Sep 17 00:00:00 2001
|
||||
From: Kevin Hilman <khilman@ti.com>
|
||||
Date: Thu, 26 May 2011 15:34:39 -0700
|
||||
Subject: [PATCH 6/7] OMAP3: PM debug: remove register dumping
|
||||
|
||||
Remove OMAP3-specific register dumping feature from PM debug layer.
|
||||
This is removed because:
|
||||
|
||||
- it's ugly
|
||||
- it's OMAP3-specific, and will obviously not scale to OMAP4+
|
||||
- userspace /dev/mem-based tools (like omapconf) can do this much better
|
||||
|
||||
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
Acked-by: Jean Pihet <j-pihet@ti.com>
|
||||
Signed-off-by: Kevin Hilman <khilman@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap2/pm-debug.c | 221 ----------------------------------------
|
||||
arch/arm/mach-omap2/pm.h | 4 -
|
||||
2 files changed, 0 insertions(+), 225 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
|
||||
index a8425d6..3d1cce2 100644
|
||||
--- a/arch/arm/mach-omap2/pm-debug.c
|
||||
+++ b/arch/arm/mach-omap2/pm-debug.c
|
||||
@@ -63,10 +63,6 @@ void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds)
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/seq_file.h>
|
||||
|
||||
-static void pm_dbg_regset_store(u32 *ptr);
|
||||
-
|
||||
-static struct dentry *pm_dbg_dir;
|
||||
-
|
||||
static int pm_dbg_init_done;
|
||||
|
||||
static int pm_dbg_init(void);
|
||||
@@ -76,160 +72,6 @@ enum {
|
||||
DEBUG_FILE_TIMERS,
|
||||
};
|
||||
|
||||
-struct pm_module_def {
|
||||
- char name[8]; /* Name of the module */
|
||||
- short type; /* CM or PRM */
|
||||
- unsigned short offset;
|
||||
- int low; /* First register address on this module */
|
||||
- int high; /* Last register address on this module */
|
||||
-};
|
||||
-
|
||||
-#define MOD_CM 0
|
||||
-#define MOD_PRM 1
|
||||
-
|
||||
-static const struct pm_module_def *pm_dbg_reg_modules;
|
||||
-static const struct pm_module_def omap3_pm_reg_modules[] = {
|
||||
- { "IVA2", MOD_CM, OMAP3430_IVA2_MOD, 0, 0x4c },
|
||||
- { "OCP", MOD_CM, OCP_MOD, 0, 0x10 },
|
||||
- { "MPU", MOD_CM, MPU_MOD, 4, 0x4c },
|
||||
- { "CORE", MOD_CM, CORE_MOD, 0, 0x4c },
|
||||
- { "SGX", MOD_CM, OMAP3430ES2_SGX_MOD, 0, 0x4c },
|
||||
- { "WKUP", MOD_CM, WKUP_MOD, 0, 0x40 },
|
||||
- { "CCR", MOD_CM, PLL_MOD, 0, 0x70 },
|
||||
- { "DSS", MOD_CM, OMAP3430_DSS_MOD, 0, 0x4c },
|
||||
- { "CAM", MOD_CM, OMAP3430_CAM_MOD, 0, 0x4c },
|
||||
- { "PER", MOD_CM, OMAP3430_PER_MOD, 0, 0x4c },
|
||||
- { "EMU", MOD_CM, OMAP3430_EMU_MOD, 0x40, 0x54 },
|
||||
- { "NEON", MOD_CM, OMAP3430_NEON_MOD, 0x20, 0x48 },
|
||||
- { "USB", MOD_CM, OMAP3430ES2_USBHOST_MOD, 0, 0x4c },
|
||||
-
|
||||
- { "IVA2", MOD_PRM, OMAP3430_IVA2_MOD, 0x50, 0xfc },
|
||||
- { "OCP", MOD_PRM, OCP_MOD, 4, 0x1c },
|
||||
- { "MPU", MOD_PRM, MPU_MOD, 0x58, 0xe8 },
|
||||
- { "CORE", MOD_PRM, CORE_MOD, 0x58, 0xf8 },
|
||||
- { "SGX", MOD_PRM, OMAP3430ES2_SGX_MOD, 0x58, 0xe8 },
|
||||
- { "WKUP", MOD_PRM, WKUP_MOD, 0xa0, 0xb0 },
|
||||
- { "CCR", MOD_PRM, PLL_MOD, 0x40, 0x70 },
|
||||
- { "DSS", MOD_PRM, OMAP3430_DSS_MOD, 0x58, 0xe8 },
|
||||
- { "CAM", MOD_PRM, OMAP3430_CAM_MOD, 0x58, 0xe8 },
|
||||
- { "PER", MOD_PRM, OMAP3430_PER_MOD, 0x58, 0xe8 },
|
||||
- { "EMU", MOD_PRM, OMAP3430_EMU_MOD, 0x58, 0xe4 },
|
||||
- { "GLBL", MOD_PRM, OMAP3430_GR_MOD, 0x20, 0xe4 },
|
||||
- { "NEON", MOD_PRM, OMAP3430_NEON_MOD, 0x58, 0xe8 },
|
||||
- { "USB", MOD_PRM, OMAP3430ES2_USBHOST_MOD, 0x58, 0xe8 },
|
||||
- { "", 0, 0, 0, 0 },
|
||||
-};
|
||||
-
|
||||
-#define PM_DBG_MAX_REG_SETS 4
|
||||
-
|
||||
-static void *pm_dbg_reg_set[PM_DBG_MAX_REG_SETS];
|
||||
-
|
||||
-static int pm_dbg_get_regset_size(void)
|
||||
-{
|
||||
- static int regset_size;
|
||||
-
|
||||
- if (regset_size == 0) {
|
||||
- int i = 0;
|
||||
-
|
||||
- while (pm_dbg_reg_modules[i].name[0] != 0) {
|
||||
- regset_size += pm_dbg_reg_modules[i].high +
|
||||
- 4 - pm_dbg_reg_modules[i].low;
|
||||
- i++;
|
||||
- }
|
||||
- }
|
||||
- return regset_size;
|
||||
-}
|
||||
-
|
||||
-static int pm_dbg_show_regs(struct seq_file *s, void *unused)
|
||||
-{
|
||||
- int i, j;
|
||||
- unsigned long val;
|
||||
- int reg_set = (int)s->private;
|
||||
- u32 *ptr;
|
||||
- void *store = NULL;
|
||||
- int regs;
|
||||
- int linefeed;
|
||||
-
|
||||
- if (reg_set == 0) {
|
||||
- store = kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
|
||||
- ptr = store;
|
||||
- pm_dbg_regset_store(ptr);
|
||||
- } else {
|
||||
- ptr = pm_dbg_reg_set[reg_set - 1];
|
||||
- }
|
||||
-
|
||||
- i = 0;
|
||||
-
|
||||
- while (pm_dbg_reg_modules[i].name[0] != 0) {
|
||||
- regs = 0;
|
||||
- linefeed = 0;
|
||||
- if (pm_dbg_reg_modules[i].type == MOD_CM)
|
||||
- seq_printf(s, "MOD: CM_%s (%08x)\n",
|
||||
- pm_dbg_reg_modules[i].name,
|
||||
- (u32)(OMAP3430_CM_BASE +
|
||||
- pm_dbg_reg_modules[i].offset));
|
||||
- else
|
||||
- seq_printf(s, "MOD: PRM_%s (%08x)\n",
|
||||
- pm_dbg_reg_modules[i].name,
|
||||
- (u32)(OMAP3430_PRM_BASE +
|
||||
- pm_dbg_reg_modules[i].offset));
|
||||
-
|
||||
- for (j = pm_dbg_reg_modules[i].low;
|
||||
- j <= pm_dbg_reg_modules[i].high; j += 4) {
|
||||
- val = *(ptr++);
|
||||
- if (val != 0) {
|
||||
- regs++;
|
||||
- if (linefeed) {
|
||||
- seq_printf(s, "\n");
|
||||
- linefeed = 0;
|
||||
- }
|
||||
- seq_printf(s, " %02x => %08lx", j, val);
|
||||
- if (regs % 4 == 0)
|
||||
- linefeed = 1;
|
||||
- }
|
||||
- }
|
||||
- seq_printf(s, "\n");
|
||||
- i++;
|
||||
- }
|
||||
-
|
||||
- if (store != NULL)
|
||||
- kfree(store);
|
||||
-
|
||||
- return 0;
|
||||
-}
|
||||
-
|
||||
-static void pm_dbg_regset_store(u32 *ptr)
|
||||
-{
|
||||
- int i, j;
|
||||
- u32 val;
|
||||
-
|
||||
- i = 0;
|
||||
-
|
||||
- while (pm_dbg_reg_modules[i].name[0] != 0) {
|
||||
- for (j = pm_dbg_reg_modules[i].low;
|
||||
- j <= pm_dbg_reg_modules[i].high; j += 4) {
|
||||
- if (pm_dbg_reg_modules[i].type == MOD_CM)
|
||||
- val = omap2_cm_read_mod_reg(
|
||||
- pm_dbg_reg_modules[i].offset, j);
|
||||
- else
|
||||
- val = omap2_prm_read_mod_reg(
|
||||
- pm_dbg_reg_modules[i].offset, j);
|
||||
- *(ptr++) = val;
|
||||
- }
|
||||
- i++;
|
||||
- }
|
||||
-}
|
||||
-
|
||||
-int pm_dbg_regset_save(int reg_set)
|
||||
-{
|
||||
- if (pm_dbg_reg_set[reg_set-1] == NULL)
|
||||
- return -EINVAL;
|
||||
-
|
||||
- pm_dbg_regset_store(pm_dbg_reg_set[reg_set-1]);
|
||||
-
|
||||
- return 0;
|
||||
-}
|
||||
-
|
||||
static const char pwrdm_state_names[][PWRDM_MAX_PWRSTS] = {
|
||||
"OFF",
|
||||
"RET",
|
||||
@@ -349,11 +191,6 @@ static int pm_dbg_open(struct inode *inode, struct file *file)
|
||||
};
|
||||
}
|
||||
|
||||
-static int pm_dbg_reg_open(struct inode *inode, struct file *file)
|
||||
-{
|
||||
- return single_open(file, pm_dbg_show_regs, inode->i_private);
|
||||
-}
|
||||
-
|
||||
static const struct file_operations debug_fops = {
|
||||
.open = pm_dbg_open,
|
||||
.read = seq_read,
|
||||
@@ -361,40 +198,6 @@ static const struct file_operations debug_fops = {
|
||||
.release = single_release,
|
||||
};
|
||||
|
||||
-static const struct file_operations debug_reg_fops = {
|
||||
- .open = pm_dbg_reg_open,
|
||||
- .read = seq_read,
|
||||
- .llseek = seq_lseek,
|
||||
- .release = single_release,
|
||||
-};
|
||||
-
|
||||
-int pm_dbg_regset_init(int reg_set)
|
||||
-{
|
||||
- char name[2];
|
||||
-
|
||||
- if (!pm_dbg_init_done)
|
||||
- pm_dbg_init();
|
||||
-
|
||||
- if (reg_set < 1 || reg_set > PM_DBG_MAX_REG_SETS ||
|
||||
- pm_dbg_reg_set[reg_set-1] != NULL)
|
||||
- return -EINVAL;
|
||||
-
|
||||
- pm_dbg_reg_set[reg_set-1] =
|
||||
- kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
|
||||
-
|
||||
- if (pm_dbg_reg_set[reg_set-1] == NULL)
|
||||
- return -ENOMEM;
|
||||
-
|
||||
- if (pm_dbg_dir != NULL) {
|
||||
- sprintf(name, "%d", reg_set);
|
||||
-
|
||||
- (void) debugfs_create_file(name, S_IRUGO,
|
||||
- pm_dbg_dir, (void *)reg_set, &debug_reg_fops);
|
||||
- }
|
||||
-
|
||||
- return 0;
|
||||
-}
|
||||
-
|
||||
static int pwrdm_suspend_get(void *data, u64 *val)
|
||||
{
|
||||
int ret = -EINVAL;
|
||||
@@ -477,20 +280,11 @@ DEFINE_SIMPLE_ATTRIBUTE(pm_dbg_option_fops, option_get, option_set, "%llu\n");
|
||||
|
||||
static int pm_dbg_init(void)
|
||||
{
|
||||
- int i;
|
||||
struct dentry *d;
|
||||
- char name[2];
|
||||
|
||||
if (pm_dbg_init_done)
|
||||
return 0;
|
||||
|
||||
- if (cpu_is_omap34xx())
|
||||
- pm_dbg_reg_modules = omap3_pm_reg_modules;
|
||||
- else {
|
||||
- printk(KERN_ERR "%s: only OMAP3 supported\n", __func__);
|
||||
- return -ENODEV;
|
||||
- }
|
||||
-
|
||||
d = debugfs_create_dir("pm_debug", NULL);
|
||||
if (IS_ERR(d))
|
||||
return PTR_ERR(d);
|
||||
@@ -502,21 +296,6 @@ static int pm_dbg_init(void)
|
||||
|
||||
pwrdm_for_each(pwrdms_setup, (void *)d);
|
||||
|
||||
- pm_dbg_dir = debugfs_create_dir("registers", d);
|
||||
- if (IS_ERR(pm_dbg_dir))
|
||||
- return PTR_ERR(pm_dbg_dir);
|
||||
-
|
||||
- (void) debugfs_create_file("current", S_IRUGO,
|
||||
- pm_dbg_dir, (void *)0, &debug_reg_fops);
|
||||
-
|
||||
- for (i = 0; i < PM_DBG_MAX_REG_SETS; i++)
|
||||
- if (pm_dbg_reg_set[i] != NULL) {
|
||||
- sprintf(name, "%d", i+1);
|
||||
- (void) debugfs_create_file(name, S_IRUGO,
|
||||
- pm_dbg_dir, (void *)(i+1), &debug_reg_fops);
|
||||
-
|
||||
- }
|
||||
-
|
||||
(void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUSR, d,
|
||||
&enable_off_mode, &pm_dbg_option_fops);
|
||||
(void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUSR, d,
|
||||
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
|
||||
index acac275..ea58f5d 100644
|
||||
--- a/arch/arm/mach-omap2/pm.h
|
||||
+++ b/arch/arm/mach-omap2/pm.h
|
||||
@@ -74,12 +74,8 @@ extern u32 enable_off_mode;
|
||||
|
||||
#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
|
||||
extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
|
||||
-extern int pm_dbg_regset_save(int reg_set);
|
||||
-extern int pm_dbg_regset_init(int reg_set);
|
||||
#else
|
||||
#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
|
||||
-#define pm_dbg_regset_save(reg_set) do {} while (0);
|
||||
-#define pm_dbg_regset_init(reg_set) do {} while (0);
|
||||
#endif /* CONFIG_PM_DEBUG */
|
||||
|
||||
extern void omap24xx_idle_loop_suspend(void);
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
-37
@@ -1,37 +0,0 @@
|
||||
From 7472bb7b89bfdc6beef83bb6008219158e072975 Mon Sep 17 00:00:00 2001
|
||||
From: Sanjeev Premi <premi@ti.com>
|
||||
Date: Fri, 17 Jun 2011 02:01:00 +0530
|
||||
Subject: [PATCH 7/7] OMAP2+: PM: fix section mismatch in pm_dbg_init()
|
||||
|
||||
Fix the section mismatch warning:
|
||||
|
||||
WARNING: vmlinux.o(.text+0x21118): Section mismatch
|
||||
in reference from the function pm_dbg_init() to the
|
||||
function .init.text:pwrdms_setup()
|
||||
The function pm_dbg_init() references
|
||||
the function __init pwrdms_setup().
|
||||
This is often because pm_dbg_init lacks a __init
|
||||
annotation or the annotation of pwrdms_setup is wrong.
|
||||
|
||||
Signed-off-by: Sanjeev Premi <premi@ti.com>
|
||||
Signed-off-by: Kevin Hilman <khilman@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap2/pm-debug.c | 2 +-
|
||||
1 files changed, 1 insertions(+), 1 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
|
||||
index 3d1cce2..3feb475 100644
|
||||
--- a/arch/arm/mach-omap2/pm-debug.c
|
||||
+++ b/arch/arm/mach-omap2/pm-debug.c
|
||||
@@ -278,7 +278,7 @@ static int option_set(void *data, u64 val)
|
||||
|
||||
DEFINE_SIMPLE_ATTRIBUTE(pm_dbg_option_fops, option_get, option_set, "%llu\n");
|
||||
|
||||
-static int pm_dbg_init(void)
|
||||
+static int __init pm_dbg_init(void)
|
||||
{
|
||||
struct dentry *d;
|
||||
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
From e029940bc6c0ff4ad3c8e2b4f31d0a3de78eff32 Mon Sep 17 00:00:00 2001
|
||||
From e234cd2e8844589e2836aa67b3adefa0fd332081 Mon Sep 17 00:00:00 2001
|
||||
From: Nishanth Menon <nm@ti.com>
|
||||
Date: Wed, 25 May 2011 00:43:26 -0700
|
||||
Subject: [PATCH 01/19] PM: OPP: introduce function to free cpufreq table
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
From 895fc8961297666b46b4cd3f8c01010051d2164e Mon Sep 17 00:00:00 2001
|
||||
From c305bd58ba4bd21eae34991684b4f27311c8c12f Mon Sep 17 00:00:00 2001
|
||||
From: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com>
|
||||
Date: Wed, 11 Aug 2010 17:02:43 -0700
|
||||
Subject: [PATCH 02/19] OMAP: CPUfreq: ensure driver initializes after cpufreq framework and governors
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
From 62bd1b0f18ee6c6bad1573c2f06e74b0abc418a3 Mon Sep 17 00:00:00 2001
|
||||
From 25d01f098bd134113876b8110b2433cd9a37dcf7 Mon Sep 17 00:00:00 2001
|
||||
From: Kevin Hilman <khilman@deeprootsystems.com>
|
||||
Date: Wed, 11 Aug 2010 17:05:38 -0700
|
||||
Subject: [PATCH 03/19] OMAP: CPUfreq: ensure policy is fully initialized
|
||||
|
||||
+4
-4
@@ -1,4 +1,4 @@
|
||||
From afa9b062a33a9d9d2d9077cc519e1375b8338e39 Mon Sep 17 00:00:00 2001
|
||||
From f37fcaec1c8e778ea7c697b8e7d3e771460b2c71 Mon Sep 17 00:00:00 2001
|
||||
From: Rajendra Nayak <rnayak@ti.com>
|
||||
Date: Mon, 10 Nov 2008 17:00:25 +0530
|
||||
Subject: [PATCH 04/19] OMAP3 PM: CPUFreq driver for OMAP3
|
||||
@@ -122,10 +122,10 @@ Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
|
||||
3 files changed, 46 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
|
||||
index e10ff2b..0a07e50 100644
|
||||
index 48ac568..8bad1c6 100644
|
||||
--- a/arch/arm/mach-omap2/clock.h
|
||||
+++ b/arch/arm/mach-omap2/clock.h
|
||||
@@ -141,7 +141,9 @@ extern const struct clksel_rate gpt_sys_rates[];
|
||||
@@ -144,7 +144,9 @@ extern const struct clksel_rate gpt_sys_rates[];
|
||||
extern const struct clksel_rate gfx_l3_rates[];
|
||||
extern const struct clksel_rate dsp_ick_rates[];
|
||||
|
||||
@@ -136,7 +136,7 @@ index e10ff2b..0a07e50 100644
|
||||
extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
|
||||
extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
|
||||
#else
|
||||
@@ -149,6 +151,16 @@ extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
|
||||
@@ -152,6 +154,16 @@ extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
|
||||
#define omap2_clk_exit_cpufreq_table 0
|
||||
#endif
|
||||
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
From c93327d36f0dc4ea6693fcae54c561eb8bafdd1e Mon Sep 17 00:00:00 2001
|
||||
From b432446c907e4352babda2d380136ba42a5089d0 Mon Sep 17 00:00:00 2001
|
||||
From: Silesh C V <silesh@ti.com>
|
||||
Date: Wed, 29 Sep 2010 14:52:54 +0530
|
||||
Subject: [PATCH 05/19] OMAP: PM: CPUFREQ: Fix conditional compilation
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
From b8246b5d5edc98155628ba88510bc7e67baf7acf Mon Sep 17 00:00:00 2001
|
||||
From f04b9a76326121cb8e42e486a77a6bf098d87ecc Mon Sep 17 00:00:00 2001
|
||||
From: Kevin Hilman <khilman@deeprootsystems.com>
|
||||
Date: Tue, 16 Nov 2010 11:48:41 -0800
|
||||
Subject: [PATCH 06/19] cpufreq: fixup after new OPP layer merged
|
||||
|
||||
+2
-2
@@ -1,4 +1,4 @@
|
||||
From 9f9061d3e98aa6db7d5c3feabd5a2d93eb3cb737 Mon Sep 17 00:00:00 2001
|
||||
From 0dce78bb4a6d7d65a7c5c34a7d0dd085dccae72f Mon Sep 17 00:00:00 2001
|
||||
From: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
Date: Mon, 14 Mar 2011 17:08:48 +0530
|
||||
Subject: [PATCH 07/19] OMAP: cpufreq: Split OMAP1 and OMAP2PLUS CPUfreq drivers.
|
||||
@@ -226,7 +226,7 @@ index 0000000..7c5216e
|
||||
+module_init(omap_cpufreq_init);
|
||||
+module_exit(omap_cpufreq_exit);
|
||||
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
|
||||
index b148077..5024064 100644
|
||||
index 8e79ca5..7927dd6 100644
|
||||
--- a/arch/arm/mach-omap2/Makefile
|
||||
+++ b/arch/arm/mach-omap2/Makefile
|
||||
@@ -56,6 +56,9 @@ obj-$(CONFIG_ARCH_OMAP3) += opp3xxx_data.o
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
From f5dc16c8178d0c0bcad795f8ebc71934c4028472 Mon Sep 17 00:00:00 2001
|
||||
From 6f0a749e22140520fa67c46d7cb2c020b8678df4 Mon Sep 17 00:00:00 2001
|
||||
From: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
Date: Mon, 14 Mar 2011 17:08:49 +0530
|
||||
Subject: [PATCH 08/19] OMAP2PLUS: cpufreq: Add SMP support to cater OMAP4430
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
From 07367b4c3afd8e881c4cf50ef35d081c4ac252b8 Mon Sep 17 00:00:00 2001
|
||||
From eb0279c52c74abcb0475b70115667a351bcae4e0 Mon Sep 17 00:00:00 2001
|
||||
From: Jarkko Nikula <jhnikula@gmail.com>
|
||||
Date: Thu, 14 Apr 2011 16:21:58 +0300
|
||||
Subject: [PATCH 09/19] OMAP2PLUS: cpufreq: Fix typo when attempting to set mpu_clk for OMAP4
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
From 4d3e024c2f7f0334874bbb2a168b62e91cb2517a Mon Sep 17 00:00:00 2001
|
||||
From a81a661b40c6ca792f1cc8de46d529603b93215d Mon Sep 17 00:00:00 2001
|
||||
From: Nishanth Menon <nm@ti.com>
|
||||
Date: Wed, 25 May 2011 16:38:46 -0700
|
||||
Subject: [PATCH 10/19] OMAP2+: cpufreq: move clk name decision to init
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
From 85afa12ad2a6e7a23ddf4b25e78e0ce5b9f18a64 Mon Sep 17 00:00:00 2001
|
||||
From 7f50ad4eb8465fd74115f67bbf3c5a1bc884d902 Mon Sep 17 00:00:00 2001
|
||||
From: Nishanth Menon <nm@ti.com>
|
||||
Date: Wed, 25 May 2011 16:38:47 -0700
|
||||
Subject: [PATCH 11/19] OMAP2+: cpufreq: deny initialization if no mpudev
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
From 345f93655f425c87ba01e949dc038e04542d8cd4 Mon Sep 17 00:00:00 2001
|
||||
From 229d046050abc04e56ecdc6fd500e37359a70e8c Mon Sep 17 00:00:00 2001
|
||||
From: Nishanth Menon <nm@ti.com>
|
||||
Date: Thu, 26 May 2011 19:39:17 -0700
|
||||
Subject: [PATCH 12/19] OMAP2+: cpufreq: dont support !freq_table
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
From 1e5757cbc79685c6294a178d1bea76a52cffcae9 Mon Sep 17 00:00:00 2001
|
||||
From 515c4e841924e69dba0a0af5d5ed0ead23d768e6 Mon Sep 17 00:00:00 2001
|
||||
From: Nishanth Menon <nm@ti.com>
|
||||
Date: Thu, 26 May 2011 19:39:18 -0700
|
||||
Subject: [PATCH 13/19] OMAP2+: cpufreq: only supports OPP library
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
From bec0338ead64cdd8515ae4c94462ffbfd6ae6418 Mon Sep 17 00:00:00 2001
|
||||
From a97cfd4b3ba13e6c165ac67e97476b9b3c3f0df7 Mon Sep 17 00:00:00 2001
|
||||
From: Nishanth Menon <nm@ti.com>
|
||||
Date: Thu, 26 May 2011 19:39:19 -0700
|
||||
Subject: [PATCH 14/19] OMAP2+: cpufreq: put clk if cpu_init failed
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
From 0054f5049a4e65a359eca6fa8c6668fb047c9270 Mon Sep 17 00:00:00 2001
|
||||
From 27481c729129c20a2550d8f99831146ca6260622 Mon Sep 17 00:00:00 2001
|
||||
From: Nishanth Menon <nm@ti.com>
|
||||
Date: Thu, 26 May 2011 19:39:20 -0700
|
||||
Subject: [PATCH 15/19] OMAP2+: cpufreq: fix freq_table leak
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
From 255f1830ab71e130bbdffd84e61fc7a8c3791120 Mon Sep 17 00:00:00 2001
|
||||
From b25da32f52df4e31a535e28397f73b37711b6cfa Mon Sep 17 00:00:00 2001
|
||||
From: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
Date: Fri, 3 Jun 2011 17:46:57 +0530
|
||||
Subject: [PATCH 16/19] OMAP2+: CPUfreq: Remove superfluous check in target() for online CPU's.
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
From 3bf92d672cb3ee7c1ec39f1f0fcf6e8dbde2ceb9 Mon Sep 17 00:00:00 2001
|
||||
From 600d2adf94d6df2fa5e4517b4dfa03c736c45055 Mon Sep 17 00:00:00 2001
|
||||
From: Colin Cross <ccross@google.com>
|
||||
Date: Mon, 6 Jun 2011 21:05:29 -0500
|
||||
Subject: [PATCH 17/19] OMAP2+: cpufreq: notify even with bad boot frequency
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
From 6e092f78e67d722be6036131df6aa0b8b2fec879 Mon Sep 17 00:00:00 2001
|
||||
From 3b3f823cf6049824ad754dc92260212134f01e94 Mon Sep 17 00:00:00 2001
|
||||
From: Todd Poynor <toddpoynor@google.com>
|
||||
Date: Tue, 7 Jun 2011 13:57:52 -0700
|
||||
Subject: [PATCH 18/19] OMAP2+: cpufreq: Enable all CPUs in shared policy mask
|
||||
|
||||
+1
-1
@@ -1,4 +1,4 @@
|
||||
From e8fa6ffc7822b7c7e81fafb112f3064f31c5c0e3 Mon Sep 17 00:00:00 2001
|
||||
From 27225a42d66fe1650949857d98d8f58c6cf7c26f Mon Sep 17 00:00:00 2001
|
||||
From: Russell King <rmk+kernel@arm.linux.org.uk>
|
||||
Date: Mon, 11 Jul 2011 23:10:04 +0530
|
||||
Subject: [PATCH 19/19] OMAP2+: CPUfreq: update lpj with reference value to avoid progressive error.
|
||||
|
||||
+1083
File diff suppressed because it is too large
Load Diff
+160
@@ -0,0 +1,160 @@
|
||||
From e2f6d2c10498469246ca0f4dbdc1909f6b919262 Mon Sep 17 00:00:00 2001
|
||||
From: Oleg Drokin <green@linuxhacker.ru>
|
||||
Date: Mon, 6 Jun 2011 18:57:08 +0000
|
||||
Subject: [PATCH 002/149] Remove old-style supply.dev assignments common in hsmmc init
|
||||
|
||||
CC: Mark Brown <broonie@opensource.wolfsonmicro.com>
|
||||
CC: Mike Rapoport <mike@compulab.co.il>
|
||||
CC: Nishant Kamat <nskamat@ti.com>
|
||||
CC: Steve Sakoman <steve@sakoman.com>
|
||||
CC: Felipe Balbi <balbi@ti.com>
|
||||
Signed-off-by: Oleg Drokin <green@linuxhacker.ru>
|
||||
Acked-by: Felipe Balbi <balbi@ti.com>
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
---
|
||||
arch/arm/mach-omap2/board-cm-t35.c | 4 ----
|
||||
arch/arm/mach-omap2/board-ldp.c | 2 --
|
||||
arch/arm/mach-omap2/board-omap3beagle.c | 4 ----
|
||||
arch/arm/mach-omap2/board-omap3evm.c | 4 ----
|
||||
arch/arm/mach-omap2/board-omap3logic.c | 2 --
|
||||
arch/arm/mach-omap2/board-omap3stalker.c | 4 ----
|
||||
arch/arm/mach-omap2/board-omap3touchbook.c | 4 ----
|
||||
arch/arm/mach-omap2/board-overo.c | 2 --
|
||||
arch/arm/mach-omap2/board-zoom-peripherals.c | 7 -------
|
||||
9 files changed, 0 insertions(+), 33 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
|
||||
index e7bf32d..ceb581e 100644
|
||||
--- a/arch/arm/mach-omap2/board-cm-t35.c
|
||||
+++ b/arch/arm/mach-omap2/board-cm-t35.c
|
||||
@@ -483,10 +483,6 @@ static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
|
||||
mmc[0].gpio_cd = gpio + 0;
|
||||
omap2_hsmmc_init(mmc);
|
||||
|
||||
- /* link regulators to MMC adapters */
|
||||
- cm_t35_vmmc1_supply.dev = mmc[0].dev;
|
||||
- cm_t35_vsim_supply.dev = mmc[0].dev;
|
||||
-
|
||||
return 0;
|
||||
}
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
|
||||
index 069bc9f..2d7e0ae 100644
|
||||
--- a/arch/arm/mach-omap2/board-ldp.c
|
||||
+++ b/arch/arm/mach-omap2/board-ldp.c
|
||||
@@ -341,8 +341,6 @@ static void __init omap_ldp_init(void)
|
||||
ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0);
|
||||
|
||||
omap2_hsmmc_init(mmc);
|
||||
- /* link regulators to MMC adapters */
|
||||
- ldp_vmmc1_supply.dev = mmc[0].dev;
|
||||
}
|
||||
|
||||
MACHINE_START(OMAP_LDP, "OMAP LDP board")
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
index 4cf7c19..8ef0e19 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
@@ -268,10 +268,6 @@ static int beagle_twl_gpio_setup(struct device *dev,
|
||||
mmc[0].gpio_cd = gpio + 0;
|
||||
omap2_hsmmc_init(mmc);
|
||||
|
||||
- /* link regulators to MMC adapters */
|
||||
- beagle_vmmc1_supply.dev = mmc[0].dev;
|
||||
- beagle_vsim_supply.dev = mmc[0].dev;
|
||||
-
|
||||
/*
|
||||
* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active
|
||||
* high / others active low)
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
|
||||
index fc7a23a..e2202dd 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3evm.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3evm.c
|
||||
@@ -365,10 +365,6 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
|
||||
mmc[0].gpio_cd = gpio + 0;
|
||||
omap2_hsmmc_init(mmc);
|
||||
|
||||
- /* link regulators to MMC adapters */
|
||||
- omap3evm_vmmc1_supply.dev = mmc[0].dev;
|
||||
- omap3evm_vsim_supply.dev = mmc[0].dev;
|
||||
-
|
||||
/*
|
||||
* Most GPIOs are for USB OTG. Some are mostly sent to
|
||||
* the P2 connector; notably LEDA for the LCD backlight.
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
|
||||
index ec18435..eaefb59 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3logic.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3logic.c
|
||||
@@ -130,8 +130,6 @@ static void __init board_mmc_init(void)
|
||||
}
|
||||
|
||||
omap2_hsmmc_init(board_mmc_info);
|
||||
- /* link regulators to MMC adapters */
|
||||
- omap3logic_vmmc1_supply.dev = board_mmc_info[0].dev;
|
||||
}
|
||||
|
||||
static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = {
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
index 99be540..63d12a3 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
@@ -321,10 +321,6 @@ omap3stalker_twl_gpio_setup(struct device *dev,
|
||||
mmc[0].gpio_cd = gpio + 0;
|
||||
omap2_hsmmc_init(mmc);
|
||||
|
||||
- /* link regulators to MMC adapters */
|
||||
- omap3stalker_vmmc1_supply.dev = mmc[0].dev;
|
||||
- omap3stalker_vsim_supply.dev = mmc[0].dev;
|
||||
-
|
||||
/*
|
||||
* Most GPIOs are for USB OTG. Some are mostly sent to
|
||||
* the P2 connector; notably LEDA for the LCD backlight.
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
index ab5c37d..c80e2c3 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
@@ -137,10 +137,6 @@ static int touchbook_twl_gpio_setup(struct device *dev,
|
||||
mmc[0].gpio_cd = gpio + 0;
|
||||
omap2_hsmmc_init(mmc);
|
||||
|
||||
- /* link regulators to MMC adapters */
|
||||
- touchbook_vmmc1_supply.dev = mmc[0].dev;
|
||||
- touchbook_vsim_supply.dev = mmc[0].dev;
|
||||
-
|
||||
/* REVISIT: need ehci-omap hooks for external VBUS
|
||||
* power switch and overcurrent detect
|
||||
*/
|
||||
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
|
||||
index 30c7556..031a9a6 100644
|
||||
--- a/arch/arm/mach-omap2/board-overo.c
|
||||
+++ b/arch/arm/mach-omap2/board-overo.c
|
||||
@@ -417,8 +417,6 @@ static int overo_twl_gpio_setup(struct device *dev,
|
||||
{
|
||||
omap2_hsmmc_init(mmc);
|
||||
|
||||
- overo_vmmc1_supply.dev = mmc[0].dev;
|
||||
-
|
||||
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
|
||||
/* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
|
||||
gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
|
||||
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
|
||||
index cb012e1..8495f82 100644
|
||||
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
|
||||
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
|
||||
@@ -270,13 +270,6 @@ static int zoom_twl_gpio_setup(struct device *dev,
|
||||
mmc[0].gpio_cd = gpio + 0;
|
||||
omap2_hsmmc_init(mmc);
|
||||
|
||||
- /* link regulators to MMC adapters ... we "know" the
|
||||
- * regulators will be set up only *after* we return.
|
||||
- */
|
||||
- zoom_vmmc1_supply.dev = mmc[0].dev;
|
||||
- zoom_vsim_supply.dev = mmc[0].dev;
|
||||
- zoom_vmmc2_supply.dev = mmc[1].dev;
|
||||
-
|
||||
ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW,
|
||||
"lcd enable");
|
||||
if (ret)
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+802
@@ -0,0 +1,802 @@
|
||||
From 15c991d632814077f7dbc6ec0d6ca19433a95986 Mon Sep 17 00:00:00 2001
|
||||
From: Tony Lindgren <tony@atomide.com>
|
||||
Date: Tue, 17 May 2011 03:51:26 -0700
|
||||
Subject: [PATCH 003/149] omap: Use separate init_irq functions to avoid cpu_is_omap tests early
|
||||
|
||||
This allows us to remove cpu_is_omap calls from init_irq functions.
|
||||
There should not be any need for cpu_is_omap calls as at this point.
|
||||
During the timer init we only care about SoC generation, and not about
|
||||
subrevisions.
|
||||
|
||||
The main reason for the patch is that we want to initialize only
|
||||
minimal omap specific code from the init_early call.
|
||||
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
Reviewed-by: Kevin Hilman <khilman@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap1/board-ams-delta.c | 2 +-
|
||||
arch/arm/mach-omap1/board-fsample.c | 2 +-
|
||||
arch/arm/mach-omap1/board-generic.c | 2 +-
|
||||
arch/arm/mach-omap1/board-h2.c | 2 +-
|
||||
arch/arm/mach-omap1/board-h3.c | 2 +-
|
||||
arch/arm/mach-omap1/board-htcherald.c | 2 +-
|
||||
arch/arm/mach-omap1/board-innovator.c | 2 +-
|
||||
arch/arm/mach-omap1/board-nokia770.c | 2 +-
|
||||
arch/arm/mach-omap1/board-osk.c | 2 +-
|
||||
arch/arm/mach-omap1/board-palmte.c | 2 +-
|
||||
arch/arm/mach-omap1/board-palmtt.c | 2 +-
|
||||
arch/arm/mach-omap1/board-palmz71.c | 2 +-
|
||||
arch/arm/mach-omap1/board-perseus2.c | 2 +-
|
||||
arch/arm/mach-omap1/board-sx1.c | 2 +-
|
||||
arch/arm/mach-omap1/board-voiceblue.c | 2 +-
|
||||
arch/arm/mach-omap1/irq.c | 2 +-
|
||||
arch/arm/mach-omap2/board-2430sdp.c | 2 +-
|
||||
arch/arm/mach-omap2/board-3430sdp.c | 2 +-
|
||||
arch/arm/mach-omap2/board-3630sdp.c | 2 +-
|
||||
arch/arm/mach-omap2/board-am3517crane.c | 2 +-
|
||||
arch/arm/mach-omap2/board-am3517evm.c | 2 +-
|
||||
arch/arm/mach-omap2/board-apollon.c | 2 +-
|
||||
arch/arm/mach-omap2/board-cm-t35.c | 2 +-
|
||||
arch/arm/mach-omap2/board-cm-t3517.c | 2 +-
|
||||
arch/arm/mach-omap2/board-devkit8000.c | 2 +-
|
||||
arch/arm/mach-omap2/board-generic.c | 2 +-
|
||||
arch/arm/mach-omap2/board-h4.c | 2 +-
|
||||
arch/arm/mach-omap2/board-igep0020.c | 4 +-
|
||||
arch/arm/mach-omap2/board-ldp.c | 2 +-
|
||||
arch/arm/mach-omap2/board-n8x0.c | 6 ++--
|
||||
arch/arm/mach-omap2/board-omap3beagle.c | 2 +-
|
||||
arch/arm/mach-omap2/board-omap3evm.c | 2 +-
|
||||
arch/arm/mach-omap2/board-omap3logic.c | 4 +-
|
||||
arch/arm/mach-omap2/board-omap3pandora.c | 2 +-
|
||||
arch/arm/mach-omap2/board-omap3stalker.c | 2 +-
|
||||
arch/arm/mach-omap2/board-omap3touchbook.c | 2 +-
|
||||
arch/arm/mach-omap2/board-overo.c | 2 +-
|
||||
arch/arm/mach-omap2/board-rm680.c | 2 +-
|
||||
arch/arm/mach-omap2/board-rx51.c | 2 +-
|
||||
arch/arm/mach-omap2/board-ti8168evm.c | 7 +-----
|
||||
arch/arm/mach-omap2/board-zoom.c | 4 +-
|
||||
arch/arm/mach-omap2/io.c | 17 +--------------
|
||||
arch/arm/mach-omap2/irq.c | 32 ++++++++++++++++++---------
|
||||
arch/arm/mach-omap2/omap4-common.c | 10 ++++----
|
||||
arch/arm/plat-omap/include/plat/irqs.h | 6 ++++-
|
||||
45 files changed, 78 insertions(+), 84 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
|
||||
index f49ce85..e3caef8 100644
|
||||
--- a/arch/arm/mach-omap1/board-ams-delta.c
|
||||
+++ b/arch/arm/mach-omap1/board-ams-delta.c
|
||||
@@ -138,7 +138,7 @@ void ams_delta_latch2_write(u16 mask, u16 value)
|
||||
static void __init ams_delta_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
- omap_init_irq();
|
||||
+ omap1_init_irq();
|
||||
}
|
||||
|
||||
static struct map_desc ams_delta_io_desc[] __initdata = {
|
||||
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
|
||||
index 87f173d..eaff305 100644
|
||||
--- a/arch/arm/mach-omap1/board-fsample.c
|
||||
+++ b/arch/arm/mach-omap1/board-fsample.c
|
||||
@@ -329,7 +329,7 @@ static void __init omap_fsample_init(void)
|
||||
static void __init omap_fsample_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
- omap_init_irq();
|
||||
+ omap1_init_irq();
|
||||
}
|
||||
|
||||
/* Only FPGA needs to be mapped here. All others are done with ioremap */
|
||||
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
|
||||
index 23f4ab9..3fd6b40 100644
|
||||
--- a/arch/arm/mach-omap1/board-generic.c
|
||||
+++ b/arch/arm/mach-omap1/board-generic.c
|
||||
@@ -31,7 +31,7 @@
|
||||
static void __init omap_generic_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
- omap_init_irq();
|
||||
+ omap1_init_irq();
|
||||
}
|
||||
|
||||
/* assume no Mini-AB port */
|
||||
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
|
||||
index ba3bd09..8147b04 100644
|
||||
--- a/arch/arm/mach-omap1/board-h2.c
|
||||
+++ b/arch/arm/mach-omap1/board-h2.c
|
||||
@@ -376,7 +376,7 @@ static struct i2c_board_info __initdata h2_i2c_board_info[] = {
|
||||
static void __init h2_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
- omap_init_irq();
|
||||
+ omap1_init_irq();
|
||||
}
|
||||
|
||||
static struct omap_usb_config h2_usb_config __initdata = {
|
||||
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
|
||||
index ac48677..1b448f6 100644
|
||||
--- a/arch/arm/mach-omap1/board-h3.c
|
||||
+++ b/arch/arm/mach-omap1/board-h3.c
|
||||
@@ -439,7 +439,7 @@ static void __init h3_init(void)
|
||||
static void __init h3_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
- omap_init_irq();
|
||||
+ omap1_init_irq();
|
||||
}
|
||||
|
||||
static void __init h3_map_io(void)
|
||||
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
|
||||
index ba05a51..1bd4d8e 100644
|
||||
--- a/arch/arm/mach-omap1/board-htcherald.c
|
||||
+++ b/arch/arm/mach-omap1/board-htcherald.c
|
||||
@@ -605,7 +605,7 @@ static void __init htcherald_init_irq(void)
|
||||
{
|
||||
printk(KERN_INFO "htcherald_init_irq.\n");
|
||||
omap1_init_common_hw();
|
||||
- omap_init_irq();
|
||||
+ omap1_init_irq();
|
||||
}
|
||||
|
||||
MACHINE_START(HERALD, "HTC Herald")
|
||||
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
|
||||
index 2d9b8cb..5926b0c 100644
|
||||
--- a/arch/arm/mach-omap1/board-innovator.c
|
||||
+++ b/arch/arm/mach-omap1/board-innovator.c
|
||||
@@ -292,7 +292,7 @@ static void __init innovator_init_smc91x(void)
|
||||
static void __init innovator_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
- omap_init_irq();
|
||||
+ omap1_init_irq();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP15XX
|
||||
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
|
||||
index cfd0849..e3cf21d 100644
|
||||
--- a/arch/arm/mach-omap1/board-nokia770.c
|
||||
+++ b/arch/arm/mach-omap1/board-nokia770.c
|
||||
@@ -51,7 +51,7 @@ static void __init omap_nokia770_init_irq(void)
|
||||
omap_writew((omap_readw(0xfffb5004) & ~2), 0xfffb5004);
|
||||
|
||||
omap1_init_common_hw();
|
||||
- omap_init_irq();
|
||||
+ omap1_init_irq();
|
||||
}
|
||||
|
||||
static const unsigned int nokia770_keymap[] = {
|
||||
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
|
||||
index e68dfde..1e7823d 100644
|
||||
--- a/arch/arm/mach-omap1/board-osk.c
|
||||
+++ b/arch/arm/mach-omap1/board-osk.c
|
||||
@@ -282,7 +282,7 @@ static void __init osk_init_cf(void)
|
||||
static void __init osk_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
- omap_init_irq();
|
||||
+ omap1_init_irq();
|
||||
}
|
||||
|
||||
static struct omap_usb_config osk_usb_config __initdata = {
|
||||
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
|
||||
index c9d38f4..8b6a881 100644
|
||||
--- a/arch/arm/mach-omap1/board-palmte.c
|
||||
+++ b/arch/arm/mach-omap1/board-palmte.c
|
||||
@@ -62,7 +62,7 @@
|
||||
static void __init omap_palmte_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
- omap_init_irq();
|
||||
+ omap1_init_irq();
|
||||
}
|
||||
|
||||
static const unsigned int palmte_keymap[] = {
|
||||
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
|
||||
index f04f2d3..f2de43d 100644
|
||||
--- a/arch/arm/mach-omap1/board-palmtt.c
|
||||
+++ b/arch/arm/mach-omap1/board-palmtt.c
|
||||
@@ -266,7 +266,7 @@ static struct spi_board_info __initdata palmtt_boardinfo[] = {
|
||||
static void __init omap_palmtt_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
- omap_init_irq();
|
||||
+ omap1_init_irq();
|
||||
}
|
||||
|
||||
static struct omap_usb_config palmtt_usb_config __initdata = {
|
||||
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
|
||||
index 45f01d2..6665d2d 100644
|
||||
--- a/arch/arm/mach-omap1/board-palmz71.c
|
||||
+++ b/arch/arm/mach-omap1/board-palmz71.c
|
||||
@@ -61,7 +61,7 @@ static void __init
|
||||
omap_palmz71_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
- omap_init_irq();
|
||||
+ omap1_init_irq();
|
||||
}
|
||||
|
||||
static const unsigned int palmz71_keymap[] = {
|
||||
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
|
||||
index 3c8ee84..7f019e5 100644
|
||||
--- a/arch/arm/mach-omap1/board-perseus2.c
|
||||
+++ b/arch/arm/mach-omap1/board-perseus2.c
|
||||
@@ -297,7 +297,7 @@ static void __init omap_perseus2_init(void)
|
||||
static void __init omap_perseus2_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
- omap_init_irq();
|
||||
+ omap1_init_irq();
|
||||
}
|
||||
/* Only FPGA needs to be mapped here. All others are done with ioremap */
|
||||
static struct map_desc omap_perseus2_io_desc[] __initdata = {
|
||||
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
|
||||
index 0ad781d..24f0f7b 100644
|
||||
--- a/arch/arm/mach-omap1/board-sx1.c
|
||||
+++ b/arch/arm/mach-omap1/board-sx1.c
|
||||
@@ -411,7 +411,7 @@ static void __init omap_sx1_init(void)
|
||||
static void __init omap_sx1_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
- omap_init_irq();
|
||||
+ omap1_init_irq();
|
||||
}
|
||||
/*----------------------------------------*/
|
||||
|
||||
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
|
||||
index 65d2420..98826e2 100644
|
||||
--- a/arch/arm/mach-omap1/board-voiceblue.c
|
||||
+++ b/arch/arm/mach-omap1/board-voiceblue.c
|
||||
@@ -162,7 +162,7 @@ static struct omap_board_config_kernel voiceblue_config[] = {
|
||||
static void __init voiceblue_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
- omap_init_irq();
|
||||
+ omap1_init_irq();
|
||||
}
|
||||
|
||||
static void __init voiceblue_map_io(void)
|
||||
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
|
||||
index 5d3da7a..e2b9c90 100644
|
||||
--- a/arch/arm/mach-omap1/irq.c
|
||||
+++ b/arch/arm/mach-omap1/irq.c
|
||||
@@ -175,7 +175,7 @@ static struct irq_chip omap_irq_chip = {
|
||||
.irq_set_wake = omap_wake_irq,
|
||||
};
|
||||
|
||||
-void __init omap_init_irq(void)
|
||||
+void __init omap1_init_irq(void)
|
||||
{
|
||||
int i, j;
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
|
||||
index 5de6eac..45cabc5 100644
|
||||
--- a/arch/arm/mach-omap2/board-2430sdp.c
|
||||
+++ b/arch/arm/mach-omap2/board-2430sdp.c
|
||||
@@ -260,7 +260,7 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap_2430sdp_map_io,
|
||||
.init_early = omap_2430sdp_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap2_init_irq,
|
||||
.init_machine = omap_2430sdp_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
|
||||
index 5dac974..85b207f 100644
|
||||
--- a/arch/arm/mach-omap2/board-3430sdp.c
|
||||
+++ b/arch/arm/mach-omap2/board-3430sdp.c
|
||||
@@ -804,7 +804,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap_3430sdp_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = omap_3430sdp_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
|
||||
index a5933cc..2ec2d76 100644
|
||||
--- a/arch/arm/mach-omap2/board-3630sdp.c
|
||||
+++ b/arch/arm/mach-omap2/board-3630sdp.c
|
||||
@@ -219,7 +219,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap_sdp_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = omap_sdp_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
|
||||
index 5e438a7..0bed0a4 100644
|
||||
--- a/arch/arm/mach-omap2/board-am3517crane.c
|
||||
+++ b/arch/arm/mach-omap2/board-am3517crane.c
|
||||
@@ -104,7 +104,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = am3517_crane_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = am3517_crane_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
|
||||
index 63af417..0db0fb8 100644
|
||||
--- a/arch/arm/mach-omap2/board-am3517evm.c
|
||||
+++ b/arch/arm/mach-omap2/board-am3517evm.c
|
||||
@@ -494,7 +494,7 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = am3517_evm_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = am3517_evm_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
|
||||
index b124bdf..93576c8 100644
|
||||
--- a/arch/arm/mach-omap2/board-apollon.c
|
||||
+++ b/arch/arm/mach-omap2/board-apollon.c
|
||||
@@ -354,7 +354,7 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap_apollon_map_io,
|
||||
.init_early = omap_apollon_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap2_init_irq,
|
||||
.init_machine = omap_apollon_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
|
||||
index ceb581e..43b1de5 100644
|
||||
--- a/arch/arm/mach-omap2/board-cm-t35.c
|
||||
+++ b/arch/arm/mach-omap2/board-cm-t35.c
|
||||
@@ -644,7 +644,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = cm_t35_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = cm_t35_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
|
||||
index c3a9fd3..8f15222 100644
|
||||
--- a/arch/arm/mach-omap2/board-cm-t3517.c
|
||||
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
|
||||
@@ -304,7 +304,7 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = cm_t3517_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = cm_t3517_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
|
||||
index ead9c1d..73f3a22 100644
|
||||
--- a/arch/arm/mach-omap2/board-devkit8000.c
|
||||
+++ b/arch/arm/mach-omap2/board-devkit8000.c
|
||||
@@ -440,7 +440,7 @@ static void __init devkit8000_init_early(void)
|
||||
|
||||
static void __init devkit8000_init_irq(void)
|
||||
{
|
||||
- omap_init_irq();
|
||||
+ omap3_init_irq();
|
||||
#ifdef CONFIG_OMAP_32K_TIMER
|
||||
omap2_gp_clockevent_set_gptimer(12);
|
||||
#endif
|
||||
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
|
||||
index 73e3c31..ccd503a 100644
|
||||
--- a/arch/arm/mach-omap2/board-generic.c
|
||||
+++ b/arch/arm/mach-omap2/board-generic.c
|
||||
@@ -70,7 +70,7 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap_generic_map_io,
|
||||
.init_early = omap_generic_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap2_init_irq,
|
||||
.init_machine = omap_generic_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
|
||||
index bac7933..2e16d6c 100644
|
||||
--- a/arch/arm/mach-omap2/board-h4.c
|
||||
+++ b/arch/arm/mach-omap2/board-h4.c
|
||||
@@ -298,7 +298,7 @@ static void __init omap_h4_init_early(void)
|
||||
|
||||
static void __init omap_h4_init_irq(void)
|
||||
{
|
||||
- omap_init_irq();
|
||||
+ omap2_init_irq();
|
||||
}
|
||||
|
||||
static struct at24_platform_data m24c01 = {
|
||||
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
|
||||
index 84d2846..f22a76a 100644
|
||||
--- a/arch/arm/mach-omap2/board-igep0020.c
|
||||
+++ b/arch/arm/mach-omap2/board-igep0020.c
|
||||
@@ -706,7 +706,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = igep_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = igep_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
@@ -716,7 +716,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = igep_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = igep_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
|
||||
index 2d7e0ae..9671843 100644
|
||||
--- a/arch/arm/mach-omap2/board-ldp.c
|
||||
+++ b/arch/arm/mach-omap2/board-ldp.c
|
||||
@@ -348,7 +348,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap_ldp_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = omap_ldp_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
|
||||
index 8d74318..9c791a2 100644
|
||||
--- a/arch/arm/mach-omap2/board-n8x0.c
|
||||
+++ b/arch/arm/mach-omap2/board-n8x0.c
|
||||
@@ -699,7 +699,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = n8x0_map_io,
|
||||
.init_early = n8x0_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap2_init_irq,
|
||||
.init_machine = n8x0_init_machine,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
@@ -709,7 +709,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = n8x0_map_io,
|
||||
.init_early = n8x0_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap2_init_irq,
|
||||
.init_machine = n8x0_init_machine,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
@@ -719,7 +719,7 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = n8x0_map_io,
|
||||
.init_early = n8x0_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap2_init_irq,
|
||||
.init_machine = n8x0_init_machine,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
index 8ef0e19..eaead5e 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
@@ -483,7 +483,7 @@ static void __init omap3_beagle_init_early(void)
|
||||
|
||||
static void __init omap3_beagle_init_irq(void)
|
||||
{
|
||||
- omap_init_irq();
|
||||
+ omap3_init_irq();
|
||||
#ifdef CONFIG_OMAP_32K_TIMER
|
||||
omap2_gp_clockevent_set_gptimer(12);
|
||||
#endif
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
|
||||
index e2202dd..d39f53f 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3evm.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3evm.c
|
||||
@@ -739,7 +739,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3_evm_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = omap3_evm_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
|
||||
index eaefb59..b63f1c2 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3logic.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3logic.c
|
||||
@@ -213,7 +213,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3logic_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = omap3logic_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
@@ -222,7 +222,7 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3logic_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = omap3logic_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
|
||||
index 130a278..1d90b90 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3pandora.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
|
||||
@@ -650,7 +650,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3pandora_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = omap3pandora_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
index 63d12a3..dfa1401 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
@@ -491,7 +491,7 @@ static void __init omap3_stalker_init_early(void)
|
||||
|
||||
static void __init omap3_stalker_init_irq(void)
|
||||
{
|
||||
- omap_init_irq();
|
||||
+ omap3_init_irq();
|
||||
#ifdef CONFIG_OMAP_32K_TIMER
|
||||
omap2_gp_clockevent_set_gptimer(12);
|
||||
#endif
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
index c80e2c3..ae97910 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
@@ -371,7 +371,7 @@ static void __init omap3_touchbook_init_early(void)
|
||||
|
||||
static void __init omap3_touchbook_init_irq(void)
|
||||
{
|
||||
- omap_init_irq();
|
||||
+ omap3_init_irq();
|
||||
#ifdef CONFIG_OMAP_32K_TIMER
|
||||
omap2_gp_clockevent_set_gptimer(12);
|
||||
#endif
|
||||
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
|
||||
index 031a9a6..e3928f2 100644
|
||||
--- a/arch/arm/mach-omap2/board-overo.c
|
||||
+++ b/arch/arm/mach-omap2/board-overo.c
|
||||
@@ -615,7 +615,7 @@ MACHINE_START(OVERO, "Gumstix Overo")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = overo_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = overo_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
|
||||
index 42d10b1..9c3d115 100644
|
||||
--- a/arch/arm/mach-omap2/board-rm680.c
|
||||
+++ b/arch/arm/mach-omap2/board-rm680.c
|
||||
@@ -163,7 +163,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = rm680_map_io,
|
||||
.init_early = rm680_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = rm680_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
|
||||
index fec4cac..ee35e4e 100644
|
||||
--- a/arch/arm/mach-omap2/board-rx51.c
|
||||
+++ b/arch/arm/mach-omap2/board-rx51.c
|
||||
@@ -160,7 +160,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
|
||||
.reserve = rx51_reserve,
|
||||
.map_io = rx51_map_io,
|
||||
.init_early = rx51_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = rx51_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
|
||||
index 09fa7bf..713c20f 100644
|
||||
--- a/arch/arm/mach-omap2/board-ti8168evm.c
|
||||
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
|
||||
@@ -33,11 +33,6 @@ static void __init ti8168_init_early(void)
|
||||
omap2_init_common_devices(NULL, NULL);
|
||||
}
|
||||
|
||||
-static void __init ti8168_evm_init_irq(void)
|
||||
-{
|
||||
- omap_init_irq();
|
||||
-}
|
||||
-
|
||||
static void __init ti8168_evm_init(void)
|
||||
{
|
||||
omap_serial_init();
|
||||
@@ -56,7 +51,7 @@ MACHINE_START(TI8168EVM, "ti8168evm")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = ti8168_evm_map_io,
|
||||
.init_early = ti8168_init_early,
|
||||
- .init_irq = ti8168_evm_init_irq,
|
||||
+ .init_irq = ti816x_init_irq,
|
||||
.timer = &omap_timer,
|
||||
.init_machine = ti8168_evm_init,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
|
||||
index 4b133d7..97a3f0b 100644
|
||||
--- a/arch/arm/mach-omap2/board-zoom.c
|
||||
+++ b/arch/arm/mach-omap2/board-zoom.c
|
||||
@@ -137,7 +137,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap_zoom_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = omap_zoom_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
@@ -147,7 +147,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap_zoom_init_early,
|
||||
- .init_irq = omap_init_irq,
|
||||
+ .init_irq = omap3_init_irq,
|
||||
.init_machine = omap_zoom_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
|
||||
index 441e79d..2ce1ce6 100644
|
||||
--- a/arch/arm/mach-omap2/io.c
|
||||
+++ b/arch/arm/mach-omap2/io.c
|
||||
@@ -333,23 +333,9 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
|
||||
return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
|
||||
}
|
||||
|
||||
+/* See irq.c, omap4-common.c and entry-macro.S */
|
||||
void __iomem *omap_irq_base;
|
||||
|
||||
-/*
|
||||
- * Initialize asm_irq_base for entry-macro.S
|
||||
- */
|
||||
-static inline void omap_irq_base_init(void)
|
||||
-{
|
||||
- if (cpu_is_omap24xx())
|
||||
- omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE);
|
||||
- else if (cpu_is_omap34xx())
|
||||
- omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE);
|
||||
- else if (cpu_is_omap44xx())
|
||||
- omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE);
|
||||
- else
|
||||
- pr_err("Could not initialize omap_irq_base\n");
|
||||
-}
|
||||
-
|
||||
void __init omap2_init_common_infrastructure(void)
|
||||
{
|
||||
u8 postsetup_state;
|
||||
@@ -422,7 +408,6 @@ void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0,
|
||||
_omap2_init_reprogram_sdrc();
|
||||
}
|
||||
|
||||
- omap_irq_base_init();
|
||||
}
|
||||
|
||||
/*
|
||||
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
|
||||
index 3af2b7a..3a12f75 100644
|
||||
--- a/arch/arm/mach-omap2/irq.c
|
||||
+++ b/arch/arm/mach-omap2/irq.c
|
||||
@@ -141,25 +141,20 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
|
||||
IRQ_NOREQUEST | IRQ_NOPROBE, 0);
|
||||
}
|
||||
|
||||
-void __init omap_init_irq(void)
|
||||
+static void __init omap_init_irq(u32 base, int nr_irqs)
|
||||
{
|
||||
unsigned long nr_of_irqs = 0;
|
||||
unsigned int nr_banks = 0;
|
||||
int i, j;
|
||||
|
||||
+ omap_irq_base = ioremap(base, SZ_4K);
|
||||
+ if (WARN_ON(!omap_irq_base))
|
||||
+ return;
|
||||
+
|
||||
for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
|
||||
- unsigned long base = 0;
|
||||
struct omap_irq_bank *bank = irq_banks + i;
|
||||
|
||||
- if (cpu_is_omap24xx())
|
||||
- base = OMAP24XX_IC_BASE;
|
||||
- else if (cpu_is_omap34xx())
|
||||
- base = OMAP34XX_IC_BASE;
|
||||
-
|
||||
- BUG_ON(!base);
|
||||
-
|
||||
- if (cpu_is_ti816x())
|
||||
- bank->nr_irqs = 128;
|
||||
+ bank->nr_irqs = nr_irqs;
|
||||
|
||||
/* Static mapping, never released */
|
||||
bank->base_reg = ioremap(base, SZ_4K);
|
||||
@@ -181,6 +176,21 @@ void __init omap_init_irq(void)
|
||||
nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : "");
|
||||
}
|
||||
|
||||
+void __init omap2_init_irq(void)
|
||||
+{
|
||||
+ omap_init_irq(OMAP24XX_IC_BASE, 96);
|
||||
+}
|
||||
+
|
||||
+void __init omap3_init_irq(void)
|
||||
+{
|
||||
+ omap_init_irq(OMAP34XX_IC_BASE, 96);
|
||||
+}
|
||||
+
|
||||
+void __init ti816x_init_irq(void)
|
||||
+{
|
||||
+ omap_init_irq(OMAP34XX_IC_BASE, 128);
|
||||
+}
|
||||
+
|
||||
#ifdef CONFIG_ARCH_OMAP3
|
||||
static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
|
||||
index 9ef8c29..35ac3e5 100644
|
||||
--- a/arch/arm/mach-omap2/omap4-common.c
|
||||
+++ b/arch/arm/mach-omap2/omap4-common.c
|
||||
@@ -19,6 +19,8 @@
|
||||
#include <asm/hardware/gic.h>
|
||||
#include <asm/hardware/cache-l2x0.h>
|
||||
|
||||
+#include <plat/irqs.h>
|
||||
+
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/omap4-common.h>
|
||||
|
||||
@@ -31,17 +33,15 @@ void __iomem *gic_dist_base_addr;
|
||||
|
||||
void __init gic_init_irq(void)
|
||||
{
|
||||
- void __iomem *gic_cpu_base;
|
||||
-
|
||||
/* Static mapping, never released */
|
||||
gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
|
||||
BUG_ON(!gic_dist_base_addr);
|
||||
|
||||
/* Static mapping, never released */
|
||||
- gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
|
||||
- BUG_ON(!gic_cpu_base);
|
||||
+ omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
|
||||
+ BUG_ON(!omap_irq_base);
|
||||
|
||||
- gic_init(0, 29, gic_dist_base_addr, gic_cpu_base);
|
||||
+ gic_init(0, 29, gic_dist_base_addr, omap_irq_base);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
|
||||
index 5a25098..c884320 100644
|
||||
--- a/arch/arm/plat-omap/include/plat/irqs.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/irqs.h
|
||||
@@ -428,7 +428,11 @@
|
||||
#define INTCPS_NR_IRQS 96
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
-extern void omap_init_irq(void);
|
||||
+extern void __iomem *omap_irq_base;
|
||||
+void omap1_init_irq(void);
|
||||
+void omap2_init_irq(void);
|
||||
+void omap3_init_irq(void);
|
||||
+void ti816x_init_irq(void);
|
||||
extern int omap_irq_pending(void);
|
||||
void omap_intc_save_context(void);
|
||||
void omap_intc_restore_context(void);
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+689
@@ -0,0 +1,689 @@
|
||||
From 9eb6982ba830b50a9d3759609633341aff91a6ec Mon Sep 17 00:00:00 2001
|
||||
From: Tony Lindgren <tony@atomide.com>
|
||||
Date: Tue, 29 Mar 2011 15:54:48 -0700
|
||||
Subject: [PATCH 004/149] omap: Set separate timer init functions to avoid cpu_is_omap tests
|
||||
|
||||
This is needed for the following patches so we can initialize the
|
||||
rest of the hardware timers later on.
|
||||
|
||||
As with the init_irq calls, there's no need to do cpu_is_omap calls
|
||||
during the timer init as we only care about the major omap generation.
|
||||
This means that we can initialize the sys_timer with the .timer
|
||||
entries alone.
|
||||
|
||||
Note that for now we just set stubs for the various sys_timer entries
|
||||
that will get populated in a later patch. The following patches will
|
||||
also remove the omap_dm_timer_init calls and change the init for the
|
||||
rest of the hardware timers to happen with an arch_initcall.
|
||||
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
Reviewed-by: Kevin Hilman <khilman@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap1/board-ams-delta.c | 2 +-
|
||||
arch/arm/mach-omap1/board-fsample.c | 2 +-
|
||||
arch/arm/mach-omap1/board-generic.c | 2 +-
|
||||
arch/arm/mach-omap1/board-h2.c | 2 +-
|
||||
arch/arm/mach-omap1/board-h3.c | 2 +-
|
||||
arch/arm/mach-omap1/board-htcherald.c | 2 +-
|
||||
arch/arm/mach-omap1/board-innovator.c | 2 +-
|
||||
arch/arm/mach-omap1/board-nokia770.c | 2 +-
|
||||
arch/arm/mach-omap1/board-osk.c | 2 +-
|
||||
arch/arm/mach-omap1/board-palmte.c | 2 +-
|
||||
arch/arm/mach-omap1/board-palmtt.c | 2 +-
|
||||
arch/arm/mach-omap1/board-palmz71.c | 2 +-
|
||||
arch/arm/mach-omap1/board-perseus2.c | 2 +-
|
||||
arch/arm/mach-omap1/board-sx1.c | 2 +-
|
||||
arch/arm/mach-omap1/board-voiceblue.c | 2 +-
|
||||
arch/arm/mach-omap1/time.c | 6 ++--
|
||||
arch/arm/mach-omap2/board-2430sdp.c | 2 +-
|
||||
arch/arm/mach-omap2/board-3430sdp.c | 2 +-
|
||||
arch/arm/mach-omap2/board-3630sdp.c | 2 +-
|
||||
arch/arm/mach-omap2/board-4430sdp.c | 2 +-
|
||||
arch/arm/mach-omap2/board-am3517crane.c | 2 +-
|
||||
arch/arm/mach-omap2/board-am3517evm.c | 2 +-
|
||||
arch/arm/mach-omap2/board-apollon.c | 2 +-
|
||||
arch/arm/mach-omap2/board-cm-t35.c | 2 +-
|
||||
arch/arm/mach-omap2/board-cm-t3517.c | 2 +-
|
||||
arch/arm/mach-omap2/board-devkit8000.c | 2 +-
|
||||
arch/arm/mach-omap2/board-generic.c | 2 +-
|
||||
arch/arm/mach-omap2/board-h4.c | 2 +-
|
||||
arch/arm/mach-omap2/board-igep0020.c | 4 +-
|
||||
arch/arm/mach-omap2/board-ldp.c | 2 +-
|
||||
arch/arm/mach-omap2/board-n8x0.c | 6 ++--
|
||||
arch/arm/mach-omap2/board-omap3beagle.c | 2 +-
|
||||
arch/arm/mach-omap2/board-omap3evm.c | 2 +-
|
||||
arch/arm/mach-omap2/board-omap3logic.c | 4 +-
|
||||
arch/arm/mach-omap2/board-omap3pandora.c | 2 +-
|
||||
arch/arm/mach-omap2/board-omap3stalker.c | 2 +-
|
||||
arch/arm/mach-omap2/board-omap3touchbook.c | 2 +-
|
||||
arch/arm/mach-omap2/board-omap4panda.c | 2 +-
|
||||
arch/arm/mach-omap2/board-overo.c | 2 +-
|
||||
arch/arm/mach-omap2/board-rm680.c | 2 +-
|
||||
arch/arm/mach-omap2/board-rx51.c | 2 +-
|
||||
arch/arm/mach-omap2/board-ti8168evm.c | 2 +-
|
||||
arch/arm/mach-omap2/board-zoom.c | 4 +-
|
||||
arch/arm/mach-omap2/timer-gp.c | 41 +++++++++++++++++++++-------
|
||||
arch/arm/plat-omap/include/plat/common.h | 6 +++-
|
||||
arch/arm/plat-omap/include/plat/dmtimer.h | 1 -
|
||||
46 files changed, 86 insertions(+), 62 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
|
||||
index e3caef8..312ea6b 100644
|
||||
--- a/arch/arm/mach-omap1/board-ams-delta.c
|
||||
+++ b/arch/arm/mach-omap1/board-ams-delta.c
|
||||
@@ -391,7 +391,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = ams_delta_init_irq,
|
||||
.init_machine = ams_delta_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
|
||||
EXPORT_SYMBOL(ams_delta_latch1_write);
|
||||
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
|
||||
index eaff305..a6b1bea 100644
|
||||
--- a/arch/arm/mach-omap1/board-fsample.c
|
||||
+++ b/arch/arm/mach-omap1/board-fsample.c
|
||||
@@ -394,5 +394,5 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap_fsample_init_irq,
|
||||
.init_machine = omap_fsample_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
|
||||
index 3fd6b40..04fc356 100644
|
||||
--- a/arch/arm/mach-omap1/board-generic.c
|
||||
+++ b/arch/arm/mach-omap1/board-generic.c
|
||||
@@ -99,5 +99,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap_generic_init_irq,
|
||||
.init_machine = omap_generic_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
|
||||
index 8147b04..cb7fb1a 100644
|
||||
--- a/arch/arm/mach-omap1/board-h2.c
|
||||
+++ b/arch/arm/mach-omap1/board-h2.c
|
||||
@@ -466,5 +466,5 @@ MACHINE_START(OMAP_H2, "TI-H2")
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = h2_init_irq,
|
||||
.init_machine = h2_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
|
||||
index 1b448f6..31f3487 100644
|
||||
--- a/arch/arm/mach-omap1/board-h3.c
|
||||
+++ b/arch/arm/mach-omap1/board-h3.c
|
||||
@@ -454,5 +454,5 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = h3_init_irq,
|
||||
.init_machine = h3_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
|
||||
index 1bd4d8e..36e06ea 100644
|
||||
--- a/arch/arm/mach-omap1/board-htcherald.c
|
||||
+++ b/arch/arm/mach-omap1/board-htcherald.c
|
||||
@@ -616,5 +616,5 @@ MACHINE_START(HERALD, "HTC Herald")
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = htcherald_init_irq,
|
||||
.init_machine = htcherald_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
|
||||
index 5926b0c..0b1ba46 100644
|
||||
--- a/arch/arm/mach-omap1/board-innovator.c
|
||||
+++ b/arch/arm/mach-omap1/board-innovator.c
|
||||
@@ -464,5 +464,5 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = innovator_init_irq,
|
||||
.init_machine = innovator_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
|
||||
index e3cf21d..5469ce2 100644
|
||||
--- a/arch/arm/mach-omap1/board-nokia770.c
|
||||
+++ b/arch/arm/mach-omap1/board-nokia770.c
|
||||
@@ -269,5 +269,5 @@ MACHINE_START(NOKIA770, "Nokia 770")
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap_nokia770_init_irq,
|
||||
.init_machine = omap_nokia770_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
|
||||
index 1e7823d..b08a213 100644
|
||||
--- a/arch/arm/mach-omap1/board-osk.c
|
||||
+++ b/arch/arm/mach-omap1/board-osk.c
|
||||
@@ -588,5 +588,5 @@ MACHINE_START(OMAP_OSK, "TI-OSK")
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = osk_init_irq,
|
||||
.init_machine = osk_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
|
||||
index 8b6a881..459cb6b 100644
|
||||
--- a/arch/arm/mach-omap1/board-palmte.c
|
||||
+++ b/arch/arm/mach-omap1/board-palmte.c
|
||||
@@ -280,5 +280,5 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap_palmte_init_irq,
|
||||
.init_machine = omap_palmte_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
|
||||
index f2de43d..b214f45 100644
|
||||
--- a/arch/arm/mach-omap1/board-palmtt.c
|
||||
+++ b/arch/arm/mach-omap1/board-palmtt.c
|
||||
@@ -326,5 +326,5 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap_palmtt_init_irq,
|
||||
.init_machine = omap_palmtt_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
|
||||
index 6665d2d..9b0ea48 100644
|
||||
--- a/arch/arm/mach-omap1/board-palmz71.c
|
||||
+++ b/arch/arm/mach-omap1/board-palmz71.c
|
||||
@@ -346,5 +346,5 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap_palmz71_init_irq,
|
||||
.init_machine = omap_palmz71_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
|
||||
index 7f019e5..67acd41 100644
|
||||
--- a/arch/arm/mach-omap1/board-perseus2.c
|
||||
+++ b/arch/arm/mach-omap1/board-perseus2.c
|
||||
@@ -355,5 +355,5 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap_perseus2_init_irq,
|
||||
.init_machine = omap_perseus2_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
|
||||
index 24f0f7b..9c3b7c5 100644
|
||||
--- a/arch/arm/mach-omap1/board-sx1.c
|
||||
+++ b/arch/arm/mach-omap1/board-sx1.c
|
||||
@@ -426,5 +426,5 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1")
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap_sx1_init_irq,
|
||||
.init_machine = omap_sx1_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
|
||||
index 98826e2..036edc0 100644
|
||||
--- a/arch/arm/mach-omap1/board-voiceblue.c
|
||||
+++ b/arch/arm/mach-omap1/board-voiceblue.c
|
||||
@@ -306,5 +306,5 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = voiceblue_init_irq,
|
||||
.init_machine = voiceblue_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
|
||||
index 03e1e10..a183777 100644
|
||||
--- a/arch/arm/mach-omap1/time.c
|
||||
+++ b/arch/arm/mach-omap1/time.c
|
||||
@@ -297,7 +297,7 @@ static inline int omap_32k_timer_usable(void)
|
||||
* Timer initialization
|
||||
* ---------------------------------------------------------------------------
|
||||
*/
|
||||
-static void __init omap_timer_init(void)
|
||||
+static void __init omap1_timer_init(void)
|
||||
{
|
||||
if (omap_32k_timer_usable()) {
|
||||
preferred_sched_clock_init(1);
|
||||
@@ -307,6 +307,6 @@ static void __init omap_timer_init(void)
|
||||
}
|
||||
}
|
||||
|
||||
-struct sys_timer omap_timer = {
|
||||
- .init = omap_timer_init,
|
||||
+struct sys_timer omap1_timer = {
|
||||
+ .init = omap1_timer_init,
|
||||
};
|
||||
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
|
||||
index 45cabc5..2028464 100644
|
||||
--- a/arch/arm/mach-omap2/board-2430sdp.c
|
||||
+++ b/arch/arm/mach-omap2/board-2430sdp.c
|
||||
@@ -262,5 +262,5 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
|
||||
.init_early = omap_2430sdp_init_early,
|
||||
.init_irq = omap2_init_irq,
|
||||
.init_machine = omap_2430sdp_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap2_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
|
||||
index 85b207f..12fae21 100644
|
||||
--- a/arch/arm/mach-omap2/board-3430sdp.c
|
||||
+++ b/arch/arm/mach-omap2/board-3430sdp.c
|
||||
@@ -806,5 +806,5 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
|
||||
.init_early = omap_3430sdp_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap_3430sdp_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
|
||||
index 2ec2d76..e4f37b5 100644
|
||||
--- a/arch/arm/mach-omap2/board-3630sdp.c
|
||||
+++ b/arch/arm/mach-omap2/board-3630sdp.c
|
||||
@@ -221,5 +221,5 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
|
||||
.init_early = omap_sdp_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap_sdp_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
|
||||
index 39a8062..e8caced 100644
|
||||
--- a/arch/arm/mach-omap2/board-4430sdp.c
|
||||
+++ b/arch/arm/mach-omap2/board-4430sdp.c
|
||||
@@ -768,5 +768,5 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
|
||||
.init_early = omap_4430sdp_init_early,
|
||||
.init_irq = gic_init_irq,
|
||||
.init_machine = omap_4430sdp_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap4_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
|
||||
index 0bed0a4..5f2b55f 100644
|
||||
--- a/arch/arm/mach-omap2/board-am3517crane.c
|
||||
+++ b/arch/arm/mach-omap2/board-am3517crane.c
|
||||
@@ -106,5 +106,5 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
|
||||
.init_early = am3517_crane_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = am3517_crane_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
|
||||
index 0db0fb8..f3006c3 100644
|
||||
--- a/arch/arm/mach-omap2/board-am3517evm.c
|
||||
+++ b/arch/arm/mach-omap2/board-am3517evm.c
|
||||
@@ -496,5 +496,5 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
|
||||
.init_early = am3517_evm_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = am3517_evm_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
|
||||
index 93576c8..7021170 100644
|
||||
--- a/arch/arm/mach-omap2/board-apollon.c
|
||||
+++ b/arch/arm/mach-omap2/board-apollon.c
|
||||
@@ -356,5 +356,5 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
|
||||
.init_early = omap_apollon_init_early,
|
||||
.init_irq = omap2_init_irq,
|
||||
.init_machine = omap_apollon_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap2_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
|
||||
index 43b1de5..1a18d3b 100644
|
||||
--- a/arch/arm/mach-omap2/board-cm-t35.c
|
||||
+++ b/arch/arm/mach-omap2/board-cm-t35.c
|
||||
@@ -646,5 +646,5 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
|
||||
.init_early = cm_t35_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = cm_t35_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
|
||||
index 8f15222..aa67240 100644
|
||||
--- a/arch/arm/mach-omap2/board-cm-t3517.c
|
||||
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
|
||||
@@ -306,5 +306,5 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
|
||||
.init_early = cm_t3517_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = cm_t3517_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
|
||||
index 73f3a22..46d144d 100644
|
||||
--- a/arch/arm/mach-omap2/board-devkit8000.c
|
||||
+++ b/arch/arm/mach-omap2/board-devkit8000.c
|
||||
@@ -709,5 +709,5 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
|
||||
.init_early = devkit8000_init_early,
|
||||
.init_irq = devkit8000_init_irq,
|
||||
.init_machine = devkit8000_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_secure_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
|
||||
index ccd503a..c6ecf60 100644
|
||||
--- a/arch/arm/mach-omap2/board-generic.c
|
||||
+++ b/arch/arm/mach-omap2/board-generic.c
|
||||
@@ -72,5 +72,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx")
|
||||
.init_early = omap_generic_init_early,
|
||||
.init_irq = omap2_init_irq,
|
||||
.init_machine = omap_generic_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
|
||||
index 2e16d6c..45de2b3 100644
|
||||
--- a/arch/arm/mach-omap2/board-h4.c
|
||||
+++ b/arch/arm/mach-omap2/board-h4.c
|
||||
@@ -388,5 +388,5 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
|
||||
.init_early = omap_h4_init_early,
|
||||
.init_irq = omap_h4_init_irq,
|
||||
.init_machine = omap_h4_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap2_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
|
||||
index f22a76a..f683835 100644
|
||||
--- a/arch/arm/mach-omap2/board-igep0020.c
|
||||
+++ b/arch/arm/mach-omap2/board-igep0020.c
|
||||
@@ -708,7 +708,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
|
||||
.init_early = igep_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = igep_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(IGEP0030, "IGEP OMAP3 module")
|
||||
@@ -718,5 +718,5 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
|
||||
.init_early = igep_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = igep_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
|
||||
index 9671843..5d4328f 100644
|
||||
--- a/arch/arm/mach-omap2/board-ldp.c
|
||||
+++ b/arch/arm/mach-omap2/board-ldp.c
|
||||
@@ -350,5 +350,5 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
|
||||
.init_early = omap_ldp_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap_ldp_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
|
||||
index 9c791a2..e11f0c5 100644
|
||||
--- a/arch/arm/mach-omap2/board-n8x0.c
|
||||
+++ b/arch/arm/mach-omap2/board-n8x0.c
|
||||
@@ -701,7 +701,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
|
||||
.init_early = n8x0_init_early,
|
||||
.init_irq = omap2_init_irq,
|
||||
.init_machine = n8x0_init_machine,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap2_timer,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(NOKIA_N810, "Nokia N810")
|
||||
@@ -711,7 +711,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
|
||||
.init_early = n8x0_init_early,
|
||||
.init_irq = omap2_init_irq,
|
||||
.init_machine = n8x0_init_machine,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap2_timer,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
|
||||
@@ -721,5 +721,5 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
|
||||
.init_early = n8x0_init_early,
|
||||
.init_irq = omap2_init_irq,
|
||||
.init_machine = n8x0_init_machine,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap2_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
index eaead5e..9ee16f6 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
@@ -596,5 +596,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
|
||||
.init_early = omap3_beagle_init_early,
|
||||
.init_irq = omap3_beagle_init_irq,
|
||||
.init_machine = omap3_beagle_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_secure_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
|
||||
index d39f53f..6f957ed 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3evm.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3evm.c
|
||||
@@ -741,5 +741,5 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
|
||||
.init_early = omap3_evm_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap3_evm_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
|
||||
index b63f1c2..469259a 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3logic.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3logic.c
|
||||
@@ -215,7 +215,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
|
||||
.init_early = omap3logic_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap3logic_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
|
||||
@@ -224,5 +224,5 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
|
||||
.init_early = omap3logic_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap3logic_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
|
||||
index 1d90b90..d4ea940 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3pandora.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
|
||||
@@ -652,5 +652,5 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
|
||||
.init_early = omap3pandora_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap3pandora_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
index dfa1401..2fa8fae 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
@@ -557,5 +557,5 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
|
||||
.init_early = omap3_stalker_init_early,
|
||||
.init_irq = omap3_stalker_init_irq,
|
||||
.init_machine = omap3_stalker_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_secure_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
index ae97910..8c71fd2 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
@@ -449,5 +449,5 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
|
||||
.init_early = omap3_touchbook_init_early,
|
||||
.init_irq = omap3_touchbook_init_irq,
|
||||
.init_machine = omap3_touchbook_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_secure_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
|
||||
index 6d2372b..dc1d6dc 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap4panda.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap4panda.c
|
||||
@@ -712,5 +712,5 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
|
||||
.init_early = omap4_panda_init_early,
|
||||
.init_irq = gic_init_irq,
|
||||
.init_machine = omap4_panda_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap4_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
|
||||
index e3928f2..1bf2f39 100644
|
||||
--- a/arch/arm/mach-omap2/board-overo.c
|
||||
+++ b/arch/arm/mach-omap2/board-overo.c
|
||||
@@ -617,5 +617,5 @@ MACHINE_START(OVERO, "Gumstix Overo")
|
||||
.init_early = overo_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = overo_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
|
||||
index 9c3d115..54dceb1 100644
|
||||
--- a/arch/arm/mach-omap2/board-rm680.c
|
||||
+++ b/arch/arm/mach-omap2/board-rm680.c
|
||||
@@ -165,5 +165,5 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
|
||||
.init_early = rm680_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = rm680_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
|
||||
index ee35e4e..5ea142f 100644
|
||||
--- a/arch/arm/mach-omap2/board-rx51.c
|
||||
+++ b/arch/arm/mach-omap2/board-rx51.c
|
||||
@@ -162,5 +162,5 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
|
||||
.init_early = rx51_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = rx51_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
|
||||
index 713c20f..a85d5b0 100644
|
||||
--- a/arch/arm/mach-omap2/board-ti8168evm.c
|
||||
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
|
||||
@@ -52,6 +52,6 @@ MACHINE_START(TI8168EVM, "ti8168evm")
|
||||
.map_io = ti8168_evm_map_io,
|
||||
.init_early = ti8168_init_early,
|
||||
.init_irq = ti816x_init_irq,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
.init_machine = ti8168_evm_init,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
|
||||
index 97a3f0b..8a98c3c 100644
|
||||
--- a/arch/arm/mach-omap2/board-zoom.c
|
||||
+++ b/arch/arm/mach-omap2/board-zoom.c
|
||||
@@ -139,7 +139,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
|
||||
.init_early = omap_zoom_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap_zoom_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
|
||||
@@ -149,5 +149,5 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
|
||||
.init_early = omap_zoom_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap_zoom_init,
|
||||
- .timer = &omap_timer,
|
||||
+ .timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
|
||||
index 3b9cf85..a0d8e83 100644
|
||||
--- a/arch/arm/mach-omap2/timer-gp.c
|
||||
+++ b/arch/arm/mach-omap2/timer-gp.c
|
||||
@@ -247,20 +247,41 @@ static void __init omap2_gp_clocksource_init(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
-static void __init omap2_gp_timer_init(void)
|
||||
+#define OMAP_SYS_TIMER_INIT(name) \
|
||||
+static void __init omap##name##_timer_init(void) \
|
||||
+{ \
|
||||
+ omap_dm_timer_init(); \
|
||||
+ omap2_gp_clockevent_init(); \
|
||||
+ omap2_gp_clocksource_init(); \
|
||||
+}
|
||||
+
|
||||
+#define OMAP_SYS_TIMER(name) \
|
||||
+struct sys_timer omap##name##_timer = { \
|
||||
+ .init = omap##name##_timer_init, \
|
||||
+};
|
||||
+
|
||||
+#ifdef CONFIG_ARCH_OMAP2
|
||||
+OMAP_SYS_TIMER_INIT(2)
|
||||
+OMAP_SYS_TIMER(2)
|
||||
+#endif
|
||||
+
|
||||
+#ifdef CONFIG_ARCH_OMAP3
|
||||
+OMAP_SYS_TIMER_INIT(3)
|
||||
+OMAP_SYS_TIMER(3)
|
||||
+OMAP_SYS_TIMER_INIT(3_secure)
|
||||
+OMAP_SYS_TIMER(3_secure)
|
||||
+#endif
|
||||
+
|
||||
+#ifdef CONFIG_ARCH_OMAP4
|
||||
+static void __init omap4_timer_init(void)
|
||||
{
|
||||
#ifdef CONFIG_LOCAL_TIMERS
|
||||
- if (cpu_is_omap44xx()) {
|
||||
- twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);
|
||||
- BUG_ON(!twd_base);
|
||||
- }
|
||||
+ twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);
|
||||
+ BUG_ON(!twd_base);
|
||||
#endif
|
||||
omap_dm_timer_init();
|
||||
-
|
||||
omap2_gp_clockevent_init();
|
||||
omap2_gp_clocksource_init();
|
||||
}
|
||||
-
|
||||
-struct sys_timer omap_timer = {
|
||||
- .init = omap2_gp_timer_init,
|
||||
-};
|
||||
+OMAP_SYS_TIMER(4)
|
||||
+#endif
|
||||
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
|
||||
index 5288130..4564cc6 100644
|
||||
--- a/arch/arm/plat-omap/include/plat/common.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/common.h
|
||||
@@ -34,7 +34,11 @@
|
||||
struct sys_timer;
|
||||
|
||||
extern void omap_map_common_io(void);
|
||||
-extern struct sys_timer omap_timer;
|
||||
+extern struct sys_timer omap1_timer;
|
||||
+extern struct sys_timer omap2_timer;
|
||||
+extern struct sys_timer omap3_timer;
|
||||
+extern struct sys_timer omap3_secure_timer;
|
||||
+extern struct sys_timer omap4_timer;
|
||||
extern bool omap_32k_timer_init(void);
|
||||
extern int __init omap_init_clocksource_32k(void);
|
||||
extern unsigned long long notrace omap_32k_sched_clock(void);
|
||||
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
index d6c70d2..330bd17 100644
|
||||
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
@@ -57,7 +57,6 @@
|
||||
#define OMAP_TIMER_IP_VERSION_1 0x1
|
||||
struct omap_dm_timer;
|
||||
extern struct omap_dm_timer *gptimer_wakeup;
|
||||
-extern struct sys_timer omap_timer;
|
||||
struct clk;
|
||||
|
||||
int omap_dm_timer_init(void);
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+287
@@ -0,0 +1,287 @@
|
||||
From 77203d7fdc186db617c03d3ef28981b77af3b077 Mon Sep 17 00:00:00 2001
|
||||
From: Tony Lindgren <tony@atomide.com>
|
||||
Date: Tue, 29 Mar 2011 15:54:48 -0700
|
||||
Subject: [PATCH 005/149] omap: Move dmtimer defines to dmtimer.h
|
||||
|
||||
These will be needed when dmtimer platform init code gets split
|
||||
for omap1 and omap2+. These will also be needed for separate
|
||||
sys_timer init and driver init for the rest of the hardware timers
|
||||
in the following patches. No functional changes.
|
||||
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
Reviewed-by: Kevin Hilman <khilman@ti.com>
|
||||
---
|
||||
arch/arm/plat-omap/dmtimer.c | 121 ----------------------------
|
||||
arch/arm/plat-omap/include/plat/dmtimer.h | 125 +++++++++++++++++++++++++++++
|
||||
2 files changed, 125 insertions(+), 121 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
|
||||
index ee9f6eb..dfdc3b2 100644
|
||||
--- a/arch/arm/plat-omap/dmtimer.c
|
||||
+++ b/arch/arm/plat-omap/dmtimer.c
|
||||
@@ -41,127 +41,6 @@
|
||||
#include <plat/dmtimer.h>
|
||||
#include <mach/irqs.h>
|
||||
|
||||
-/* register offsets */
|
||||
-#define _OMAP_TIMER_ID_OFFSET 0x00
|
||||
-#define _OMAP_TIMER_OCP_CFG_OFFSET 0x10
|
||||
-#define _OMAP_TIMER_SYS_STAT_OFFSET 0x14
|
||||
-#define _OMAP_TIMER_STAT_OFFSET 0x18
|
||||
-#define _OMAP_TIMER_INT_EN_OFFSET 0x1c
|
||||
-#define _OMAP_TIMER_WAKEUP_EN_OFFSET 0x20
|
||||
-#define _OMAP_TIMER_CTRL_OFFSET 0x24
|
||||
-#define OMAP_TIMER_CTRL_GPOCFG (1 << 14)
|
||||
-#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13)
|
||||
-#define OMAP_TIMER_CTRL_PT (1 << 12)
|
||||
-#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8)
|
||||
-#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8)
|
||||
-#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8)
|
||||
-#define OMAP_TIMER_CTRL_SCPWM (1 << 7)
|
||||
-#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare enable */
|
||||
-#define OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler enable */
|
||||
-#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* prescaler value shift */
|
||||
-#define OMAP_TIMER_CTRL_POSTED (1 << 2)
|
||||
-#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */
|
||||
-#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */
|
||||
-#define _OMAP_TIMER_COUNTER_OFFSET 0x28
|
||||
-#define _OMAP_TIMER_LOAD_OFFSET 0x2c
|
||||
-#define _OMAP_TIMER_TRIGGER_OFFSET 0x30
|
||||
-#define _OMAP_TIMER_WRITE_PEND_OFFSET 0x34
|
||||
-#define WP_NONE 0 /* no write pending bit */
|
||||
-#define WP_TCLR (1 << 0)
|
||||
-#define WP_TCRR (1 << 1)
|
||||
-#define WP_TLDR (1 << 2)
|
||||
-#define WP_TTGR (1 << 3)
|
||||
-#define WP_TMAR (1 << 4)
|
||||
-#define WP_TPIR (1 << 5)
|
||||
-#define WP_TNIR (1 << 6)
|
||||
-#define WP_TCVR (1 << 7)
|
||||
-#define WP_TOCR (1 << 8)
|
||||
-#define WP_TOWR (1 << 9)
|
||||
-#define _OMAP_TIMER_MATCH_OFFSET 0x38
|
||||
-#define _OMAP_TIMER_CAPTURE_OFFSET 0x3c
|
||||
-#define _OMAP_TIMER_IF_CTRL_OFFSET 0x40
|
||||
-#define _OMAP_TIMER_CAPTURE2_OFFSET 0x44 /* TCAR2, 34xx only */
|
||||
-#define _OMAP_TIMER_TICK_POS_OFFSET 0x48 /* TPIR, 34xx only */
|
||||
-#define _OMAP_TIMER_TICK_NEG_OFFSET 0x4c /* TNIR, 34xx only */
|
||||
-#define _OMAP_TIMER_TICK_COUNT_OFFSET 0x50 /* TCVR, 34xx only */
|
||||
-#define _OMAP_TIMER_TICK_INT_MASK_SET_OFFSET 0x54 /* TOCR, 34xx only */
|
||||
-#define _OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET 0x58 /* TOWR, 34xx only */
|
||||
-
|
||||
-/* register offsets with the write pending bit encoded */
|
||||
-#define WPSHIFT 16
|
||||
-
|
||||
-#define OMAP_TIMER_ID_REG (_OMAP_TIMER_ID_OFFSET \
|
||||
- | (WP_NONE << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_OCP_CFG_REG (_OMAP_TIMER_OCP_CFG_OFFSET \
|
||||
- | (WP_NONE << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_SYS_STAT_REG (_OMAP_TIMER_SYS_STAT_OFFSET \
|
||||
- | (WP_NONE << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_STAT_REG (_OMAP_TIMER_STAT_OFFSET \
|
||||
- | (WP_NONE << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_INT_EN_REG (_OMAP_TIMER_INT_EN_OFFSET \
|
||||
- | (WP_NONE << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_WAKEUP_EN_REG (_OMAP_TIMER_WAKEUP_EN_OFFSET \
|
||||
- | (WP_NONE << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_CTRL_REG (_OMAP_TIMER_CTRL_OFFSET \
|
||||
- | (WP_TCLR << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_COUNTER_REG (_OMAP_TIMER_COUNTER_OFFSET \
|
||||
- | (WP_TCRR << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_LOAD_REG (_OMAP_TIMER_LOAD_OFFSET \
|
||||
- | (WP_TLDR << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_TRIGGER_REG (_OMAP_TIMER_TRIGGER_OFFSET \
|
||||
- | (WP_TTGR << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_WRITE_PEND_REG (_OMAP_TIMER_WRITE_PEND_OFFSET \
|
||||
- | (WP_NONE << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_MATCH_REG (_OMAP_TIMER_MATCH_OFFSET \
|
||||
- | (WP_TMAR << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_CAPTURE_REG (_OMAP_TIMER_CAPTURE_OFFSET \
|
||||
- | (WP_NONE << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_IF_CTRL_REG (_OMAP_TIMER_IF_CTRL_OFFSET \
|
||||
- | (WP_NONE << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_CAPTURE2_REG (_OMAP_TIMER_CAPTURE2_OFFSET \
|
||||
- | (WP_NONE << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_TICK_POS_REG (_OMAP_TIMER_TICK_POS_OFFSET \
|
||||
- | (WP_TPIR << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_TICK_NEG_REG (_OMAP_TIMER_TICK_NEG_OFFSET \
|
||||
- | (WP_TNIR << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_TICK_COUNT_REG (_OMAP_TIMER_TICK_COUNT_OFFSET \
|
||||
- | (WP_TCVR << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_TICK_INT_MASK_SET_REG \
|
||||
- (_OMAP_TIMER_TICK_INT_MASK_SET_OFFSET | (WP_TOCR << WPSHIFT))
|
||||
-
|
||||
-#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG \
|
||||
- (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT))
|
||||
-
|
||||
-struct omap_dm_timer {
|
||||
- unsigned long phys_base;
|
||||
- int irq;
|
||||
-#ifdef CONFIG_ARCH_OMAP2PLUS
|
||||
- struct clk *iclk, *fclk;
|
||||
-#endif
|
||||
- void __iomem *io_base;
|
||||
- unsigned reserved:1;
|
||||
- unsigned enabled:1;
|
||||
- unsigned posted:1;
|
||||
-};
|
||||
-
|
||||
static int dm_timer_count;
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP1
|
||||
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
index 330bd17..3203105 100644
|
||||
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
@@ -92,5 +92,130 @@ void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value
|
||||
|
||||
int omap_dm_timers_active(void);
|
||||
|
||||
+/*
|
||||
+ * Do not use the defines below, they are not needed. They should be only
|
||||
+ * used by dmtimer.c and sys_timer related code.
|
||||
+ */
|
||||
+
|
||||
+/* register offsets */
|
||||
+#define _OMAP_TIMER_ID_OFFSET 0x00
|
||||
+#define _OMAP_TIMER_OCP_CFG_OFFSET 0x10
|
||||
+#define _OMAP_TIMER_SYS_STAT_OFFSET 0x14
|
||||
+#define _OMAP_TIMER_STAT_OFFSET 0x18
|
||||
+#define _OMAP_TIMER_INT_EN_OFFSET 0x1c
|
||||
+#define _OMAP_TIMER_WAKEUP_EN_OFFSET 0x20
|
||||
+#define _OMAP_TIMER_CTRL_OFFSET 0x24
|
||||
+#define OMAP_TIMER_CTRL_GPOCFG (1 << 14)
|
||||
+#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13)
|
||||
+#define OMAP_TIMER_CTRL_PT (1 << 12)
|
||||
+#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8)
|
||||
+#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8)
|
||||
+#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8)
|
||||
+#define OMAP_TIMER_CTRL_SCPWM (1 << 7)
|
||||
+#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare enable */
|
||||
+#define OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler enable */
|
||||
+#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* prescaler value shift */
|
||||
+#define OMAP_TIMER_CTRL_POSTED (1 << 2)
|
||||
+#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */
|
||||
+#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */
|
||||
+#define _OMAP_TIMER_COUNTER_OFFSET 0x28
|
||||
+#define _OMAP_TIMER_LOAD_OFFSET 0x2c
|
||||
+#define _OMAP_TIMER_TRIGGER_OFFSET 0x30
|
||||
+#define _OMAP_TIMER_WRITE_PEND_OFFSET 0x34
|
||||
+#define WP_NONE 0 /* no write pending bit */
|
||||
+#define WP_TCLR (1 << 0)
|
||||
+#define WP_TCRR (1 << 1)
|
||||
+#define WP_TLDR (1 << 2)
|
||||
+#define WP_TTGR (1 << 3)
|
||||
+#define WP_TMAR (1 << 4)
|
||||
+#define WP_TPIR (1 << 5)
|
||||
+#define WP_TNIR (1 << 6)
|
||||
+#define WP_TCVR (1 << 7)
|
||||
+#define WP_TOCR (1 << 8)
|
||||
+#define WP_TOWR (1 << 9)
|
||||
+#define _OMAP_TIMER_MATCH_OFFSET 0x38
|
||||
+#define _OMAP_TIMER_CAPTURE_OFFSET 0x3c
|
||||
+#define _OMAP_TIMER_IF_CTRL_OFFSET 0x40
|
||||
+#define _OMAP_TIMER_CAPTURE2_OFFSET 0x44 /* TCAR2, 34xx only */
|
||||
+#define _OMAP_TIMER_TICK_POS_OFFSET 0x48 /* TPIR, 34xx only */
|
||||
+#define _OMAP_TIMER_TICK_NEG_OFFSET 0x4c /* TNIR, 34xx only */
|
||||
+#define _OMAP_TIMER_TICK_COUNT_OFFSET 0x50 /* TCVR, 34xx only */
|
||||
+#define _OMAP_TIMER_TICK_INT_MASK_SET_OFFSET 0x54 /* TOCR, 34xx only */
|
||||
+#define _OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET 0x58 /* TOWR, 34xx only */
|
||||
+
|
||||
+/* register offsets with the write pending bit encoded */
|
||||
+#define WPSHIFT 16
|
||||
+
|
||||
+#define OMAP_TIMER_ID_REG (_OMAP_TIMER_ID_OFFSET \
|
||||
+ | (WP_NONE << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_OCP_CFG_REG (_OMAP_TIMER_OCP_CFG_OFFSET \
|
||||
+ | (WP_NONE << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_SYS_STAT_REG (_OMAP_TIMER_SYS_STAT_OFFSET \
|
||||
+ | (WP_NONE << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_STAT_REG (_OMAP_TIMER_STAT_OFFSET \
|
||||
+ | (WP_NONE << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_INT_EN_REG (_OMAP_TIMER_INT_EN_OFFSET \
|
||||
+ | (WP_NONE << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_WAKEUP_EN_REG (_OMAP_TIMER_WAKEUP_EN_OFFSET \
|
||||
+ | (WP_NONE << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_CTRL_REG (_OMAP_TIMER_CTRL_OFFSET \
|
||||
+ | (WP_TCLR << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_COUNTER_REG (_OMAP_TIMER_COUNTER_OFFSET \
|
||||
+ | (WP_TCRR << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_LOAD_REG (_OMAP_TIMER_LOAD_OFFSET \
|
||||
+ | (WP_TLDR << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_TRIGGER_REG (_OMAP_TIMER_TRIGGER_OFFSET \
|
||||
+ | (WP_TTGR << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_WRITE_PEND_REG (_OMAP_TIMER_WRITE_PEND_OFFSET \
|
||||
+ | (WP_NONE << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_MATCH_REG (_OMAP_TIMER_MATCH_OFFSET \
|
||||
+ | (WP_TMAR << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_CAPTURE_REG (_OMAP_TIMER_CAPTURE_OFFSET \
|
||||
+ | (WP_NONE << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_IF_CTRL_REG (_OMAP_TIMER_IF_CTRL_OFFSET \
|
||||
+ | (WP_NONE << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_CAPTURE2_REG (_OMAP_TIMER_CAPTURE2_OFFSET \
|
||||
+ | (WP_NONE << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_TICK_POS_REG (_OMAP_TIMER_TICK_POS_OFFSET \
|
||||
+ | (WP_TPIR << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_TICK_NEG_REG (_OMAP_TIMER_TICK_NEG_OFFSET \
|
||||
+ | (WP_TNIR << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_TICK_COUNT_REG (_OMAP_TIMER_TICK_COUNT_OFFSET \
|
||||
+ | (WP_TCVR << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_TICK_INT_MASK_SET_REG \
|
||||
+ (_OMAP_TIMER_TICK_INT_MASK_SET_OFFSET | (WP_TOCR << WPSHIFT))
|
||||
+
|
||||
+#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG \
|
||||
+ (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT))
|
||||
+
|
||||
+struct omap_dm_timer {
|
||||
+ unsigned long phys_base;
|
||||
+ int irq;
|
||||
+#ifdef CONFIG_ARCH_OMAP2PLUS
|
||||
+ struct clk *iclk, *fclk;
|
||||
+#endif
|
||||
+ void __iomem *io_base;
|
||||
+ unsigned reserved:1;
|
||||
+ unsigned enabled:1;
|
||||
+ unsigned posted:1;
|
||||
+};
|
||||
|
||||
#endif /* __ASM_ARCH_DMTIMER_H */
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+323
@@ -0,0 +1,323 @@
|
||||
From e37c3d49a7642a25996d86d97d4e6f36e4c7ed8a Mon Sep 17 00:00:00 2001
|
||||
From: Tony Lindgren <tony@atomide.com>
|
||||
Date: Tue, 29 Mar 2011 15:54:48 -0700
|
||||
Subject: [PATCH 006/149] omap: Make a subset of dmtimer functions into inline functions
|
||||
|
||||
This will allow us to share the code between system timer and
|
||||
dmtimer device driver code without having to initialize all the
|
||||
dmtimers early. This change will also make the timer_set_next_event
|
||||
more efficient as the inline functions will optimize the code
|
||||
better for the timer reprogramming.
|
||||
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
Reviewed-by: Kevin Hilman <khilman@ti.com>
|
||||
---
|
||||
arch/arm/plat-omap/dmtimer.c | 78 ++++---------------
|
||||
arch/arm/plat-omap/include/plat/dmtimer.h | 119 +++++++++++++++++++++++++++++
|
||||
2 files changed, 136 insertions(+), 61 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
|
||||
index dfdc3b2..7c5cb4e 100644
|
||||
--- a/arch/arm/plat-omap/dmtimer.c
|
||||
+++ b/arch/arm/plat-omap/dmtimer.c
|
||||
@@ -170,11 +170,7 @@ static spinlock_t dm_timer_lock;
|
||||
*/
|
||||
static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
|
||||
{
|
||||
- if (timer->posted)
|
||||
- while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff))
|
||||
- & (reg >> WPSHIFT))
|
||||
- cpu_relax();
|
||||
- return readl(timer->io_base + (reg & 0xff));
|
||||
+ return __omap_dm_timer_read(timer->io_base, reg, timer->posted);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -186,11 +182,7 @@ static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
|
||||
static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
|
||||
u32 value)
|
||||
{
|
||||
- if (timer->posted)
|
||||
- while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff))
|
||||
- & (reg >> WPSHIFT))
|
||||
- cpu_relax();
|
||||
- writel(value, timer->io_base + (reg & 0xff));
|
||||
+ __omap_dm_timer_write(timer->io_base, reg, value, timer->posted);
|
||||
}
|
||||
|
||||
static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
|
||||
@@ -209,7 +201,7 @@ static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
|
||||
|
||||
static void omap_dm_timer_reset(struct omap_dm_timer *timer)
|
||||
{
|
||||
- u32 l;
|
||||
+ int autoidle = 0, wakeup = 0;
|
||||
|
||||
if (!cpu_class_is_omap2() || timer != &dm_timers[0]) {
|
||||
omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
|
||||
@@ -217,28 +209,21 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer)
|
||||
}
|
||||
omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
|
||||
|
||||
- l = omap_dm_timer_read_reg(timer, OMAP_TIMER_OCP_CFG_REG);
|
||||
- l |= 0x02 << 3; /* Set to smart-idle mode */
|
||||
- l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */
|
||||
-
|
||||
/* Enable autoidle on OMAP2 / OMAP3 */
|
||||
if (cpu_is_omap24xx() || cpu_is_omap34xx())
|
||||
- l |= 0x1 << 0;
|
||||
+ autoidle = 1;
|
||||
|
||||
/*
|
||||
* Enable wake-up on OMAP2 CPUs.
|
||||
*/
|
||||
if (cpu_class_is_omap2())
|
||||
- l |= 1 << 2;
|
||||
- omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l);
|
||||
+ wakeup = 1;
|
||||
|
||||
- /* Match hardware reset default of posted mode */
|
||||
- omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG,
|
||||
- OMAP_TIMER_CTRL_POSTED);
|
||||
+ __omap_dm_timer_reset(timer->io_base, autoidle, wakeup);
|
||||
timer->posted = 1;
|
||||
}
|
||||
|
||||
-static void omap_dm_timer_prepare(struct omap_dm_timer *timer)
|
||||
+void omap_dm_timer_prepare(struct omap_dm_timer *timer)
|
||||
{
|
||||
omap_dm_timer_enable(timer);
|
||||
omap_dm_timer_reset(timer);
|
||||
@@ -410,25 +395,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_start);
|
||||
|
||||
void omap_dm_timer_stop(struct omap_dm_timer *timer)
|
||||
{
|
||||
- u32 l;
|
||||
+ unsigned long rate = 0;
|
||||
|
||||
- l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
|
||||
- if (l & OMAP_TIMER_CTRL_ST) {
|
||||
- l &= ~0x1;
|
||||
- omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
|
||||
#ifdef CONFIG_ARCH_OMAP2PLUS
|
||||
- /* Readback to make sure write has completed */
|
||||
- omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
|
||||
- /*
|
||||
- * Wait for functional clock period x 3.5 to make sure that
|
||||
- * timer is stopped
|
||||
- */
|
||||
- udelay(3500000 / clk_get_rate(timer->fclk) + 1);
|
||||
+ rate = clk_get_rate(timer->fclk);
|
||||
#endif
|
||||
- }
|
||||
- /* Ack possibly pending interrupt */
|
||||
- omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG,
|
||||
- OMAP_TIMER_INT_OVERFLOW);
|
||||
+
|
||||
+ __omap_dm_timer_stop(timer->io_base, timer->posted, rate);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
|
||||
|
||||
@@ -451,22 +424,11 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
|
||||
|
||||
int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
|
||||
{
|
||||
- int ret = -EINVAL;
|
||||
-
|
||||
if (source < 0 || source >= 3)
|
||||
return -EINVAL;
|
||||
|
||||
- clk_disable(timer->fclk);
|
||||
- ret = clk_set_parent(timer->fclk, dm_source_clocks[source]);
|
||||
- clk_enable(timer->fclk);
|
||||
-
|
||||
- /*
|
||||
- * When the functional clock disappears, too quick writes seem
|
||||
- * to cause an abort. XXX Is this still necessary?
|
||||
- */
|
||||
- __delay(300000);
|
||||
-
|
||||
- return ret;
|
||||
+ return __omap_dm_timer_set_source(timer->fclk,
|
||||
+ dm_source_clocks[source]);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
|
||||
|
||||
@@ -504,8 +466,7 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
|
||||
}
|
||||
l |= OMAP_TIMER_CTRL_ST;
|
||||
|
||||
- omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, load);
|
||||
- omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
|
||||
+ __omap_dm_timer_load_start(timer->io_base, l, load, timer->posted);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
|
||||
|
||||
@@ -558,8 +519,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
|
||||
void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
|
||||
unsigned int value)
|
||||
{
|
||||
- omap_dm_timer_write_reg(timer, OMAP_TIMER_INT_EN_REG, value);
|
||||
- omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, value);
|
||||
+ __omap_dm_timer_int_enable(timer->io_base, value);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
|
||||
|
||||
@@ -575,17 +535,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
|
||||
|
||||
void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
|
||||
{
|
||||
- omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, value);
|
||||
+ __omap_dm_timer_write_status(timer->io_base, value);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
|
||||
|
||||
unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
|
||||
{
|
||||
- unsigned int l;
|
||||
-
|
||||
- l = omap_dm_timer_read_reg(timer, OMAP_TIMER_COUNTER_REG);
|
||||
-
|
||||
- return l;
|
||||
+ return __omap_dm_timer_read_counter(timer->io_base, timer->posted);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
|
||||
|
||||
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
index 3203105..54664a7 100644
|
||||
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
@@ -32,6 +32,9 @@
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
+#include <linux/clk.h>
|
||||
+#include <linux/delay.h>
|
||||
+
|
||||
#ifndef __ASM_ARCH_DMTIMER_H
|
||||
#define __ASM_ARCH_DMTIMER_H
|
||||
|
||||
@@ -218,4 +221,120 @@ struct omap_dm_timer {
|
||||
unsigned posted:1;
|
||||
};
|
||||
|
||||
+void omap_dm_timer_prepare(struct omap_dm_timer *timer);
|
||||
+
|
||||
+static inline u32 __omap_dm_timer_read(void __iomem *base, u32 reg,
|
||||
+ int posted)
|
||||
+{
|
||||
+ if (posted)
|
||||
+ while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG & 0xff))
|
||||
+ & (reg >> WPSHIFT))
|
||||
+ cpu_relax();
|
||||
+
|
||||
+ return __raw_readl(base + (reg & 0xff));
|
||||
+}
|
||||
+
|
||||
+static inline void __omap_dm_timer_write(void __iomem *base, u32 reg, u32 val,
|
||||
+ int posted)
|
||||
+{
|
||||
+ if (posted)
|
||||
+ while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG & 0xff))
|
||||
+ & (reg >> WPSHIFT))
|
||||
+ cpu_relax();
|
||||
+
|
||||
+ __raw_writel(val, base + (reg & 0xff));
|
||||
+}
|
||||
+
|
||||
+/* Assumes the source clock has been set by caller */
|
||||
+static inline void __omap_dm_timer_reset(void __iomem *base, int autoidle,
|
||||
+ int wakeup)
|
||||
+{
|
||||
+ u32 l;
|
||||
+
|
||||
+ l = __omap_dm_timer_read(base, OMAP_TIMER_OCP_CFG_REG, 0);
|
||||
+ l |= 0x02 << 3; /* Set to smart-idle mode */
|
||||
+ l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */
|
||||
+
|
||||
+ if (autoidle)
|
||||
+ l |= 0x1 << 0;
|
||||
+
|
||||
+ if (wakeup)
|
||||
+ l |= 1 << 2;
|
||||
+
|
||||
+ __omap_dm_timer_write(base, OMAP_TIMER_OCP_CFG_REG, l, 0);
|
||||
+
|
||||
+ /* Match hardware reset default of posted mode */
|
||||
+ __omap_dm_timer_write(base, OMAP_TIMER_IF_CTRL_REG,
|
||||
+ OMAP_TIMER_CTRL_POSTED, 0);
|
||||
+}
|
||||
+
|
||||
+static inline int __omap_dm_timer_set_source(struct clk *timer_fck,
|
||||
+ struct clk *parent)
|
||||
+{
|
||||
+ int ret;
|
||||
+
|
||||
+ clk_disable(timer_fck);
|
||||
+ ret = clk_set_parent(timer_fck, parent);
|
||||
+ clk_enable(timer_fck);
|
||||
+
|
||||
+ /*
|
||||
+ * When the functional clock disappears, too quick writes seem
|
||||
+ * to cause an abort. XXX Is this still necessary?
|
||||
+ */
|
||||
+ __delay(300000);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static inline void __omap_dm_timer_stop(void __iomem *base, int posted,
|
||||
+ unsigned long rate)
|
||||
+{
|
||||
+ u32 l;
|
||||
+
|
||||
+ l = __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, posted);
|
||||
+ if (l & OMAP_TIMER_CTRL_ST) {
|
||||
+ l &= ~0x1;
|
||||
+ __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, l, posted);
|
||||
+#ifdef CONFIG_ARCH_OMAP2PLUS
|
||||
+ /* Readback to make sure write has completed */
|
||||
+ __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, posted);
|
||||
+ /*
|
||||
+ * Wait for functional clock period x 3.5 to make sure that
|
||||
+ * timer is stopped
|
||||
+ */
|
||||
+ udelay(3500000 / rate + 1);
|
||||
+#endif
|
||||
+ }
|
||||
+
|
||||
+ /* Ack possibly pending interrupt */
|
||||
+ __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG,
|
||||
+ OMAP_TIMER_INT_OVERFLOW, 0);
|
||||
+}
|
||||
+
|
||||
+static inline void __omap_dm_timer_load_start(void __iomem *base, u32 ctrl,
|
||||
+ unsigned int load, int posted)
|
||||
+{
|
||||
+ __omap_dm_timer_write(base, OMAP_TIMER_COUNTER_REG, load, posted);
|
||||
+ __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, ctrl, posted);
|
||||
+}
|
||||
+
|
||||
+static inline void __omap_dm_timer_int_enable(void __iomem *base,
|
||||
+ unsigned int value)
|
||||
+{
|
||||
+ __omap_dm_timer_write(base, OMAP_TIMER_INT_EN_REG, value, 0);
|
||||
+ __omap_dm_timer_write(base, OMAP_TIMER_WAKEUP_EN_REG, value, 0);
|
||||
+}
|
||||
+
|
||||
+static inline unsigned int __omap_dm_timer_read_counter(void __iomem *base,
|
||||
+ int posted)
|
||||
+{
|
||||
+ return __omap_dm_timer_read(base, OMAP_TIMER_COUNTER_REG, posted);
|
||||
+}
|
||||
+
|
||||
+static inline void __omap_dm_timer_write_status(void __iomem *base,
|
||||
+ unsigned int value)
|
||||
+{
|
||||
+ __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG, value, 0);
|
||||
+}
|
||||
+
|
||||
#endif /* __ASM_ARCH_DMTIMER_H */
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+279
@@ -0,0 +1,279 @@
|
||||
From 8f20e73dc841e924d8e9cb97b83119f2b45c9dbb Mon Sep 17 00:00:00 2001
|
||||
From: Tony Lindgren <tony@atomide.com>
|
||||
Date: Tue, 29 Mar 2011 15:54:48 -0700
|
||||
Subject: [PATCH 007/149] omap2+: Use dmtimer macros for clockevent
|
||||
|
||||
This patch makes timer-gp.c to use only a subset of dmtimer
|
||||
functions without the need to initialize dmtimer code early.
|
||||
|
||||
Also note that now with the inline functions, timer_set_next_event
|
||||
becomes more efficient in the lines of assembly code.
|
||||
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
Reviewed-by: Kevin Hilman <khilman@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap2/timer-gp.c | 147 ++++++++++++++++++++++-------
|
||||
arch/arm/plat-omap/include/plat/dmtimer.h | 1 +
|
||||
2 files changed, 113 insertions(+), 35 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
|
||||
index a0d8e83..62c0d5c 100644
|
||||
--- a/arch/arm/mach-omap2/timer-gp.c
|
||||
+++ b/arch/arm/mach-omap2/timer-gp.c
|
||||
@@ -45,10 +45,33 @@
|
||||
|
||||
#include "timer-gp.h"
|
||||
|
||||
+/* Parent clocks, eventually these will come from the clock framework */
|
||||
+
|
||||
+#define OMAP2_MPU_SOURCE "sys_ck"
|
||||
+#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE
|
||||
+#define OMAP4_MPU_SOURCE "sys_clkin_ck"
|
||||
+#define OMAP2_32K_SOURCE "func_32k_ck"
|
||||
+#define OMAP3_32K_SOURCE "omap_32k_fck"
|
||||
+#define OMAP4_32K_SOURCE "sys_32k_ck"
|
||||
+
|
||||
+#ifdef CONFIG_OMAP_32K_TIMER
|
||||
+#define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE
|
||||
+#define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE
|
||||
+#define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE
|
||||
+#define OMAP3_SECURE_TIMER 12
|
||||
+#else
|
||||
+#define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE
|
||||
+#define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE
|
||||
+#define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE
|
||||
+#define OMAP3_SECURE_TIMER 1
|
||||
+#endif
|
||||
|
||||
/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
|
||||
#define MAX_GPTIMER_ID 12
|
||||
|
||||
+/* Clockevent code */
|
||||
+
|
||||
+static struct omap_dm_timer clkev;
|
||||
static struct omap_dm_timer *gptimer;
|
||||
static struct clock_event_device clockevent_gpt;
|
||||
static u8 __initdata gptimer_id = 1;
|
||||
@@ -57,10 +80,9 @@ struct omap_dm_timer *gptimer_wakeup;
|
||||
|
||||
static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
- struct omap_dm_timer *gpt = (struct omap_dm_timer *)dev_id;
|
||||
struct clock_event_device *evt = &clockevent_gpt;
|
||||
|
||||
- omap_dm_timer_write_status(gpt, OMAP_TIMER_INT_OVERFLOW);
|
||||
+ __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW);
|
||||
|
||||
evt->event_handler(evt);
|
||||
return IRQ_HANDLED;
|
||||
@@ -75,7 +97,8 @@ static struct irqaction omap2_gp_timer_irq = {
|
||||
static int omap2_gp_timer_set_next_event(unsigned long cycles,
|
||||
struct clock_event_device *evt)
|
||||
{
|
||||
- omap_dm_timer_set_load_start(gptimer, 0, 0xffffffff - cycles);
|
||||
+ __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST,
|
||||
+ 0xffffffff - cycles, 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -85,13 +108,18 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
|
||||
{
|
||||
u32 period;
|
||||
|
||||
- omap_dm_timer_stop(gptimer);
|
||||
+ __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate);
|
||||
|
||||
switch (mode) {
|
||||
case CLOCK_EVT_MODE_PERIODIC:
|
||||
- period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
|
||||
+ period = clkev.rate / HZ;
|
||||
period -= 1;
|
||||
- omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period);
|
||||
+ /* Looks like we need to first set the load value separately */
|
||||
+ __omap_dm_timer_write(clkev.io_base, OMAP_TIMER_LOAD_REG,
|
||||
+ 0xffffffff - period, 1);
|
||||
+ __omap_dm_timer_load_start(clkev.io_base,
|
||||
+ OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
|
||||
+ 0xffffffff - period, 1);
|
||||
break;
|
||||
case CLOCK_EVT_MODE_ONESHOT:
|
||||
break;
|
||||
@@ -130,43 +158,89 @@ int __init omap2_gp_clockevent_set_gptimer(u8 id)
|
||||
return 0;
|
||||
}
|
||||
|
||||
-static void __init omap2_gp_clockevent_init(void)
|
||||
+static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
|
||||
+ int gptimer_id,
|
||||
+ const char *fck_source)
|
||||
{
|
||||
- u32 tick_rate;
|
||||
- int src;
|
||||
- char clockevent_hwmod_name[8]; /* 8 = sizeof("timerXX0") */
|
||||
+ char name[10]; /* 10 = sizeof("gptXX_Xck0") */
|
||||
+ struct omap_hwmod *oh;
|
||||
+ size_t size;
|
||||
+ int res = 0;
|
||||
+
|
||||
+ sprintf(name, "timer%d", gptimer_id);
|
||||
+ omap_hwmod_setup_one(name);
|
||||
+ oh = omap_hwmod_lookup(name);
|
||||
+ if (!oh)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ timer->irq = oh->mpu_irqs[0].irq;
|
||||
+ timer->phys_base = oh->slaves[0]->addr->pa_start;
|
||||
+ size = oh->slaves[0]->addr->pa_end - timer->phys_base;
|
||||
+
|
||||
+ /* Static mapping, never released */
|
||||
+ timer->io_base = ioremap(timer->phys_base, size);
|
||||
+ if (!timer->io_base)
|
||||
+ return -ENXIO;
|
||||
+
|
||||
+ /* After the dmtimer is using hwmod these clocks won't be needed */
|
||||
+ sprintf(name, "gpt%d_fck", gptimer_id);
|
||||
+ timer->fclk = clk_get(NULL, name);
|
||||
+ if (IS_ERR(timer->fclk))
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ sprintf(name, "gpt%d_ick", gptimer_id);
|
||||
+ timer->iclk = clk_get(NULL, name);
|
||||
+ if (IS_ERR(timer->iclk)) {
|
||||
+ clk_put(timer->fclk);
|
||||
+ return -ENODEV;
|
||||
+ }
|
||||
|
||||
- inited = 1;
|
||||
+ omap_hwmod_enable(oh);
|
||||
+
|
||||
+ if (gptimer_id != 12) {
|
||||
+ struct clk *src;
|
||||
+
|
||||
+ src = clk_get(NULL, fck_source);
|
||||
+ if (IS_ERR(src)) {
|
||||
+ res = -EINVAL;
|
||||
+ } else {
|
||||
+ res = __omap_dm_timer_set_source(timer->fclk, src);
|
||||
+ if (IS_ERR_VALUE(res))
|
||||
+ pr_warning("%s: timer%i cannot set source\n",
|
||||
+ __func__, gptimer_id);
|
||||
+ clk_put(src);
|
||||
+ }
|
||||
+ }
|
||||
+ __omap_dm_timer_reset(timer->io_base, 1, 1);
|
||||
+ timer->posted = 1;
|
||||
+
|
||||
+ timer->rate = clk_get_rate(timer->fclk);
|
||||
|
||||
- sprintf(clockevent_hwmod_name, "timer%d", gptimer_id);
|
||||
- omap_hwmod_setup_one(clockevent_hwmod_name);
|
||||
+ timer->reserved = 1;
|
||||
|
||||
gptimer = omap_dm_timer_request_specific(gptimer_id);
|
||||
BUG_ON(gptimer == NULL);
|
||||
gptimer_wakeup = gptimer;
|
||||
|
||||
-#if defined(CONFIG_OMAP_32K_TIMER)
|
||||
- src = OMAP_TIMER_SRC_32_KHZ;
|
||||
-#else
|
||||
- src = OMAP_TIMER_SRC_SYS_CLK;
|
||||
- WARN(gptimer_id == 12, "WARNING: GPTIMER12 can only use the "
|
||||
- "secure 32KiHz clock source\n");
|
||||
-#endif
|
||||
+ return res;
|
||||
+}
|
||||
|
||||
- if (gptimer_id != 12)
|
||||
- WARN(IS_ERR_VALUE(omap_dm_timer_set_source(gptimer, src)),
|
||||
- "timer-gp: omap_dm_timer_set_source() failed\n");
|
||||
+static void __init omap2_gp_clockevent_init(int gptimer_id,
|
||||
+ const char *fck_source)
|
||||
+{
|
||||
+ int res;
|
||||
|
||||
- tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
|
||||
+ inited = 1;
|
||||
|
||||
- pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n",
|
||||
- gptimer_id, tick_rate);
|
||||
+ res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source);
|
||||
+ BUG_ON(res);
|
||||
|
||||
omap2_gp_timer_irq.dev_id = (void *)gptimer;
|
||||
- setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);
|
||||
- omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW);
|
||||
+ setup_irq(clkev.irq, &omap2_gp_timer_irq);
|
||||
|
||||
- clockevent_gpt.mult = div_sc(tick_rate, NSEC_PER_SEC,
|
||||
+ __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW);
|
||||
+
|
||||
+ clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
|
||||
clockevent_gpt.shift);
|
||||
clockevent_gpt.max_delta_ns =
|
||||
clockevent_delta2ns(0xffffffff, &clockevent_gpt);
|
||||
@@ -176,6 +250,9 @@ static void __init omap2_gp_clockevent_init(void)
|
||||
|
||||
clockevent_gpt.cpumask = cpumask_of(0);
|
||||
clockevents_register_device(&clockevent_gpt);
|
||||
+
|
||||
+ pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
|
||||
+ gptimer_id, clkev.rate);
|
||||
}
|
||||
|
||||
/* Clocksource code */
|
||||
@@ -247,11 +324,11 @@ static void __init omap2_gp_clocksource_init(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
-#define OMAP_SYS_TIMER_INIT(name) \
|
||||
+#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src) \
|
||||
static void __init omap##name##_timer_init(void) \
|
||||
{ \
|
||||
omap_dm_timer_init(); \
|
||||
- omap2_gp_clockevent_init(); \
|
||||
+ omap2_gp_clockevent_init((clkev_nr), clkev_src); \
|
||||
omap2_gp_clocksource_init(); \
|
||||
}
|
||||
|
||||
@@ -261,14 +338,14 @@ struct sys_timer omap##name##_timer = { \
|
||||
};
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2
|
||||
-OMAP_SYS_TIMER_INIT(2)
|
||||
+OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE)
|
||||
OMAP_SYS_TIMER(2)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP3
|
||||
-OMAP_SYS_TIMER_INIT(3)
|
||||
+OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE)
|
||||
OMAP_SYS_TIMER(3)
|
||||
-OMAP_SYS_TIMER_INIT(3_secure)
|
||||
+OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE)
|
||||
OMAP_SYS_TIMER(3_secure)
|
||||
#endif
|
||||
|
||||
@@ -280,7 +357,7 @@ static void __init omap4_timer_init(void)
|
||||
BUG_ON(!twd_base);
|
||||
#endif
|
||||
omap_dm_timer_init();
|
||||
- omap2_gp_clockevent_init();
|
||||
+ omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
|
||||
omap2_gp_clocksource_init();
|
||||
}
|
||||
OMAP_SYS_TIMER(4)
|
||||
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
index 54664a7..dd8b3ff 100644
|
||||
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
@@ -216,6 +216,7 @@ struct omap_dm_timer {
|
||||
struct clk *iclk, *fclk;
|
||||
#endif
|
||||
void __iomem *io_base;
|
||||
+ unsigned long rate;
|
||||
unsigned reserved:1;
|
||||
unsigned enabled:1;
|
||||
unsigned posted:1;
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+177
@@ -0,0 +1,177 @@
|
||||
From 426a4d3d331abef9fb16e9207885bda1db8c7d69 Mon Sep 17 00:00:00 2001
|
||||
From: Tony Lindgren <tony@atomide.com>
|
||||
Date: Tue, 29 Mar 2011 15:54:49 -0700
|
||||
Subject: [PATCH 008/149] omap2+: Remove gptimer_wakeup for now
|
||||
|
||||
This removes the support for setting the wake-up timer for debugging.
|
||||
|
||||
Later on we can reserve gptimer1 for PM code only and have similar
|
||||
functionality.
|
||||
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
Reviewed-by: Kevin Hilman <khilman@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap2/pm-debug.c | 28 ----------------------------
|
||||
arch/arm/mach-omap2/pm.h | 6 ------
|
||||
arch/arm/mach-omap2/pm34xx.c | 4 ----
|
||||
arch/arm/mach-omap2/timer-gp.c | 8 +-------
|
||||
arch/arm/plat-omap/include/plat/dmtimer.h | 1 -
|
||||
5 files changed, 1 insertions(+), 46 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
|
||||
index e01da45..2c35bd3 100644
|
||||
--- a/arch/arm/mach-omap2/pm-debug.c
|
||||
+++ b/arch/arm/mach-omap2/pm-debug.c
|
||||
@@ -31,7 +31,6 @@
|
||||
#include <plat/board.h>
|
||||
#include "powerdomain.h"
|
||||
#include "clockdomain.h"
|
||||
-#include <plat/dmtimer.h>
|
||||
#include <plat/omap-pm.h>
|
||||
|
||||
#include "cm2xxx_3xxx.h"
|
||||
@@ -41,8 +40,6 @@
|
||||
int omap2_pm_debug;
|
||||
u32 enable_off_mode;
|
||||
u32 sleep_while_idle;
|
||||
-u32 wakeup_timer_seconds;
|
||||
-u32 wakeup_timer_milliseconds;
|
||||
|
||||
#define DUMP_PRM_MOD_REG(mod, reg) \
|
||||
regs[reg_count].name = #mod "." #reg; \
|
||||
@@ -162,23 +159,6 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
|
||||
printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val);
|
||||
}
|
||||
|
||||
-void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds)
|
||||
-{
|
||||
- u32 tick_rate, cycles;
|
||||
-
|
||||
- if (!seconds && !milliseconds)
|
||||
- return;
|
||||
-
|
||||
- tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup));
|
||||
- cycles = tick_rate * seconds + tick_rate * milliseconds / 1000;
|
||||
- omap_dm_timer_stop(gptimer_wakeup);
|
||||
- omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles);
|
||||
-
|
||||
- pr_info("PM: Resume timer in %u.%03u secs"
|
||||
- " (%d ticks at %d ticks/sec.)\n",
|
||||
- seconds, milliseconds, cycles, tick_rate);
|
||||
-}
|
||||
-
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/seq_file.h>
|
||||
@@ -576,9 +556,6 @@ static int option_set(void *data, u64 val)
|
||||
{
|
||||
u32 *option = data;
|
||||
|
||||
- if (option == &wakeup_timer_milliseconds && val >= 1000)
|
||||
- return -EINVAL;
|
||||
-
|
||||
*option = val;
|
||||
|
||||
if (option == &enable_off_mode) {
|
||||
@@ -641,11 +618,6 @@ static int pm_dbg_init(void)
|
||||
&enable_off_mode, &pm_dbg_option_fops);
|
||||
(void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUSR, d,
|
||||
&sleep_while_idle, &pm_dbg_option_fops);
|
||||
- (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUSR, d,
|
||||
- &wakeup_timer_seconds, &pm_dbg_option_fops);
|
||||
- (void) debugfs_create_file("wakeup_timer_milliseconds",
|
||||
- S_IRUGO | S_IWUSR, d, &wakeup_timer_milliseconds,
|
||||
- &pm_dbg_option_fops);
|
||||
pm_dbg_init_done = 1;
|
||||
|
||||
return 0;
|
||||
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
|
||||
index 45bcfce..c3a367e 100644
|
||||
--- a/arch/arm/mach-omap2/pm.h
|
||||
+++ b/arch/arm/mach-omap2/pm.h
|
||||
@@ -60,19 +60,13 @@ inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params)
|
||||
extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
|
||||
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
|
||||
|
||||
-extern u32 wakeup_timer_seconds;
|
||||
-extern u32 wakeup_timer_milliseconds;
|
||||
-extern struct omap_dm_timer *gptimer_wakeup;
|
||||
-
|
||||
#ifdef CONFIG_PM_DEBUG
|
||||
extern void omap2_pm_dump(int mode, int resume, unsigned int us);
|
||||
-extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds);
|
||||
extern int omap2_pm_debug;
|
||||
extern u32 enable_off_mode;
|
||||
extern u32 sleep_while_idle;
|
||||
#else
|
||||
#define omap2_pm_dump(mode, resume, us) do {} while (0);
|
||||
-#define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0);
|
||||
#define omap2_pm_debug 0
|
||||
#define enable_off_mode 0
|
||||
#define sleep_while_idle 0
|
||||
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
|
||||
index c155c9d..4cb636a 100644
|
||||
--- a/arch/arm/mach-omap2/pm34xx.c
|
||||
+++ b/arch/arm/mach-omap2/pm34xx.c
|
||||
@@ -534,10 +534,6 @@ static int omap3_pm_suspend(void)
|
||||
struct power_state *pwrst;
|
||||
int state, ret = 0;
|
||||
|
||||
- if (wakeup_timer_seconds || wakeup_timer_milliseconds)
|
||||
- omap2_pm_wakeup_on_timer(wakeup_timer_seconds,
|
||||
- wakeup_timer_milliseconds);
|
||||
-
|
||||
/* Read current next_pwrsts */
|
||||
list_for_each_entry(pwrst, &pwrst_list, node)
|
||||
pwrst->saved_state = pwrdm_read_next_pwrst(pwrst->pwrdm);
|
||||
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
|
||||
index 62c0d5c..578e9df 100644
|
||||
--- a/arch/arm/mach-omap2/timer-gp.c
|
||||
+++ b/arch/arm/mach-omap2/timer-gp.c
|
||||
@@ -72,11 +72,9 @@
|
||||
/* Clockevent code */
|
||||
|
||||
static struct omap_dm_timer clkev;
|
||||
-static struct omap_dm_timer *gptimer;
|
||||
static struct clock_event_device clockevent_gpt;
|
||||
static u8 __initdata gptimer_id = 1;
|
||||
static u8 __initdata inited;
|
||||
-struct omap_dm_timer *gptimer_wakeup;
|
||||
|
||||
static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
@@ -218,10 +216,6 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
|
||||
|
||||
timer->reserved = 1;
|
||||
|
||||
- gptimer = omap_dm_timer_request_specific(gptimer_id);
|
||||
- BUG_ON(gptimer == NULL);
|
||||
- gptimer_wakeup = gptimer;
|
||||
-
|
||||
return res;
|
||||
}
|
||||
|
||||
@@ -235,7 +229,7 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
|
||||
res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source);
|
||||
BUG_ON(res);
|
||||
|
||||
- omap2_gp_timer_irq.dev_id = (void *)gptimer;
|
||||
+ omap2_gp_timer_irq.dev_id = (void *)&clkev;
|
||||
setup_irq(clkev.irq, &omap2_gp_timer_irq);
|
||||
|
||||
__omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW);
|
||||
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
index dd8b3ff..8adcb18 100644
|
||||
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
@@ -59,7 +59,6 @@
|
||||
*/
|
||||
#define OMAP_TIMER_IP_VERSION_1 0x1
|
||||
struct omap_dm_timer;
|
||||
-extern struct omap_dm_timer *gptimer_wakeup;
|
||||
struct clk;
|
||||
|
||||
int omap_dm_timer_init(void);
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+47
@@ -0,0 +1,47 @@
|
||||
From 492d2ffec3453c8fc887c73963d8e77ef9677189 Mon Sep 17 00:00:00 2001
|
||||
From: Nishanth Menon <nm@ti.com>
|
||||
Date: Mon, 14 Feb 2011 12:16:36 +0530
|
||||
Subject: [PATCH 009/149] OMAP3+: SR: make notify independent of class
|
||||
|
||||
Interrupt notification mechanism of SmartReflex can be used by the
|
||||
choice of implementation of the class driver. For example, Class 2 and
|
||||
Class 1.5 of SmartReflex can both use the interrupt notification to
|
||||
identify the transition of voltage or other events.
|
||||
|
||||
Hence, the actual class does not matter for notifier. Let the class
|
||||
driver's handling decide how it should be used. SmartReflex driver
|
||||
should provide just the primitives.
|
||||
|
||||
Signed-off-by: Nishanth Menon <nm@ti.com>
|
||||
Signed-off-by: Kevin Hilman <khilman@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap2/smartreflex.c | 6 ++----
|
||||
1 files changed, 2 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
|
||||
index fb7dc52..3ee7261 100644
|
||||
--- a/arch/arm/mach-omap2/smartreflex.c
|
||||
+++ b/arch/arm/mach-omap2/smartreflex.c
|
||||
@@ -143,7 +143,7 @@ static irqreturn_t sr_interrupt(int irq, void *data)
|
||||
sr_write_reg(sr_info, IRQSTATUS, status);
|
||||
}
|
||||
|
||||
- if (sr_class->class_type == SR_CLASS2 && sr_class->notify)
|
||||
+ if (sr_class->notify)
|
||||
sr_class->notify(sr_info->voltdm, status);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
@@ -258,9 +258,7 @@ static int sr_late_init(struct omap_sr *sr_info)
|
||||
struct resource *mem;
|
||||
int ret = 0;
|
||||
|
||||
- if (sr_class->class_type == SR_CLASS2 &&
|
||||
- sr_class->notify_flags && sr_info->irq) {
|
||||
-
|
||||
+ if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
|
||||
name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name);
|
||||
if (name == NULL) {
|
||||
ret = -ENOMEM;
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+4
-4
@@ -1,7 +1,7 @@
|
||||
From 0c06ec8074efa965a12ce79122ab64cebbb27dc9 Mon Sep 17 00:00:00 2001
|
||||
From 7810a0932b5e0d4fdf6c34cff735e227f5af8392 Mon Sep 17 00:00:00 2001
|
||||
From: Nishanth Menon <nm@ti.com>
|
||||
Date: Mon, 14 Feb 2011 12:41:10 +0530
|
||||
Subject: [PATCH 1/7] OMAP3+: SR: disable interrupt by default
|
||||
Subject: [PATCH 010/149] OMAP3+: SR: disable interrupt by default
|
||||
|
||||
We will enable and disable interrupt on a need basis in the class
|
||||
driver. We need to keep the IRQ disabled by default else the
|
||||
@@ -20,10 +20,10 @@ Signed-off-by: Kevin Hilman <khilman@ti.com>
|
||||
1 files changed, 1 insertions(+), 0 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
|
||||
index fb7dc52..998b57f 100644
|
||||
index 3ee7261..616ef62 100644
|
||||
--- a/arch/arm/mach-omap2/smartreflex.c
|
||||
+++ b/arch/arm/mach-omap2/smartreflex.c
|
||||
@@ -270,6 +270,7 @@ static int sr_late_init(struct omap_sr *sr_info)
|
||||
@@ -268,6 +268,7 @@ static int sr_late_init(struct omap_sr *sr_info)
|
||||
0, name, (void *)sr_info);
|
||||
if (ret)
|
||||
goto error;
|
||||
+4
-4
@@ -1,7 +1,7 @@
|
||||
From 2c555d8ee3544326033cb3b0ead6c0eb48cb4919 Mon Sep 17 00:00:00 2001
|
||||
From 50c59ea316d283dddb432ed03cffcb42a25bf7b9 Mon Sep 17 00:00:00 2001
|
||||
From: Nishanth Menon <nm@ti.com>
|
||||
Date: Mon, 14 Feb 2011 21:14:17 +0530
|
||||
Subject: [PATCH 2/7] OMAP3+: SR: enable/disable SR only on need
|
||||
Subject: [PATCH 011/149] OMAP3+: SR: enable/disable SR only on need
|
||||
|
||||
Since we already know the state of the autocomp enablement, we can
|
||||
see if the requested state is different from the current state and
|
||||
@@ -14,10 +14,10 @@ Signed-off-by: Kevin Hilman <khilman@ti.com>
|
||||
1 files changed, 7 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
|
||||
index 998b57f..a4b4319 100644
|
||||
index 616ef62..3bd9fac 100644
|
||||
--- a/arch/arm/mach-omap2/smartreflex.c
|
||||
+++ b/arch/arm/mach-omap2/smartreflex.c
|
||||
@@ -809,10 +809,13 @@ static int omap_sr_autocomp_store(void *data, u64 val)
|
||||
@@ -807,10 +807,13 @@ static int omap_sr_autocomp_store(void *data, u64 val)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
+4
-4
@@ -1,7 +1,7 @@
|
||||
From 60b31f5fad1dda709f3e38ad88dcc8d1496db52d Mon Sep 17 00:00:00 2001
|
||||
From 0871e261feec9b1e02efc91201aeab9f11bc5ce3 Mon Sep 17 00:00:00 2001
|
||||
From: Nishanth Menon <nm@ti.com>
|
||||
Date: Mon, 14 Feb 2011 12:33:13 +0530
|
||||
Subject: [PATCH 3/7] OMAP3+: SR: fix cosmetic indentation
|
||||
Subject: [PATCH 012/149] OMAP3+: SR: fix cosmetic indentation
|
||||
|
||||
Error label case seems to have a 2 tab indentation when just 1 is
|
||||
necessary.
|
||||
@@ -13,10 +13,10 @@ Signed-off-by: Kevin Hilman <khilman@ti.com>
|
||||
1 files changed, 10 insertions(+), 10 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
|
||||
index a4b4319..931879d 100644
|
||||
index 3bd9fac..2ce2fb7 100644
|
||||
--- a/arch/arm/mach-omap2/smartreflex.c
|
||||
+++ b/arch/arm/mach-omap2/smartreflex.c
|
||||
@@ -279,16 +279,16 @@ static int sr_late_init(struct omap_sr *sr_info)
|
||||
@@ -277,16 +277,16 @@ static int sr_late_init(struct omap_sr *sr_info)
|
||||
return ret;
|
||||
|
||||
error:
|
||||
+125
@@ -0,0 +1,125 @@
|
||||
From c3c0bfa5bf8ccbea4189cb76b842c51b8e3756c7 Mon Sep 17 00:00:00 2001
|
||||
From: Tony Lindgren <tony@atomide.com>
|
||||
Date: Tue, 29 Mar 2011 15:54:49 -0700
|
||||
Subject: [PATCH 013/149] omap2+: Reserve clocksource and timesource and initialize dmtimer later
|
||||
|
||||
There's no need to initialize the dmtimer framework early.
|
||||
Just mark the clocksource and timesource as reserved, and
|
||||
initialize dmtimer with an arch_initcall.
|
||||
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
Reviewed-by: Kevin Hilman <khilman@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap1/timer32k.c | 4 ----
|
||||
arch/arm/mach-omap2/timer-gp.c | 6 ++++--
|
||||
arch/arm/plat-omap/dmtimer.c | 10 +++++++++-
|
||||
arch/arm/plat-omap/include/plat/dmtimer.h | 3 +--
|
||||
4 files changed, 14 insertions(+), 9 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
|
||||
index 13d7b8f..96604a5 100644
|
||||
--- a/arch/arm/mach-omap1/timer32k.c
|
||||
+++ b/arch/arm/mach-omap1/timer32k.c
|
||||
@@ -183,10 +183,6 @@ static __init void omap_init_32k_timer(void)
|
||||
bool __init omap_32k_timer_init(void)
|
||||
{
|
||||
omap_init_clocksource_32k();
|
||||
-
|
||||
-#ifdef CONFIG_OMAP_DM_TIMER
|
||||
- omap_dm_timer_init();
|
||||
-#endif
|
||||
omap_init_32k_timer();
|
||||
|
||||
return true;
|
||||
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
|
||||
index 578e9df..cf2ec85 100644
|
||||
--- a/arch/arm/mach-omap2/timer-gp.c
|
||||
+++ b/arch/arm/mach-omap2/timer-gp.c
|
||||
@@ -69,6 +69,8 @@
|
||||
/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
|
||||
#define MAX_GPTIMER_ID 12
|
||||
|
||||
+u32 sys_timer_reserved;
|
||||
+
|
||||
/* Clockevent code */
|
||||
|
||||
static struct omap_dm_timer clkev;
|
||||
@@ -195,6 +197,8 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
|
||||
|
||||
omap_hwmod_enable(oh);
|
||||
|
||||
+ sys_timer_reserved |= (1 << (gptimer_id - 1));
|
||||
+
|
||||
if (gptimer_id != 12) {
|
||||
struct clk *src;
|
||||
|
||||
@@ -321,7 +325,6 @@ static void __init omap2_gp_clocksource_init(void)
|
||||
#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src) \
|
||||
static void __init omap##name##_timer_init(void) \
|
||||
{ \
|
||||
- omap_dm_timer_init(); \
|
||||
omap2_gp_clockevent_init((clkev_nr), clkev_src); \
|
||||
omap2_gp_clocksource_init(); \
|
||||
}
|
||||
@@ -350,7 +353,6 @@ static void __init omap4_timer_init(void)
|
||||
twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);
|
||||
BUG_ON(!twd_base);
|
||||
#endif
|
||||
- omap_dm_timer_init();
|
||||
omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
|
||||
omap2_gp_clocksource_init();
|
||||
}
|
||||
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
|
||||
index 7c5cb4e..8dfb818 100644
|
||||
--- a/arch/arm/plat-omap/dmtimer.c
|
||||
+++ b/arch/arm/plat-omap/dmtimer.c
|
||||
@@ -572,7 +572,7 @@ int omap_dm_timers_active(void)
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(omap_dm_timers_active);
|
||||
|
||||
-int __init omap_dm_timer_init(void)
|
||||
+static int __init omap_dm_timer_init(void)
|
||||
{
|
||||
struct omap_dm_timer *timer;
|
||||
int i, map_size = SZ_8K; /* Module 4KB + L4 4KB except on omap1 */
|
||||
@@ -625,8 +625,16 @@ int __init omap_dm_timer_init(void)
|
||||
sprintf(clk_name, "gpt%d_fck", i + 1);
|
||||
timer->fclk = clk_get(NULL, clk_name);
|
||||
}
|
||||
+
|
||||
+ /* One or two timers may be set up early for sys_timer */
|
||||
+ if (sys_timer_reserved & (1 << i)) {
|
||||
+ timer->reserved = 1;
|
||||
+ timer->posted = 1;
|
||||
+ }
|
||||
#endif
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
+
|
||||
+arch_initcall(omap_dm_timer_init);
|
||||
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
index 8adcb18..d0f3a2d 100644
|
||||
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
@@ -61,8 +61,6 @@
|
||||
struct omap_dm_timer;
|
||||
struct clk;
|
||||
|
||||
-int omap_dm_timer_init(void);
|
||||
-
|
||||
struct omap_dm_timer *omap_dm_timer_request(void);
|
||||
struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id);
|
||||
void omap_dm_timer_free(struct omap_dm_timer *timer);
|
||||
@@ -221,6 +219,7 @@ struct omap_dm_timer {
|
||||
unsigned posted:1;
|
||||
};
|
||||
|
||||
+extern u32 sys_timer_reserved;
|
||||
void omap_dm_timer_prepare(struct omap_dm_timer *timer);
|
||||
|
||||
static inline u32 __omap_dm_timer_read(void __iomem *base, u32 reg,
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+163
@@ -0,0 +1,163 @@
|
||||
From 939c8d3b49f31a6e88d36a9915e1393d26533ba8 Mon Sep 17 00:00:00 2001
|
||||
From: Tony Lindgren <tony@atomide.com>
|
||||
Date: Tue, 29 Mar 2011 15:54:49 -0700
|
||||
Subject: [PATCH 014/149] omap2+: Use dmtimer macros for clocksource
|
||||
|
||||
Use dmtimer macros for clocksource. As with the clockevent,
|
||||
this allows us to initialize the rest of dmtimer code later on.
|
||||
|
||||
Note that eventually we will be initializing the timesource
|
||||
from init_early so sched_clock will work properly for
|
||||
CONFIG_PRINTK_TIME.
|
||||
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
Reviewed-by: Kevin Hilman <khilman@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap2/timer-gp.c | 64 +++++++++++++++++++++----------------
|
||||
arch/arm/plat-omap/counter_32k.c | 2 +-
|
||||
2 files changed, 37 insertions(+), 29 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
|
||||
index cf2ec85..2b8cb70 100644
|
||||
--- a/arch/arm/mach-omap2/timer-gp.c
|
||||
+++ b/arch/arm/mach-omap2/timer-gp.c
|
||||
@@ -262,20 +262,22 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
|
||||
* sync counter. See clocksource setup in plat-omap/counter_32k.c
|
||||
*/
|
||||
|
||||
-static void __init omap2_gp_clocksource_init(void)
|
||||
+static void __init omap2_gp_clocksource_init(int unused, const char *dummy)
|
||||
{
|
||||
omap_init_clocksource_32k();
|
||||
}
|
||||
|
||||
#else
|
||||
+
|
||||
+static struct omap_dm_timer clksrc;
|
||||
+
|
||||
/*
|
||||
* clocksource
|
||||
*/
|
||||
static DEFINE_CLOCK_DATA(cd);
|
||||
-static struct omap_dm_timer *gpt_clocksource;
|
||||
static cycle_t clocksource_read_cycles(struct clocksource *cs)
|
||||
{
|
||||
- return (cycle_t)omap_dm_timer_read_counter(gpt_clocksource);
|
||||
+ return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1);
|
||||
}
|
||||
|
||||
static struct clocksource clocksource_gpt = {
|
||||
@@ -290,43 +292,48 @@ static void notrace dmtimer_update_sched_clock(void)
|
||||
{
|
||||
u32 cyc;
|
||||
|
||||
- cyc = omap_dm_timer_read_counter(gpt_clocksource);
|
||||
+ cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1);
|
||||
|
||||
update_sched_clock(&cd, cyc, (u32)~0);
|
||||
}
|
||||
|
||||
-/* Setup free-running counter for clocksource */
|
||||
-static void __init omap2_gp_clocksource_init(void)
|
||||
+unsigned long long notrace sched_clock(void)
|
||||
{
|
||||
- static struct omap_dm_timer *gpt;
|
||||
- u32 tick_rate;
|
||||
- static char err1[] __initdata = KERN_ERR
|
||||
- "%s: failed to request dm-timer\n";
|
||||
- static char err2[] __initdata = KERN_ERR
|
||||
- "%s: can't register clocksource!\n";
|
||||
+ u32 cyc = 0;
|
||||
|
||||
- gpt = omap_dm_timer_request();
|
||||
- if (!gpt)
|
||||
- printk(err1, clocksource_gpt.name);
|
||||
- gpt_clocksource = gpt;
|
||||
+ if (clksrc.reserved)
|
||||
+ cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1);
|
||||
|
||||
- omap_dm_timer_set_source(gpt, OMAP_TIMER_SRC_SYS_CLK);
|
||||
- tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gpt));
|
||||
+ return cyc_to_sched_clock(&cd, cyc, (u32)~0);
|
||||
+}
|
||||
+
|
||||
+/* Setup free-running counter for clocksource */
|
||||
+static void __init omap2_gp_clocksource_init(int gptimer_id,
|
||||
+ const char *fck_source)
|
||||
+{
|
||||
+ int res;
|
||||
+
|
||||
+ res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source);
|
||||
+ BUG_ON(res);
|
||||
|
||||
- omap_dm_timer_set_load_start(gpt, 1, 0);
|
||||
+ pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n",
|
||||
+ gptimer_id, clksrc.rate);
|
||||
|
||||
- init_sched_clock(&cd, dmtimer_update_sched_clock, 32, tick_rate);
|
||||
+ __omap_dm_timer_load_start(clksrc.io_base, OMAP_TIMER_CTRL_ST, 0, 1);
|
||||
+ init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate);
|
||||
|
||||
- if (clocksource_register_hz(&clocksource_gpt, tick_rate))
|
||||
- printk(err2, clocksource_gpt.name);
|
||||
+ if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
|
||||
+ pr_err("Could not register clocksource %s\n",
|
||||
+ clocksource_gpt.name);
|
||||
}
|
||||
#endif
|
||||
|
||||
-#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src) \
|
||||
+#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, \
|
||||
+ clksrc_nr, clksrc_src) \
|
||||
static void __init omap##name##_timer_init(void) \
|
||||
{ \
|
||||
omap2_gp_clockevent_init((clkev_nr), clkev_src); \
|
||||
- omap2_gp_clocksource_init(); \
|
||||
+ omap2_gp_clocksource_init((clksrc_nr), clksrc_src); \
|
||||
}
|
||||
|
||||
#define OMAP_SYS_TIMER(name) \
|
||||
@@ -335,14 +342,15 @@ struct sys_timer omap##name##_timer = { \
|
||||
};
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2
|
||||
-OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE)
|
||||
+OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, OMAP2_MPU_SOURCE)
|
||||
OMAP_SYS_TIMER(2)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP3
|
||||
-OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE)
|
||||
+OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, OMAP3_MPU_SOURCE)
|
||||
OMAP_SYS_TIMER(3)
|
||||
-OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE)
|
||||
+OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE,
|
||||
+ 2, OMAP3_MPU_SOURCE)
|
||||
OMAP_SYS_TIMER(3_secure)
|
||||
#endif
|
||||
|
||||
@@ -354,7 +362,7 @@ static void __init omap4_timer_init(void)
|
||||
BUG_ON(!twd_base);
|
||||
#endif
|
||||
omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
|
||||
- omap2_gp_clocksource_init();
|
||||
+ omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE);
|
||||
}
|
||||
OMAP_SYS_TIMER(4)
|
||||
#endif
|
||||
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
|
||||
index f7fed60..c13bc3d 100644
|
||||
--- a/arch/arm/plat-omap/counter_32k.c
|
||||
+++ b/arch/arm/plat-omap/counter_32k.c
|
||||
@@ -126,7 +126,7 @@ static inline unsigned long long notrace _omap_32k_sched_clock(void)
|
||||
return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
|
||||
}
|
||||
|
||||
-#ifndef CONFIG_OMAP_MPU_TIMER
|
||||
+#if defined(CONFIG_OMAP_32K_TIMER) && !defined(CONFIG_OMAP_MPU_TIMER)
|
||||
unsigned long long notrace sched_clock(void)
|
||||
{
|
||||
return _omap_32k_sched_clock();
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+240
@@ -0,0 +1,240 @@
|
||||
From ccf883ffc7c3bfcdf80ecb20e4015986e7b91d0e Mon Sep 17 00:00:00 2001
|
||||
From: Tony Lindgren <tony@atomide.com>
|
||||
Date: Tue, 29 Mar 2011 15:54:49 -0700
|
||||
Subject: [PATCH 015/149] omap2+: Remove omap2_gp_clockevent_set_gptimer
|
||||
|
||||
This is no longer needed as we now just set the desired
|
||||
.timer in MACHINE_START. We can now also remove timer-gp.h.
|
||||
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
Reviewed-by: Kevin Hilman <khilman@ti.com>
|
||||
---
|
||||
arch/arm/mach-omap2/board-4430sdp.c | 4 ----
|
||||
arch/arm/mach-omap2/board-devkit8000.c | 4 ----
|
||||
arch/arm/mach-omap2/board-omap3beagle.c | 4 ----
|
||||
arch/arm/mach-omap2/board-omap3logic.c | 1 -
|
||||
arch/arm/mach-omap2/board-omap3stalker.c | 4 ----
|
||||
arch/arm/mach-omap2/board-omap3touchbook.c | 4 ----
|
||||
arch/arm/mach-omap2/board-omap4panda.c | 1 -
|
||||
arch/arm/mach-omap2/timer-gp.c | 26 --------------------------
|
||||
arch/arm/mach-omap2/timer-gp.h | 16 ----------------
|
||||
9 files changed, 0 insertions(+), 64 deletions(-)
|
||||
delete mode 100644 arch/arm/mach-omap2/timer-gp.h
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
|
||||
index e8caced..d7df07e 100644
|
||||
--- a/arch/arm/mach-omap2/board-4430sdp.c
|
||||
+++ b/arch/arm/mach-omap2/board-4430sdp.c
|
||||
@@ -40,7 +40,6 @@
|
||||
|
||||
#include "mux.h"
|
||||
#include "hsmmc.h"
|
||||
-#include "timer-gp.h"
|
||||
#include "control.h"
|
||||
#include "common-board-devices.h"
|
||||
|
||||
@@ -295,9 +294,6 @@ static void __init omap_4430sdp_init_early(void)
|
||||
{
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(NULL, NULL);
|
||||
-#ifdef CONFIG_OMAP_32K_TIMER
|
||||
- omap2_gp_clockevent_set_gptimer(1);
|
||||
-#endif
|
||||
}
|
||||
|
||||
static struct omap_musb_board_data musb_board_data = {
|
||||
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
|
||||
index 46d144d..949dbea 100644
|
||||
--- a/arch/arm/mach-omap2/board-devkit8000.c
|
||||
+++ b/arch/arm/mach-omap2/board-devkit8000.c
|
||||
@@ -58,7 +58,6 @@
|
||||
|
||||
#include "mux.h"
|
||||
#include "hsmmc.h"
|
||||
-#include "timer-gp.h"
|
||||
#include "common-board-devices.h"
|
||||
|
||||
#define OMAP_DM9000_GPIO_IRQ 25
|
||||
@@ -441,9 +440,6 @@ static void __init devkit8000_init_early(void)
|
||||
static void __init devkit8000_init_irq(void)
|
||||
{
|
||||
omap3_init_irq();
|
||||
-#ifdef CONFIG_OMAP_32K_TIMER
|
||||
- omap2_gp_clockevent_set_gptimer(12);
|
||||
-#endif
|
||||
}
|
||||
|
||||
#define OMAP_DM9000_BASE 0x2c000000
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
index 9ee16f6..2d8dfb3 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
@@ -50,7 +50,6 @@
|
||||
|
||||
#include "mux.h"
|
||||
#include "hsmmc.h"
|
||||
-#include "timer-gp.h"
|
||||
#include "pm.h"
|
||||
#include "common-board-devices.h"
|
||||
|
||||
@@ -484,9 +483,6 @@ static void __init omap3_beagle_init_early(void)
|
||||
static void __init omap3_beagle_init_irq(void)
|
||||
{
|
||||
omap3_init_irq();
|
||||
-#ifdef CONFIG_OMAP_32K_TIMER
|
||||
- omap2_gp_clockevent_set_gptimer(12);
|
||||
-#endif
|
||||
}
|
||||
|
||||
static struct platform_device *omap3_beagle_devices[] __initdata = {
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
|
||||
index 469259a..703aeb5 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3logic.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3logic.c
|
||||
@@ -35,7 +35,6 @@
|
||||
|
||||
#include "mux.h"
|
||||
#include "hsmmc.h"
|
||||
-#include "timer-gp.h"
|
||||
#include "control.h"
|
||||
#include "common-board-devices.h"
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
index 2fa8fae..b8ad4dd 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
@@ -52,7 +52,6 @@
|
||||
#include "sdram-micron-mt46h32m32lf-6.h"
|
||||
#include "mux.h"
|
||||
#include "hsmmc.h"
|
||||
-#include "timer-gp.h"
|
||||
#include "common-board-devices.h"
|
||||
|
||||
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
|
||||
@@ -492,9 +491,6 @@ static void __init omap3_stalker_init_early(void)
|
||||
static void __init omap3_stalker_init_irq(void)
|
||||
{
|
||||
omap3_init_irq();
|
||||
-#ifdef CONFIG_OMAP_32K_TIMER
|
||||
- omap2_gp_clockevent_set_gptimer(12);
|
||||
-#endif
|
||||
}
|
||||
|
||||
static struct platform_device *omap3_stalker_devices[] __initdata = {
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
index 8c71fd2..57e6ed3 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
@@ -51,7 +51,6 @@
|
||||
|
||||
#include "mux.h"
|
||||
#include "hsmmc.h"
|
||||
-#include "timer-gp.h"
|
||||
#include "common-board-devices.h"
|
||||
|
||||
#include <asm/setup.h>
|
||||
@@ -372,9 +371,6 @@ static void __init omap3_touchbook_init_early(void)
|
||||
static void __init omap3_touchbook_init_irq(void)
|
||||
{
|
||||
omap3_init_irq();
|
||||
-#ifdef CONFIG_OMAP_32K_TIMER
|
||||
- omap2_gp_clockevent_set_gptimer(12);
|
||||
-#endif
|
||||
}
|
||||
|
||||
static struct platform_device *omap3_touchbook_devices[] __initdata = {
|
||||
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
|
||||
index dc1d6dc..ee2034e 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap4panda.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap4panda.c
|
||||
@@ -41,7 +41,6 @@
|
||||
#include <plat/usb.h>
|
||||
#include <plat/mmc.h>
|
||||
#include <video/omap-panel-generic-dpi.h>
|
||||
-#include "timer-gp.h"
|
||||
|
||||
#include "hsmmc.h"
|
||||
#include "control.h"
|
||||
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
|
||||
index 2b8cb70..ab1931c 100644
|
||||
--- a/arch/arm/mach-omap2/timer-gp.c
|
||||
+++ b/arch/arm/mach-omap2/timer-gp.c
|
||||
@@ -43,8 +43,6 @@
|
||||
#include <plat/common.h>
|
||||
#include <plat/omap_hwmod.h>
|
||||
|
||||
-#include "timer-gp.h"
|
||||
-
|
||||
/* Parent clocks, eventually these will come from the clock framework */
|
||||
|
||||
#define OMAP2_MPU_SOURCE "sys_ck"
|
||||
@@ -75,8 +73,6 @@ u32 sys_timer_reserved;
|
||||
|
||||
static struct omap_dm_timer clkev;
|
||||
static struct clock_event_device clockevent_gpt;
|
||||
-static u8 __initdata gptimer_id = 1;
|
||||
-static u8 __initdata inited;
|
||||
|
||||
static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
@@ -138,26 +134,6 @@ static struct clock_event_device clockevent_gpt = {
|
||||
.set_mode = omap2_gp_timer_set_mode,
|
||||
};
|
||||
|
||||
-/**
|
||||
- * omap2_gp_clockevent_set_gptimer - set which GPTIMER is used for clockevents
|
||||
- * @id: GPTIMER to use (1..MAX_GPTIMER_ID)
|
||||
- *
|
||||
- * Define the GPTIMER that the system should use for the tick timer.
|
||||
- * Meant to be called from board-*.c files in the event that GPTIMER1, the
|
||||
- * default, is unsuitable. Returns -EINVAL on error or 0 on success.
|
||||
- */
|
||||
-int __init omap2_gp_clockevent_set_gptimer(u8 id)
|
||||
-{
|
||||
- if (id < 1 || id > MAX_GPTIMER_ID)
|
||||
- return -EINVAL;
|
||||
-
|
||||
- BUG_ON(inited);
|
||||
-
|
||||
- gptimer_id = id;
|
||||
-
|
||||
- return 0;
|
||||
-}
|
||||
-
|
||||
static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
|
||||
int gptimer_id,
|
||||
const char *fck_source)
|
||||
@@ -228,8 +204,6 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
|
||||
{
|
||||
int res;
|
||||
|
||||
- inited = 1;
|
||||
-
|
||||
res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source);
|
||||
BUG_ON(res);
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/timer-gp.h b/arch/arm/mach-omap2/timer-gp.h
|
||||
deleted file mode 100644
|
||||
index 5c1072c..0000000
|
||||
--- a/arch/arm/mach-omap2/timer-gp.h
|
||||
+++ /dev/null
|
||||
@@ -1,16 +0,0 @@
|
||||
-/*
|
||||
- * OMAP2/3 GPTIMER support.headers
|
||||
- *
|
||||
- * Copyright (C) 2009 Nokia Corporation
|
||||
- *
|
||||
- * This file is subject to the terms and conditions of the GNU General Public
|
||||
- * License. See the file "COPYING" in the main directory of this archive
|
||||
- * for more details.
|
||||
- */
|
||||
-
|
||||
-#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H
|
||||
-#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H
|
||||
-
|
||||
-extern int __init omap2_gp_clockevent_set_gptimer(u8 id);
|
||||
-
|
||||
-#endif
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+737
@@ -0,0 +1,737 @@
|
||||
From e8ffcfc15d3d23b8bb3e96a7cf6e4147645c4b9a Mon Sep 17 00:00:00 2001
|
||||
From: Tony Lindgren <tony@atomide.com>
|
||||
Date: Tue, 29 Mar 2011 15:54:50 -0700
|
||||
Subject: [PATCH 016/149] omap2+: Rename timer-gp.c into timer.c to combine timer init functions
|
||||
|
||||
We can keep everything sys_timer and gptimer.c related code in
|
||||
timer.c as the code will be very minimal.
|
||||
|
||||
Later on we can also remove timer-mpu.c, as it can be called from
|
||||
omap4_timer_init function.
|
||||
|
||||
This allows us to get rid of confusing existing files. We currently
|
||||
have timer-gp.c, timer-mpu.c, and patches have been posted to add
|
||||
dmtimer.c. There's no need to have these multiple files, we can
|
||||
put everything into timer.c.
|
||||
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
---
|
||||
arch/arm/mach-omap2/Makefile | 2 +-
|
||||
arch/arm/mach-omap2/timer-gp.c | 342 ----------------------------------------
|
||||
arch/arm/mach-omap2/timer.c | 342 ++++++++++++++++++++++++++++++++++++++++
|
||||
3 files changed, 343 insertions(+), 343 deletions(-)
|
||||
delete mode 100644 arch/arm/mach-omap2/timer-gp.c
|
||||
create mode 100644 arch/arm/mach-omap2/timer.c
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
|
||||
index b148077..adbe82d 100644
|
||||
--- a/arch/arm/mach-omap2/Makefile
|
||||
+++ b/arch/arm/mach-omap2/Makefile
|
||||
@@ -3,7 +3,7 @@
|
||||
#
|
||||
|
||||
# Common support
|
||||
-obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \
|
||||
+obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
|
||||
common.o gpio.o dma.o wd_timer.o
|
||||
|
||||
omap-2-3-common = irq.o sdrc.o
|
||||
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
|
||||
deleted file mode 100644
|
||||
index ab1931c..0000000
|
||||
--- a/arch/arm/mach-omap2/timer-gp.c
|
||||
+++ /dev/null
|
||||
@@ -1,342 +0,0 @@
|
||||
-/*
|
||||
- * linux/arch/arm/mach-omap2/timer-gp.c
|
||||
- *
|
||||
- * OMAP2 GP timer support.
|
||||
- *
|
||||
- * Copyright (C) 2009 Nokia Corporation
|
||||
- *
|
||||
- * Update to use new clocksource/clockevent layers
|
||||
- * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
|
||||
- * Copyright (C) 2007 MontaVista Software, Inc.
|
||||
- *
|
||||
- * Original driver:
|
||||
- * Copyright (C) 2005 Nokia Corporation
|
||||
- * Author: Paul Mundt <paul.mundt@nokia.com>
|
||||
- * Juha Yrjölä <juha.yrjola@nokia.com>
|
||||
- * OMAP Dual-mode timer framework support by Timo Teras
|
||||
- *
|
||||
- * Some parts based off of TI's 24xx code:
|
||||
- *
|
||||
- * Copyright (C) 2004-2009 Texas Instruments, Inc.
|
||||
- *
|
||||
- * Roughly modelled after the OMAP1 MPU timer code.
|
||||
- * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
- *
|
||||
- * This file is subject to the terms and conditions of the GNU General Public
|
||||
- * License. See the file "COPYING" in the main directory of this archive
|
||||
- * for more details.
|
||||
- */
|
||||
-#include <linux/init.h>
|
||||
-#include <linux/time.h>
|
||||
-#include <linux/interrupt.h>
|
||||
-#include <linux/err.h>
|
||||
-#include <linux/clk.h>
|
||||
-#include <linux/delay.h>
|
||||
-#include <linux/irq.h>
|
||||
-#include <linux/clocksource.h>
|
||||
-#include <linux/clockchips.h>
|
||||
-
|
||||
-#include <asm/mach/time.h>
|
||||
-#include <plat/dmtimer.h>
|
||||
-#include <asm/localtimer.h>
|
||||
-#include <asm/sched_clock.h>
|
||||
-#include <plat/common.h>
|
||||
-#include <plat/omap_hwmod.h>
|
||||
-
|
||||
-/* Parent clocks, eventually these will come from the clock framework */
|
||||
-
|
||||
-#define OMAP2_MPU_SOURCE "sys_ck"
|
||||
-#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE
|
||||
-#define OMAP4_MPU_SOURCE "sys_clkin_ck"
|
||||
-#define OMAP2_32K_SOURCE "func_32k_ck"
|
||||
-#define OMAP3_32K_SOURCE "omap_32k_fck"
|
||||
-#define OMAP4_32K_SOURCE "sys_32k_ck"
|
||||
-
|
||||
-#ifdef CONFIG_OMAP_32K_TIMER
|
||||
-#define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE
|
||||
-#define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE
|
||||
-#define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE
|
||||
-#define OMAP3_SECURE_TIMER 12
|
||||
-#else
|
||||
-#define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE
|
||||
-#define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE
|
||||
-#define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE
|
||||
-#define OMAP3_SECURE_TIMER 1
|
||||
-#endif
|
||||
-
|
||||
-/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
|
||||
-#define MAX_GPTIMER_ID 12
|
||||
-
|
||||
-u32 sys_timer_reserved;
|
||||
-
|
||||
-/* Clockevent code */
|
||||
-
|
||||
-static struct omap_dm_timer clkev;
|
||||
-static struct clock_event_device clockevent_gpt;
|
||||
-
|
||||
-static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
|
||||
-{
|
||||
- struct clock_event_device *evt = &clockevent_gpt;
|
||||
-
|
||||
- __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW);
|
||||
-
|
||||
- evt->event_handler(evt);
|
||||
- return IRQ_HANDLED;
|
||||
-}
|
||||
-
|
||||
-static struct irqaction omap2_gp_timer_irq = {
|
||||
- .name = "gp timer",
|
||||
- .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
|
||||
- .handler = omap2_gp_timer_interrupt,
|
||||
-};
|
||||
-
|
||||
-static int omap2_gp_timer_set_next_event(unsigned long cycles,
|
||||
- struct clock_event_device *evt)
|
||||
-{
|
||||
- __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST,
|
||||
- 0xffffffff - cycles, 1);
|
||||
-
|
||||
- return 0;
|
||||
-}
|
||||
-
|
||||
-static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
|
||||
- struct clock_event_device *evt)
|
||||
-{
|
||||
- u32 period;
|
||||
-
|
||||
- __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate);
|
||||
-
|
||||
- switch (mode) {
|
||||
- case CLOCK_EVT_MODE_PERIODIC:
|
||||
- period = clkev.rate / HZ;
|
||||
- period -= 1;
|
||||
- /* Looks like we need to first set the load value separately */
|
||||
- __omap_dm_timer_write(clkev.io_base, OMAP_TIMER_LOAD_REG,
|
||||
- 0xffffffff - period, 1);
|
||||
- __omap_dm_timer_load_start(clkev.io_base,
|
||||
- OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
|
||||
- 0xffffffff - period, 1);
|
||||
- break;
|
||||
- case CLOCK_EVT_MODE_ONESHOT:
|
||||
- break;
|
||||
- case CLOCK_EVT_MODE_UNUSED:
|
||||
- case CLOCK_EVT_MODE_SHUTDOWN:
|
||||
- case CLOCK_EVT_MODE_RESUME:
|
||||
- break;
|
||||
- }
|
||||
-}
|
||||
-
|
||||
-static struct clock_event_device clockevent_gpt = {
|
||||
- .name = "gp timer",
|
||||
- .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
|
||||
- .shift = 32,
|
||||
- .set_next_event = omap2_gp_timer_set_next_event,
|
||||
- .set_mode = omap2_gp_timer_set_mode,
|
||||
-};
|
||||
-
|
||||
-static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
|
||||
- int gptimer_id,
|
||||
- const char *fck_source)
|
||||
-{
|
||||
- char name[10]; /* 10 = sizeof("gptXX_Xck0") */
|
||||
- struct omap_hwmod *oh;
|
||||
- size_t size;
|
||||
- int res = 0;
|
||||
-
|
||||
- sprintf(name, "timer%d", gptimer_id);
|
||||
- omap_hwmod_setup_one(name);
|
||||
- oh = omap_hwmod_lookup(name);
|
||||
- if (!oh)
|
||||
- return -ENODEV;
|
||||
-
|
||||
- timer->irq = oh->mpu_irqs[0].irq;
|
||||
- timer->phys_base = oh->slaves[0]->addr->pa_start;
|
||||
- size = oh->slaves[0]->addr->pa_end - timer->phys_base;
|
||||
-
|
||||
- /* Static mapping, never released */
|
||||
- timer->io_base = ioremap(timer->phys_base, size);
|
||||
- if (!timer->io_base)
|
||||
- return -ENXIO;
|
||||
-
|
||||
- /* After the dmtimer is using hwmod these clocks won't be needed */
|
||||
- sprintf(name, "gpt%d_fck", gptimer_id);
|
||||
- timer->fclk = clk_get(NULL, name);
|
||||
- if (IS_ERR(timer->fclk))
|
||||
- return -ENODEV;
|
||||
-
|
||||
- sprintf(name, "gpt%d_ick", gptimer_id);
|
||||
- timer->iclk = clk_get(NULL, name);
|
||||
- if (IS_ERR(timer->iclk)) {
|
||||
- clk_put(timer->fclk);
|
||||
- return -ENODEV;
|
||||
- }
|
||||
-
|
||||
- omap_hwmod_enable(oh);
|
||||
-
|
||||
- sys_timer_reserved |= (1 << (gptimer_id - 1));
|
||||
-
|
||||
- if (gptimer_id != 12) {
|
||||
- struct clk *src;
|
||||
-
|
||||
- src = clk_get(NULL, fck_source);
|
||||
- if (IS_ERR(src)) {
|
||||
- res = -EINVAL;
|
||||
- } else {
|
||||
- res = __omap_dm_timer_set_source(timer->fclk, src);
|
||||
- if (IS_ERR_VALUE(res))
|
||||
- pr_warning("%s: timer%i cannot set source\n",
|
||||
- __func__, gptimer_id);
|
||||
- clk_put(src);
|
||||
- }
|
||||
- }
|
||||
- __omap_dm_timer_reset(timer->io_base, 1, 1);
|
||||
- timer->posted = 1;
|
||||
-
|
||||
- timer->rate = clk_get_rate(timer->fclk);
|
||||
-
|
||||
- timer->reserved = 1;
|
||||
-
|
||||
- return res;
|
||||
-}
|
||||
-
|
||||
-static void __init omap2_gp_clockevent_init(int gptimer_id,
|
||||
- const char *fck_source)
|
||||
-{
|
||||
- int res;
|
||||
-
|
||||
- res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source);
|
||||
- BUG_ON(res);
|
||||
-
|
||||
- omap2_gp_timer_irq.dev_id = (void *)&clkev;
|
||||
- setup_irq(clkev.irq, &omap2_gp_timer_irq);
|
||||
-
|
||||
- __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW);
|
||||
-
|
||||
- clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
|
||||
- clockevent_gpt.shift);
|
||||
- clockevent_gpt.max_delta_ns =
|
||||
- clockevent_delta2ns(0xffffffff, &clockevent_gpt);
|
||||
- clockevent_gpt.min_delta_ns =
|
||||
- clockevent_delta2ns(3, &clockevent_gpt);
|
||||
- /* Timer internal resynch latency. */
|
||||
-
|
||||
- clockevent_gpt.cpumask = cpumask_of(0);
|
||||
- clockevents_register_device(&clockevent_gpt);
|
||||
-
|
||||
- pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
|
||||
- gptimer_id, clkev.rate);
|
||||
-}
|
||||
-
|
||||
-/* Clocksource code */
|
||||
-
|
||||
-#ifdef CONFIG_OMAP_32K_TIMER
|
||||
-/*
|
||||
- * When 32k-timer is enabled, don't use GPTimer for clocksource
|
||||
- * instead, just leave default clocksource which uses the 32k
|
||||
- * sync counter. See clocksource setup in plat-omap/counter_32k.c
|
||||
- */
|
||||
-
|
||||
-static void __init omap2_gp_clocksource_init(int unused, const char *dummy)
|
||||
-{
|
||||
- omap_init_clocksource_32k();
|
||||
-}
|
||||
-
|
||||
-#else
|
||||
-
|
||||
-static struct omap_dm_timer clksrc;
|
||||
-
|
||||
-/*
|
||||
- * clocksource
|
||||
- */
|
||||
-static DEFINE_CLOCK_DATA(cd);
|
||||
-static cycle_t clocksource_read_cycles(struct clocksource *cs)
|
||||
-{
|
||||
- return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1);
|
||||
-}
|
||||
-
|
||||
-static struct clocksource clocksource_gpt = {
|
||||
- .name = "gp timer",
|
||||
- .rating = 300,
|
||||
- .read = clocksource_read_cycles,
|
||||
- .mask = CLOCKSOURCE_MASK(32),
|
||||
- .flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
-};
|
||||
-
|
||||
-static void notrace dmtimer_update_sched_clock(void)
|
||||
-{
|
||||
- u32 cyc;
|
||||
-
|
||||
- cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1);
|
||||
-
|
||||
- update_sched_clock(&cd, cyc, (u32)~0);
|
||||
-}
|
||||
-
|
||||
-unsigned long long notrace sched_clock(void)
|
||||
-{
|
||||
- u32 cyc = 0;
|
||||
-
|
||||
- if (clksrc.reserved)
|
||||
- cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1);
|
||||
-
|
||||
- return cyc_to_sched_clock(&cd, cyc, (u32)~0);
|
||||
-}
|
||||
-
|
||||
-/* Setup free-running counter for clocksource */
|
||||
-static void __init omap2_gp_clocksource_init(int gptimer_id,
|
||||
- const char *fck_source)
|
||||
-{
|
||||
- int res;
|
||||
-
|
||||
- res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source);
|
||||
- BUG_ON(res);
|
||||
-
|
||||
- pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n",
|
||||
- gptimer_id, clksrc.rate);
|
||||
-
|
||||
- __omap_dm_timer_load_start(clksrc.io_base, OMAP_TIMER_CTRL_ST, 0, 1);
|
||||
- init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate);
|
||||
-
|
||||
- if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
|
||||
- pr_err("Could not register clocksource %s\n",
|
||||
- clocksource_gpt.name);
|
||||
-}
|
||||
-#endif
|
||||
-
|
||||
-#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, \
|
||||
- clksrc_nr, clksrc_src) \
|
||||
-static void __init omap##name##_timer_init(void) \
|
||||
-{ \
|
||||
- omap2_gp_clockevent_init((clkev_nr), clkev_src); \
|
||||
- omap2_gp_clocksource_init((clksrc_nr), clksrc_src); \
|
||||
-}
|
||||
-
|
||||
-#define OMAP_SYS_TIMER(name) \
|
||||
-struct sys_timer omap##name##_timer = { \
|
||||
- .init = omap##name##_timer_init, \
|
||||
-};
|
||||
-
|
||||
-#ifdef CONFIG_ARCH_OMAP2
|
||||
-OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, OMAP2_MPU_SOURCE)
|
||||
-OMAP_SYS_TIMER(2)
|
||||
-#endif
|
||||
-
|
||||
-#ifdef CONFIG_ARCH_OMAP3
|
||||
-OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, OMAP3_MPU_SOURCE)
|
||||
-OMAP_SYS_TIMER(3)
|
||||
-OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE,
|
||||
- 2, OMAP3_MPU_SOURCE)
|
||||
-OMAP_SYS_TIMER(3_secure)
|
||||
-#endif
|
||||
-
|
||||
-#ifdef CONFIG_ARCH_OMAP4
|
||||
-static void __init omap4_timer_init(void)
|
||||
-{
|
||||
-#ifdef CONFIG_LOCAL_TIMERS
|
||||
- twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);
|
||||
- BUG_ON(!twd_base);
|
||||
-#endif
|
||||
- omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
|
||||
- omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE);
|
||||
-}
|
||||
-OMAP_SYS_TIMER(4)
|
||||
-#endif
|
||||
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
|
||||
new file mode 100644
|
||||
index 0000000..e964072
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/mach-omap2/timer.c
|
||||
@@ -0,0 +1,342 @@
|
||||
+/*
|
||||
+ * linux/arch/arm/mach-omap2/timer.c
|
||||
+ *
|
||||
+ * OMAP2 GP timer support.
|
||||
+ *
|
||||
+ * Copyright (C) 2009 Nokia Corporation
|
||||
+ *
|
||||
+ * Update to use new clocksource/clockevent layers
|
||||
+ * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
|
||||
+ * Copyright (C) 2007 MontaVista Software, Inc.
|
||||
+ *
|
||||
+ * Original driver:
|
||||
+ * Copyright (C) 2005 Nokia Corporation
|
||||
+ * Author: Paul Mundt <paul.mundt@nokia.com>
|
||||
+ * Juha Yrjölä <juha.yrjola@nokia.com>
|
||||
+ * OMAP Dual-mode timer framework support by Timo Teras
|
||||
+ *
|
||||
+ * Some parts based off of TI's 24xx code:
|
||||
+ *
|
||||
+ * Copyright (C) 2004-2009 Texas Instruments, Inc.
|
||||
+ *
|
||||
+ * Roughly modelled after the OMAP1 MPU timer code.
|
||||
+ * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
+ *
|
||||
+ * This file is subject to the terms and conditions of the GNU General Public
|
||||
+ * License. See the file "COPYING" in the main directory of this archive
|
||||
+ * for more details.
|
||||
+ */
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/time.h>
|
||||
+#include <linux/interrupt.h>
|
||||
+#include <linux/err.h>
|
||||
+#include <linux/clk.h>
|
||||
+#include <linux/delay.h>
|
||||
+#include <linux/irq.h>
|
||||
+#include <linux/clocksource.h>
|
||||
+#include <linux/clockchips.h>
|
||||
+
|
||||
+#include <asm/mach/time.h>
|
||||
+#include <plat/dmtimer.h>
|
||||
+#include <asm/localtimer.h>
|
||||
+#include <asm/sched_clock.h>
|
||||
+#include <plat/common.h>
|
||||
+#include <plat/omap_hwmod.h>
|
||||
+
|
||||
+/* Parent clocks, eventually these will come from the clock framework */
|
||||
+
|
||||
+#define OMAP2_MPU_SOURCE "sys_ck"
|
||||
+#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE
|
||||
+#define OMAP4_MPU_SOURCE "sys_clkin_ck"
|
||||
+#define OMAP2_32K_SOURCE "func_32k_ck"
|
||||
+#define OMAP3_32K_SOURCE "omap_32k_fck"
|
||||
+#define OMAP4_32K_SOURCE "sys_32k_ck"
|
||||
+
|
||||
+#ifdef CONFIG_OMAP_32K_TIMER
|
||||
+#define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE
|
||||
+#define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE
|
||||
+#define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE
|
||||
+#define OMAP3_SECURE_TIMER 12
|
||||
+#else
|
||||
+#define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE
|
||||
+#define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE
|
||||
+#define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE
|
||||
+#define OMAP3_SECURE_TIMER 1
|
||||
+#endif
|
||||
+
|
||||
+/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
|
||||
+#define MAX_GPTIMER_ID 12
|
||||
+
|
||||
+u32 sys_timer_reserved;
|
||||
+
|
||||
+/* Clockevent code */
|
||||
+
|
||||
+static struct omap_dm_timer clkev;
|
||||
+static struct clock_event_device clockevent_gpt;
|
||||
+
|
||||
+static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
|
||||
+{
|
||||
+ struct clock_event_device *evt = &clockevent_gpt;
|
||||
+
|
||||
+ __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW);
|
||||
+
|
||||
+ evt->event_handler(evt);
|
||||
+ return IRQ_HANDLED;
|
||||
+}
|
||||
+
|
||||
+static struct irqaction omap2_gp_timer_irq = {
|
||||
+ .name = "gp timer",
|
||||
+ .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
|
||||
+ .handler = omap2_gp_timer_interrupt,
|
||||
+};
|
||||
+
|
||||
+static int omap2_gp_timer_set_next_event(unsigned long cycles,
|
||||
+ struct clock_event_device *evt)
|
||||
+{
|
||||
+ __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST,
|
||||
+ 0xffffffff - cycles, 1);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
|
||||
+ struct clock_event_device *evt)
|
||||
+{
|
||||
+ u32 period;
|
||||
+
|
||||
+ __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate);
|
||||
+
|
||||
+ switch (mode) {
|
||||
+ case CLOCK_EVT_MODE_PERIODIC:
|
||||
+ period = clkev.rate / HZ;
|
||||
+ period -= 1;
|
||||
+ /* Looks like we need to first set the load value separately */
|
||||
+ __omap_dm_timer_write(clkev.io_base, OMAP_TIMER_LOAD_REG,
|
||||
+ 0xffffffff - period, 1);
|
||||
+ __omap_dm_timer_load_start(clkev.io_base,
|
||||
+ OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
|
||||
+ 0xffffffff - period, 1);
|
||||
+ break;
|
||||
+ case CLOCK_EVT_MODE_ONESHOT:
|
||||
+ break;
|
||||
+ case CLOCK_EVT_MODE_UNUSED:
|
||||
+ case CLOCK_EVT_MODE_SHUTDOWN:
|
||||
+ case CLOCK_EVT_MODE_RESUME:
|
||||
+ break;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static struct clock_event_device clockevent_gpt = {
|
||||
+ .name = "gp timer",
|
||||
+ .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
|
||||
+ .shift = 32,
|
||||
+ .set_next_event = omap2_gp_timer_set_next_event,
|
||||
+ .set_mode = omap2_gp_timer_set_mode,
|
||||
+};
|
||||
+
|
||||
+static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
|
||||
+ int gptimer_id,
|
||||
+ const char *fck_source)
|
||||
+{
|
||||
+ char name[10]; /* 10 = sizeof("gptXX_Xck0") */
|
||||
+ struct omap_hwmod *oh;
|
||||
+ size_t size;
|
||||
+ int res = 0;
|
||||
+
|
||||
+ sprintf(name, "timer%d", gptimer_id);
|
||||
+ omap_hwmod_setup_one(name);
|
||||
+ oh = omap_hwmod_lookup(name);
|
||||
+ if (!oh)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ timer->irq = oh->mpu_irqs[0].irq;
|
||||
+ timer->phys_base = oh->slaves[0]->addr->pa_start;
|
||||
+ size = oh->slaves[0]->addr->pa_end - timer->phys_base;
|
||||
+
|
||||
+ /* Static mapping, never released */
|
||||
+ timer->io_base = ioremap(timer->phys_base, size);
|
||||
+ if (!timer->io_base)
|
||||
+ return -ENXIO;
|
||||
+
|
||||
+ /* After the dmtimer is using hwmod these clocks won't be needed */
|
||||
+ sprintf(name, "gpt%d_fck", gptimer_id);
|
||||
+ timer->fclk = clk_get(NULL, name);
|
||||
+ if (IS_ERR(timer->fclk))
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ sprintf(name, "gpt%d_ick", gptimer_id);
|
||||
+ timer->iclk = clk_get(NULL, name);
|
||||
+ if (IS_ERR(timer->iclk)) {
|
||||
+ clk_put(timer->fclk);
|
||||
+ return -ENODEV;
|
||||
+ }
|
||||
+
|
||||
+ omap_hwmod_enable(oh);
|
||||
+
|
||||
+ sys_timer_reserved |= (1 << (gptimer_id - 1));
|
||||
+
|
||||
+ if (gptimer_id != 12) {
|
||||
+ struct clk *src;
|
||||
+
|
||||
+ src = clk_get(NULL, fck_source);
|
||||
+ if (IS_ERR(src)) {
|
||||
+ res = -EINVAL;
|
||||
+ } else {
|
||||
+ res = __omap_dm_timer_set_source(timer->fclk, src);
|
||||
+ if (IS_ERR_VALUE(res))
|
||||
+ pr_warning("%s: timer%i cannot set source\n",
|
||||
+ __func__, gptimer_id);
|
||||
+ clk_put(src);
|
||||
+ }
|
||||
+ }
|
||||
+ __omap_dm_timer_reset(timer->io_base, 1, 1);
|
||||
+ timer->posted = 1;
|
||||
+
|
||||
+ timer->rate = clk_get_rate(timer->fclk);
|
||||
+
|
||||
+ timer->reserved = 1;
|
||||
+
|
||||
+ return res;
|
||||
+}
|
||||
+
|
||||
+static void __init omap2_gp_clockevent_init(int gptimer_id,
|
||||
+ const char *fck_source)
|
||||
+{
|
||||
+ int res;
|
||||
+
|
||||
+ res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source);
|
||||
+ BUG_ON(res);
|
||||
+
|
||||
+ omap2_gp_timer_irq.dev_id = (void *)&clkev;
|
||||
+ setup_irq(clkev.irq, &omap2_gp_timer_irq);
|
||||
+
|
||||
+ __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW);
|
||||
+
|
||||
+ clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
|
||||
+ clockevent_gpt.shift);
|
||||
+ clockevent_gpt.max_delta_ns =
|
||||
+ clockevent_delta2ns(0xffffffff, &clockevent_gpt);
|
||||
+ clockevent_gpt.min_delta_ns =
|
||||
+ clockevent_delta2ns(3, &clockevent_gpt);
|
||||
+ /* Timer internal resynch latency. */
|
||||
+
|
||||
+ clockevent_gpt.cpumask = cpumask_of(0);
|
||||
+ clockevents_register_device(&clockevent_gpt);
|
||||
+
|
||||
+ pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
|
||||
+ gptimer_id, clkev.rate);
|
||||
+}
|
||||
+
|
||||
+/* Clocksource code */
|
||||
+
|
||||
+#ifdef CONFIG_OMAP_32K_TIMER
|
||||
+/*
|
||||
+ * When 32k-timer is enabled, don't use GPTimer for clocksource
|
||||
+ * instead, just leave default clocksource which uses the 32k
|
||||
+ * sync counter. See clocksource setup in plat-omap/counter_32k.c
|
||||
+ */
|
||||
+
|
||||
+static void __init omap2_gp_clocksource_init(int unused, const char *dummy)
|
||||
+{
|
||||
+ omap_init_clocksource_32k();
|
||||
+}
|
||||
+
|
||||
+#else
|
||||
+
|
||||
+static struct omap_dm_timer clksrc;
|
||||
+
|
||||
+/*
|
||||
+ * clocksource
|
||||
+ */
|
||||
+static DEFINE_CLOCK_DATA(cd);
|
||||
+static cycle_t clocksource_read_cycles(struct clocksource *cs)
|
||||
+{
|
||||
+ return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1);
|
||||
+}
|
||||
+
|
||||
+static struct clocksource clocksource_gpt = {
|
||||
+ .name = "gp timer",
|
||||
+ .rating = 300,
|
||||
+ .read = clocksource_read_cycles,
|
||||
+ .mask = CLOCKSOURCE_MASK(32),
|
||||
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
+};
|
||||
+
|
||||
+static void notrace dmtimer_update_sched_clock(void)
|
||||
+{
|
||||
+ u32 cyc;
|
||||
+
|
||||
+ cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1);
|
||||
+
|
||||
+ update_sched_clock(&cd, cyc, (u32)~0);
|
||||
+}
|
||||
+
|
||||
+unsigned long long notrace sched_clock(void)
|
||||
+{
|
||||
+ u32 cyc = 0;
|
||||
+
|
||||
+ if (clksrc.reserved)
|
||||
+ cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1);
|
||||
+
|
||||
+ return cyc_to_sched_clock(&cd, cyc, (u32)~0);
|
||||
+}
|
||||
+
|
||||
+/* Setup free-running counter for clocksource */
|
||||
+static void __init omap2_gp_clocksource_init(int gptimer_id,
|
||||
+ const char *fck_source)
|
||||
+{
|
||||
+ int res;
|
||||
+
|
||||
+ res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source);
|
||||
+ BUG_ON(res);
|
||||
+
|
||||
+ pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n",
|
||||
+ gptimer_id, clksrc.rate);
|
||||
+
|
||||
+ __omap_dm_timer_load_start(clksrc.io_base, OMAP_TIMER_CTRL_ST, 0, 1);
|
||||
+ init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate);
|
||||
+
|
||||
+ if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
|
||||
+ pr_err("Could not register clocksource %s\n",
|
||||
+ clocksource_gpt.name);
|
||||
+}
|
||||
+#endif
|
||||
+
|
||||
+#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, \
|
||||
+ clksrc_nr, clksrc_src) \
|
||||
+static void __init omap##name##_timer_init(void) \
|
||||
+{ \
|
||||
+ omap2_gp_clockevent_init((clkev_nr), clkev_src); \
|
||||
+ omap2_gp_clocksource_init((clksrc_nr), clksrc_src); \
|
||||
+}
|
||||
+
|
||||
+#define OMAP_SYS_TIMER(name) \
|
||||
+struct sys_timer omap##name##_timer = { \
|
||||
+ .init = omap##name##_timer_init, \
|
||||
+};
|
||||
+
|
||||
+#ifdef CONFIG_ARCH_OMAP2
|
||||
+OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, OMAP2_MPU_SOURCE)
|
||||
+OMAP_SYS_TIMER(2)
|
||||
+#endif
|
||||
+
|
||||
+#ifdef CONFIG_ARCH_OMAP3
|
||||
+OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, OMAP3_MPU_SOURCE)
|
||||
+OMAP_SYS_TIMER(3)
|
||||
+OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE,
|
||||
+ 2, OMAP3_MPU_SOURCE)
|
||||
+OMAP_SYS_TIMER(3_secure)
|
||||
+#endif
|
||||
+
|
||||
+#ifdef CONFIG_ARCH_OMAP4
|
||||
+static void __init omap4_timer_init(void)
|
||||
+{
|
||||
+#ifdef CONFIG_LOCAL_TIMERS
|
||||
+ twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);
|
||||
+ BUG_ON(!twd_base);
|
||||
+#endif
|
||||
+ omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
|
||||
+ omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE);
|
||||
+}
|
||||
+OMAP_SYS_TIMER(4)
|
||||
+#endif
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+165
@@ -0,0 +1,165 @@
|
||||
From 1fb8bf12fc634685ecf9225c6d22823dbab5464b Mon Sep 17 00:00:00 2001
|
||||
From: Grazvydas Ignotas <notasas@gmail.com>
|
||||
Date: Fri, 3 Jun 2011 19:56:33 +0000
|
||||
Subject: [PATCH 017/149] omap: cleanup NAND platform data
|
||||
|
||||
omap_nand_platform_data fields 'options', 'gpio_irq', 'nand_setup' and
|
||||
'dma_channel' are never referenced by the NAND driver, yet various
|
||||
board files are initializing those fields. This is both incorrect and
|
||||
confusing, so remove them. This allows to get rid of a global
|
||||
variable in gpmc-nand.c.
|
||||
|
||||
This also corrects an issue where some boards are trying to pass NAND
|
||||
16bit flag through .options, but the driver is using .devsize instead
|
||||
and ignoring .options.
|
||||
|
||||
Finally, .dev_ready is treated as a flag by the driver, so make it bool
|
||||
instead of a function pointer.
|
||||
|
||||
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
---
|
||||
arch/arm/mach-omap2/board-cm-t35.c | 2 --
|
||||
arch/arm/mach-omap2/board-cm-t3517.c | 1 -
|
||||
arch/arm/mach-omap2/board-flash.c | 4 ----
|
||||
arch/arm/mach-omap2/common-board-devices.c | 6 ++----
|
||||
arch/arm/mach-omap2/gpmc-nand.c | 10 +++-------
|
||||
arch/arm/plat-omap/include/plat/nand.h | 6 +-----
|
||||
6 files changed, 6 insertions(+), 23 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
|
||||
index 1a18d3b..d76dca7 100644
|
||||
--- a/arch/arm/mach-omap2/board-cm-t35.c
|
||||
+++ b/arch/arm/mach-omap2/board-cm-t35.c
|
||||
@@ -162,9 +162,7 @@ static struct mtd_partition cm_t35_nand_partitions[] = {
|
||||
static struct omap_nand_platform_data cm_t35_nand_data = {
|
||||
.parts = cm_t35_nand_partitions,
|
||||
.nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
|
||||
- .dma_channel = -1, /* disable DMA in OMAP NAND driver */
|
||||
.cs = 0,
|
||||
-
|
||||
};
|
||||
|
||||
static void __init cm_t35_init_nand(void)
|
||||
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
|
||||
index aa67240..05c72f4 100644
|
||||
--- a/arch/arm/mach-omap2/board-cm-t3517.c
|
||||
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
|
||||
@@ -236,7 +236,6 @@ static struct mtd_partition cm_t3517_nand_partitions[] = {
|
||||
static struct omap_nand_platform_data cm_t3517_nand_data = {
|
||||
.parts = cm_t3517_nand_partitions,
|
||||
.nr_parts = ARRAY_SIZE(cm_t3517_nand_partitions),
|
||||
- .dma_channel = -1, /* disable DMA in OMAP NAND driver */
|
||||
.cs = 0,
|
||||
};
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
|
||||
index 729892f..aa1b0cb 100644
|
||||
--- a/arch/arm/mach-omap2/board-flash.c
|
||||
+++ b/arch/arm/mach-omap2/board-flash.c
|
||||
@@ -132,11 +132,7 @@ static struct gpmc_timings nand_timings = {
|
||||
};
|
||||
|
||||
static struct omap_nand_platform_data board_nand_data = {
|
||||
- .nand_setup = NULL,
|
||||
.gpmc_t = &nand_timings,
|
||||
- .dma_channel = -1, /* disable DMA in OMAP NAND driver */
|
||||
- .dev_ready = NULL,
|
||||
- .devsize = 0, /* '0' for 8-bit, '1' for 16-bit device */
|
||||
};
|
||||
|
||||
void
|
||||
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
|
||||
index 94ccf46..0043fa8 100644
|
||||
--- a/arch/arm/mach-omap2/common-board-devices.c
|
||||
+++ b/arch/arm/mach-omap2/common-board-devices.c
|
||||
@@ -115,9 +115,7 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
|
||||
-static struct omap_nand_platform_data nand_data = {
|
||||
- .dma_channel = -1, /* disable DMA in OMAP NAND driver */
|
||||
-};
|
||||
+static struct omap_nand_platform_data nand_data;
|
||||
|
||||
void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
|
||||
int nr_parts)
|
||||
@@ -148,7 +146,7 @@ void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
|
||||
nand_data.cs = nandcs;
|
||||
nand_data.parts = parts;
|
||||
nand_data.nr_parts = nr_parts;
|
||||
- nand_data.options = options;
|
||||
+ nand_data.devsize = options;
|
||||
|
||||
printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
|
||||
if (gpmc_nand_init(&nand_data) < 0)
|
||||
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
|
||||
index c1791d0..8ad210b 100644
|
||||
--- a/arch/arm/mach-omap2/gpmc-nand.c
|
||||
+++ b/arch/arm/mach-omap2/gpmc-nand.c
|
||||
@@ -20,8 +20,6 @@
|
||||
#include <plat/board.h>
|
||||
#include <plat/gpmc.h>
|
||||
|
||||
-static struct omap_nand_platform_data *gpmc_nand_data;
|
||||
-
|
||||
static struct resource gpmc_nand_resource = {
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
@@ -33,7 +31,7 @@ static struct platform_device gpmc_nand_device = {
|
||||
.resource = &gpmc_nand_resource,
|
||||
};
|
||||
|
||||
-static int omap2_nand_gpmc_retime(void)
|
||||
+static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data)
|
||||
{
|
||||
struct gpmc_timings t;
|
||||
int err;
|
||||
@@ -83,13 +81,11 @@ static int omap2_nand_gpmc_retime(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
-int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data)
|
||||
+int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
|
||||
{
|
||||
int err = 0;
|
||||
struct device *dev = &gpmc_nand_device.dev;
|
||||
|
||||
- gpmc_nand_data = _nand_data;
|
||||
- gpmc_nand_data->nand_setup = omap2_nand_gpmc_retime;
|
||||
gpmc_nand_device.dev.platform_data = gpmc_nand_data;
|
||||
|
||||
err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
|
||||
@@ -100,7 +96,7 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data)
|
||||
}
|
||||
|
||||
/* Set timings in GPMC */
|
||||
- err = omap2_nand_gpmc_retime();
|
||||
+ err = omap2_nand_gpmc_retime(gpmc_nand_data);
|
||||
if (err < 0) {
|
||||
dev_err(dev, "Unable to set gpmc timings: %d\n", err);
|
||||
return err;
|
||||
diff --git a/arch/arm/plat-omap/include/plat/nand.h b/arch/arm/plat-omap/include/plat/nand.h
|
||||
index d86d1ec..67fc506 100644
|
||||
--- a/arch/arm/plat-omap/include/plat/nand.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/nand.h
|
||||
@@ -19,15 +19,11 @@ enum nand_io {
|
||||
};
|
||||
|
||||
struct omap_nand_platform_data {
|
||||
- unsigned int options;
|
||||
int cs;
|
||||
- int gpio_irq;
|
||||
struct mtd_partition *parts;
|
||||
struct gpmc_timings *gpmc_t;
|
||||
int nr_parts;
|
||||
- int (*nand_setup)(void);
|
||||
- int (*dev_ready)(struct omap_nand_platform_data *);
|
||||
- int dma_channel;
|
||||
+ bool dev_ready;
|
||||
int gpmc_irq;
|
||||
enum nand_io xfer_type;
|
||||
unsigned long phys_base;
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+40
@@ -0,0 +1,40 @@
|
||||
From 59a54033e4f7c06fa47a7e0a81f8f35a10a362b0 Mon Sep 17 00:00:00 2001
|
||||
From: Peter Ujfalusi <peter.ujfalusi@ti.com>
|
||||
Date: Tue, 28 Jun 2011 10:16:55 +0000
|
||||
Subject: [PATCH 018/149] omap: board-omap3evm: Fix compilation error
|
||||
|
||||
Fix compilation error introduced with 786b01a8c1db0c0decca55d660a2a3ebd7cfb26b
|
||||
(cleanup regulator supply definitions in mach-omap2).
|
||||
|
||||
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
|
||||
[tony@atomide.com: updated comments]
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
---
|
||||
arch/arm/mach-omap2/board-omap3evm.c | 4 ++--
|
||||
1 files changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
|
||||
index 6f957ed..57bce0f 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3evm.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3evm.c
|
||||
@@ -510,7 +510,7 @@ static struct regulator_init_data omap3evm_vio = {
|
||||
#define OMAP3EVM_WLAN_IRQ_GPIO (149)
|
||||
|
||||
static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = {
|
||||
- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1");
|
||||
+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
|
||||
};
|
||||
|
||||
/* VMMC2 for driving the WL12xx module */
|
||||
@@ -518,7 +518,7 @@ static struct regulator_init_data omap3evm_vmmc2 = {
|
||||
.constraints = {
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
- .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply);,
|
||||
+ .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply),
|
||||
.consumer_supplies = omap3evm_vmmc2_supply,
|
||||
};
|
||||
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+311
@@ -0,0 +1,311 @@
|
||||
From 4e3c37e5871f6ef060ad32c23d5c0300641cb6ac Mon Sep 17 00:00:00 2001
|
||||
From: Jarkko Nikula <jhnikula@gmail.com>
|
||||
Date: Tue, 14 Jun 2011 11:23:51 +0000
|
||||
Subject: [PATCH 019/149] omap: mcbsp: Drop SPI mode support
|
||||
|
||||
We haven't seen any use for the SPI API in McBSP driver over the years. More
|
||||
over, Peter Ujfalusi <peter.ujfalusi@ti.com> noticed that SPI mode is not
|
||||
even supported since OMAP2430 so it's very unlikely that we'll see any use
|
||||
for it in the future either.
|
||||
|
||||
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
|
||||
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
---
|
||||
arch/arm/plat-omap/include/plat/mcbsp.h | 37 ------
|
||||
arch/arm/plat-omap/mcbsp.c | 214 -------------------------------
|
||||
2 files changed, 0 insertions(+), 251 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
|
||||
index f8f690a..3fc75a8 100644
|
||||
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
|
||||
@@ -353,38 +353,6 @@ typedef enum {
|
||||
OMAP_MCBSP_WORD_32,
|
||||
} omap_mcbsp_word_length;
|
||||
|
||||
-typedef enum {
|
||||
- OMAP_MCBSP_CLK_RISING = 0,
|
||||
- OMAP_MCBSP_CLK_FALLING,
|
||||
-} omap_mcbsp_clk_polarity;
|
||||
-
|
||||
-typedef enum {
|
||||
- OMAP_MCBSP_FS_ACTIVE_HIGH = 0,
|
||||
- OMAP_MCBSP_FS_ACTIVE_LOW,
|
||||
-} omap_mcbsp_fs_polarity;
|
||||
-
|
||||
-typedef enum {
|
||||
- OMAP_MCBSP_CLK_STP_MODE_NO_DELAY = 0,
|
||||
- OMAP_MCBSP_CLK_STP_MODE_DELAY,
|
||||
-} omap_mcbsp_clk_stp_mode;
|
||||
-
|
||||
-
|
||||
-/******* SPI specific mode **********/
|
||||
-typedef enum {
|
||||
- OMAP_MCBSP_SPI_MASTER = 0,
|
||||
- OMAP_MCBSP_SPI_SLAVE,
|
||||
-} omap_mcbsp_spi_mode;
|
||||
-
|
||||
-struct omap_mcbsp_spi_cfg {
|
||||
- omap_mcbsp_spi_mode spi_mode;
|
||||
- omap_mcbsp_clk_polarity rx_clock_polarity;
|
||||
- omap_mcbsp_clk_polarity tx_clock_polarity;
|
||||
- omap_mcbsp_fs_polarity fsx_polarity;
|
||||
- u8 clk_div;
|
||||
- omap_mcbsp_clk_stp_mode clk_stp_mode;
|
||||
- omap_mcbsp_word_length word_length;
|
||||
-};
|
||||
-
|
||||
/* Platform specific configuration */
|
||||
struct omap_mcbsp_ops {
|
||||
void (*request)(unsigned int);
|
||||
@@ -504,14 +472,9 @@ u32 omap_mcbsp_recv_word(unsigned int id);
|
||||
|
||||
int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length);
|
||||
int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length);
|
||||
-int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word);
|
||||
-int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word);
|
||||
-
|
||||
|
||||
/* McBSP functional clock source changing function */
|
||||
extern int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id);
|
||||
-/* SPI specific API */
|
||||
-void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg);
|
||||
|
||||
/* Polled read/write functions */
|
||||
int omap_mcbsp_pollread(unsigned int id, u16 * buf);
|
||||
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
|
||||
index 5587acf..1de2724 100644
|
||||
--- a/arch/arm/plat-omap/mcbsp.c
|
||||
+++ b/arch/arm/plat-omap/mcbsp.c
|
||||
@@ -1175,147 +1175,6 @@ u32 omap_mcbsp_recv_word(unsigned int id)
|
||||
}
|
||||
EXPORT_SYMBOL(omap_mcbsp_recv_word);
|
||||
|
||||
-int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
|
||||
-{
|
||||
- struct omap_mcbsp *mcbsp;
|
||||
- omap_mcbsp_word_length tx_word_length;
|
||||
- omap_mcbsp_word_length rx_word_length;
|
||||
- u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
|
||||
-
|
||||
- if (!omap_mcbsp_check_valid_id(id)) {
|
||||
- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
||||
- return -ENODEV;
|
||||
- }
|
||||
- mcbsp = id_to_mcbsp_ptr(id);
|
||||
- tx_word_length = mcbsp->tx_word_length;
|
||||
- rx_word_length = mcbsp->rx_word_length;
|
||||
-
|
||||
- if (tx_word_length != rx_word_length)
|
||||
- return -EINVAL;
|
||||
-
|
||||
- /* First we wait for the transmitter to be ready */
|
||||
- spcr2 = MCBSP_READ(mcbsp, SPCR2);
|
||||
- while (!(spcr2 & XRDY)) {
|
||||
- spcr2 = MCBSP_READ(mcbsp, SPCR2);
|
||||
- if (attempts++ > 1000) {
|
||||
- /* We must reset the transmitter */
|
||||
- MCBSP_WRITE(mcbsp, SPCR2,
|
||||
- MCBSP_READ_CACHE(mcbsp, SPCR2) & (~XRST));
|
||||
- udelay(10);
|
||||
- MCBSP_WRITE(mcbsp, SPCR2,
|
||||
- MCBSP_READ_CACHE(mcbsp, SPCR2) | XRST);
|
||||
- udelay(10);
|
||||
- dev_err(mcbsp->dev, "McBSP%d transmitter not "
|
||||
- "ready\n", mcbsp->id);
|
||||
- return -EAGAIN;
|
||||
- }
|
||||
- }
|
||||
-
|
||||
- /* Now we can push the data */
|
||||
- if (tx_word_length > OMAP_MCBSP_WORD_16)
|
||||
- MCBSP_WRITE(mcbsp, DXR2, word >> 16);
|
||||
- MCBSP_WRITE(mcbsp, DXR1, word & 0xffff);
|
||||
-
|
||||
- /* We wait for the receiver to be ready */
|
||||
- spcr1 = MCBSP_READ(mcbsp, SPCR1);
|
||||
- while (!(spcr1 & RRDY)) {
|
||||
- spcr1 = MCBSP_READ(mcbsp, SPCR1);
|
||||
- if (attempts++ > 1000) {
|
||||
- /* We must reset the receiver */
|
||||
- MCBSP_WRITE(mcbsp, SPCR1,
|
||||
- MCBSP_READ_CACHE(mcbsp, SPCR1) & (~RRST));
|
||||
- udelay(10);
|
||||
- MCBSP_WRITE(mcbsp, SPCR1,
|
||||
- MCBSP_READ_CACHE(mcbsp, SPCR1) | RRST);
|
||||
- udelay(10);
|
||||
- dev_err(mcbsp->dev, "McBSP%d receiver not "
|
||||
- "ready\n", mcbsp->id);
|
||||
- return -EAGAIN;
|
||||
- }
|
||||
- }
|
||||
-
|
||||
- /* Receiver is ready, let's read the dummy data */
|
||||
- if (rx_word_length > OMAP_MCBSP_WORD_16)
|
||||
- word_msb = MCBSP_READ(mcbsp, DRR2);
|
||||
- word_lsb = MCBSP_READ(mcbsp, DRR1);
|
||||
-
|
||||
- return 0;
|
||||
-}
|
||||
-EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
|
||||
-
|
||||
-int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
|
||||
-{
|
||||
- struct omap_mcbsp *mcbsp;
|
||||
- u32 clock_word = 0;
|
||||
- omap_mcbsp_word_length tx_word_length;
|
||||
- omap_mcbsp_word_length rx_word_length;
|
||||
- u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
|
||||
-
|
||||
- if (!omap_mcbsp_check_valid_id(id)) {
|
||||
- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
||||
- return -ENODEV;
|
||||
- }
|
||||
-
|
||||
- mcbsp = id_to_mcbsp_ptr(id);
|
||||
-
|
||||
- tx_word_length = mcbsp->tx_word_length;
|
||||
- rx_word_length = mcbsp->rx_word_length;
|
||||
-
|
||||
- if (tx_word_length != rx_word_length)
|
||||
- return -EINVAL;
|
||||
-
|
||||
- /* First we wait for the transmitter to be ready */
|
||||
- spcr2 = MCBSP_READ(mcbsp, SPCR2);
|
||||
- while (!(spcr2 & XRDY)) {
|
||||
- spcr2 = MCBSP_READ(mcbsp, SPCR2);
|
||||
- if (attempts++ > 1000) {
|
||||
- /* We must reset the transmitter */
|
||||
- MCBSP_WRITE(mcbsp, SPCR2,
|
||||
- MCBSP_READ_CACHE(mcbsp, SPCR2) & (~XRST));
|
||||
- udelay(10);
|
||||
- MCBSP_WRITE(mcbsp, SPCR2,
|
||||
- MCBSP_READ_CACHE(mcbsp, SPCR2) | XRST);
|
||||
- udelay(10);
|
||||
- dev_err(mcbsp->dev, "McBSP%d transmitter not "
|
||||
- "ready\n", mcbsp->id);
|
||||
- return -EAGAIN;
|
||||
- }
|
||||
- }
|
||||
-
|
||||
- /* We first need to enable the bus clock */
|
||||
- if (tx_word_length > OMAP_MCBSP_WORD_16)
|
||||
- MCBSP_WRITE(mcbsp, DXR2, clock_word >> 16);
|
||||
- MCBSP_WRITE(mcbsp, DXR1, clock_word & 0xffff);
|
||||
-
|
||||
- /* We wait for the receiver to be ready */
|
||||
- spcr1 = MCBSP_READ(mcbsp, SPCR1);
|
||||
- while (!(spcr1 & RRDY)) {
|
||||
- spcr1 = MCBSP_READ(mcbsp, SPCR1);
|
||||
- if (attempts++ > 1000) {
|
||||
- /* We must reset the receiver */
|
||||
- MCBSP_WRITE(mcbsp, SPCR1,
|
||||
- MCBSP_READ_CACHE(mcbsp, SPCR1) & (~RRST));
|
||||
- udelay(10);
|
||||
- MCBSP_WRITE(mcbsp, SPCR1,
|
||||
- MCBSP_READ_CACHE(mcbsp, SPCR1) | RRST);
|
||||
- udelay(10);
|
||||
- dev_err(mcbsp->dev, "McBSP%d receiver not "
|
||||
- "ready\n", mcbsp->id);
|
||||
- return -EAGAIN;
|
||||
- }
|
||||
- }
|
||||
-
|
||||
- /* Receiver is ready, there is something for us */
|
||||
- if (rx_word_length > OMAP_MCBSP_WORD_16)
|
||||
- word_msb = MCBSP_READ(mcbsp, DRR2);
|
||||
- word_lsb = MCBSP_READ(mcbsp, DRR1);
|
||||
-
|
||||
- word[0] = (word_lsb | (word_msb << 16));
|
||||
-
|
||||
- return 0;
|
||||
-}
|
||||
-EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
|
||||
-
|
||||
/*
|
||||
* Simple DMA based buffer rx/tx routines.
|
||||
* Nothing fancy, just a single buffer tx/rx through DMA.
|
||||
@@ -1449,79 +1308,6 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
|
||||
}
|
||||
EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
|
||||
|
||||
-/*
|
||||
- * SPI wrapper.
|
||||
- * Since SPI setup is much simpler than the generic McBSP one,
|
||||
- * this wrapper just need an omap_mcbsp_spi_cfg structure as an input.
|
||||
- * Once this is done, you can call omap_mcbsp_start().
|
||||
- */
|
||||
-void omap_mcbsp_set_spi_mode(unsigned int id,
|
||||
- const struct omap_mcbsp_spi_cfg *spi_cfg)
|
||||
-{
|
||||
- struct omap_mcbsp *mcbsp;
|
||||
- struct omap_mcbsp_reg_cfg mcbsp_cfg;
|
||||
-
|
||||
- if (!omap_mcbsp_check_valid_id(id)) {
|
||||
- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
||||
- return;
|
||||
- }
|
||||
- mcbsp = id_to_mcbsp_ptr(id);
|
||||
-
|
||||
- memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
|
||||
-
|
||||
- /* SPI has only one frame */
|
||||
- mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0));
|
||||
- mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0));
|
||||
-
|
||||
- /* Clock stop mode */
|
||||
- if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY)
|
||||
- mcbsp_cfg.spcr1 |= (1 << 12);
|
||||
- else
|
||||
- mcbsp_cfg.spcr1 |= (3 << 11);
|
||||
-
|
||||
- /* Set clock parities */
|
||||
- if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING)
|
||||
- mcbsp_cfg.pcr0 |= CLKRP;
|
||||
- else
|
||||
- mcbsp_cfg.pcr0 &= ~CLKRP;
|
||||
-
|
||||
- if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING)
|
||||
- mcbsp_cfg.pcr0 &= ~CLKXP;
|
||||
- else
|
||||
- mcbsp_cfg.pcr0 |= CLKXP;
|
||||
-
|
||||
- /* Set SCLKME to 0 and CLKSM to 1 */
|
||||
- mcbsp_cfg.pcr0 &= ~SCLKME;
|
||||
- mcbsp_cfg.srgr2 |= CLKSM;
|
||||
-
|
||||
- /* Set FSXP */
|
||||
- if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH)
|
||||
- mcbsp_cfg.pcr0 &= ~FSXP;
|
||||
- else
|
||||
- mcbsp_cfg.pcr0 |= FSXP;
|
||||
-
|
||||
- if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) {
|
||||
- mcbsp_cfg.pcr0 |= CLKXM;
|
||||
- mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1);
|
||||
- mcbsp_cfg.pcr0 |= FSXM;
|
||||
- mcbsp_cfg.srgr2 &= ~FSGM;
|
||||
- mcbsp_cfg.xcr2 |= XDATDLY(1);
|
||||
- mcbsp_cfg.rcr2 |= RDATDLY(1);
|
||||
- } else {
|
||||
- mcbsp_cfg.pcr0 &= ~CLKXM;
|
||||
- mcbsp_cfg.srgr1 |= CLKGDV(1);
|
||||
- mcbsp_cfg.pcr0 &= ~FSXM;
|
||||
- mcbsp_cfg.xcr2 &= ~XDATDLY(3);
|
||||
- mcbsp_cfg.rcr2 &= ~RDATDLY(3);
|
||||
- }
|
||||
-
|
||||
- mcbsp_cfg.xcr2 &= ~XPHASE;
|
||||
- mcbsp_cfg.rcr2 &= ~RPHASE;
|
||||
-
|
||||
- omap_mcbsp_config(id, &mcbsp_cfg);
|
||||
-}
|
||||
-EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
|
||||
-
|
||||
#ifdef CONFIG_ARCH_OMAP3
|
||||
#define max_thres(m) (mcbsp->pdata->buffer_size)
|
||||
#define valid_threshold(m, val) ((val) <= max_thres(m))
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+548
@@ -0,0 +1,548 @@
|
||||
From b3e109513b7cfc01b0e8b1acb6d586f0d273303a Mon Sep 17 00:00:00 2001
|
||||
From: Jarkko Nikula <jhnikula@gmail.com>
|
||||
Date: Tue, 14 Jun 2011 11:23:52 +0000
|
||||
Subject: [PATCH 020/149] omap: mcbsp: Drop in-driver transfer support
|
||||
|
||||
We haven't seen either use for in-driver transfer API in McBSP driver
|
||||
over the years so it looks they can be removed too.
|
||||
|
||||
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
---
|
||||
arch/arm/plat-omap/include/plat/mcbsp.h | 25 --
|
||||
arch/arm/plat-omap/mcbsp.c | 382 ++-----------------------------
|
||||
2 files changed, 19 insertions(+), 388 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
|
||||
index 3fc75a8..6c53508 100644
|
||||
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
|
||||
@@ -24,7 +24,6 @@
|
||||
#ifndef __ASM_ARCH_OMAP_MCBSP_H
|
||||
#define __ASM_ARCH_OMAP_MCBSP_H
|
||||
|
||||
-#include <linux/completion.h>
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
@@ -340,10 +339,6 @@ typedef enum {
|
||||
OMAP_MCBSP5
|
||||
} omap_mcbsp_id;
|
||||
|
||||
-typedef int __bitwise omap_mcbsp_io_type_t;
|
||||
-#define OMAP_MCBSP_IRQ_IO ((__force omap_mcbsp_io_type_t) 1)
|
||||
-#define OMAP_MCBSP_POLL_IO ((__force omap_mcbsp_io_type_t) 2)
|
||||
-
|
||||
typedef enum {
|
||||
OMAP_MCBSP_WORD_8 = 0,
|
||||
OMAP_MCBSP_WORD_12,
|
||||
@@ -393,22 +388,12 @@ struct omap_mcbsp {
|
||||
omap_mcbsp_word_length rx_word_length;
|
||||
omap_mcbsp_word_length tx_word_length;
|
||||
|
||||
- omap_mcbsp_io_type_t io_type; /* IRQ or poll */
|
||||
- /* IRQ based TX/RX */
|
||||
int rx_irq;
|
||||
int tx_irq;
|
||||
|
||||
/* DMA stuff */
|
||||
u8 dma_rx_sync;
|
||||
- short dma_rx_lch;
|
||||
u8 dma_tx_sync;
|
||||
- short dma_tx_lch;
|
||||
-
|
||||
- /* Completion queues */
|
||||
- struct completion tx_irq_completion;
|
||||
- struct completion rx_irq_completion;
|
||||
- struct completion tx_dma_completion;
|
||||
- struct completion rx_dma_completion;
|
||||
|
||||
/* Protect the field .free, while checking if the mcbsp is in use */
|
||||
spinlock_t lock;
|
||||
@@ -467,20 +452,10 @@ int omap_mcbsp_request(unsigned int id);
|
||||
void omap_mcbsp_free(unsigned int id);
|
||||
void omap_mcbsp_start(unsigned int id, int tx, int rx);
|
||||
void omap_mcbsp_stop(unsigned int id, int tx, int rx);
|
||||
-void omap_mcbsp_xmit_word(unsigned int id, u32 word);
|
||||
-u32 omap_mcbsp_recv_word(unsigned int id);
|
||||
-
|
||||
-int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length);
|
||||
-int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length);
|
||||
|
||||
/* McBSP functional clock source changing function */
|
||||
extern int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id);
|
||||
|
||||
-/* Polled read/write functions */
|
||||
-int omap_mcbsp_pollread(unsigned int id, u16 * buf);
|
||||
-int omap_mcbsp_pollwrite(unsigned int id, u16 buf);
|
||||
-int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type);
|
||||
-
|
||||
/* McBSP signal muxing API */
|
||||
void omap2_mcbsp1_mux_clkr_src(u8 mux);
|
||||
void omap2_mcbsp1_mux_fsr_src(u8 mux);
|
||||
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
|
||||
index 1de2724..455eadc 100644
|
||||
--- a/arch/arm/plat-omap/mcbsp.c
|
||||
+++ b/arch/arm/plat-omap/mcbsp.c
|
||||
@@ -16,8 +16,6 @@
|
||||
#include <linux/init.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/platform_device.h>
|
||||
-#include <linux/wait.h>
|
||||
-#include <linux/completion.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/clk.h>
|
||||
@@ -25,7 +23,6 @@
|
||||
#include <linux/io.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
-#include <plat/dma.h>
|
||||
#include <plat/mcbsp.h>
|
||||
#include <plat/omap_device.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
@@ -136,8 +133,6 @@ static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
|
||||
irqst_spcr2);
|
||||
/* Writing zero to XSYNC_ERR clears the IRQ */
|
||||
MCBSP_WRITE(mcbsp_tx, SPCR2, MCBSP_READ_CACHE(mcbsp_tx, SPCR2));
|
||||
- } else {
|
||||
- complete(&mcbsp_tx->tx_irq_completion);
|
||||
}
|
||||
|
||||
return IRQ_HANDLED;
|
||||
@@ -156,41 +151,11 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
|
||||
irqst_spcr1);
|
||||
/* Writing zero to RSYNC_ERR clears the IRQ */
|
||||
MCBSP_WRITE(mcbsp_rx, SPCR1, MCBSP_READ_CACHE(mcbsp_rx, SPCR1));
|
||||
- } else {
|
||||
- complete(&mcbsp_rx->rx_irq_completion);
|
||||
}
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
-static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
|
||||
-{
|
||||
- struct omap_mcbsp *mcbsp_dma_tx = data;
|
||||
-
|
||||
- dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
|
||||
- MCBSP_READ(mcbsp_dma_tx, SPCR2));
|
||||
-
|
||||
- /* We can free the channels */
|
||||
- omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
|
||||
- mcbsp_dma_tx->dma_tx_lch = -1;
|
||||
-
|
||||
- complete(&mcbsp_dma_tx->tx_dma_completion);
|
||||
-}
|
||||
-
|
||||
-static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
|
||||
-{
|
||||
- struct omap_mcbsp *mcbsp_dma_rx = data;
|
||||
-
|
||||
- dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
|
||||
- MCBSP_READ(mcbsp_dma_rx, SPCR2));
|
||||
-
|
||||
- /* We can free the channels */
|
||||
- omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
|
||||
- mcbsp_dma_rx->dma_rx_lch = -1;
|
||||
-
|
||||
- complete(&mcbsp_dma_rx->rx_dma_completion);
|
||||
-}
|
||||
-
|
||||
/*
|
||||
* omap_mcbsp_config simply write a config to the
|
||||
* appropriate McBSP.
|
||||
@@ -758,37 +723,6 @@ static inline void omap_st_start(struct omap_mcbsp *mcbsp) {}
|
||||
static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {}
|
||||
#endif
|
||||
|
||||
-/*
|
||||
- * We can choose between IRQ based or polled IO.
|
||||
- * This needs to be called before omap_mcbsp_request().
|
||||
- */
|
||||
-int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
|
||||
-{
|
||||
- struct omap_mcbsp *mcbsp;
|
||||
-
|
||||
- if (!omap_mcbsp_check_valid_id(id)) {
|
||||
- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
||||
- return -ENODEV;
|
||||
- }
|
||||
- mcbsp = id_to_mcbsp_ptr(id);
|
||||
-
|
||||
- spin_lock(&mcbsp->lock);
|
||||
-
|
||||
- if (!mcbsp->free) {
|
||||
- dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
|
||||
- mcbsp->id);
|
||||
- spin_unlock(&mcbsp->lock);
|
||||
- return -EINVAL;
|
||||
- }
|
||||
-
|
||||
- mcbsp->io_type = io_type;
|
||||
-
|
||||
- spin_unlock(&mcbsp->lock);
|
||||
-
|
||||
- return 0;
|
||||
-}
|
||||
-EXPORT_SYMBOL(omap_mcbsp_set_io_type);
|
||||
-
|
||||
int omap_mcbsp_request(unsigned int id)
|
||||
{
|
||||
struct omap_mcbsp *mcbsp;
|
||||
@@ -833,29 +767,24 @@ int omap_mcbsp_request(unsigned int id)
|
||||
MCBSP_WRITE(mcbsp, SPCR1, 0);
|
||||
MCBSP_WRITE(mcbsp, SPCR2, 0);
|
||||
|
||||
- if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
|
||||
- /* We need to get IRQs here */
|
||||
- init_completion(&mcbsp->tx_irq_completion);
|
||||
- err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
|
||||
- 0, "McBSP", (void *)mcbsp);
|
||||
+ err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
|
||||
+ 0, "McBSP", (void *)mcbsp);
|
||||
+ if (err != 0) {
|
||||
+ dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
|
||||
+ "for McBSP%d\n", mcbsp->tx_irq,
|
||||
+ mcbsp->id);
|
||||
+ goto err_clk_disable;
|
||||
+ }
|
||||
+
|
||||
+ if (mcbsp->rx_irq) {
|
||||
+ err = request_irq(mcbsp->rx_irq,
|
||||
+ omap_mcbsp_rx_irq_handler,
|
||||
+ 0, "McBSP", (void *)mcbsp);
|
||||
if (err != 0) {
|
||||
- dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
|
||||
- "for McBSP%d\n", mcbsp->tx_irq,
|
||||
+ dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
|
||||
+ "for McBSP%d\n", mcbsp->rx_irq,
|
||||
mcbsp->id);
|
||||
- goto err_clk_disable;
|
||||
- }
|
||||
-
|
||||
- if (mcbsp->rx_irq) {
|
||||
- init_completion(&mcbsp->rx_irq_completion);
|
||||
- err = request_irq(mcbsp->rx_irq,
|
||||
- omap_mcbsp_rx_irq_handler,
|
||||
- 0, "McBSP", (void *)mcbsp);
|
||||
- if (err != 0) {
|
||||
- dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
|
||||
- "for McBSP%d\n", mcbsp->rx_irq,
|
||||
- mcbsp->id);
|
||||
- goto err_free_irq;
|
||||
- }
|
||||
+ goto err_free_irq;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -901,12 +830,9 @@ void omap_mcbsp_free(unsigned int id)
|
||||
|
||||
pm_runtime_put_sync(mcbsp->dev);
|
||||
|
||||
- if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
|
||||
- /* Free IRQs */
|
||||
- if (mcbsp->rx_irq)
|
||||
- free_irq(mcbsp->rx_irq, (void *)mcbsp);
|
||||
- free_irq(mcbsp->tx_irq, (void *)mcbsp);
|
||||
- }
|
||||
+ if (mcbsp->rx_irq)
|
||||
+ free_irq(mcbsp->rx_irq, (void *)mcbsp);
|
||||
+ free_irq(mcbsp->tx_irq, (void *)mcbsp);
|
||||
|
||||
reg_cache = mcbsp->reg_cache;
|
||||
|
||||
@@ -1043,271 +969,6 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
|
||||
}
|
||||
EXPORT_SYMBOL(omap_mcbsp_stop);
|
||||
|
||||
-/* polled mcbsp i/o operations */
|
||||
-int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
|
||||
-{
|
||||
- struct omap_mcbsp *mcbsp;
|
||||
-
|
||||
- if (!omap_mcbsp_check_valid_id(id)) {
|
||||
- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
||||
- return -ENODEV;
|
||||
- }
|
||||
-
|
||||
- mcbsp = id_to_mcbsp_ptr(id);
|
||||
-
|
||||
- MCBSP_WRITE(mcbsp, DXR1, buf);
|
||||
- /* if frame sync error - clear the error */
|
||||
- if (MCBSP_READ(mcbsp, SPCR2) & XSYNC_ERR) {
|
||||
- /* clear error */
|
||||
- MCBSP_WRITE(mcbsp, SPCR2, MCBSP_READ_CACHE(mcbsp, SPCR2));
|
||||
- /* resend */
|
||||
- return -1;
|
||||
- } else {
|
||||
- /* wait for transmit confirmation */
|
||||
- int attemps = 0;
|
||||
- while (!(MCBSP_READ(mcbsp, SPCR2) & XRDY)) {
|
||||
- if (attemps++ > 1000) {
|
||||
- MCBSP_WRITE(mcbsp, SPCR2,
|
||||
- MCBSP_READ_CACHE(mcbsp, SPCR2) &
|
||||
- (~XRST));
|
||||
- udelay(10);
|
||||
- MCBSP_WRITE(mcbsp, SPCR2,
|
||||
- MCBSP_READ_CACHE(mcbsp, SPCR2) |
|
||||
- (XRST));
|
||||
- udelay(10);
|
||||
- dev_err(mcbsp->dev, "Could not write to"
|
||||
- " McBSP%d Register\n", mcbsp->id);
|
||||
- return -2;
|
||||
- }
|
||||
- }
|
||||
- }
|
||||
-
|
||||
- return 0;
|
||||
-}
|
||||
-EXPORT_SYMBOL(omap_mcbsp_pollwrite);
|
||||
-
|
||||
-int omap_mcbsp_pollread(unsigned int id, u16 *buf)
|
||||
-{
|
||||
- struct omap_mcbsp *mcbsp;
|
||||
-
|
||||
- if (!omap_mcbsp_check_valid_id(id)) {
|
||||
- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
||||
- return -ENODEV;
|
||||
- }
|
||||
- mcbsp = id_to_mcbsp_ptr(id);
|
||||
-
|
||||
- /* if frame sync error - clear the error */
|
||||
- if (MCBSP_READ(mcbsp, SPCR1) & RSYNC_ERR) {
|
||||
- /* clear error */
|
||||
- MCBSP_WRITE(mcbsp, SPCR1, MCBSP_READ_CACHE(mcbsp, SPCR1));
|
||||
- /* resend */
|
||||
- return -1;
|
||||
- } else {
|
||||
- /* wait for receive confirmation */
|
||||
- int attemps = 0;
|
||||
- while (!(MCBSP_READ(mcbsp, SPCR1) & RRDY)) {
|
||||
- if (attemps++ > 1000) {
|
||||
- MCBSP_WRITE(mcbsp, SPCR1,
|
||||
- MCBSP_READ_CACHE(mcbsp, SPCR1) &
|
||||
- (~RRST));
|
||||
- udelay(10);
|
||||
- MCBSP_WRITE(mcbsp, SPCR1,
|
||||
- MCBSP_READ_CACHE(mcbsp, SPCR1) |
|
||||
- (RRST));
|
||||
- udelay(10);
|
||||
- dev_err(mcbsp->dev, "Could not read from"
|
||||
- " McBSP%d Register\n", mcbsp->id);
|
||||
- return -2;
|
||||
- }
|
||||
- }
|
||||
- }
|
||||
- *buf = MCBSP_READ(mcbsp, DRR1);
|
||||
-
|
||||
- return 0;
|
||||
-}
|
||||
-EXPORT_SYMBOL(omap_mcbsp_pollread);
|
||||
-
|
||||
-/*
|
||||
- * IRQ based word transmission.
|
||||
- */
|
||||
-void omap_mcbsp_xmit_word(unsigned int id, u32 word)
|
||||
-{
|
||||
- struct omap_mcbsp *mcbsp;
|
||||
- omap_mcbsp_word_length word_length;
|
||||
-
|
||||
- if (!omap_mcbsp_check_valid_id(id)) {
|
||||
- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
||||
- return;
|
||||
- }
|
||||
-
|
||||
- mcbsp = id_to_mcbsp_ptr(id);
|
||||
- word_length = mcbsp->tx_word_length;
|
||||
-
|
||||
- wait_for_completion(&mcbsp->tx_irq_completion);
|
||||
-
|
||||
- if (word_length > OMAP_MCBSP_WORD_16)
|
||||
- MCBSP_WRITE(mcbsp, DXR2, word >> 16);
|
||||
- MCBSP_WRITE(mcbsp, DXR1, word & 0xffff);
|
||||
-}
|
||||
-EXPORT_SYMBOL(omap_mcbsp_xmit_word);
|
||||
-
|
||||
-u32 omap_mcbsp_recv_word(unsigned int id)
|
||||
-{
|
||||
- struct omap_mcbsp *mcbsp;
|
||||
- u16 word_lsb, word_msb = 0;
|
||||
- omap_mcbsp_word_length word_length;
|
||||
-
|
||||
- if (!omap_mcbsp_check_valid_id(id)) {
|
||||
- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
||||
- return -ENODEV;
|
||||
- }
|
||||
- mcbsp = id_to_mcbsp_ptr(id);
|
||||
-
|
||||
- word_length = mcbsp->rx_word_length;
|
||||
-
|
||||
- wait_for_completion(&mcbsp->rx_irq_completion);
|
||||
-
|
||||
- if (word_length > OMAP_MCBSP_WORD_16)
|
||||
- word_msb = MCBSP_READ(mcbsp, DRR2);
|
||||
- word_lsb = MCBSP_READ(mcbsp, DRR1);
|
||||
-
|
||||
- return (word_lsb | (word_msb << 16));
|
||||
-}
|
||||
-EXPORT_SYMBOL(omap_mcbsp_recv_word);
|
||||
-
|
||||
-/*
|
||||
- * Simple DMA based buffer rx/tx routines.
|
||||
- * Nothing fancy, just a single buffer tx/rx through DMA.
|
||||
- * The DMA resources are released once the transfer is done.
|
||||
- * For anything fancier, you should use your own customized DMA
|
||||
- * routines and callbacks.
|
||||
- */
|
||||
-int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
|
||||
- unsigned int length)
|
||||
-{
|
||||
- struct omap_mcbsp *mcbsp;
|
||||
- int dma_tx_ch;
|
||||
- int src_port = 0;
|
||||
- int dest_port = 0;
|
||||
- int sync_dev = 0;
|
||||
-
|
||||
- if (!omap_mcbsp_check_valid_id(id)) {
|
||||
- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
||||
- return -ENODEV;
|
||||
- }
|
||||
- mcbsp = id_to_mcbsp_ptr(id);
|
||||
-
|
||||
- if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
|
||||
- omap_mcbsp_tx_dma_callback,
|
||||
- mcbsp,
|
||||
- &dma_tx_ch)) {
|
||||
- dev_err(mcbsp->dev, " Unable to request DMA channel for "
|
||||
- "McBSP%d TX. Trying IRQ based TX\n",
|
||||
- mcbsp->id);
|
||||
- return -EAGAIN;
|
||||
- }
|
||||
- mcbsp->dma_tx_lch = dma_tx_ch;
|
||||
-
|
||||
- dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
|
||||
- dma_tx_ch);
|
||||
-
|
||||
- init_completion(&mcbsp->tx_dma_completion);
|
||||
-
|
||||
- if (cpu_class_is_omap1()) {
|
||||
- src_port = OMAP_DMA_PORT_TIPB;
|
||||
- dest_port = OMAP_DMA_PORT_EMIFF;
|
||||
- }
|
||||
- if (cpu_class_is_omap2())
|
||||
- sync_dev = mcbsp->dma_tx_sync;
|
||||
-
|
||||
- omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
|
||||
- OMAP_DMA_DATA_TYPE_S16,
|
||||
- length >> 1, 1,
|
||||
- OMAP_DMA_SYNC_ELEMENT,
|
||||
- sync_dev, 0);
|
||||
-
|
||||
- omap_set_dma_dest_params(mcbsp->dma_tx_lch,
|
||||
- src_port,
|
||||
- OMAP_DMA_AMODE_CONSTANT,
|
||||
- mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
|
||||
- 0, 0);
|
||||
-
|
||||
- omap_set_dma_src_params(mcbsp->dma_tx_lch,
|
||||
- dest_port,
|
||||
- OMAP_DMA_AMODE_POST_INC,
|
||||
- buffer,
|
||||
- 0, 0);
|
||||
-
|
||||
- omap_start_dma(mcbsp->dma_tx_lch);
|
||||
- wait_for_completion(&mcbsp->tx_dma_completion);
|
||||
-
|
||||
- return 0;
|
||||
-}
|
||||
-EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
|
||||
-
|
||||
-int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
|
||||
- unsigned int length)
|
||||
-{
|
||||
- struct omap_mcbsp *mcbsp;
|
||||
- int dma_rx_ch;
|
||||
- int src_port = 0;
|
||||
- int dest_port = 0;
|
||||
- int sync_dev = 0;
|
||||
-
|
||||
- if (!omap_mcbsp_check_valid_id(id)) {
|
||||
- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
||||
- return -ENODEV;
|
||||
- }
|
||||
- mcbsp = id_to_mcbsp_ptr(id);
|
||||
-
|
||||
- if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
|
||||
- omap_mcbsp_rx_dma_callback,
|
||||
- mcbsp,
|
||||
- &dma_rx_ch)) {
|
||||
- dev_err(mcbsp->dev, "Unable to request DMA channel for "
|
||||
- "McBSP%d RX. Trying IRQ based RX\n",
|
||||
- mcbsp->id);
|
||||
- return -EAGAIN;
|
||||
- }
|
||||
- mcbsp->dma_rx_lch = dma_rx_ch;
|
||||
-
|
||||
- dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
|
||||
- dma_rx_ch);
|
||||
-
|
||||
- init_completion(&mcbsp->rx_dma_completion);
|
||||
-
|
||||
- if (cpu_class_is_omap1()) {
|
||||
- src_port = OMAP_DMA_PORT_TIPB;
|
||||
- dest_port = OMAP_DMA_PORT_EMIFF;
|
||||
- }
|
||||
- if (cpu_class_is_omap2())
|
||||
- sync_dev = mcbsp->dma_rx_sync;
|
||||
-
|
||||
- omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
|
||||
- OMAP_DMA_DATA_TYPE_S16,
|
||||
- length >> 1, 1,
|
||||
- OMAP_DMA_SYNC_ELEMENT,
|
||||
- sync_dev, 0);
|
||||
-
|
||||
- omap_set_dma_src_params(mcbsp->dma_rx_lch,
|
||||
- src_port,
|
||||
- OMAP_DMA_AMODE_CONSTANT,
|
||||
- mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
|
||||
- 0, 0);
|
||||
-
|
||||
- omap_set_dma_dest_params(mcbsp->dma_rx_lch,
|
||||
- dest_port,
|
||||
- OMAP_DMA_AMODE_POST_INC,
|
||||
- buffer,
|
||||
- 0, 0);
|
||||
-
|
||||
- omap_start_dma(mcbsp->dma_rx_lch);
|
||||
- wait_for_completion(&mcbsp->rx_dma_completion);
|
||||
-
|
||||
- return 0;
|
||||
-}
|
||||
-EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
|
||||
-
|
||||
#ifdef CONFIG_ARCH_OMAP3
|
||||
#define max_thres(m) (mcbsp->pdata->buffer_size)
|
||||
#define valid_threshold(m, val) ((val) <= max_thres(m))
|
||||
@@ -1619,8 +1280,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
|
||||
spin_lock_init(&mcbsp->lock);
|
||||
mcbsp->id = id + 1;
|
||||
mcbsp->free = true;
|
||||
- mcbsp->dma_tx_lch = -1;
|
||||
- mcbsp->dma_rx_lch = -1;
|
||||
|
||||
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
|
||||
if (!res) {
|
||||
@@ -1646,9 +1305,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
|
||||
else
|
||||
mcbsp->phys_dma_base = res->start;
|
||||
|
||||
- /* Default I/O is IRQ based */
|
||||
- mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
|
||||
-
|
||||
mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx");
|
||||
mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx");
|
||||
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
@@ -0,0 +1,29 @@
|
||||
From 2cb6af64e37c13cd61ff3c15ec89415086e97cd7 Mon Sep 17 00:00:00 2001
|
||||
From: Arnd Bergmann <arnd@arndb.de>
|
||||
Date: Thu, 30 Jun 2011 12:58:01 +0000
|
||||
Subject: [PATCH 021/149] omap2+: fix build regression
|
||||
|
||||
board-generic.c now contains a reference to omap3_timer, but depends
|
||||
only on ARCH_OMAP2, not on ARCH_OMAP3, which controls that symbol.
|
||||
omap2_timer seems to be more appropriate anyway, so use that instead.
|
||||
|
||||
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||||
Acked-by: Tony Lindgren <tony@atomide.com>
|
||||
---
|
||||
arch/arm/mach-omap2/board-generic.c | 2 +-
|
||||
1 files changed, 1 insertions(+), 1 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
|
||||
index c6ecf60..54db41a 100644
|
||||
--- a/arch/arm/mach-omap2/board-generic.c
|
||||
+++ b/arch/arm/mach-omap2/board-generic.c
|
||||
@@ -72,5 +72,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx")
|
||||
.init_early = omap_generic_init_early,
|
||||
.init_irq = omap2_init_irq,
|
||||
.init_machine = omap_generic_init,
|
||||
- .timer = &omap3_timer,
|
||||
+ .timer = &omap2_timer,
|
||||
MACHINE_END
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+200
@@ -0,0 +1,200 @@
|
||||
From c7cd9749f6092a5411a66a863b98c2cb4ecd86aa Mon Sep 17 00:00:00 2001
|
||||
From: Peter Ujfalusi <peter.ujfalusi@ti.com>
|
||||
Date: Sat, 4 Jun 2011 08:16:41 +0300
|
||||
Subject: [PATCH 022/149] OMAP: New twl-common for common TWL configuration
|
||||
|
||||
Introduce a new file, which will be used to configure
|
||||
common pmic (TWL) devices, regulators, and TWL audio.
|
||||
|
||||
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
|
||||
Acked-by: Tony Lindgren <tony@atomide.com>
|
||||
---
|
||||
arch/arm/mach-omap2/Makefile | 2 +-
|
||||
arch/arm/mach-omap2/common-board-devices.c | 21 -------------
|
||||
arch/arm/mach-omap2/common-board-devices.h | 26 +--------------
|
||||
arch/arm/mach-omap2/twl-common.c | 46 ++++++++++++++++++++++++++++
|
||||
arch/arm/mach-omap2/twl-common.h | 28 +++++++++++++++++
|
||||
5 files changed, 77 insertions(+), 46 deletions(-)
|
||||
create mode 100644 arch/arm/mach-omap2/twl-common.c
|
||||
create mode 100644 arch/arm/mach-omap2/twl-common.h
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
|
||||
index adbe82d..ff1466f 100644
|
||||
--- a/arch/arm/mach-omap2/Makefile
|
||||
+++ b/arch/arm/mach-omap2/Makefile
|
||||
@@ -269,4 +269,4 @@ obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o
|
||||
disp-$(CONFIG_OMAP2_DSS) := display.o
|
||||
obj-y += $(disp-m) $(disp-y)
|
||||
|
||||
-obj-y += common-board-devices.o
|
||||
+obj-y += common-board-devices.o twl-common.o
|
||||
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
|
||||
index 0043fa8..bcb0c58 100644
|
||||
--- a/arch/arm/mach-omap2/common-board-devices.c
|
||||
+++ b/arch/arm/mach-omap2/common-board-devices.c
|
||||
@@ -20,36 +20,15 @@
|
||||
*
|
||||
*/
|
||||
|
||||
-#include <linux/i2c.h>
|
||||
-#include <linux/i2c/twl.h>
|
||||
-
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/ads7846.h>
|
||||
|
||||
-#include <plat/i2c.h>
|
||||
#include <plat/mcspi.h>
|
||||
#include <plat/nand.h>
|
||||
|
||||
#include "common-board-devices.h"
|
||||
|
||||
-static struct i2c_board_info __initdata pmic_i2c_board_info = {
|
||||
- .addr = 0x48,
|
||||
- .flags = I2C_CLIENT_WAKE,
|
||||
-};
|
||||
-
|
||||
-void __init omap_pmic_init(int bus, u32 clkrate,
|
||||
- const char *pmic_type, int pmic_irq,
|
||||
- struct twl4030_platform_data *pmic_data)
|
||||
-{
|
||||
- strncpy(pmic_i2c_board_info.type, pmic_type,
|
||||
- sizeof(pmic_i2c_board_info.type));
|
||||
- pmic_i2c_board_info.irq = pmic_irq;
|
||||
- pmic_i2c_board_info.platform_data = pmic_data;
|
||||
-
|
||||
- omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
|
||||
-}
|
||||
-
|
||||
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
|
||||
defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
|
||||
static struct omap2_mcspi_device_config ads7846_mcspi_config = {
|
||||
diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h
|
||||
index 6797190..a0b4a42 100644
|
||||
--- a/arch/arm/mach-omap2/common-board-devices.h
|
||||
+++ b/arch/arm/mach-omap2/common-board-devices.h
|
||||
@@ -1,33 +1,11 @@
|
||||
#ifndef __OMAP_COMMON_BOARD_DEVICES__
|
||||
#define __OMAP_COMMON_BOARD_DEVICES__
|
||||
|
||||
+#include "twl-common.h"
|
||||
+
|
||||
#define NAND_BLOCK_SIZE SZ_128K
|
||||
|
||||
-struct twl4030_platform_data;
|
||||
struct mtd_partition;
|
||||
-
|
||||
-void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
|
||||
- struct twl4030_platform_data *pmic_data);
|
||||
-
|
||||
-static inline void omap2_pmic_init(const char *pmic_type,
|
||||
- struct twl4030_platform_data *pmic_data)
|
||||
-{
|
||||
- omap_pmic_init(2, 2600, pmic_type, INT_24XX_SYS_NIRQ, pmic_data);
|
||||
-}
|
||||
-
|
||||
-static inline void omap3_pmic_init(const char *pmic_type,
|
||||
- struct twl4030_platform_data *pmic_data)
|
||||
-{
|
||||
- omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data);
|
||||
-}
|
||||
-
|
||||
-static inline void omap4_pmic_init(const char *pmic_type,
|
||||
- struct twl4030_platform_data *pmic_data)
|
||||
-{
|
||||
- /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */
|
||||
- omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data);
|
||||
-}
|
||||
-
|
||||
struct ads7846_platform_data;
|
||||
|
||||
void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
|
||||
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
|
||||
new file mode 100644
|
||||
index 0000000..4f7b24c
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/mach-omap2/twl-common.c
|
||||
@@ -0,0 +1,46 @@
|
||||
+/*
|
||||
+ * twl-common.c
|
||||
+ *
|
||||
+ * Copyright (C) 2011 Texas Instruments, Inc..
|
||||
+ * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or
|
||||
+ * modify it under the terms of the GNU General Public License
|
||||
+ * version 2 as published by the Free Software Foundation.
|
||||
+ *
|
||||
+ * This program is distributed in the hope that it will be useful, but
|
||||
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
+ * General Public License for more details.
|
||||
+ *
|
||||
+ * You should have received a copy of the GNU General Public License
|
||||
+ * along with this program; if not, write to the Free Software
|
||||
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
|
||||
+ * 02110-1301 USA
|
||||
+ *
|
||||
+ */
|
||||
+
|
||||
+#include <linux/i2c.h>
|
||||
+#include <linux/i2c/twl.h>
|
||||
+#include <linux/gpio.h>
|
||||
+
|
||||
+#include <plat/i2c.h>
|
||||
+
|
||||
+#include "twl-common.h"
|
||||
+
|
||||
+static struct i2c_board_info __initdata pmic_i2c_board_info = {
|
||||
+ .addr = 0x48,
|
||||
+ .flags = I2C_CLIENT_WAKE,
|
||||
+};
|
||||
+
|
||||
+void __init omap_pmic_init(int bus, u32 clkrate,
|
||||
+ const char *pmic_type, int pmic_irq,
|
||||
+ struct twl4030_platform_data *pmic_data)
|
||||
+{
|
||||
+ strncpy(pmic_i2c_board_info.type, pmic_type,
|
||||
+ sizeof(pmic_i2c_board_info.type));
|
||||
+ pmic_i2c_board_info.irq = pmic_irq;
|
||||
+ pmic_i2c_board_info.platform_data = pmic_data;
|
||||
+
|
||||
+ omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
|
||||
+}
|
||||
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
|
||||
new file mode 100644
|
||||
index 0000000..e9fe2ab
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/mach-omap2/twl-common.h
|
||||
@@ -0,0 +1,28 @@
|
||||
+#ifndef __OMAP_PMIC_COMMON__
|
||||
+#define __OMAP_PMIC_COMMON__
|
||||
+
|
||||
+struct twl4030_platform_data;
|
||||
+
|
||||
+void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
|
||||
+ struct twl4030_platform_data *pmic_data);
|
||||
+
|
||||
+static inline void omap2_pmic_init(const char *pmic_type,
|
||||
+ struct twl4030_platform_data *pmic_data)
|
||||
+{
|
||||
+ omap_pmic_init(2, 2600, pmic_type, INT_24XX_SYS_NIRQ, pmic_data);
|
||||
+}
|
||||
+
|
||||
+static inline void omap3_pmic_init(const char *pmic_type,
|
||||
+ struct twl4030_platform_data *pmic_data)
|
||||
+{
|
||||
+ omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data);
|
||||
+}
|
||||
+
|
||||
+static inline void omap4_pmic_init(const char *pmic_type,
|
||||
+ struct twl4030_platform_data *pmic_data)
|
||||
+{
|
||||
+ /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */
|
||||
+ omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data);
|
||||
+}
|
||||
+
|
||||
+#endif /* __OMAP_PMIC_COMMON__ */
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+601
@@ -0,0 +1,601 @@
|
||||
From 96fff3aa7a203c74768bfd35dde000653f706d2c Mon Sep 17 00:00:00 2001
|
||||
From: Peter Ujfalusi <peter.ujfalusi@ti.com>
|
||||
Date: Tue, 7 Jun 2011 10:26:46 +0300
|
||||
Subject: [PATCH 023/149] OMAP4: Move common twl6030 configuration to twl-common
|
||||
|
||||
Reduce the amount of duplicated code by moving the common
|
||||
configuration for TWL6030 (on OMAP4 platform) to the
|
||||
twl-common file.
|
||||
Use the omap4_pmic_get_config function from board files to
|
||||
properly configure the PMIC with the common fields.
|
||||
|
||||
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
|
||||
Acked-by: Tony Lindgren <tony@atomide.com>
|
||||
---
|
||||
arch/arm/mach-omap2/board-4430sdp.c | 141 ++-------------------------
|
||||
arch/arm/mach-omap2/board-omap4panda.c | 146 +++--------------------------
|
||||
arch/arm/mach-omap2/twl-common.c | 163 ++++++++++++++++++++++++++++++++
|
||||
arch/arm/mach-omap2/twl-common.h | 20 ++++
|
||||
4 files changed, 205 insertions(+), 265 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
|
||||
index d7df07e..933b25b 100644
|
||||
--- a/arch/arm/mach-omap2/board-4430sdp.c
|
||||
+++ b/arch/arm/mach-omap2/board-4430sdp.c
|
||||
@@ -302,14 +302,6 @@ static struct omap_musb_board_data musb_board_data = {
|
||||
.power = 100,
|
||||
};
|
||||
|
||||
-static struct twl4030_usb_data omap4_usbphy_data = {
|
||||
- .phy_init = omap4430_phy_init,
|
||||
- .phy_exit = omap4430_phy_exit,
|
||||
- .phy_power = omap4430_phy_power,
|
||||
- .phy_set_clock = omap4430_phy_set_clk,
|
||||
- .phy_suspend = omap4430_phy_suspend,
|
||||
-};
|
||||
-
|
||||
static struct omap2_hsmmc_info mmc[] = {
|
||||
{
|
||||
.mmc = 2,
|
||||
@@ -332,10 +324,6 @@ static struct regulator_consumer_supply sdp4430_vaux_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
|
||||
};
|
||||
|
||||
-static struct regulator_consumer_supply sdp4430_vmmc_supply[] = {
|
||||
- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
-};
|
||||
-
|
||||
static int omap4_twl6030_hsmmc_late_init(struct device *dev)
|
||||
{
|
||||
int ret = 0;
|
||||
@@ -394,61 +382,6 @@ static struct regulator_init_data sdp4430_vaux1 = {
|
||||
.consumer_supplies = sdp4430_vaux_supply,
|
||||
};
|
||||
|
||||
-static struct regulator_init_data sdp4430_vaux2 = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1200000,
|
||||
- .max_uV = 2800000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
- | REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data sdp4430_vaux3 = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1000000,
|
||||
- .max_uV = 3000000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
- | REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
-/* VMMC1 for MMC1 card */
|
||||
-static struct regulator_init_data sdp4430_vmmc = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1200000,
|
||||
- .max_uV = 3000000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
- | REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = 1,
|
||||
- .consumer_supplies = sdp4430_vmmc_supply,
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data sdp4430_vpp = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 2500000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
- | REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
static struct regulator_init_data sdp4430_vusim = {
|
||||
.constraints = {
|
||||
.min_uV = 1200000,
|
||||
@@ -462,74 +395,10 @@ static struct regulator_init_data sdp4430_vusim = {
|
||||
},
|
||||
};
|
||||
|
||||
-static struct regulator_init_data sdp4430_vana = {
|
||||
- .constraints = {
|
||||
- .min_uV = 2100000,
|
||||
- .max_uV = 2100000,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data sdp4430_vcxio = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data sdp4430_vdac = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data sdp4430_vusb = {
|
||||
- .constraints = {
|
||||
- .min_uV = 3300000,
|
||||
- .max_uV = 3300000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data sdp4430_clk32kg = {
|
||||
- .constraints = {
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
static struct twl4030_platform_data sdp4430_twldata = {
|
||||
- .irq_base = TWL6030_IRQ_BASE,
|
||||
- .irq_end = TWL6030_IRQ_END,
|
||||
-
|
||||
/* Regulators */
|
||||
- .vmmc = &sdp4430_vmmc,
|
||||
- .vpp = &sdp4430_vpp,
|
||||
.vusim = &sdp4430_vusim,
|
||||
- .vana = &sdp4430_vana,
|
||||
- .vcxio = &sdp4430_vcxio,
|
||||
- .vdac = &sdp4430_vdac,
|
||||
- .vusb = &sdp4430_vusb,
|
||||
.vaux1 = &sdp4430_vaux1,
|
||||
- .vaux2 = &sdp4430_vaux2,
|
||||
- .vaux3 = &sdp4430_vaux3,
|
||||
- .clk32kg = &sdp4430_clk32kg,
|
||||
- .usb = &omap4_usbphy_data
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata sdp4430_i2c_3_boardinfo[] = {
|
||||
@@ -547,6 +416,16 @@ static struct i2c_board_info __initdata sdp4430_i2c_4_boardinfo[] = {
|
||||
};
|
||||
static int __init omap4_i2c_init(void)
|
||||
{
|
||||
+ omap4_pmic_get_config(&sdp4430_twldata, TWL_COMMON_PDATA_USB,
|
||||
+ TWL_COMMON_REGULATOR_VDAC |
|
||||
+ TWL_COMMON_REGULATOR_VAUX2 |
|
||||
+ TWL_COMMON_REGULATOR_VAUX3 |
|
||||
+ TWL_COMMON_REGULATOR_VMMC |
|
||||
+ TWL_COMMON_REGULATOR_VPP |
|
||||
+ TWL_COMMON_REGULATOR_VANA |
|
||||
+ TWL_COMMON_REGULATOR_VCXIO |
|
||||
+ TWL_COMMON_REGULATOR_VUSB |
|
||||
+ TWL_COMMON_REGULATOR_CLK32KG);
|
||||
omap4_pmic_init("twl6030", &sdp4430_twldata);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo,
|
||||
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
|
||||
index ee2034e..9aaa960 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap4panda.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap4panda.c
|
||||
@@ -154,14 +154,6 @@ static struct omap_musb_board_data musb_board_data = {
|
||||
.power = 100,
|
||||
};
|
||||
|
||||
-static struct twl4030_usb_data omap4_usbphy_data = {
|
||||
- .phy_init = omap4430_phy_init,
|
||||
- .phy_exit = omap4430_phy_exit,
|
||||
- .phy_power = omap4430_phy_power,
|
||||
- .phy_set_clock = omap4430_phy_set_clk,
|
||||
- .phy_suspend = omap4430_phy_suspend,
|
||||
-};
|
||||
-
|
||||
static struct omap2_hsmmc_info mmc[] = {
|
||||
{
|
||||
.mmc = 1,
|
||||
@@ -181,10 +173,6 @@ static struct omap2_hsmmc_info mmc[] = {
|
||||
{} /* Terminator */
|
||||
};
|
||||
|
||||
-static struct regulator_consumer_supply omap4_panda_vmmc_supply[] = {
|
||||
- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
-};
|
||||
-
|
||||
static struct regulator_consumer_supply omap4_panda_vmmc5_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.4"),
|
||||
};
|
||||
@@ -269,128 +257,8 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
|
||||
return 0;
|
||||
}
|
||||
|
||||
-static struct regulator_init_data omap4_panda_vaux2 = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1200000,
|
||||
- .max_uV = 2800000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
- | REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data omap4_panda_vaux3 = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1000000,
|
||||
- .max_uV = 3000000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
- | REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
-/* VMMC1 for MMC1 card */
|
||||
-static struct regulator_init_data omap4_panda_vmmc = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1200000,
|
||||
- .max_uV = 3000000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
- | REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(omap4_panda_vmmc_supply),
|
||||
- .consumer_supplies = omap4_panda_vmmc_supply,
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data omap4_panda_vpp = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 2500000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
- | REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data omap4_panda_vana = {
|
||||
- .constraints = {
|
||||
- .min_uV = 2100000,
|
||||
- .max_uV = 2100000,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data omap4_panda_vcxio = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data omap4_panda_vdac = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data omap4_panda_vusb = {
|
||||
- .constraints = {
|
||||
- .min_uV = 3300000,
|
||||
- .max_uV = 3300000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data omap4_panda_clk32kg = {
|
||||
- .constraints = {
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
-static struct twl4030_platform_data omap4_panda_twldata = {
|
||||
- .irq_base = TWL6030_IRQ_BASE,
|
||||
- .irq_end = TWL6030_IRQ_END,
|
||||
-
|
||||
- /* Regulators */
|
||||
- .vmmc = &omap4_panda_vmmc,
|
||||
- .vpp = &omap4_panda_vpp,
|
||||
- .vana = &omap4_panda_vana,
|
||||
- .vcxio = &omap4_panda_vcxio,
|
||||
- .vdac = &omap4_panda_vdac,
|
||||
- .vusb = &omap4_panda_vusb,
|
||||
- .vaux2 = &omap4_panda_vaux2,
|
||||
- .vaux3 = &omap4_panda_vaux3,
|
||||
- .clk32kg = &omap4_panda_clk32kg,
|
||||
- .usb = &omap4_usbphy_data,
|
||||
-};
|
||||
+/* Panda board uses the common PMIC configuration */
|
||||
+static struct twl4030_platform_data omap4_panda_twldata;
|
||||
|
||||
/*
|
||||
* Display monitor features are burnt in their EEPROM as EDID data. The EEPROM
|
||||
@@ -404,6 +272,16 @@ static struct i2c_board_info __initdata panda_i2c_eeprom[] = {
|
||||
|
||||
static int __init omap4_panda_i2c_init(void)
|
||||
{
|
||||
+ omap4_pmic_get_config(&omap4_panda_twldata, TWL_COMMON_PDATA_USB,
|
||||
+ TWL_COMMON_REGULATOR_VDAC |
|
||||
+ TWL_COMMON_REGULATOR_VAUX2 |
|
||||
+ TWL_COMMON_REGULATOR_VAUX3 |
|
||||
+ TWL_COMMON_REGULATOR_VMMC |
|
||||
+ TWL_COMMON_REGULATOR_VPP |
|
||||
+ TWL_COMMON_REGULATOR_VANA |
|
||||
+ TWL_COMMON_REGULATOR_VCXIO |
|
||||
+ TWL_COMMON_REGULATOR_VUSB |
|
||||
+ TWL_COMMON_REGULATOR_CLK32KG);
|
||||
omap4_pmic_init("twl6030", &omap4_panda_twldata);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
/*
|
||||
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
|
||||
index 4f7b24c..cf80f4c 100644
|
||||
--- a/arch/arm/mach-omap2/twl-common.c
|
||||
+++ b/arch/arm/mach-omap2/twl-common.c
|
||||
@@ -23,8 +23,11 @@
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/i2c/twl.h>
|
||||
#include <linux/gpio.h>
|
||||
+#include <linux/regulator/machine.h>
|
||||
+#include <linux/regulator/fixed.h>
|
||||
|
||||
#include <plat/i2c.h>
|
||||
+#include <plat/usb.h>
|
||||
|
||||
#include "twl-common.h"
|
||||
|
||||
@@ -44,3 +47,163 @@ void __init omap_pmic_init(int bus, u32 clkrate,
|
||||
|
||||
omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
|
||||
}
|
||||
+
|
||||
+static struct twl4030_usb_data omap4_usb_pdata = {
|
||||
+ .phy_init = omap4430_phy_init,
|
||||
+ .phy_exit = omap4430_phy_exit,
|
||||
+ .phy_power = omap4430_phy_power,
|
||||
+ .phy_set_clock = omap4430_phy_set_clk,
|
||||
+ .phy_suspend = omap4430_phy_suspend,
|
||||
+};
|
||||
+
|
||||
+static struct regulator_init_data omap4_vdac_idata = {
|
||||
+ .constraints = {
|
||||
+ .min_uV = 1800000,
|
||||
+ .max_uV = 1800000,
|
||||
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
+ | REGULATOR_MODE_STANDBY,
|
||||
+ .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
+ | REGULATOR_CHANGE_STATUS,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static struct regulator_init_data omap4_vaux2_idata = {
|
||||
+ .constraints = {
|
||||
+ .min_uV = 1200000,
|
||||
+ .max_uV = 2800000,
|
||||
+ .apply_uV = true,
|
||||
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
+ | REGULATOR_MODE_STANDBY,
|
||||
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
+ | REGULATOR_CHANGE_MODE
|
||||
+ | REGULATOR_CHANGE_STATUS,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static struct regulator_init_data omap4_vaux3_idata = {
|
||||
+ .constraints = {
|
||||
+ .min_uV = 1000000,
|
||||
+ .max_uV = 3000000,
|
||||
+ .apply_uV = true,
|
||||
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
+ | REGULATOR_MODE_STANDBY,
|
||||
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
+ | REGULATOR_CHANGE_MODE
|
||||
+ | REGULATOR_CHANGE_STATUS,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static struct regulator_consumer_supply omap4_vmmc_supply[] = {
|
||||
+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
+};
|
||||
+
|
||||
+/* VMMC1 for MMC1 card */
|
||||
+static struct regulator_init_data omap4_vmmc_idata = {
|
||||
+ .constraints = {
|
||||
+ .min_uV = 1200000,
|
||||
+ .max_uV = 3000000,
|
||||
+ .apply_uV = true,
|
||||
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
+ | REGULATOR_MODE_STANDBY,
|
||||
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
+ | REGULATOR_CHANGE_MODE
|
||||
+ | REGULATOR_CHANGE_STATUS,
|
||||
+ },
|
||||
+ .num_consumer_supplies = ARRAY_SIZE(omap4_vmmc_supply),
|
||||
+ .consumer_supplies = omap4_vmmc_supply,
|
||||
+};
|
||||
+
|
||||
+static struct regulator_init_data omap4_vpp_idata = {
|
||||
+ .constraints = {
|
||||
+ .min_uV = 1800000,
|
||||
+ .max_uV = 2500000,
|
||||
+ .apply_uV = true,
|
||||
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
+ | REGULATOR_MODE_STANDBY,
|
||||
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
+ | REGULATOR_CHANGE_MODE
|
||||
+ | REGULATOR_CHANGE_STATUS,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static struct regulator_init_data omap4_vana_idata = {
|
||||
+ .constraints = {
|
||||
+ .min_uV = 2100000,
|
||||
+ .max_uV = 2100000,
|
||||
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
+ | REGULATOR_MODE_STANDBY,
|
||||
+ .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
+ | REGULATOR_CHANGE_STATUS,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static struct regulator_init_data omap4_vcxio_idata = {
|
||||
+ .constraints = {
|
||||
+ .min_uV = 1800000,
|
||||
+ .max_uV = 1800000,
|
||||
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
+ | REGULATOR_MODE_STANDBY,
|
||||
+ .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
+ | REGULATOR_CHANGE_STATUS,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static struct regulator_init_data omap4_vusb_idata = {
|
||||
+ .constraints = {
|
||||
+ .min_uV = 3300000,
|
||||
+ .max_uV = 3300000,
|
||||
+ .apply_uV = true,
|
||||
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
+ | REGULATOR_MODE_STANDBY,
|
||||
+ .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
+ | REGULATOR_CHANGE_STATUS,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static struct regulator_init_data omap4_clk32kg_idata = {
|
||||
+ .constraints = {
|
||||
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
|
||||
+ u32 pdata_flags, u32 regulators_flags)
|
||||
+{
|
||||
+ if (!pmic_data->irq_base)
|
||||
+ pmic_data->irq_base = TWL6030_IRQ_BASE;
|
||||
+ if (!pmic_data->irq_end)
|
||||
+ pmic_data->irq_end = TWL6030_IRQ_END;
|
||||
+
|
||||
+ /* Common platform data configurations */
|
||||
+ if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
|
||||
+ pmic_data->usb = &omap4_usb_pdata;
|
||||
+
|
||||
+ /* Common regulator configurations */
|
||||
+ if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
|
||||
+ pmic_data->vdac = &omap4_vdac_idata;
|
||||
+
|
||||
+ if (regulators_flags & TWL_COMMON_REGULATOR_VAUX2 && !pmic_data->vaux2)
|
||||
+ pmic_data->vaux2 = &omap4_vaux2_idata;
|
||||
+
|
||||
+ if (regulators_flags & TWL_COMMON_REGULATOR_VAUX3 && !pmic_data->vaux3)
|
||||
+ pmic_data->vaux3 = &omap4_vaux3_idata;
|
||||
+
|
||||
+ if (regulators_flags & TWL_COMMON_REGULATOR_VMMC && !pmic_data->vmmc)
|
||||
+ pmic_data->vmmc = &omap4_vmmc_idata;
|
||||
+
|
||||
+ if (regulators_flags & TWL_COMMON_REGULATOR_VPP && !pmic_data->vpp)
|
||||
+ pmic_data->vpp = &omap4_vpp_idata;
|
||||
+
|
||||
+ if (regulators_flags & TWL_COMMON_REGULATOR_VANA && !pmic_data->vana)
|
||||
+ pmic_data->vana = &omap4_vana_idata;
|
||||
+
|
||||
+ if (regulators_flags & TWL_COMMON_REGULATOR_VCXIO && !pmic_data->vcxio)
|
||||
+ pmic_data->vcxio = &omap4_vcxio_idata;
|
||||
+
|
||||
+ if (regulators_flags & TWL_COMMON_REGULATOR_VUSB && !pmic_data->vusb)
|
||||
+ pmic_data->vusb = &omap4_vusb_idata;
|
||||
+
|
||||
+ if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG &&
|
||||
+ !pmic_data->clk32kg)
|
||||
+ pmic_data->clk32kg = &omap4_clk32kg_idata;
|
||||
+}
|
||||
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
|
||||
index e9fe2ab..d96c289 100644
|
||||
--- a/arch/arm/mach-omap2/twl-common.h
|
||||
+++ b/arch/arm/mach-omap2/twl-common.h
|
||||
@@ -1,6 +1,23 @@
|
||||
#ifndef __OMAP_PMIC_COMMON__
|
||||
#define __OMAP_PMIC_COMMON__
|
||||
|
||||
+#define TWL_COMMON_PDATA_USB (1 << 0)
|
||||
+
|
||||
+/* Common LDO regulators for TWL4030/TWL6030 */
|
||||
+#define TWL_COMMON_REGULATOR_VDAC (1 << 0)
|
||||
+#define TWL_COMMON_REGULATOR_VAUX1 (1 << 1)
|
||||
+#define TWL_COMMON_REGULATOR_VAUX2 (1 << 2)
|
||||
+#define TWL_COMMON_REGULATOR_VAUX3 (1 << 3)
|
||||
+
|
||||
+/* TWL6030 LDO regulators */
|
||||
+#define TWL_COMMON_REGULATOR_VMMC (1 << 4)
|
||||
+#define TWL_COMMON_REGULATOR_VPP (1 << 5)
|
||||
+#define TWL_COMMON_REGULATOR_VUSIM (1 << 6)
|
||||
+#define TWL_COMMON_REGULATOR_VANA (1 << 7)
|
||||
+#define TWL_COMMON_REGULATOR_VCXIO (1 << 8)
|
||||
+#define TWL_COMMON_REGULATOR_VUSB (1 << 9)
|
||||
+#define TWL_COMMON_REGULATOR_CLK32KG (1 << 10)
|
||||
+
|
||||
struct twl4030_platform_data;
|
||||
|
||||
void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
|
||||
@@ -25,4 +42,7 @@ static inline void omap4_pmic_init(const char *pmic_type,
|
||||
omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data);
|
||||
}
|
||||
|
||||
+void omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
|
||||
+ u32 pdata_flags, u32 regulators_flags);
|
||||
+
|
||||
#endif /* __OMAP_PMIC_COMMON__ */
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+827
@@ -0,0 +1,827 @@
|
||||
From 7f52cd416de3100e27599382f8dfea45ed1a6d45 Mon Sep 17 00:00:00 2001
|
||||
From: Peter Ujfalusi <peter.ujfalusi@ti.com>
|
||||
Date: Tue, 7 Jun 2011 10:28:54 +0300
|
||||
Subject: [PATCH 024/149] OMAP3: Move common twl configuration to twl-common
|
||||
|
||||
Reduce the amount of duplicated code by moving the common
|
||||
configuration for twl4030/5030/tpsxx to the twl-common file.
|
||||
Use the omap3_pmic_get_config function from board files to
|
||||
properly configure the PMIC with the common fields.
|
||||
|
||||
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
|
||||
Acked-by: Tony Lindgren <tony@atomide.com>
|
||||
---
|
||||
arch/arm/mach-omap2/board-3430sdp.c | 42 ++------------------
|
||||
arch/arm/mach-omap2/board-cm-t35.c | 9 +----
|
||||
arch/arm/mach-omap2/board-devkit8000.c | 18 +--------
|
||||
arch/arm/mach-omap2/board-igep0020.c | 20 ++--------
|
||||
arch/arm/mach-omap2/board-ldp.c | 15 +------
|
||||
arch/arm/mach-omap2/board-omap3beagle.c | 18 +--------
|
||||
arch/arm/mach-omap2/board-omap3evm.c | 24 +----------
|
||||
arch/arm/mach-omap2/board-omap3pandora.c | 17 +-------
|
||||
arch/arm/mach-omap2/board-omap3stalker.c | 24 +----------
|
||||
arch/arm/mach-omap2/board-omap3touchbook.c | 19 +--------
|
||||
arch/arm/mach-omap2/board-overo.c | 17 +-------
|
||||
arch/arm/mach-omap2/board-rm680.c | 8 +---
|
||||
arch/arm/mach-omap2/board-rx51-peripherals.c | 15 +------
|
||||
arch/arm/mach-omap2/board-zoom-peripherals.c | 51 +++++--------------------
|
||||
arch/arm/mach-omap2/twl-common.c | 53 ++++++++++++++++++++++++++
|
||||
arch/arm/mach-omap2/twl-common.h | 6 +++
|
||||
16 files changed, 99 insertions(+), 257 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
|
||||
index 12fae21..8bbd4e0 100644
|
||||
--- a/arch/arm/mach-omap2/board-3430sdp.c
|
||||
+++ b/arch/arm/mach-omap2/board-3430sdp.c
|
||||
@@ -231,22 +231,6 @@ static void __init omap_3430sdp_init_early(void)
|
||||
omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL);
|
||||
}
|
||||
|
||||
-static int sdp3430_batt_table[] = {
|
||||
-/* 0 C*/
|
||||
-30800, 29500, 28300, 27100,
|
||||
-26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
|
||||
-17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
|
||||
-11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
|
||||
-8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
|
||||
-5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
|
||||
-4040, 3910, 3790, 3670, 3550
|
||||
-};
|
||||
-
|
||||
-static struct twl4030_bci_platform_data sdp3430_bci_data = {
|
||||
- .battery_tmp_tbl = sdp3430_batt_table,
|
||||
- .tblsize = ARRAY_SIZE(sdp3430_batt_table),
|
||||
-};
|
||||
-
|
||||
static struct omap2_hsmmc_info mmc[] = {
|
||||
{
|
||||
.mmc = 1,
|
||||
@@ -292,14 +276,6 @@ static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
|
||||
.setup = sdp3430_twl_gpio_setup,
|
||||
};
|
||||
|
||||
-static struct twl4030_usb_data sdp3430_usb_data = {
|
||||
- .usb_mode = T2_USB_MODE_ULPI,
|
||||
-};
|
||||
-
|
||||
-static struct twl4030_madc_platform_data sdp3430_madc_data = {
|
||||
- .irq_line = 1,
|
||||
-};
|
||||
-
|
||||
/* regulator consumer mappings */
|
||||
|
||||
/* ads7846 on SPI */
|
||||
@@ -463,24 +439,10 @@ static struct regulator_init_data sdp3430_vpll2 = {
|
||||
.consumer_supplies = sdp3430_vpll2_supplies,
|
||||
};
|
||||
|
||||
-static struct twl4030_codec_audio_data sdp3430_audio;
|
||||
-
|
||||
-static struct twl4030_codec_data sdp3430_codec = {
|
||||
- .audio_mclk = 26000000,
|
||||
- .audio = &sdp3430_audio,
|
||||
-};
|
||||
-
|
||||
static struct twl4030_platform_data sdp3430_twldata = {
|
||||
- .irq_base = TWL4030_IRQ_BASE,
|
||||
- .irq_end = TWL4030_IRQ_END,
|
||||
-
|
||||
/* platform_data for children goes here */
|
||||
- .bci = &sdp3430_bci_data,
|
||||
.gpio = &sdp3430_gpio_data,
|
||||
- .madc = &sdp3430_madc_data,
|
||||
.keypad = &sdp3430_kp_data,
|
||||
- .usb = &sdp3430_usb_data,
|
||||
- .codec = &sdp3430_codec,
|
||||
|
||||
.vaux1 = &sdp3430_vaux1,
|
||||
.vaux2 = &sdp3430_vaux2,
|
||||
@@ -496,7 +458,11 @@ static struct twl4030_platform_data sdp3430_twldata = {
|
||||
static int __init omap3430_i2c_init(void)
|
||||
{
|
||||
/* i2c1 for PMIC only */
|
||||
+ omap3_pmic_get_config(&sdp3430_twldata,
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
|
||||
+ TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, 0);
|
||||
omap3_pmic_init("twl4030", &sdp3430_twldata);
|
||||
+
|
||||
/* i2c2 on camera connector (for sensor control) and optional isp1301 */
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
/* i2c3 on display connector (for DVI, tfp410) */
|
||||
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
|
||||
index d76dca7..cb00abc 100644
|
||||
--- a/arch/arm/mach-omap2/board-cm-t35.c
|
||||
+++ b/arch/arm/mach-omap2/board-cm-t35.c
|
||||
@@ -410,10 +410,6 @@ static struct regulator_init_data cm_t35_vpll2 = {
|
||||
.consumer_supplies = cm_t35_vdvi_supply,
|
||||
};
|
||||
|
||||
-static struct twl4030_usb_data cm_t35_usb_data = {
|
||||
- .usb_mode = T2_USB_MODE_ULPI,
|
||||
-};
|
||||
-
|
||||
static uint32_t cm_t35_keymap[] = {
|
||||
KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
|
||||
KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
|
||||
@@ -492,12 +488,8 @@ static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data cm_t35_twldata = {
|
||||
- .irq_base = TWL4030_IRQ_BASE,
|
||||
- .irq_end = TWL4030_IRQ_END,
|
||||
-
|
||||
/* platform_data for children goes here */
|
||||
.keypad = &cm_t35_kp_data,
|
||||
- .usb = &cm_t35_usb_data,
|
||||
.gpio = &cm_t35_gpio_data,
|
||||
.vmmc1 = &cm_t35_vmmc1,
|
||||
.vsim = &cm_t35_vsim,
|
||||
@@ -507,6 +499,7 @@ static struct twl4030_platform_data cm_t35_twldata = {
|
||||
|
||||
static void __init cm_t35_init_i2c(void)
|
||||
{
|
||||
+ omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, 0);
|
||||
omap3_pmic_init("tps65930", &cm_t35_twldata);
|
||||
}
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
|
||||
index 949dbea..364942e 100644
|
||||
--- a/arch/arm/mach-omap2/board-devkit8000.c
|
||||
+++ b/arch/arm/mach-omap2/board-devkit8000.c
|
||||
@@ -332,25 +332,9 @@ static struct regulator_init_data devkit8000_vio = {
|
||||
.consumer_supplies = devkit8000_vio_supply,
|
||||
};
|
||||
|
||||
-static struct twl4030_usb_data devkit8000_usb_data = {
|
||||
- .usb_mode = T2_USB_MODE_ULPI,
|
||||
-};
|
||||
-
|
||||
-static struct twl4030_codec_audio_data devkit8000_audio_data;
|
||||
-
|
||||
-static struct twl4030_codec_data devkit8000_codec_data = {
|
||||
- .audio_mclk = 26000000,
|
||||
- .audio = &devkit8000_audio_data,
|
||||
-};
|
||||
-
|
||||
static struct twl4030_platform_data devkit8000_twldata = {
|
||||
- .irq_base = TWL4030_IRQ_BASE,
|
||||
- .irq_end = TWL4030_IRQ_END,
|
||||
-
|
||||
/* platform_data for children goes here */
|
||||
- .usb = &devkit8000_usb_data,
|
||||
.gpio = &devkit8000_gpio_data,
|
||||
- .codec = &devkit8000_codec_data,
|
||||
.vmmc1 = &devkit8000_vmmc1,
|
||||
.vdac = &devkit8000_vdac,
|
||||
.vpll1 = &devkit8000_vpll1,
|
||||
@@ -360,6 +344,8 @@ static struct twl4030_platform_data devkit8000_twldata = {
|
||||
|
||||
static int __init devkit8000_i2c_init(void)
|
||||
{
|
||||
+ omap3_pmic_get_config(&devkit8000_twldata,
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0);
|
||||
omap3_pmic_init("tps65930", &devkit8000_twldata);
|
||||
/* Bus 3 is attached to the DVI port where devices like the pico DLP
|
||||
* projector don't work reliably with 400kHz */
|
||||
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
|
||||
index f683835..e0a6687 100644
|
||||
--- a/arch/arm/mach-omap2/board-igep0020.c
|
||||
+++ b/arch/arm/mach-omap2/board-igep0020.c
|
||||
@@ -443,10 +443,6 @@ static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = {
|
||||
.setup = igep_twl_gpio_setup,
|
||||
};
|
||||
|
||||
-static struct twl4030_usb_data igep_usb_data = {
|
||||
- .usb_mode = T2_USB_MODE_ULPI,
|
||||
-};
|
||||
-
|
||||
static int igep2_enable_dvi(struct omap_dss_device *dssdev)
|
||||
{
|
||||
gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1);
|
||||
@@ -522,13 +518,6 @@ static void __init igep_init_early(void)
|
||||
m65kxxxxam_sdrc_params);
|
||||
}
|
||||
|
||||
-static struct twl4030_codec_audio_data igep2_audio_data;
|
||||
-
|
||||
-static struct twl4030_codec_data igep2_codec_data = {
|
||||
- .audio_mclk = 26000000,
|
||||
- .audio = &igep2_audio_data,
|
||||
-};
|
||||
-
|
||||
static int igep2_keymap[] = {
|
||||
KEY(0, 0, KEY_LEFT),
|
||||
KEY(0, 1, KEY_RIGHT),
|
||||
@@ -561,11 +550,7 @@ static struct twl4030_keypad_data igep2_keypad_pdata = {
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data igep_twldata = {
|
||||
- .irq_base = TWL4030_IRQ_BASE,
|
||||
- .irq_end = TWL4030_IRQ_END,
|
||||
-
|
||||
/* platform_data for children goes here */
|
||||
- .usb = &igep_usb_data,
|
||||
.gpio = &igep_twl4030_gpio_pdata,
|
||||
.vmmc1 = &igep_vmmc1,
|
||||
.vio = &igep_vio,
|
||||
@@ -581,6 +566,8 @@ static void __init igep_i2c_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
+ omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_USB, 0);
|
||||
+
|
||||
if (machine_is_igep0020()) {
|
||||
/*
|
||||
* Bus 3 is attached to the DVI port where devices like the
|
||||
@@ -591,9 +578,10 @@ static void __init igep_i2c_init(void)
|
||||
if (ret)
|
||||
pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret);
|
||||
|
||||
- igep_twldata.codec = &igep2_codec_data;
|
||||
igep_twldata.keypad = &igep2_keypad_pdata;
|
||||
igep_twldata.vpll2 = &igep2_vpll2;
|
||||
+ /* Use common codec data */
|
||||
+ omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO, 0);
|
||||
}
|
||||
|
||||
omap3_pmic_init("twl4030", &igep_twldata);
|
||||
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
|
||||
index 5d4328f..218764c 100644
|
||||
--- a/arch/arm/mach-omap2/board-ldp.c
|
||||
+++ b/arch/arm/mach-omap2/board-ldp.c
|
||||
@@ -199,20 +199,12 @@ static void __init omap_ldp_init_early(void)
|
||||
omap2_init_common_devices(NULL, NULL);
|
||||
}
|
||||
|
||||
-static struct twl4030_usb_data ldp_usb_data = {
|
||||
- .usb_mode = T2_USB_MODE_ULPI,
|
||||
-};
|
||||
-
|
||||
static struct twl4030_gpio_platform_data ldp_gpio_data = {
|
||||
.gpio_base = OMAP_MAX_GPIO_LINES,
|
||||
.irq_base = TWL4030_GPIO_IRQ_BASE,
|
||||
.irq_end = TWL4030_GPIO_IRQ_END,
|
||||
};
|
||||
|
||||
-static struct twl4030_madc_platform_data ldp_madc_data = {
|
||||
- .irq_line = 1,
|
||||
-};
|
||||
-
|
||||
static struct regulator_consumer_supply ldp_vmmc1_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
@@ -253,12 +245,7 @@ static struct regulator_init_data ldp_vaux1 = {
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data ldp_twldata = {
|
||||
- .irq_base = TWL4030_IRQ_BASE,
|
||||
- .irq_end = TWL4030_IRQ_END,
|
||||
-
|
||||
/* platform_data for children goes here */
|
||||
- .madc = &ldp_madc_data,
|
||||
- .usb = &ldp_usb_data,
|
||||
.vmmc1 = &ldp_vmmc1,
|
||||
.vaux1 = &ldp_vaux1,
|
||||
.gpio = &ldp_gpio_data,
|
||||
@@ -267,6 +254,8 @@ static struct twl4030_platform_data ldp_twldata = {
|
||||
|
||||
static int __init omap_i2c_init(void)
|
||||
{
|
||||
+ omap3_pmic_get_config(&ldp_twldata,
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, 0);
|
||||
omap3_pmic_init("twl4030", &ldp_twldata);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
omap_register_i2c_bus(3, 400, NULL, 0);
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
index 2d8dfb3..ec61e9c 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
@@ -380,25 +380,9 @@ static struct regulator_init_data beagle_vpll2 = {
|
||||
.consumer_supplies = beagle_vdvi_supplies,
|
||||
};
|
||||
|
||||
-static struct twl4030_usb_data beagle_usb_data = {
|
||||
- .usb_mode = T2_USB_MODE_ULPI,
|
||||
-};
|
||||
-
|
||||
-static struct twl4030_codec_audio_data beagle_audio_data;
|
||||
-
|
||||
-static struct twl4030_codec_data beagle_codec_data = {
|
||||
- .audio_mclk = 26000000,
|
||||
- .audio = &beagle_audio_data,
|
||||
-};
|
||||
-
|
||||
static struct twl4030_platform_data beagle_twldata = {
|
||||
- .irq_base = TWL4030_IRQ_BASE,
|
||||
- .irq_end = TWL4030_IRQ_END,
|
||||
-
|
||||
/* platform_data for children goes here */
|
||||
- .usb = &beagle_usb_data,
|
||||
.gpio = &beagle_gpio_data,
|
||||
- .codec = &beagle_codec_data,
|
||||
.vmmc1 = &beagle_vmmc1,
|
||||
.vsim = &beagle_vsim,
|
||||
.vdac = &beagle_vdac,
|
||||
@@ -413,6 +397,8 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = {
|
||||
|
||||
static int __init omap3_beagle_i2c_init(void)
|
||||
{
|
||||
+ omap3_pmic_get_config(&beagle_twldata,
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0);
|
||||
omap3_pmic_init("twl4030", &beagle_twldata);
|
||||
/* Bus 3 is attached to the DVI port where devices like the pico DLP
|
||||
* projector don't work reliably with 400kHz */
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
|
||||
index 57bce0f..1ca298a 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3evm.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3evm.c
|
||||
@@ -396,10 +396,6 @@ static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
|
||||
.setup = omap3evm_twl_gpio_setup,
|
||||
};
|
||||
|
||||
-static struct twl4030_usb_data omap3evm_usb_data = {
|
||||
- .usb_mode = T2_USB_MODE_ULPI,
|
||||
-};
|
||||
-
|
||||
static uint32_t board_keymap[] = {
|
||||
KEY(0, 0, KEY_LEFT),
|
||||
KEY(0, 1, KEY_DOWN),
|
||||
@@ -434,17 +430,6 @@ static struct twl4030_keypad_data omap3evm_kp_data = {
|
||||
.rep = 1,
|
||||
};
|
||||
|
||||
-static struct twl4030_madc_platform_data omap3evm_madc_data = {
|
||||
- .irq_line = 1,
|
||||
-};
|
||||
-
|
||||
-static struct twl4030_codec_audio_data omap3evm_audio_data;
|
||||
-
|
||||
-static struct twl4030_codec_data omap3evm_codec_data = {
|
||||
- .audio_mclk = 26000000,
|
||||
- .audio = &omap3evm_audio_data,
|
||||
-};
|
||||
-
|
||||
static struct regulator_consumer_supply omap3_evm_vdda_dac_supply[] = {
|
||||
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
|
||||
};
|
||||
@@ -547,15 +532,9 @@ struct wl12xx_platform_data omap3evm_wlan_data __initdata = {
|
||||
#endif
|
||||
|
||||
static struct twl4030_platform_data omap3evm_twldata = {
|
||||
- .irq_base = TWL4030_IRQ_BASE,
|
||||
- .irq_end = TWL4030_IRQ_END,
|
||||
-
|
||||
/* platform_data for children goes here */
|
||||
.keypad = &omap3evm_kp_data,
|
||||
- .madc = &omap3evm_madc_data,
|
||||
- .usb = &omap3evm_usb_data,
|
||||
.gpio = &omap3evm_gpio_data,
|
||||
- .codec = &omap3evm_codec_data,
|
||||
.vdac = &omap3_evm_vdac,
|
||||
.vpll2 = &omap3_evm_vpll2,
|
||||
.vio = &omap3evm_vio,
|
||||
@@ -565,6 +544,9 @@ static struct twl4030_platform_data omap3evm_twldata = {
|
||||
|
||||
static int __init omap3_evm_i2c_init(void)
|
||||
{
|
||||
+ omap3_pmic_get_config(&omap3evm_twldata,
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
|
||||
+ TWL_COMMON_PDATA_AUDIO, 0);
|
||||
omap3_pmic_init("twl4030", &omap3evm_twldata);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
omap_register_i2c_bus(3, 400, NULL, 0);
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
|
||||
index d4ea940..f5abf76 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3pandora.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
|
||||
@@ -508,25 +508,10 @@ static struct platform_device pandora_vwlan_device = {
|
||||
},
|
||||
};
|
||||
|
||||
-static struct twl4030_usb_data omap3pandora_usb_data = {
|
||||
- .usb_mode = T2_USB_MODE_ULPI,
|
||||
-};
|
||||
-
|
||||
-static struct twl4030_codec_audio_data omap3pandora_audio_data;
|
||||
-
|
||||
-static struct twl4030_codec_data omap3pandora_codec_data = {
|
||||
- .audio_mclk = 26000000,
|
||||
- .audio = &omap3pandora_audio_data,
|
||||
-};
|
||||
-
|
||||
static struct twl4030_bci_platform_data pandora_bci_data;
|
||||
|
||||
static struct twl4030_platform_data omap3pandora_twldata = {
|
||||
- .irq_base = TWL4030_IRQ_BASE,
|
||||
- .irq_end = TWL4030_IRQ_END,
|
||||
.gpio = &omap3pandora_gpio_data,
|
||||
- .usb = &omap3pandora_usb_data,
|
||||
- .codec = &omap3pandora_codec_data,
|
||||
.vmmc1 = &pandora_vmmc1,
|
||||
.vmmc2 = &pandora_vmmc2,
|
||||
.vdac = &pandora_vdac,
|
||||
@@ -548,6 +533,8 @@ static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = {
|
||||
|
||||
static int __init omap3pandora_i2c_init(void)
|
||||
{
|
||||
+ omap3_pmic_get_config(&omap3pandora_twldata,
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0);
|
||||
omap3_pmic_init("tps65950", &omap3pandora_twldata);
|
||||
/* i2c2 pins are not connected */
|
||||
omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo,
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
index b8ad4dd..6e59e59 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
@@ -349,10 +349,6 @@ static struct twl4030_gpio_platform_data omap3stalker_gpio_data = {
|
||||
.setup = omap3stalker_twl_gpio_setup,
|
||||
};
|
||||
|
||||
-static struct twl4030_usb_data omap3stalker_usb_data = {
|
||||
- .usb_mode = T2_USB_MODE_ULPI,
|
||||
-};
|
||||
-
|
||||
static uint32_t board_keymap[] = {
|
||||
KEY(0, 0, KEY_LEFT),
|
||||
KEY(0, 1, KEY_DOWN),
|
||||
@@ -387,17 +383,6 @@ static struct twl4030_keypad_data omap3stalker_kp_data = {
|
||||
.rep = 1,
|
||||
};
|
||||
|
||||
-static struct twl4030_madc_platform_data omap3stalker_madc_data = {
|
||||
- .irq_line = 1,
|
||||
-};
|
||||
-
|
||||
-static struct twl4030_codec_audio_data omap3stalker_audio_data;
|
||||
-
|
||||
-static struct twl4030_codec_data omap3stalker_codec_data = {
|
||||
- .audio_mclk = 26000000,
|
||||
- .audio = &omap3stalker_audio_data,
|
||||
-};
|
||||
-
|
||||
static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply[] = {
|
||||
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
|
||||
};
|
||||
@@ -439,15 +424,9 @@ static struct regulator_init_data omap3_stalker_vpll2 = {
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data omap3stalker_twldata = {
|
||||
- .irq_base = TWL4030_IRQ_BASE,
|
||||
- .irq_end = TWL4030_IRQ_END,
|
||||
-
|
||||
/* platform_data for children goes here */
|
||||
.keypad = &omap3stalker_kp_data,
|
||||
- .madc = &omap3stalker_madc_data,
|
||||
- .usb = &omap3stalker_usb_data,
|
||||
.gpio = &omap3stalker_gpio_data,
|
||||
- .codec = &omap3stalker_codec_data,
|
||||
.vdac = &omap3_stalker_vdac,
|
||||
.vpll2 = &omap3_stalker_vpll2,
|
||||
.vmmc1 = &omap3stalker_vmmc1,
|
||||
@@ -470,6 +449,9 @@ static struct i2c_board_info __initdata omap3stalker_i2c_boardinfo3[] = {
|
||||
|
||||
static int __init omap3_stalker_i2c_init(void)
|
||||
{
|
||||
+ omap3_pmic_get_config(&omap3stalker_twldata,
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
|
||||
+ TWL_COMMON_PDATA_AUDIO, 0);
|
||||
omap3_pmic_init("twl4030", &omap3stalker_twldata);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3,
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
index 57e6ed3..717972c 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
@@ -235,25 +235,9 @@ static struct regulator_init_data touchbook_vpll2 = {
|
||||
.consumer_supplies = touchbook_vdvi_supply,
|
||||
};
|
||||
|
||||
-static struct twl4030_usb_data touchbook_usb_data = {
|
||||
- .usb_mode = T2_USB_MODE_ULPI,
|
||||
-};
|
||||
-
|
||||
-static struct twl4030_codec_audio_data touchbook_audio_data;
|
||||
-
|
||||
-static struct twl4030_codec_data touchbook_codec_data = {
|
||||
- .audio_mclk = 26000000,
|
||||
- .audio = &touchbook_audio_data,
|
||||
-};
|
||||
-
|
||||
static struct twl4030_platform_data touchbook_twldata = {
|
||||
- .irq_base = TWL4030_IRQ_BASE,
|
||||
- .irq_end = TWL4030_IRQ_END,
|
||||
-
|
||||
/* platform_data for children goes here */
|
||||
- .usb = &touchbook_usb_data,
|
||||
.gpio = &touchbook_gpio_data,
|
||||
- .codec = &touchbook_codec_data,
|
||||
.vmmc1 = &touchbook_vmmc1,
|
||||
.vsim = &touchbook_vsim,
|
||||
.vdac = &touchbook_vdac,
|
||||
@@ -269,8 +253,9 @@ static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = {
|
||||
static int __init omap3_touchbook_i2c_init(void)
|
||||
{
|
||||
/* Standard TouchBook bus */
|
||||
+ omap3_pmic_get_config(&touchbook_twldata,
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0);
|
||||
omap3_pmic_init("twl4030", &touchbook_twldata);
|
||||
-
|
||||
/* Additional TouchBook bus */
|
||||
omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo,
|
||||
ARRAY_SIZE(touchBook_i2c_boardinfo));
|
||||
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
|
||||
index 1bf2f39..776b444 100644
|
||||
--- a/arch/arm/mach-omap2/board-overo.c
|
||||
+++ b/arch/arm/mach-omap2/board-overo.c
|
||||
@@ -433,10 +433,6 @@ static struct twl4030_gpio_platform_data overo_gpio_data = {
|
||||
.setup = overo_twl_gpio_setup,
|
||||
};
|
||||
|
||||
-static struct twl4030_usb_data overo_usb_data = {
|
||||
- .usb_mode = T2_USB_MODE_ULPI,
|
||||
-};
|
||||
-
|
||||
static struct regulator_init_data overo_vmmc1 = {
|
||||
.constraints = {
|
||||
.min_uV = 1850000,
|
||||
@@ -480,19 +476,8 @@ static struct regulator_init_data overo_vpll2 = {
|
||||
.consumer_supplies = overo_vdds_dsi_supply,
|
||||
};
|
||||
|
||||
-static struct twl4030_codec_audio_data overo_audio_data;
|
||||
-
|
||||
-static struct twl4030_codec_data overo_codec_data = {
|
||||
- .audio_mclk = 26000000,
|
||||
- .audio = &overo_audio_data,
|
||||
-};
|
||||
-
|
||||
static struct twl4030_platform_data overo_twldata = {
|
||||
- .irq_base = TWL4030_IRQ_BASE,
|
||||
- .irq_end = TWL4030_IRQ_END,
|
||||
.gpio = &overo_gpio_data,
|
||||
- .usb = &overo_usb_data,
|
||||
- .codec = &overo_codec_data,
|
||||
.vmmc1 = &overo_vmmc1,
|
||||
.vdac = &overo_vdac,
|
||||
.vpll2 = &overo_vpll2,
|
||||
@@ -500,6 +485,8 @@ static struct twl4030_platform_data overo_twldata = {
|
||||
|
||||
static int __init overo_i2c_init(void)
|
||||
{
|
||||
+ omap3_pmic_get_config(&overo_twldata,
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0);
|
||||
omap3_pmic_init("tps65950", &overo_twldata);
|
||||
/* i2c2 pins are used for gpio */
|
||||
omap_register_i2c_bus(3, 400, NULL, 0);
|
||||
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
|
||||
index 54dceb1..7dfed24 100644
|
||||
--- a/arch/arm/mach-omap2/board-rm680.c
|
||||
+++ b/arch/arm/mach-omap2/board-rm680.c
|
||||
@@ -79,20 +79,14 @@ static struct twl4030_gpio_platform_data rm680_gpio_data = {
|
||||
.pulldowns = BIT(1) | BIT(2) | BIT(8) | BIT(15),
|
||||
};
|
||||
|
||||
-static struct twl4030_usb_data rm680_usb_data = {
|
||||
- .usb_mode = T2_USB_MODE_ULPI,
|
||||
-};
|
||||
-
|
||||
static struct twl4030_platform_data rm680_twl_data = {
|
||||
- .irq_base = TWL4030_IRQ_BASE,
|
||||
- .irq_end = TWL4030_IRQ_END,
|
||||
.gpio = &rm680_gpio_data,
|
||||
- .usb = &rm680_usb_data,
|
||||
/* add rest of the children here */
|
||||
};
|
||||
|
||||
static void __init rm680_i2c_init(void)
|
||||
{
|
||||
+ omap3_pmic_get_config(&rm680_twl_data, TWL_COMMON_PDATA_USB, 0);
|
||||
omap_pmic_init(1, 2900, "twl5031", INT_34XX_SYS_NIRQ, &rm680_twl_data);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
omap_register_i2c_bus(3, 400, NULL, 0);
|
||||
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
|
||||
index 7810b1e..75be074 100644
|
||||
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
|
||||
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
|
||||
@@ -288,10 +288,6 @@ static struct twl4030_keypad_data rx51_kp_data = {
|
||||
.rep = 1,
|
||||
};
|
||||
|
||||
-static struct twl4030_madc_platform_data rx51_madc_data = {
|
||||
- .irq_line = 1,
|
||||
-};
|
||||
-
|
||||
/* Enable input logic and pull all lines up when eMMC is on. */
|
||||
static struct omap_board_mux rx51_mmc2_on_mux[] = {
|
||||
OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
|
||||
@@ -603,10 +599,6 @@ static struct twl4030_gpio_platform_data rx51_gpio_data = {
|
||||
.setup = rx51_twlgpio_setup,
|
||||
};
|
||||
|
||||
-static struct twl4030_usb_data rx51_usb_data = {
|
||||
- .usb_mode = T2_USB_MODE_ULPI,
|
||||
-};
|
||||
-
|
||||
static struct twl4030_ins sleep_on_seq[] __initdata = {
|
||||
/*
|
||||
* Turn off everything
|
||||
@@ -778,14 +770,9 @@ struct twl4030_codec_data rx51_codec_data __initdata = {
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data rx51_twldata __initdata = {
|
||||
- .irq_base = TWL4030_IRQ_BASE,
|
||||
- .irq_end = TWL4030_IRQ_END,
|
||||
-
|
||||
/* platform_data for children goes here */
|
||||
.gpio = &rx51_gpio_data,
|
||||
.keypad = &rx51_kp_data,
|
||||
- .madc = &rx51_madc_data,
|
||||
- .usb = &rx51_usb_data,
|
||||
.power = &rx51_t2scripts_data,
|
||||
.codec = &rx51_codec_data,
|
||||
|
||||
@@ -850,6 +837,8 @@ static int __init rx51_i2c_init(void)
|
||||
rx51_twldata.vaux3 = &rx51_vaux3_cam;
|
||||
}
|
||||
rx51_twldata.vmmc2 = &rx51_vmmc2;
|
||||
+ omap3_pmic_get_config(&rx51_twldata,
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, 0);
|
||||
omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata);
|
||||
omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
|
||||
ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
|
||||
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
|
||||
index 8495f82..6d8df1b 100644
|
||||
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
|
||||
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
|
||||
@@ -285,26 +285,6 @@ static void zoom2_set_hs_extmute(int mute)
|
||||
gpio_set_value(ZOOM2_HEADSET_EXTMUTE_GPIO, mute);
|
||||
}
|
||||
|
||||
-static int zoom_batt_table[] = {
|
||||
-/* 0 C*/
|
||||
-30800, 29500, 28300, 27100,
|
||||
-26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
|
||||
-17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
|
||||
-11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
|
||||
-8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
|
||||
-5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
|
||||
-4040, 3910, 3790, 3670, 3550
|
||||
-};
|
||||
-
|
||||
-static struct twl4030_bci_platform_data zoom_bci_data = {
|
||||
- .battery_tmp_tbl = zoom_batt_table,
|
||||
- .tblsize = ARRAY_SIZE(zoom_batt_table),
|
||||
-};
|
||||
-
|
||||
-static struct twl4030_usb_data zoom_usb_data = {
|
||||
- .usb_mode = T2_USB_MODE_ULPI,
|
||||
-};
|
||||
-
|
||||
static struct twl4030_gpio_platform_data zoom_gpio_data = {
|
||||
.gpio_base = OMAP_MAX_GPIO_LINES,
|
||||
.irq_base = TWL4030_GPIO_IRQ_BASE,
|
||||
@@ -312,28 +292,10 @@ static struct twl4030_gpio_platform_data zoom_gpio_data = {
|
||||
.setup = zoom_twl_gpio_setup,
|
||||
};
|
||||
|
||||
-static struct twl4030_madc_platform_data zoom_madc_data = {
|
||||
- .irq_line = 1,
|
||||
-};
|
||||
-
|
||||
-static struct twl4030_codec_audio_data zoom_audio_data;
|
||||
-
|
||||
-static struct twl4030_codec_data zoom_codec_data = {
|
||||
- .audio_mclk = 26000000,
|
||||
- .audio = &zoom_audio_data,
|
||||
-};
|
||||
-
|
||||
static struct twl4030_platform_data zoom_twldata = {
|
||||
- .irq_base = TWL4030_IRQ_BASE,
|
||||
- .irq_end = TWL4030_IRQ_END,
|
||||
-
|
||||
/* platform_data for children goes here */
|
||||
- .bci = &zoom_bci_data,
|
||||
- .madc = &zoom_madc_data,
|
||||
- .usb = &zoom_usb_data,
|
||||
.gpio = &zoom_gpio_data,
|
||||
.keypad = &zoom_kp_twl4030_data,
|
||||
- .codec = &zoom_codec_data,
|
||||
.vmmc1 = &zoom_vmmc1,
|
||||
.vmmc2 = &zoom_vmmc2,
|
||||
.vsim = &zoom_vsim,
|
||||
@@ -343,10 +305,17 @@ static struct twl4030_platform_data zoom_twldata = {
|
||||
|
||||
static int __init omap_i2c_init(void)
|
||||
{
|
||||
+ omap3_pmic_get_config(&zoom_twldata,
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
|
||||
+ TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, 0);
|
||||
+
|
||||
if (machine_is_omap_zoom2()) {
|
||||
- zoom_audio_data.ramp_delay_value = 3; /* 161 ms */
|
||||
- zoom_audio_data.hs_extmute = 1;
|
||||
- zoom_audio_data.set_hs_extmute = zoom2_set_hs_extmute;
|
||||
+ struct twl4030_codec_audio_data *audio_data;
|
||||
+ audio_data = zoom_twldata.codec->audio;
|
||||
+
|
||||
+ audio_data->ramp_delay_value = 3; /* 161 ms */
|
||||
+ audio_data->hs_extmute = 1;
|
||||
+ audio_data->set_hs_extmute = zoom2_set_hs_extmute;
|
||||
}
|
||||
omap_pmic_init(1, 2400, "twl5030", INT_34XX_SYS_NIRQ, &zoom_twldata);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
|
||||
index cf80f4c..9e8decf 100644
|
||||
--- a/arch/arm/mach-omap2/twl-common.c
|
||||
+++ b/arch/arm/mach-omap2/twl-common.c
|
||||
@@ -56,6 +56,37 @@ static struct twl4030_usb_data omap4_usb_pdata = {
|
||||
.phy_suspend = omap4430_phy_suspend,
|
||||
};
|
||||
|
||||
+static struct twl4030_usb_data omap3_usb_pdata = {
|
||||
+ .usb_mode = T2_USB_MODE_ULPI,
|
||||
+};
|
||||
+
|
||||
+static int omap3_batt_table[] = {
|
||||
+/* 0 C */
|
||||
+30800, 29500, 28300, 27100,
|
||||
+26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
|
||||
+17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
|
||||
+11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
|
||||
+8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
|
||||
+5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
|
||||
+4040, 3910, 3790, 3670, 3550
|
||||
+};
|
||||
+
|
||||
+static struct twl4030_bci_platform_data omap3_bci_pdata = {
|
||||
+ .battery_tmp_tbl = omap3_batt_table,
|
||||
+ .tblsize = ARRAY_SIZE(omap3_batt_table),
|
||||
+};
|
||||
+
|
||||
+static struct twl4030_madc_platform_data omap3_madc_pdata = {
|
||||
+ .irq_line = 1,
|
||||
+};
|
||||
+
|
||||
+static struct twl4030_codec_audio_data omap3_audio;
|
||||
+
|
||||
+static struct twl4030_codec_data omap3_codec_pdata = {
|
||||
+ .audio_mclk = 26000000,
|
||||
+ .audio = &omap3_audio,
|
||||
+};
|
||||
+
|
||||
static struct regulator_init_data omap4_vdac_idata = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
@@ -207,3 +238,25 @@ void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
|
||||
!pmic_data->clk32kg)
|
||||
pmic_data->clk32kg = &omap4_clk32kg_idata;
|
||||
}
|
||||
+
|
||||
+void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
|
||||
+ u32 pdata_flags, u32 regulators_flags)
|
||||
+{
|
||||
+ if (!pmic_data->irq_base)
|
||||
+ pmic_data->irq_base = TWL4030_IRQ_BASE;
|
||||
+ if (!pmic_data->irq_end)
|
||||
+ pmic_data->irq_end = TWL4030_IRQ_END;
|
||||
+
|
||||
+ /* Common platform data configurations */
|
||||
+ if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
|
||||
+ pmic_data->usb = &omap3_usb_pdata;
|
||||
+
|
||||
+ if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci)
|
||||
+ pmic_data->bci = &omap3_bci_pdata;
|
||||
+
|
||||
+ if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc)
|
||||
+ pmic_data->madc = &omap3_madc_pdata;
|
||||
+
|
||||
+ if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->codec)
|
||||
+ pmic_data->codec = &omap3_codec_pdata;
|
||||
+}
|
||||
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
|
||||
index d96c289..3b4b05d 100644
|
||||
--- a/arch/arm/mach-omap2/twl-common.h
|
||||
+++ b/arch/arm/mach-omap2/twl-common.h
|
||||
@@ -2,6 +2,9 @@
|
||||
#define __OMAP_PMIC_COMMON__
|
||||
|
||||
#define TWL_COMMON_PDATA_USB (1 << 0)
|
||||
+#define TWL_COMMON_PDATA_BCI (1 << 1)
|
||||
+#define TWL_COMMON_PDATA_MADC (1 << 2)
|
||||
+#define TWL_COMMON_PDATA_AUDIO (1 << 3)
|
||||
|
||||
/* Common LDO regulators for TWL4030/TWL6030 */
|
||||
#define TWL_COMMON_REGULATOR_VDAC (1 << 0)
|
||||
@@ -42,6 +45,9 @@ static inline void omap4_pmic_init(const char *pmic_type,
|
||||
omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data);
|
||||
}
|
||||
|
||||
+void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
|
||||
+ u32 pdata_flags, u32 regulators_flags);
|
||||
+
|
||||
void omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
|
||||
u32 pdata_flags, u32 regulators_flags);
|
||||
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+924
@@ -0,0 +1,924 @@
|
||||
From 8e61cb467b9c0f30cf24f244f176d497d4ce3e2a Mon Sep 17 00:00:00 2001
|
||||
From: Peter Ujfalusi <peter.ujfalusi@ti.com>
|
||||
Date: Tue, 7 Jun 2011 11:38:24 +0300
|
||||
Subject: [PATCH 025/149] OMAP3: Move common regulator configuration to twl-common
|
||||
|
||||
Some regulator config can be moved out from board files,
|
||||
since they are close to identical.
|
||||
|
||||
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
|
||||
Acked-by: Tony Lindgren <tony@atomide.com>
|
||||
---
|
||||
arch/arm/mach-omap2/board-3430sdp.c | 51 ++++----------------------
|
||||
arch/arm/mach-omap2/board-cm-t35.c | 44 ++++------------------
|
||||
arch/arm/mach-omap2/board-devkit8000.c | 22 +----------
|
||||
arch/arm/mach-omap2/board-igep0020.c | 28 +++------------
|
||||
arch/arm/mach-omap2/board-omap3beagle.c | 46 +++---------------------
|
||||
arch/arm/mach-omap2/board-omap3evm.c | 50 ++++----------------------
|
||||
arch/arm/mach-omap2/board-omap3pandora.c | 47 +++++-------------------
|
||||
arch/arm/mach-omap2/board-omap3stalker.c | 50 ++++----------------------
|
||||
arch/arm/mach-omap2/board-omap3touchbook.c | 44 ++++++----------------
|
||||
arch/arm/mach-omap2/board-overo.c | 46 +++---------------------
|
||||
arch/arm/mach-omap2/board-rx51-peripherals.c | 27 +++-----------
|
||||
arch/arm/mach-omap2/board-zoom-peripherals.c | 42 ++--------------------
|
||||
arch/arm/mach-omap2/twl-common.c | 42 +++++++++++++++++++++
|
||||
arch/arm/mach-omap2/twl-common.h | 5 +++
|
||||
14 files changed, 124 insertions(+), 420 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
|
||||
index 8bbd4e0..bd600cf 100644
|
||||
--- a/arch/arm/mach-omap2/board-3430sdp.c
|
||||
+++ b/arch/arm/mach-omap2/board-3430sdp.c
|
||||
@@ -283,16 +283,6 @@ static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
|
||||
REGULATOR_SUPPLY("vcc", "spi1.0"),
|
||||
};
|
||||
|
||||
-static struct regulator_consumer_supply sdp3430_vdda_dac_supplies[] = {
|
||||
- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
|
||||
-};
|
||||
-
|
||||
-/* VPLL2 for digital video outputs */
|
||||
-static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
|
||||
- REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
|
||||
- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
|
||||
-};
|
||||
-
|
||||
static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
@@ -409,36 +399,6 @@ static struct regulator_init_data sdp3430_vsim = {
|
||||
.consumer_supplies = sdp3430_vsim_supplies,
|
||||
};
|
||||
|
||||
-/* VDAC for DSS driving S-Video */
|
||||
-static struct regulator_init_data sdp3430_vdac = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(sdp3430_vdda_dac_supplies),
|
||||
- .consumer_supplies = sdp3430_vdda_dac_supplies,
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data sdp3430_vpll2 = {
|
||||
- .constraints = {
|
||||
- .name = "VDVI",
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies),
|
||||
- .consumer_supplies = sdp3430_vpll2_supplies,
|
||||
-};
|
||||
-
|
||||
static struct twl4030_platform_data sdp3430_twldata = {
|
||||
/* platform_data for children goes here */
|
||||
.gpio = &sdp3430_gpio_data,
|
||||
@@ -451,16 +411,19 @@ static struct twl4030_platform_data sdp3430_twldata = {
|
||||
.vmmc1 = &sdp3430_vmmc1,
|
||||
.vmmc2 = &sdp3430_vmmc2,
|
||||
.vsim = &sdp3430_vsim,
|
||||
- .vdac = &sdp3430_vdac,
|
||||
- .vpll2 = &sdp3430_vpll2,
|
||||
};
|
||||
|
||||
static int __init omap3430_i2c_init(void)
|
||||
{
|
||||
/* i2c1 for PMIC only */
|
||||
omap3_pmic_get_config(&sdp3430_twldata,
|
||||
- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
|
||||
- TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, 0);
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
|
||||
+ TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
|
||||
+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
+ sdp3430_twldata.vdac->constraints.apply_uV = true;
|
||||
+ sdp3430_twldata.vpll2->constraints.apply_uV = true;
|
||||
+ sdp3430_twldata.vpll2->constraints.name = "VDVI";
|
||||
+
|
||||
omap3_pmic_init("twl4030", &sdp3430_twldata);
|
||||
|
||||
/* i2c2 on camera connector (for sensor control) and optional isp1301 */
|
||||
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
|
||||
index cb00abc..35891d4 100644
|
||||
--- a/arch/arm/mach-omap2/board-cm-t35.c
|
||||
+++ b/arch/arm/mach-omap2/board-cm-t35.c
|
||||
@@ -343,10 +343,6 @@ static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
-static struct regulator_consumer_supply cm_t35_vdac_supply[] = {
|
||||
- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
|
||||
-};
|
||||
-
|
||||
static struct regulator_consumer_supply cm_t35_vdvi_supply[] = {
|
||||
REGULATOR_SUPPLY("vdvi", "omapdss"),
|
||||
};
|
||||
@@ -381,35 +377,6 @@ static struct regulator_init_data cm_t35_vsim = {
|
||||
.consumer_supplies = cm_t35_vsim_supply,
|
||||
};
|
||||
|
||||
-/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
|
||||
-static struct regulator_init_data cm_t35_vdac = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdac_supply),
|
||||
- .consumer_supplies = cm_t35_vdac_supply,
|
||||
-};
|
||||
-
|
||||
-/* VPLL2 for digital video outputs */
|
||||
-static struct regulator_init_data cm_t35_vpll2 = {
|
||||
- .constraints = {
|
||||
- .name = "VDVI",
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdvi_supply),
|
||||
- .consumer_supplies = cm_t35_vdvi_supply,
|
||||
-};
|
||||
-
|
||||
static uint32_t cm_t35_keymap[] = {
|
||||
KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
|
||||
KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
|
||||
@@ -493,13 +460,18 @@ static struct twl4030_platform_data cm_t35_twldata = {
|
||||
.gpio = &cm_t35_gpio_data,
|
||||
.vmmc1 = &cm_t35_vmmc1,
|
||||
.vsim = &cm_t35_vsim,
|
||||
- .vdac = &cm_t35_vdac,
|
||||
- .vpll2 = &cm_t35_vpll2,
|
||||
};
|
||||
|
||||
static void __init cm_t35_init_i2c(void)
|
||||
{
|
||||
- omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, 0);
|
||||
+ omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB,
|
||||
+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
+
|
||||
+ cm_t35_twldata.vpll2->constraints.name = "VDVI";
|
||||
+ cm_t35_twldata.vpll2->num_consumer_supplies =
|
||||
+ ARRAY_SIZE(cm_t35_vdvi_supply);
|
||||
+ cm_t35_twldata.vpll2->consumer_supplies = cm_t35_vdvi_supply;
|
||||
+
|
||||
omap3_pmic_init("tps65930", &cm_t35_twldata);
|
||||
}
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
|
||||
index 364942e..b6002ec 100644
|
||||
--- a/arch/arm/mach-omap2/board-devkit8000.c
|
||||
+++ b/arch/arm/mach-omap2/board-devkit8000.c
|
||||
@@ -186,10 +186,6 @@ static struct omap_dss_board_info devkit8000_dss_data = {
|
||||
.default_device = &devkit8000_lcd_device,
|
||||
};
|
||||
|
||||
-static struct regulator_consumer_supply devkit8000_vdda_dac_supply[] = {
|
||||
- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
|
||||
-};
|
||||
-
|
||||
static uint32_t board_keymap[] = {
|
||||
KEY(0, 0, KEY_1),
|
||||
KEY(1, 0, KEY_2),
|
||||
@@ -289,20 +285,6 @@ static struct regulator_init_data devkit8000_vmmc1 = {
|
||||
.consumer_supplies = devkit8000_vmmc1_supply,
|
||||
};
|
||||
|
||||
-/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
|
||||
-static struct regulator_init_data devkit8000_vdac = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(devkit8000_vdda_dac_supply),
|
||||
- .consumer_supplies = devkit8000_vdda_dac_supply,
|
||||
-};
|
||||
-
|
||||
/* VPLL1 for digital video outputs */
|
||||
static struct regulator_init_data devkit8000_vpll1 = {
|
||||
.constraints = {
|
||||
@@ -336,7 +318,6 @@ static struct twl4030_platform_data devkit8000_twldata = {
|
||||
/* platform_data for children goes here */
|
||||
.gpio = &devkit8000_gpio_data,
|
||||
.vmmc1 = &devkit8000_vmmc1,
|
||||
- .vdac = &devkit8000_vdac,
|
||||
.vpll1 = &devkit8000_vpll1,
|
||||
.vio = &devkit8000_vio,
|
||||
.keypad = &devkit8000_kp_data,
|
||||
@@ -345,7 +326,8 @@ static struct twl4030_platform_data devkit8000_twldata = {
|
||||
static int __init devkit8000_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&devkit8000_twldata,
|
||||
- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0);
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
|
||||
+ TWL_COMMON_REGULATOR_VDAC);
|
||||
omap3_pmic_init("tps65930", &devkit8000_twldata);
|
||||
/* Bus 3 is attached to the DVI port where devices like the pico DLP
|
||||
* projector don't work reliably with 400kHz */
|
||||
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
|
||||
index e0a6687..35be778 100644
|
||||
--- a/arch/arm/mach-omap2/board-igep0020.c
|
||||
+++ b/arch/arm/mach-omap2/board-igep0020.c
|
||||
@@ -479,26 +479,6 @@ static struct omap_dss_board_info igep2_dss_data = {
|
||||
.default_device = &igep2_dvi_device,
|
||||
};
|
||||
|
||||
-static struct regulator_consumer_supply igep2_vpll2_supplies[] = {
|
||||
- REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
|
||||
- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data igep2_vpll2 = {
|
||||
- .constraints = {
|
||||
- .name = "VDVI",
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(igep2_vpll2_supplies),
|
||||
- .consumer_supplies = igep2_vpll2_supplies,
|
||||
-};
|
||||
-
|
||||
static void __init igep2_display_init(void)
|
||||
{
|
||||
int err = gpio_request_one(IGEP2_GPIO_DVI_PUP, GPIOF_OUT_INIT_HIGH,
|
||||
@@ -579,9 +559,11 @@ static void __init igep_i2c_init(void)
|
||||
pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret);
|
||||
|
||||
igep_twldata.keypad = &igep2_keypad_pdata;
|
||||
- igep_twldata.vpll2 = &igep2_vpll2;
|
||||
- /* Use common codec data */
|
||||
- omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO, 0);
|
||||
+ /* Get common pmic data */
|
||||
+ omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO,
|
||||
+ TWL_COMMON_REGULATOR_VPLL2);
|
||||
+ igep_twldata.vpll2->constraints.apply_uV = true;
|
||||
+ igep_twldata.vpll2->constraints.name = "VDVI";
|
||||
}
|
||||
|
||||
omap3_pmic_init("twl4030", &igep_twldata);
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
index ec61e9c..34f8411 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
|
||||
@@ -209,15 +209,6 @@ static struct omap_dss_board_info beagle_dss_data = {
|
||||
.default_device = &beagle_dvi_device,
|
||||
};
|
||||
|
||||
-static struct regulator_consumer_supply beagle_vdac_supply[] = {
|
||||
- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
|
||||
-};
|
||||
-
|
||||
-static struct regulator_consumer_supply beagle_vdvi_supplies[] = {
|
||||
- REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
|
||||
- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
|
||||
-};
|
||||
-
|
||||
static void __init beagle_display_init(void)
|
||||
{
|
||||
int r;
|
||||
@@ -351,42 +342,11 @@ static struct regulator_init_data beagle_vsim = {
|
||||
.consumer_supplies = beagle_vsim_supply,
|
||||
};
|
||||
|
||||
-/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
|
||||
-static struct regulator_init_data beagle_vdac = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(beagle_vdac_supply),
|
||||
- .consumer_supplies = beagle_vdac_supply,
|
||||
-};
|
||||
-
|
||||
-/* VPLL2 for digital video outputs */
|
||||
-static struct regulator_init_data beagle_vpll2 = {
|
||||
- .constraints = {
|
||||
- .name = "VDVI",
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(beagle_vdvi_supplies),
|
||||
- .consumer_supplies = beagle_vdvi_supplies,
|
||||
-};
|
||||
-
|
||||
static struct twl4030_platform_data beagle_twldata = {
|
||||
/* platform_data for children goes here */
|
||||
.gpio = &beagle_gpio_data,
|
||||
.vmmc1 = &beagle_vmmc1,
|
||||
.vsim = &beagle_vsim,
|
||||
- .vdac = &beagle_vdac,
|
||||
- .vpll2 = &beagle_vpll2,
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata beagle_i2c_eeprom[] = {
|
||||
@@ -398,7 +358,11 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = {
|
||||
static int __init omap3_beagle_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&beagle_twldata,
|
||||
- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0);
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
|
||||
+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
+
|
||||
+ beagle_twldata.vpll2->constraints.name = "VDVI";
|
||||
+
|
||||
omap3_pmic_init("twl4030", &beagle_twldata);
|
||||
/* Bus 3 is attached to the DVI port where devices like the pico DLP
|
||||
* projector don't work reliably with 400kHz */
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
|
||||
index 1ca298a..c452b3f 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3evm.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3evm.c
|
||||
@@ -430,45 +430,6 @@ static struct twl4030_keypad_data omap3evm_kp_data = {
|
||||
.rep = 1,
|
||||
};
|
||||
|
||||
-static struct regulator_consumer_supply omap3_evm_vdda_dac_supply[] = {
|
||||
- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
|
||||
-};
|
||||
-
|
||||
-/* VDAC for DSS driving S-Video */
|
||||
-static struct regulator_init_data omap3_evm_vdac = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(omap3_evm_vdda_dac_supply),
|
||||
- .consumer_supplies = omap3_evm_vdda_dac_supply,
|
||||
-};
|
||||
-
|
||||
-/* VPLL2 for digital video outputs */
|
||||
-static struct regulator_consumer_supply omap3_evm_vpll2_supplies[] = {
|
||||
- REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
|
||||
- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data omap3_evm_vpll2 = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(omap3_evm_vpll2_supplies),
|
||||
- .consumer_supplies = omap3_evm_vpll2_supplies,
|
||||
-};
|
||||
-
|
||||
/* ads7846 on SPI */
|
||||
static struct regulator_consumer_supply omap3evm_vio_supply[] = {
|
||||
REGULATOR_SUPPLY("vcc", "spi1.0"),
|
||||
@@ -535,8 +496,6 @@ static struct twl4030_platform_data omap3evm_twldata = {
|
||||
/* platform_data for children goes here */
|
||||
.keypad = &omap3evm_kp_data,
|
||||
.gpio = &omap3evm_gpio_data,
|
||||
- .vdac = &omap3_evm_vdac,
|
||||
- .vpll2 = &omap3_evm_vpll2,
|
||||
.vio = &omap3evm_vio,
|
||||
.vmmc1 = &omap3evm_vmmc1,
|
||||
.vsim = &omap3evm_vsim,
|
||||
@@ -545,8 +504,13 @@ static struct twl4030_platform_data omap3evm_twldata = {
|
||||
static int __init omap3_evm_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&omap3evm_twldata,
|
||||
- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
|
||||
- TWL_COMMON_PDATA_AUDIO, 0);
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
|
||||
+ TWL_COMMON_PDATA_AUDIO,
|
||||
+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
+
|
||||
+ omap3evm_twldata.vdac->constraints.apply_uV = true;
|
||||
+ omap3evm_twldata.vpll2->constraints.apply_uV = true;
|
||||
+
|
||||
omap3_pmic_init("twl4030", &omap3evm_twldata);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
omap_register_i2c_bus(3, 400, NULL, 0);
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
|
||||
index f5abf76..080d7bd 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3pandora.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
|
||||
@@ -332,10 +332,6 @@ static struct regulator_consumer_supply pandora_vmmc3_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"),
|
||||
};
|
||||
|
||||
-static struct regulator_consumer_supply pandora_vdda_dac_supply[] = {
|
||||
- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
|
||||
-};
|
||||
-
|
||||
static struct regulator_consumer_supply pandora_vdds_supplies[] = {
|
||||
REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
|
||||
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
|
||||
@@ -391,36 +387,6 @@ static struct regulator_init_data pandora_vmmc2 = {
|
||||
.consumer_supplies = pandora_vmmc2_supply,
|
||||
};
|
||||
|
||||
-/* VDAC for DSS driving S-Video */
|
||||
-static struct regulator_init_data pandora_vdac = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(pandora_vdda_dac_supply),
|
||||
- .consumer_supplies = pandora_vdda_dac_supply,
|
||||
-};
|
||||
-
|
||||
-/* VPLL2 for digital video outputs */
|
||||
-static struct regulator_init_data pandora_vpll2 = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(pandora_vdds_supplies),
|
||||
- .consumer_supplies = pandora_vdds_supplies,
|
||||
-};
|
||||
-
|
||||
/* VAUX1 for LCD */
|
||||
static struct regulator_init_data pandora_vaux1 = {
|
||||
.constraints = {
|
||||
@@ -514,8 +480,6 @@ static struct twl4030_platform_data omap3pandora_twldata = {
|
||||
.gpio = &omap3pandora_gpio_data,
|
||||
.vmmc1 = &pandora_vmmc1,
|
||||
.vmmc2 = &pandora_vmmc2,
|
||||
- .vdac = &pandora_vdac,
|
||||
- .vpll2 = &pandora_vpll2,
|
||||
.vaux1 = &pandora_vaux1,
|
||||
.vaux2 = &pandora_vaux2,
|
||||
.vaux4 = &pandora_vaux4,
|
||||
@@ -534,7 +498,16 @@ static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = {
|
||||
static int __init omap3pandora_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&omap3pandora_twldata,
|
||||
- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0);
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
|
||||
+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
+
|
||||
+ omap3pandora_twldata.vdac->constraints.apply_uV = true;
|
||||
+
|
||||
+ omap3pandora_twldata.vpll2->constraints.apply_uV = true;
|
||||
+ omap3pandora_twldata.vpll2->num_consumer_supplies =
|
||||
+ ARRAY_SIZE(pandora_vdds_supplies);
|
||||
+ omap3pandora_twldata.vpll2->consumer_supplies = pandora_vdds_supplies;
|
||||
+
|
||||
omap3_pmic_init("tps65950", &omap3pandora_twldata);
|
||||
/* i2c2 pins are not connected */
|
||||
omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo,
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
index 6e59e59..8e10498 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
|
||||
@@ -383,52 +383,10 @@ static struct twl4030_keypad_data omap3stalker_kp_data = {
|
||||
.rep = 1,
|
||||
};
|
||||
|
||||
-static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply[] = {
|
||||
- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
|
||||
-};
|
||||
-
|
||||
-/* VDAC for DSS driving S-Video */
|
||||
-static struct regulator_init_data omap3_stalker_vdac = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(omap3_stalker_vdda_dac_supply),
|
||||
- .consumer_supplies = omap3_stalker_vdda_dac_supply,
|
||||
-};
|
||||
-
|
||||
-/* VPLL2 for digital video outputs */
|
||||
-static struct regulator_consumer_supply omap3_stalker_vpll2_supplies[] = {
|
||||
- REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
|
||||
- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data omap3_stalker_vpll2 = {
|
||||
- .constraints = {
|
||||
- .name = "VDVI",
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(omap3_stalker_vpll2_supplies),
|
||||
- .consumer_supplies = omap3_stalker_vpll2_supplies,
|
||||
-};
|
||||
-
|
||||
static struct twl4030_platform_data omap3stalker_twldata = {
|
||||
/* platform_data for children goes here */
|
||||
.keypad = &omap3stalker_kp_data,
|
||||
.gpio = &omap3stalker_gpio_data,
|
||||
- .vdac = &omap3_stalker_vdac,
|
||||
- .vpll2 = &omap3_stalker_vpll2,
|
||||
.vmmc1 = &omap3stalker_vmmc1,
|
||||
.vsim = &omap3stalker_vsim,
|
||||
};
|
||||
@@ -451,7 +409,13 @@ static int __init omap3_stalker_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&omap3stalker_twldata,
|
||||
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
|
||||
- TWL_COMMON_PDATA_AUDIO, 0);
|
||||
+ TWL_COMMON_PDATA_AUDIO,
|
||||
+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
+
|
||||
+ omap3stalker_twldata.vdac->constraints.apply_uV = true;
|
||||
+ omap3stalker_twldata.vpll2->constraints.apply_uV = true;
|
||||
+ omap3stalker_twldata.vpll2->constraints.name = "VDVI";
|
||||
+
|
||||
omap3_pmic_init("twl4030", &omap3stalker_twldata);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3,
|
||||
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
index 717972c..852ea04 100644
|
||||
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
|
||||
@@ -206,42 +206,11 @@ static struct regulator_init_data touchbook_vsim = {
|
||||
.consumer_supplies = touchbook_vsim_supply,
|
||||
};
|
||||
|
||||
-/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
|
||||
-static struct regulator_init_data touchbook_vdac = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(touchbook_vdac_supply),
|
||||
- .consumer_supplies = touchbook_vdac_supply,
|
||||
-};
|
||||
-
|
||||
-/* VPLL2 for digital video outputs */
|
||||
-static struct regulator_init_data touchbook_vpll2 = {
|
||||
- .constraints = {
|
||||
- .name = "VDVI",
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(touchbook_vdvi_supply),
|
||||
- .consumer_supplies = touchbook_vdvi_supply,
|
||||
-};
|
||||
-
|
||||
static struct twl4030_platform_data touchbook_twldata = {
|
||||
/* platform_data for children goes here */
|
||||
.gpio = &touchbook_gpio_data,
|
||||
.vmmc1 = &touchbook_vmmc1,
|
||||
.vsim = &touchbook_vsim,
|
||||
- .vdac = &touchbook_vdac,
|
||||
- .vpll2 = &touchbook_vpll2,
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = {
|
||||
@@ -254,7 +223,18 @@ static int __init omap3_touchbook_i2c_init(void)
|
||||
{
|
||||
/* Standard TouchBook bus */
|
||||
omap3_pmic_get_config(&touchbook_twldata,
|
||||
- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0);
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
|
||||
+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
+
|
||||
+ touchbook_twldata.vdac->num_consumer_supplies =
|
||||
+ ARRAY_SIZE(touchbook_vdac_supply);
|
||||
+ touchbook_twldata.vdac->consumer_supplies = touchbook_vdac_supply;
|
||||
+
|
||||
+ touchbook_twldata.vpll2->constraints.name = "VDVI";
|
||||
+ touchbook_twldata.vpll2->num_consumer_supplies =
|
||||
+ ARRAY_SIZE(touchbook_vdvi_supply);
|
||||
+ touchbook_twldata.vpll2->consumer_supplies = touchbook_vdvi_supply;
|
||||
+
|
||||
omap3_pmic_init("twl4030", &touchbook_twldata);
|
||||
/* Additional TouchBook bus */
|
||||
omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo,
|
||||
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
|
||||
index 776b444..f1f18d0 100644
|
||||
--- a/arch/arm/mach-omap2/board-overo.c
|
||||
+++ b/arch/arm/mach-omap2/board-overo.c
|
||||
@@ -265,15 +265,6 @@ static struct omap_dss_board_info overo_dss_data = {
|
||||
.default_device = &overo_dvi_device,
|
||||
};
|
||||
|
||||
-static struct regulator_consumer_supply overo_vdda_dac_supply[] = {
|
||||
- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
|
||||
-};
|
||||
-
|
||||
-static struct regulator_consumer_supply overo_vdds_dsi_supply[] = {
|
||||
- REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
|
||||
- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
|
||||
-};
|
||||
-
|
||||
static struct mtd_partition overo_nand_partitions[] = {
|
||||
{
|
||||
.name = "xloader",
|
||||
@@ -447,46 +438,19 @@ static struct regulator_init_data overo_vmmc1 = {
|
||||
.consumer_supplies = overo_vmmc1_supply,
|
||||
};
|
||||
|
||||
-/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
|
||||
-static struct regulator_init_data overo_vdac = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(overo_vdda_dac_supply),
|
||||
- .consumer_supplies = overo_vdda_dac_supply,
|
||||
-};
|
||||
-
|
||||
-/* VPLL2 for digital video outputs */
|
||||
-static struct regulator_init_data overo_vpll2 = {
|
||||
- .constraints = {
|
||||
- .name = "VDVI",
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(overo_vdds_dsi_supply),
|
||||
- .consumer_supplies = overo_vdds_dsi_supply,
|
||||
-};
|
||||
-
|
||||
static struct twl4030_platform_data overo_twldata = {
|
||||
.gpio = &overo_gpio_data,
|
||||
.vmmc1 = &overo_vmmc1,
|
||||
- .vdac = &overo_vdac,
|
||||
- .vpll2 = &overo_vpll2,
|
||||
};
|
||||
|
||||
static int __init overo_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&overo_twldata,
|
||||
- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0);
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
|
||||
+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
+
|
||||
+ overo_twldata.vpll2->constraints.name = "VDVI";
|
||||
+
|
||||
omap3_pmic_init("tps65950", &overo_twldata);
|
||||
/* i2c2 pins are used for gpio */
|
||||
omap_register_i2c_bus(3, 400, NULL, 0);
|
||||
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
|
||||
index 75be074..bdb24db 100644
|
||||
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
|
||||
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
|
||||
@@ -394,10 +394,6 @@ static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
|
||||
REGULATOR_SUPPLY("vdd", "2-0063"),
|
||||
};
|
||||
|
||||
-static struct regulator_consumer_supply rx51_vdac_supply[] = {
|
||||
- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
|
||||
-};
|
||||
-
|
||||
static struct regulator_init_data rx51_vaux1 = {
|
||||
.constraints = {
|
||||
.name = "V28",
|
||||
@@ -514,21 +510,6 @@ static struct regulator_init_data rx51_vsim = {
|
||||
.consumer_supplies = rx51_vsim_supply,
|
||||
};
|
||||
|
||||
-static struct regulator_init_data rx51_vdac = {
|
||||
- .constraints = {
|
||||
- .name = "VDAC",
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .apply_uV = true,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(rx51_vdac_supply),
|
||||
- .consumer_supplies = rx51_vdac_supply,
|
||||
-};
|
||||
-
|
||||
static struct regulator_init_data rx51_vio = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
@@ -781,7 +762,6 @@ static struct twl4030_platform_data rx51_twldata __initdata = {
|
||||
.vaux4 = &rx51_vaux4,
|
||||
.vmmc1 = &rx51_vmmc1,
|
||||
.vsim = &rx51_vsim,
|
||||
- .vdac = &rx51_vdac,
|
||||
.vio = &rx51_vio,
|
||||
};
|
||||
|
||||
@@ -838,7 +818,12 @@ static int __init rx51_i2c_init(void)
|
||||
}
|
||||
rx51_twldata.vmmc2 = &rx51_vmmc2;
|
||||
omap3_pmic_get_config(&rx51_twldata,
|
||||
- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, 0);
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC,
|
||||
+ TWL_COMMON_REGULATOR_VDAC);
|
||||
+
|
||||
+ rx51_twldata.vdac->constraints.apply_uV = true;
|
||||
+ rx51_twldata.vdac->constraints.name = "VDAC";
|
||||
+
|
||||
omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata);
|
||||
omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
|
||||
ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
|
||||
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
|
||||
index 6d8df1b..13a6442 100644
|
||||
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
|
||||
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
|
||||
@@ -226,41 +226,6 @@ static struct omap2_hsmmc_info mmc[] = {
|
||||
{} /* Terminator */
|
||||
};
|
||||
|
||||
-static struct regulator_consumer_supply zoom_vpll2_supplies[] = {
|
||||
- REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
|
||||
- REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
|
||||
-};
|
||||
-
|
||||
-static struct regulator_consumer_supply zoom_vdda_dac_supply[] = {
|
||||
- REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data zoom_vpll2 = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(zoom_vpll2_supplies),
|
||||
- .consumer_supplies = zoom_vpll2_supplies,
|
||||
-};
|
||||
-
|
||||
-static struct regulator_init_data zoom_vdac = {
|
||||
- .constraints = {
|
||||
- .min_uV = 1800000,
|
||||
- .max_uV = 1800000,
|
||||
- .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
- | REGULATOR_MODE_STANDBY,
|
||||
- .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
- | REGULATOR_CHANGE_STATUS,
|
||||
- },
|
||||
- .num_consumer_supplies = ARRAY_SIZE(zoom_vdda_dac_supply),
|
||||
- .consumer_supplies = zoom_vdda_dac_supply,
|
||||
-};
|
||||
-
|
||||
static int zoom_twl_gpio_setup(struct device *dev,
|
||||
unsigned gpio, unsigned ngpio)
|
||||
{
|
||||
@@ -299,15 +264,14 @@ static struct twl4030_platform_data zoom_twldata = {
|
||||
.vmmc1 = &zoom_vmmc1,
|
||||
.vmmc2 = &zoom_vmmc2,
|
||||
.vsim = &zoom_vsim,
|
||||
- .vpll2 = &zoom_vpll2,
|
||||
- .vdac = &zoom_vdac,
|
||||
};
|
||||
|
||||
static int __init omap_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&zoom_twldata,
|
||||
- TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
|
||||
- TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, 0);
|
||||
+ TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
|
||||
+ TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
|
||||
+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
|
||||
if (machine_is_omap_zoom2()) {
|
||||
struct twl4030_codec_audio_data *audio_data;
|
||||
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
|
||||
index 9e8decf..3aaa46f 100644
|
||||
--- a/arch/arm/mach-omap2/twl-common.c
|
||||
+++ b/arch/arm/mach-omap2/twl-common.c
|
||||
@@ -87,6 +87,41 @@ static struct twl4030_codec_data omap3_codec_pdata = {
|
||||
.audio = &omap3_audio,
|
||||
};
|
||||
|
||||
+static struct regulator_consumer_supply omap3_vdda_dac_supplies[] = {
|
||||
+ REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
|
||||
+};
|
||||
+
|
||||
+static struct regulator_init_data omap3_vdac_idata = {
|
||||
+ .constraints = {
|
||||
+ .min_uV = 1800000,
|
||||
+ .max_uV = 1800000,
|
||||
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
+ | REGULATOR_MODE_STANDBY,
|
||||
+ .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
+ | REGULATOR_CHANGE_STATUS,
|
||||
+ },
|
||||
+ .num_consumer_supplies = ARRAY_SIZE(omap3_vdda_dac_supplies),
|
||||
+ .consumer_supplies = omap3_vdda_dac_supplies,
|
||||
+};
|
||||
+
|
||||
+static struct regulator_consumer_supply omap3_vpll2_supplies[] = {
|
||||
+ REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
|
||||
+ REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
|
||||
+};
|
||||
+
|
||||
+static struct regulator_init_data omap3_vpll2_idata = {
|
||||
+ .constraints = {
|
||||
+ .min_uV = 1800000,
|
||||
+ .max_uV = 1800000,
|
||||
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
+ | REGULATOR_MODE_STANDBY,
|
||||
+ .valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
+ | REGULATOR_CHANGE_STATUS,
|
||||
+ },
|
||||
+ .num_consumer_supplies = ARRAY_SIZE(omap3_vpll2_supplies),
|
||||
+ .consumer_supplies = omap3_vpll2_supplies,
|
||||
+};
|
||||
+
|
||||
static struct regulator_init_data omap4_vdac_idata = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
@@ -259,4 +294,11 @@ void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
|
||||
|
||||
if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->codec)
|
||||
pmic_data->codec = &omap3_codec_pdata;
|
||||
+
|
||||
+ /* Common regulator configurations */
|
||||
+ if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
|
||||
+ pmic_data->vdac = &omap3_vdac_idata;
|
||||
+
|
||||
+ if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2)
|
||||
+ pmic_data->vpll2 = &omap3_vpll2_idata;
|
||||
}
|
||||
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
|
||||
index 3b4b05d..5e83a5b 100644
|
||||
--- a/arch/arm/mach-omap2/twl-common.h
|
||||
+++ b/arch/arm/mach-omap2/twl-common.h
|
||||
@@ -21,6 +21,11 @@
|
||||
#define TWL_COMMON_REGULATOR_VUSB (1 << 9)
|
||||
#define TWL_COMMON_REGULATOR_CLK32KG (1 << 10)
|
||||
|
||||
+/* TWL4030 LDO regulators */
|
||||
+#define TWL_COMMON_REGULATOR_VPLL1 (1 << 4)
|
||||
+#define TWL_COMMON_REGULATOR_VPLL2 (1 << 5)
|
||||
+
|
||||
+
|
||||
struct twl4030_platform_data;
|
||||
|
||||
void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+45
@@ -0,0 +1,45 @@
|
||||
From 1274a75667a90dd8deeeee99911e4528ffd57b21 Mon Sep 17 00:00:00 2001
|
||||
From: Jarkko Nikula <jhnikula@gmail.com>
|
||||
Date: Fri, 1 Jul 2011 08:52:26 +0000
|
||||
Subject: [PATCH 026/149] omap: mcbsp: Remove rx_/tx_word_length variables
|
||||
|
||||
These variables got unused after ("omap: mcbsp: Drop in-driver transfer
|
||||
support") but was noticed only afterwards.
|
||||
|
||||
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
---
|
||||
arch/arm/plat-omap/include/plat/mcbsp.h | 2 --
|
||||
arch/arm/plat-omap/mcbsp.c | 3 ---
|
||||
2 files changed, 0 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
|
||||
index 6c53508..63464ad 100644
|
||||
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
|
||||
@@ -385,8 +385,6 @@ struct omap_mcbsp {
|
||||
void __iomem *io_base;
|
||||
u8 id;
|
||||
u8 free;
|
||||
- omap_mcbsp_word_length rx_word_length;
|
||||
- omap_mcbsp_word_length tx_word_length;
|
||||
|
||||
int rx_irq;
|
||||
int tx_irq;
|
||||
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
|
||||
index 455eadc..3c1fbdc 100644
|
||||
--- a/arch/arm/plat-omap/mcbsp.c
|
||||
+++ b/arch/arm/plat-omap/mcbsp.c
|
||||
@@ -869,9 +869,6 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx)
|
||||
if (cpu_is_omap34xx())
|
||||
omap_st_start(mcbsp);
|
||||
|
||||
- mcbsp->rx_word_length = (MCBSP_READ_CACHE(mcbsp, RCR1) >> 5) & 0x7;
|
||||
- mcbsp->tx_word_length = (MCBSP_READ_CACHE(mcbsp, XCR1) >> 5) & 0x7;
|
||||
-
|
||||
/* Only enable SRG, if McBSP is master */
|
||||
w = MCBSP_READ_CACHE(mcbsp, PCR0);
|
||||
if (w & (FSXM | FSRM | CLKXM | CLKRM))
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+68
@@ -0,0 +1,68 @@
|
||||
From 22df47275fc045af1cc0ac0fd4cd44b4b0021729 Mon Sep 17 00:00:00 2001
|
||||
From: Jarkko Nikula <jhnikula@gmail.com>
|
||||
Date: Fri, 1 Jul 2011 08:52:27 +0000
|
||||
Subject: [PATCH 027/149] omap: mcbsp: Remove port number enums
|
||||
|
||||
These McBSP port number enums are used only in two places in the McBSP code
|
||||
so we may remove then and just use numeric values like rest of the code does.
|
||||
|
||||
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
|
||||
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
||||
---
|
||||
arch/arm/mach-omap1/mcbsp.c | 4 ++--
|
||||
arch/arm/plat-omap/include/plat/mcbsp.h | 10 +---------
|
||||
2 files changed, 3 insertions(+), 11 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
|
||||
index d9af981..ab7395d 100644
|
||||
--- a/arch/arm/mach-omap1/mcbsp.c
|
||||
+++ b/arch/arm/mach-omap1/mcbsp.c
|
||||
@@ -38,7 +38,7 @@ static void omap1_mcbsp_request(unsigned int id)
|
||||
* On 1510, 1610 and 1710, McBSP1 and McBSP3
|
||||
* are DSP public peripherals.
|
||||
*/
|
||||
- if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
|
||||
+ if (id == 0 || id == 2) {
|
||||
if (dsp_use++ == 0) {
|
||||
api_clk = clk_get(NULL, "api_ck");
|
||||
dsp_clk = clk_get(NULL, "dsp_ck");
|
||||
@@ -59,7 +59,7 @@ static void omap1_mcbsp_request(unsigned int id)
|
||||
|
||||
static void omap1_mcbsp_free(unsigned int id)
|
||||
{
|
||||
- if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
|
||||
+ if (id == 0 || id == 2) {
|
||||
if (--dsp_use == 0) {
|
||||
if (!IS_ERR(api_clk)) {
|
||||
clk_disable(api_clk);
|
||||
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
|
||||
index 63464ad..9882c65 100644
|
||||
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
|
||||
@@ -33,7 +33,7 @@
|
||||
#define OMAP_MCBSP_PLATFORM_DEVICE(port_nr) \
|
||||
static struct platform_device omap_mcbsp##port_nr = { \
|
||||
.name = "omap-mcbsp-dai", \
|
||||
- .id = OMAP_MCBSP##port_nr, \
|
||||
+ .id = port_nr - 1, \
|
||||
}
|
||||
|
||||
#define MCBSP_CONFIG_TYPE2 0x2
|
||||
@@ -332,14 +332,6 @@ struct omap_mcbsp_reg_cfg {
|
||||
};
|
||||
|
||||
typedef enum {
|
||||
- OMAP_MCBSP1 = 0,
|
||||
- OMAP_MCBSP2,
|
||||
- OMAP_MCBSP3,
|
||||
- OMAP_MCBSP4,
|
||||
- OMAP_MCBSP5
|
||||
-} omap_mcbsp_id;
|
||||
-
|
||||
-typedef enum {
|
||||
OMAP_MCBSP_WORD_8 = 0,
|
||||
OMAP_MCBSP_WORD_12,
|
||||
OMAP_MCBSP_WORD_16,
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+31
@@ -0,0 +1,31 @@
|
||||
From 9a21aa1140e4c3c5621726e6eb5d3bd91ea85a3e Mon Sep 17 00:00:00 2001
|
||||
From: Paul Walmsley <paul@pwsan.com>
|
||||
Date: Sat, 9 Jul 2011 18:00:25 -0600
|
||||
Subject: [PATCH 028/149] OMAP: dmtimer: add missing include
|
||||
|
||||
After commit caf64f2fdc48472995d40656eb1a75524c464447 ("omap: Make a subset
|
||||
of dmtimer functions into inline functions"),
|
||||
arch/arm/plat-omap/include/plat/dmtimer.h is missing an include of linux/io.h
|
||||
- add it.
|
||||
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
Cc: Tony Lindgren <tony@atomide.com>
|
||||
---
|
||||
arch/arm/plat-omap/include/plat/dmtimer.h | 1 +
|
||||
1 files changed, 1 insertions(+), 0 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
index d0f3a2d..eb5d16c 100644
|
||||
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
|
||||
@@ -34,6 +34,7 @@
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/delay.h>
|
||||
+#include <linux/io.h>
|
||||
|
||||
#ifndef __ASM_ARCH_DMTIMER_H
|
||||
#define __ASM_ARCH_DMTIMER_H
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+130
@@ -0,0 +1,130 @@
|
||||
From 6c2e1f27c319dfd7655b820752f5b347c331dc06 Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Fri, 1 Jul 2011 22:54:00 +0200
|
||||
Subject: [PATCH 029/149] OMAP2+: hwmod: Fix smart-standby + wakeup support
|
||||
|
||||
The commit 86009eb326afde34ffdc5648cd344aa86b8d58d4 was adding
|
||||
the wakeup support for new OMAP4 IPs. This support is incomplete for
|
||||
busmaster IPs that need as well to use smart-standby with wakeup.
|
||||
|
||||
This new standbymode is suported on HSI and USB_HOST_FS for the moment.
|
||||
|
||||
Add the new MSTANDBY_SMART_WKUP flag to mark the IPs that support this
|
||||
capability.
|
||||
|
||||
Enable this new mode when applicable in _enable_wakeup, _disable_wakeup,
|
||||
_enable_sysc and _idle_sysc.
|
||||
|
||||
The omap_hwmod_44xx_data.c will have to be updated to add this new flag.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Signed-off-by: Djamil Elaidi <d-elaidi@ti.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/omap_hwmod.c | 34 +++++++++++++++++++++----
|
||||
arch/arm/plat-omap/include/plat/omap_hwmod.h | 2 +-
|
||||
2 files changed, 29 insertions(+), 7 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
|
||||
index 293fa6c..384d3c3 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod.c
|
||||
@@ -391,7 +391,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
|
||||
|
||||
if (!oh->class->sysc ||
|
||||
!((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
|
||||
- (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
|
||||
+ (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
|
||||
+ (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
|
||||
return -EINVAL;
|
||||
|
||||
if (!oh->class->sysc->sysc_fields) {
|
||||
@@ -405,6 +406,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
|
||||
|
||||
if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
|
||||
_set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
|
||||
+ if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
|
||||
+ _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
|
||||
|
||||
/* XXX test pwrdm_get_wken for this hwmod's subsystem */
|
||||
|
||||
@@ -426,7 +429,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
|
||||
|
||||
if (!oh->class->sysc ||
|
||||
!((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
|
||||
- (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
|
||||
+ (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
|
||||
+ (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
|
||||
return -EINVAL;
|
||||
|
||||
if (!oh->class->sysc->sysc_fields) {
|
||||
@@ -440,6 +444,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
|
||||
|
||||
if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
|
||||
_set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
|
||||
+ if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
|
||||
+ _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
|
||||
|
||||
/* XXX test pwrdm_get_wken for this hwmod's subsystem */
|
||||
|
||||
@@ -781,8 +787,16 @@ static void _enable_sysc(struct omap_hwmod *oh)
|
||||
}
|
||||
|
||||
if (sf & SYSC_HAS_MIDLEMODE) {
|
||||
- idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
|
||||
- HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
|
||||
+ if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
|
||||
+ idlemode = HWMOD_IDLEMODE_NO;
|
||||
+ } else {
|
||||
+ if (sf & SYSC_HAS_ENAWAKEUP)
|
||||
+ _enable_wakeup(oh, &v);
|
||||
+ if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
|
||||
+ idlemode = HWMOD_IDLEMODE_SMART_WKUP;
|
||||
+ else
|
||||
+ idlemode = HWMOD_IDLEMODE_SMART;
|
||||
+ }
|
||||
_set_master_standbymode(oh, idlemode, &v);
|
||||
}
|
||||
|
||||
@@ -840,8 +854,16 @@ static void _idle_sysc(struct omap_hwmod *oh)
|
||||
}
|
||||
|
||||
if (sf & SYSC_HAS_MIDLEMODE) {
|
||||
- idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
|
||||
- HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
|
||||
+ if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
|
||||
+ idlemode = HWMOD_IDLEMODE_FORCE;
|
||||
+ } else {
|
||||
+ if (sf & SYSC_HAS_ENAWAKEUP)
|
||||
+ _enable_wakeup(oh, &v);
|
||||
+ if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
|
||||
+ idlemode = HWMOD_IDLEMODE_SMART_WKUP;
|
||||
+ else
|
||||
+ idlemode = HWMOD_IDLEMODE_SMART;
|
||||
+ }
|
||||
_set_master_standbymode(oh, idlemode, &v);
|
||||
}
|
||||
|
||||
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
|
||||
index 1adea9c..e93438c 100644
|
||||
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
|
||||
@@ -77,7 +77,6 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
|
||||
#define HWMOD_IDLEMODE_FORCE (1 << 0)
|
||||
#define HWMOD_IDLEMODE_NO (1 << 1)
|
||||
#define HWMOD_IDLEMODE_SMART (1 << 2)
|
||||
-/* Slave idle mode flag only */
|
||||
#define HWMOD_IDLEMODE_SMART_WKUP (1 << 3)
|
||||
|
||||
/**
|
||||
@@ -258,6 +257,7 @@ struct omap_hwmod_ocp_if {
|
||||
#define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
|
||||
#define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
|
||||
#define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
|
||||
+#define MSTANDBY_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP << MASTER_STANDBY_SHIFT)
|
||||
|
||||
/* omap_hwmod_sysconfig.sysc_flags capability flags */
|
||||
#define SYSC_HAS_AUTOIDLE (1 << 0)
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+61
@@ -0,0 +1,61 @@
|
||||
From b487cae55998f8e6baa7047eeb89a193cd218a8c Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Fri, 1 Jul 2011 22:54:01 +0200
|
||||
Subject: [PATCH 030/149] OMAP4: hwmod data: Add MSTANDBY_SMART_WKUP flag
|
||||
|
||||
Add the flag to every IPs that support it to allow the
|
||||
framework to enable it instead of the SMART_STANDBY default
|
||||
mode.
|
||||
Without that, an IP with busmaster capability will not
|
||||
be able to wakeup the interconnect at all.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 9 +++++----
|
||||
1 files changed, 5 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
index e1c69ff..8cbbfbf 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
@@ -660,7 +660,8 @@ static struct omap_hwmod_class_sysconfig omap44xx_aess_sysc = {
|
||||
.sysc_offs = 0x0010,
|
||||
.sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
- MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
|
||||
+ MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART |
|
||||
+ MSTANDBY_SMART_WKUP),
|
||||
.sysc_fields = &omap_hwmod_sysc_type2,
|
||||
};
|
||||
|
||||
@@ -2044,7 +2045,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_hsi_sysc = {
|
||||
SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
|
||||
- MSTANDBY_SMART),
|
||||
+ MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
@@ -2446,7 +2447,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = {
|
||||
SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
|
||||
- MSTANDBY_SMART),
|
||||
+ MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
|
||||
.sysc_fields = &omap_hwmod_sysc_type2,
|
||||
};
|
||||
|
||||
@@ -3420,7 +3421,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_mmc_sysc = {
|
||||
SYSC_HAS_SOFTRESET),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
|
||||
- MSTANDBY_SMART),
|
||||
+ MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
|
||||
.sysc_fields = &omap_hwmod_sysc_type2,
|
||||
};
|
||||
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+37
@@ -0,0 +1,37 @@
|
||||
From 4795bf332f1d577bc6e37cf54d36de26b5ea09dc Mon Sep 17 00:00:00 2001
|
||||
From: Miguel Vadillo <vadillo@ti.com>
|
||||
Date: Fri, 1 Jul 2011 22:54:02 +0200
|
||||
Subject: [PATCH 031/149] OMAP2+: hwmod: Enable module in shutdown to access sysconfig
|
||||
|
||||
When calling the shutdown, the module may be already in idle.
|
||||
Accessing the sysconfig register will then lead to a crash.
|
||||
In that case, re-enable the module in order to allow the access
|
||||
to the sysconfig register.
|
||||
|
||||
Signed-off-by: Miguel Vadillo <vadillo@ti.com>
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/omap_hwmod.c | 5 ++++-
|
||||
1 files changed, 4 insertions(+), 1 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
|
||||
index 384d3c3..cbc2a8a 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod.c
|
||||
@@ -1396,8 +1396,11 @@ static int _shutdown(struct omap_hwmod *oh)
|
||||
}
|
||||
}
|
||||
|
||||
- if (oh->class->sysc)
|
||||
+ if (oh->class->sysc) {
|
||||
+ if (oh->_state == _HWMOD_STATE_IDLE)
|
||||
+ _enable(oh);
|
||||
_shutdown_sysc(oh);
|
||||
+ }
|
||||
|
||||
/*
|
||||
* If an IP contains only one HW reset line, then assert it
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+65
@@ -0,0 +1,65 @@
|
||||
From aa6d37a4dfb78110b79632cd7829750f2dd6b274 Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Fri, 1 Jul 2011 22:54:03 +0200
|
||||
Subject: [PATCH 032/149] OMAP2+: hwmod: Do not write the enawakeup bit if SYSC_HAS_ENAWAKEUP is not set
|
||||
|
||||
The Type 2 type of IPs will not have any enawakeup bit in their sysconfig.
|
||||
Writing to that bit will instead trigger a softreset.
|
||||
Check the flag to write this bit only if the module supports it.
|
||||
|
||||
Reported-by: Miguel Vadillo <vadillo@ti.com>
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/omap_hwmod.c | 14 ++++----------
|
||||
1 files changed, 4 insertions(+), 10 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
|
||||
index cbc2a8a..3800084 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod.c
|
||||
@@ -387,8 +387,6 @@ static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
|
||||
*/
|
||||
static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
|
||||
{
|
||||
- u32 wakeup_mask;
|
||||
-
|
||||
if (!oh->class->sysc ||
|
||||
!((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
|
||||
(oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
|
||||
@@ -400,9 +398,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
- wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
|
||||
-
|
||||
- *v |= wakeup_mask;
|
||||
+ if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
|
||||
+ *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
|
||||
|
||||
if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
|
||||
_set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
|
||||
@@ -425,8 +422,6 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
|
||||
*/
|
||||
static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
|
||||
{
|
||||
- u32 wakeup_mask;
|
||||
-
|
||||
if (!oh->class->sysc ||
|
||||
!((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
|
||||
(oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
|
||||
@@ -438,9 +433,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
- wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
|
||||
-
|
||||
- *v &= ~wakeup_mask;
|
||||
+ if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
|
||||
+ *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
|
||||
|
||||
if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
|
||||
_set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+33
@@ -0,0 +1,33 @@
|
||||
From 045a9fc0357b8409ab4f9e549f20123c3ac7b353 Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Fri, 1 Jul 2011 22:54:04 +0200
|
||||
Subject: [PATCH 033/149] OMAP2+: hwmod: Remove _populate_mpu_rt_base warning
|
||||
|
||||
It is perfectly valid for some hwmod to not have any
|
||||
register target address for sysconfig. This is especially
|
||||
true for interconnect hwmods.
|
||||
Remove the warning.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/omap_hwmod.c | 3 ---
|
||||
1 files changed, 0 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
|
||||
index 3800084..f401417 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod.c
|
||||
@@ -1704,9 +1704,6 @@ static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
|
||||
return 0;
|
||||
|
||||
oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
|
||||
- if (!oh->_mpu_rt_va)
|
||||
- pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n",
|
||||
- __func__, oh->name);
|
||||
|
||||
return 0;
|
||||
}
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+87
@@ -0,0 +1,87 @@
|
||||
From f9c8ace6aaf0d0c9ccac3c22226340db2cabdf17 Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Fri, 1 Jul 2011 22:54:05 +0200
|
||||
Subject: [PATCH 034/149] OMAP2+: hwmod: Fix the HW reset management
|
||||
|
||||
The HW reset must be de-assert after the clocks are enabled
|
||||
but before waiting for the target to be ready. Otherwise the
|
||||
reset might not work properly since the clock is not running
|
||||
to proceed the reset.
|
||||
|
||||
De-assert the reset after _enable_clocks and before
|
||||
_wait_target_ready.
|
||||
Re-assert it only when the clocks are disabled.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/omap_hwmod.c | 32 ++++++++++++++++----------------
|
||||
1 files changed, 16 insertions(+), 16 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
|
||||
index f401417..df91bb1 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod.c
|
||||
@@ -1250,15 +1250,6 @@ static int _enable(struct omap_hwmod *oh)
|
||||
|
||||
pr_debug("omap_hwmod: %s: enabling\n", oh->name);
|
||||
|
||||
- /*
|
||||
- * If an IP contains only one HW reset line, then de-assert it in order
|
||||
- * to allow to enable the clocks. Otherwise the PRCM will return
|
||||
- * Intransition status, and the init will failed.
|
||||
- */
|
||||
- if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
|
||||
- oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
|
||||
- _deassert_hardreset(oh, oh->rst_lines[0].name);
|
||||
-
|
||||
/* Mux pins for device runtime if populated */
|
||||
if (oh->mux && (!oh->mux->enabled ||
|
||||
((oh->_state == _HWMOD_STATE_IDLE) &&
|
||||
@@ -1268,6 +1259,15 @@ static int _enable(struct omap_hwmod *oh)
|
||||
_add_initiator_dep(oh, mpu_oh);
|
||||
_enable_clocks(oh);
|
||||
|
||||
+ /*
|
||||
+ * If an IP contains only one HW reset line, then de-assert it in order
|
||||
+ * to allow the module state transition. Otherwise the PRCM will return
|
||||
+ * Intransition status, and the init will failed.
|
||||
+ */
|
||||
+ if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
|
||||
+ oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
|
||||
+ _deassert_hardreset(oh, oh->rst_lines[0].name);
|
||||
+
|
||||
r = _wait_target_ready(oh);
|
||||
if (!r) {
|
||||
oh->_state = _HWMOD_STATE_ENABLED;
|
||||
@@ -1396,13 +1396,6 @@ static int _shutdown(struct omap_hwmod *oh)
|
||||
_shutdown_sysc(oh);
|
||||
}
|
||||
|
||||
- /*
|
||||
- * If an IP contains only one HW reset line, then assert it
|
||||
- * before disabling the clocks and shutting down the IP.
|
||||
- */
|
||||
- if (oh->rst_lines_cnt == 1)
|
||||
- _assert_hardreset(oh, oh->rst_lines[0].name);
|
||||
-
|
||||
/* clocks and deps are already disabled in idle */
|
||||
if (oh->_state == _HWMOD_STATE_ENABLED) {
|
||||
_del_initiator_dep(oh, mpu_oh);
|
||||
@@ -1411,6 +1404,13 @@ static int _shutdown(struct omap_hwmod *oh)
|
||||
}
|
||||
/* XXX Should this code also force-disable the optional clocks? */
|
||||
|
||||
+ /*
|
||||
+ * If an IP contains only one HW reset line, then assert it
|
||||
+ * after disabling the clocks and before shutting down the IP.
|
||||
+ */
|
||||
+ if (oh->rst_lines_cnt == 1)
|
||||
+ _assert_hardreset(oh, oh->rst_lines[0].name);
|
||||
+
|
||||
/* Mux pins to safe mode or use populated off mode values */
|
||||
if (oh->mux)
|
||||
omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+30
@@ -0,0 +1,30 @@
|
||||
From a713416ce6fee5ffd2f5e00d539d86d9be9d8cdc Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Fri, 1 Jul 2011 22:54:06 +0200
|
||||
Subject: [PATCH 035/149] OMAP: hwmod: Add warnings if enable failed
|
||||
|
||||
Change the debug into warning to check what IPs are failing.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Rajendra Nayak <rnayak@ti.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/omap_hwmod.c | 2 ++
|
||||
1 files changed, 2 insertions(+), 0 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
|
||||
index df91bb1..64e9830 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod.c
|
||||
@@ -944,6 +944,8 @@ static int _init_clocks(struct omap_hwmod *oh, void *data)
|
||||
|
||||
if (!ret)
|
||||
oh->_state = _HWMOD_STATE_CLKS_INITED;
|
||||
+ else
|
||||
+ pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
|
||||
|
||||
return ret;
|
||||
}
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+95
@@ -0,0 +1,95 @@
|
||||
From 57560af36861b7010fae509f2ddd75127c0c45df Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Fri, 1 Jul 2011 22:54:07 +0200
|
||||
Subject: [PATCH 036/149] OMAP: hwmod: Move pr_debug to improve the readability
|
||||
|
||||
Move the pr_debug at the top of the function
|
||||
to trace the entry even if the first test is failing.
|
||||
That help understanding that we entered the function
|
||||
but failed in it.
|
||||
|
||||
Move the _enable last part out of the test to reduce
|
||||
indentation and improve readability.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Paul Walmsley <paul@pwsan.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/omap_hwmod.c | 32 +++++++++++++++++---------------
|
||||
1 files changed, 17 insertions(+), 15 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
|
||||
index 64e9830..e530bcb 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod.c
|
||||
@@ -1242,6 +1242,8 @@ static int _enable(struct omap_hwmod *oh)
|
||||
{
|
||||
int r;
|
||||
|
||||
+ pr_debug("omap_hwmod: %s: enabling\n", oh->name);
|
||||
+
|
||||
if (oh->_state != _HWMOD_STATE_INITIALIZED &&
|
||||
oh->_state != _HWMOD_STATE_IDLE &&
|
||||
oh->_state != _HWMOD_STATE_DISABLED) {
|
||||
@@ -1250,8 +1252,6 @@ static int _enable(struct omap_hwmod *oh)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
- pr_debug("omap_hwmod: %s: enabling\n", oh->name);
|
||||
-
|
||||
/* Mux pins for device runtime if populated */
|
||||
if (oh->mux && (!oh->mux->enabled ||
|
||||
((oh->_state == _HWMOD_STATE_IDLE) &&
|
||||
@@ -1271,19 +1271,21 @@ static int _enable(struct omap_hwmod *oh)
|
||||
_deassert_hardreset(oh, oh->rst_lines[0].name);
|
||||
|
||||
r = _wait_target_ready(oh);
|
||||
- if (!r) {
|
||||
- oh->_state = _HWMOD_STATE_ENABLED;
|
||||
-
|
||||
- /* Access the sysconfig only if the target is ready */
|
||||
- if (oh->class->sysc) {
|
||||
- if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
|
||||
- _update_sysc_cache(oh);
|
||||
- _enable_sysc(oh);
|
||||
- }
|
||||
- } else {
|
||||
- _disable_clocks(oh);
|
||||
+ if (r) {
|
||||
pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
|
||||
oh->name, r);
|
||||
+ _disable_clocks(oh);
|
||||
+
|
||||
+ return r;
|
||||
+ }
|
||||
+
|
||||
+ oh->_state = _HWMOD_STATE_ENABLED;
|
||||
+
|
||||
+ /* Access the sysconfig only if the target is ready */
|
||||
+ if (oh->class->sysc) {
|
||||
+ if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
|
||||
+ _update_sysc_cache(oh);
|
||||
+ _enable_sysc(oh);
|
||||
}
|
||||
|
||||
return r;
|
||||
@@ -1299,14 +1301,14 @@ static int _enable(struct omap_hwmod *oh)
|
||||
*/
|
||||
static int _idle(struct omap_hwmod *oh)
|
||||
{
|
||||
+ pr_debug("omap_hwmod: %s: idling\n", oh->name);
|
||||
+
|
||||
if (oh->_state != _HWMOD_STATE_ENABLED) {
|
||||
WARN(1, "omap_hwmod: %s: idle state can only be entered from "
|
||||
"enabled state\n", oh->name);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
- pr_debug("omap_hwmod: %s: idling\n", oh->name);
|
||||
-
|
||||
if (oh->class->sysc)
|
||||
_idle_sysc(oh);
|
||||
_del_initiator_dep(oh, mpu_oh);
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+3529
File diff suppressed because it is too large
Load Diff
+1958
File diff suppressed because it is too large
Load Diff
+2904
File diff suppressed because it is too large
Load Diff
+1815
File diff suppressed because it is too large
Load Diff
+1382
File diff suppressed because it is too large
Load Diff
+935
@@ -0,0 +1,935 @@
|
||||
From 5d6b95653e3acd8d5f1d45b3668c29331a74c19e Mon Sep 17 00:00:00 2001
|
||||
From: Paul Walmsley <paul@pwsan.com>
|
||||
Date: Sat, 9 Jul 2011 19:14:07 -0600
|
||||
Subject: [PATCH 042/149] omap_hwmod: share identical omap_hwmod_dma_info arrays
|
||||
|
||||
To reduce kernel source file data duplication, share struct
|
||||
omap_hwmod_dma_info arrays across OMAP2xxx and 3xxx hwmod data files.
|
||||
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 87 ++----------------
|
||||
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 95 +++-----------------
|
||||
.../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | 92 +++++++++++++++++++
|
||||
arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 6 ++
|
||||
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 89 ++----------------
|
||||
arch/arm/mach-omap2/omap_hwmod_common_data.c | 20 ----
|
||||
arch/arm/mach-omap2/omap_hwmod_common_data.h | 15 +++
|
||||
7 files changed, 144 insertions(+), 260 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
|
||||
index 60c817e..6acc01f 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
|
||||
@@ -828,12 +828,6 @@ static struct omap_hwmod_class uart_class = {
|
||||
|
||||
/* UART1 */
|
||||
|
||||
-static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
|
||||
- { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
|
||||
- { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = {
|
||||
&omap2_l4_core__uart1,
|
||||
};
|
||||
@@ -841,7 +835,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = {
|
||||
static struct omap_hwmod omap2420_uart1_hwmod = {
|
||||
.name = "uart1",
|
||||
.mpu_irqs = omap2_uart1_mpu_irqs,
|
||||
- .sdma_reqs = uart1_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_uart1_sdma_reqs,
|
||||
.main_clk = "uart1_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -860,12 +854,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = {
|
||||
|
||||
/* UART2 */
|
||||
|
||||
-static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
|
||||
- { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
|
||||
- { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = {
|
||||
&omap2_l4_core__uart2,
|
||||
};
|
||||
@@ -873,7 +861,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = {
|
||||
static struct omap_hwmod omap2420_uart2_hwmod = {
|
||||
.name = "uart2",
|
||||
.mpu_irqs = omap2_uart2_mpu_irqs,
|
||||
- .sdma_reqs = uart2_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_uart2_sdma_reqs,
|
||||
.main_clk = "uart2_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -892,12 +880,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = {
|
||||
|
||||
/* UART3 */
|
||||
|
||||
-static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
|
||||
- { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
|
||||
- { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = {
|
||||
&omap2_l4_core__uart3,
|
||||
};
|
||||
@@ -905,7 +887,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = {
|
||||
static struct omap_hwmod omap2420_uart3_hwmod = {
|
||||
.name = "uart3",
|
||||
.mpu_irqs = omap2_uart3_mpu_irqs,
|
||||
- .sdma_reqs = uart3_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_uart3_sdma_reqs,
|
||||
.main_clk = "uart3_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -940,11 +922,6 @@ static struct omap_hwmod_class omap2420_dss_hwmod_class = {
|
||||
.sysc = &omap2420_dss_sysc,
|
||||
};
|
||||
|
||||
-static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = {
|
||||
- { .name = "dispc", .dma_req = 5 },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
/* dss */
|
||||
/* dss master ports */
|
||||
static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = {
|
||||
@@ -980,7 +957,7 @@ static struct omap_hwmod omap2420_dss_core_hwmod = {
|
||||
.name = "dss_core",
|
||||
.class = &omap2420_dss_hwmod_class,
|
||||
.main_clk = "dss1_fck", /* instead of dss_fck */
|
||||
- .sdma_reqs = omap2420_dss_sdma_chs,
|
||||
+ .sdma_reqs = omap2xxx_dss_sdma_chs,
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.prcm_reg_id = 1,
|
||||
@@ -1183,12 +1160,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr;
|
||||
|
||||
/* I2C1 */
|
||||
|
||||
-static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
|
||||
- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
|
||||
- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = {
|
||||
&omap2420_l4_core__i2c1,
|
||||
};
|
||||
@@ -1196,7 +1167,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = {
|
||||
static struct omap_hwmod omap2420_i2c1_hwmod = {
|
||||
.name = "i2c1",
|
||||
.mpu_irqs = omap2_i2c1_mpu_irqs,
|
||||
- .sdma_reqs = i2c1_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_i2c1_sdma_reqs,
|
||||
.main_clk = "i2c1_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -1217,12 +1188,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = {
|
||||
|
||||
/* I2C2 */
|
||||
|
||||
-static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
|
||||
- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
|
||||
- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = {
|
||||
&omap2420_l4_core__i2c2,
|
||||
};
|
||||
@@ -1230,7 +1195,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = {
|
||||
static struct omap_hwmod omap2420_i2c2_hwmod = {
|
||||
.name = "i2c2",
|
||||
.mpu_irqs = omap2_i2c2_mpu_irqs,
|
||||
- .sdma_reqs = i2c2_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_i2c2_sdma_reqs,
|
||||
.main_clk = "i2c2_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -1602,18 +1567,6 @@ static struct omap_hwmod_class omap2420_mcspi_class = {
|
||||
};
|
||||
|
||||
/* mcspi1 */
|
||||
-static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = {
|
||||
- { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */
|
||||
- { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */
|
||||
- { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */
|
||||
- { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */
|
||||
- { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */
|
||||
- { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */
|
||||
- { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */
|
||||
- { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = {
|
||||
&omap2420_l4_core__mcspi1,
|
||||
};
|
||||
@@ -1625,7 +1578,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
|
||||
static struct omap_hwmod omap2420_mcspi1_hwmod = {
|
||||
.name = "mcspi1_hwmod",
|
||||
.mpu_irqs = omap2_mcspi1_mpu_irqs,
|
||||
- .sdma_reqs = omap2420_mcspi1_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_mcspi1_sdma_reqs,
|
||||
.main_clk = "mcspi1_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -1644,14 +1597,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = {
|
||||
};
|
||||
|
||||
/* mcspi2 */
|
||||
-static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = {
|
||||
- { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */
|
||||
- { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */
|
||||
- { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */
|
||||
- { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = {
|
||||
&omap2420_l4_core__mcspi2,
|
||||
};
|
||||
@@ -1663,7 +1608,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
|
||||
static struct omap_hwmod omap2420_mcspi2_hwmod = {
|
||||
.name = "mcspi2_hwmod",
|
||||
.mpu_irqs = omap2_mcspi2_mpu_irqs,
|
||||
- .sdma_reqs = omap2420_mcspi2_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_mcspi2_sdma_reqs,
|
||||
.main_clk = "mcspi2_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -1697,12 +1642,6 @@ static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = {
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
-static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = {
|
||||
- { .name = "rx", .dma_req = 32 },
|
||||
- { .name = "tx", .dma_req = 31 },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
/* l4_core -> mcbsp1 */
|
||||
static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = {
|
||||
.master = &omap2420_l4_core_hwmod,
|
||||
@@ -1721,7 +1660,7 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
|
||||
.name = "mcbsp1",
|
||||
.class = &omap2420_mcbsp_hwmod_class,
|
||||
.mpu_irqs = omap2420_mcbsp1_irqs,
|
||||
- .sdma_reqs = omap2420_mcbsp1_sdma_chs,
|
||||
+ .sdma_reqs = omap2_mcbsp1_sdma_reqs,
|
||||
.main_clk = "mcbsp1_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -1744,12 +1683,6 @@ static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = {
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
-static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = {
|
||||
- { .name = "rx", .dma_req = 34 },
|
||||
- { .name = "tx", .dma_req = 33 },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
/* l4_core -> mcbsp2 */
|
||||
static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = {
|
||||
.master = &omap2420_l4_core_hwmod,
|
||||
@@ -1768,7 +1701,7 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = {
|
||||
.name = "mcbsp2",
|
||||
.class = &omap2420_mcbsp_hwmod_class,
|
||||
.mpu_irqs = omap2420_mcbsp2_irqs,
|
||||
- .sdma_reqs = omap2420_mcbsp2_sdma_chs,
|
||||
+ .sdma_reqs = omap2_mcbsp2_sdma_reqs,
|
||||
.main_clk = "mcbsp2_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
|
||||
index af758b3..639acd5 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
|
||||
@@ -900,12 +900,6 @@ static struct omap_hwmod_class uart_class = {
|
||||
|
||||
/* UART1 */
|
||||
|
||||
-static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
|
||||
- { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
|
||||
- { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = {
|
||||
&omap2_l4_core__uart1,
|
||||
};
|
||||
@@ -913,7 +907,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = {
|
||||
static struct omap_hwmod omap2430_uart1_hwmod = {
|
||||
.name = "uart1",
|
||||
.mpu_irqs = omap2_uart1_mpu_irqs,
|
||||
- .sdma_reqs = uart1_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_uart1_sdma_reqs,
|
||||
.main_clk = "uart1_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -932,12 +926,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = {
|
||||
|
||||
/* UART2 */
|
||||
|
||||
-static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
|
||||
- { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
|
||||
- { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = {
|
||||
&omap2_l4_core__uart2,
|
||||
};
|
||||
@@ -945,7 +933,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = {
|
||||
static struct omap_hwmod omap2430_uart2_hwmod = {
|
||||
.name = "uart2",
|
||||
.mpu_irqs = omap2_uart2_mpu_irqs,
|
||||
- .sdma_reqs = uart2_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_uart2_sdma_reqs,
|
||||
.main_clk = "uart2_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -964,12 +952,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = {
|
||||
|
||||
/* UART3 */
|
||||
|
||||
-static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
|
||||
- { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
|
||||
- { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = {
|
||||
&omap2_l4_core__uart3,
|
||||
};
|
||||
@@ -977,7 +959,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = {
|
||||
static struct omap_hwmod omap2430_uart3_hwmod = {
|
||||
.name = "uart3",
|
||||
.mpu_irqs = omap2_uart3_mpu_irqs,
|
||||
- .sdma_reqs = uart3_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_uart3_sdma_reqs,
|
||||
.main_clk = "uart3_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -1012,11 +994,6 @@ static struct omap_hwmod_class omap2430_dss_hwmod_class = {
|
||||
.sysc = &omap2430_dss_sysc,
|
||||
};
|
||||
|
||||
-static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = {
|
||||
- { .name = "dispc", .dma_req = 5 },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
/* dss */
|
||||
/* dss master ports */
|
||||
static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = {
|
||||
@@ -1046,7 +1023,7 @@ static struct omap_hwmod omap2430_dss_core_hwmod = {
|
||||
.name = "dss_core",
|
||||
.class = &omap2430_dss_hwmod_class,
|
||||
.main_clk = "dss1_fck", /* instead of dss_fck */
|
||||
- .sdma_reqs = omap2430_dss_sdma_chs,
|
||||
+ .sdma_reqs = omap2xxx_dss_sdma_chs,
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.prcm_reg_id = 1,
|
||||
@@ -1234,12 +1211,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = {
|
||||
|
||||
/* I2C1 */
|
||||
|
||||
-static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
|
||||
- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
|
||||
- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = {
|
||||
&omap2430_l4_core__i2c1,
|
||||
};
|
||||
@@ -1247,7 +1218,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = {
|
||||
static struct omap_hwmod omap2430_i2c1_hwmod = {
|
||||
.name = "i2c1",
|
||||
.mpu_irqs = omap2_i2c1_mpu_irqs,
|
||||
- .sdma_reqs = i2c1_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_i2c1_sdma_reqs,
|
||||
.main_clk = "i2chs1_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -1275,12 +1246,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = {
|
||||
|
||||
/* I2C2 */
|
||||
|
||||
-static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
|
||||
- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
|
||||
- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = {
|
||||
&omap2430_l4_core__i2c2,
|
||||
};
|
||||
@@ -1288,7 +1253,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = {
|
||||
static struct omap_hwmod omap2430_i2c2_hwmod = {
|
||||
.name = "i2c2",
|
||||
.mpu_irqs = omap2_i2c2_mpu_irqs,
|
||||
- .sdma_reqs = i2c2_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_i2c2_sdma_reqs,
|
||||
.main_clk = "i2chs2_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -1707,18 +1672,6 @@ static struct omap_hwmod_class omap2430_mcspi_class = {
|
||||
};
|
||||
|
||||
/* mcspi1 */
|
||||
-static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = {
|
||||
- { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */
|
||||
- { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */
|
||||
- { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */
|
||||
- { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */
|
||||
- { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */
|
||||
- { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */
|
||||
- { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */
|
||||
- { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = {
|
||||
&omap2430_l4_core__mcspi1,
|
||||
};
|
||||
@@ -1730,7 +1683,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
|
||||
static struct omap_hwmod omap2430_mcspi1_hwmod = {
|
||||
.name = "mcspi1_hwmod",
|
||||
.mpu_irqs = omap2_mcspi1_mpu_irqs,
|
||||
- .sdma_reqs = omap2430_mcspi1_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_mcspi1_sdma_reqs,
|
||||
.main_clk = "mcspi1_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -1749,14 +1702,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = {
|
||||
};
|
||||
|
||||
/* mcspi2 */
|
||||
-static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = {
|
||||
- { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */
|
||||
- { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */
|
||||
- { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */
|
||||
- { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = {
|
||||
&omap2430_l4_core__mcspi2,
|
||||
};
|
||||
@@ -1768,7 +1713,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
|
||||
static struct omap_hwmod omap2430_mcspi2_hwmod = {
|
||||
.name = "mcspi2_hwmod",
|
||||
.mpu_irqs = omap2_mcspi2_mpu_irqs,
|
||||
- .sdma_reqs = omap2430_mcspi2_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_mcspi2_sdma_reqs,
|
||||
.main_clk = "mcspi2_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -1912,12 +1857,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = {
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
-static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = {
|
||||
- { .name = "rx", .dma_req = 32 },
|
||||
- { .name = "tx", .dma_req = 31 },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
/* l4_core -> mcbsp1 */
|
||||
static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = {
|
||||
.master = &omap2430_l4_core_hwmod,
|
||||
@@ -1936,7 +1875,7 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = {
|
||||
.name = "mcbsp1",
|
||||
.class = &omap2430_mcbsp_hwmod_class,
|
||||
.mpu_irqs = omap2430_mcbsp1_irqs,
|
||||
- .sdma_reqs = omap2430_mcbsp1_sdma_chs,
|
||||
+ .sdma_reqs = omap2_mcbsp1_sdma_reqs,
|
||||
.main_clk = "mcbsp1_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -1960,12 +1899,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = {
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
-static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = {
|
||||
- { .name = "rx", .dma_req = 34 },
|
||||
- { .name = "tx", .dma_req = 33 },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
/* l4_core -> mcbsp2 */
|
||||
static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = {
|
||||
.master = &omap2430_l4_core_hwmod,
|
||||
@@ -1984,7 +1917,7 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = {
|
||||
.name = "mcbsp2",
|
||||
.class = &omap2430_mcbsp_hwmod_class,
|
||||
.mpu_irqs = omap2430_mcbsp2_irqs,
|
||||
- .sdma_reqs = omap2430_mcbsp2_sdma_chs,
|
||||
+ .sdma_reqs = omap2_mcbsp2_sdma_reqs,
|
||||
.main_clk = "mcbsp2_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -2008,12 +1941,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = {
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
-static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = {
|
||||
- { .name = "rx", .dma_req = 18 },
|
||||
- { .name = "tx", .dma_req = 17 },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = {
|
||||
{
|
||||
.name = "mpu",
|
||||
@@ -2042,7 +1969,7 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = {
|
||||
.name = "mcbsp3",
|
||||
.class = &omap2430_mcbsp_hwmod_class,
|
||||
.mpu_irqs = omap2430_mcbsp3_irqs,
|
||||
- .sdma_reqs = omap2430_mcbsp3_sdma_chs,
|
||||
+ .sdma_reqs = omap2_mcbsp3_sdma_reqs,
|
||||
.main_clk = "mcbsp3_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
|
||||
index 245294b..7c4f5ab 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
|
||||
@@ -10,11 +10,35 @@
|
||||
*/
|
||||
#include <plat/omap_hwmod.h>
|
||||
#include <plat/serial.h>
|
||||
+#include <plat/dma.h>
|
||||
|
||||
#include <mach/irqs.h>
|
||||
|
||||
#include "omap_hwmod_common_data.h"
|
||||
|
||||
+
|
||||
+/*
|
||||
+ * omap_hwmod class data
|
||||
+ */
|
||||
+
|
||||
+struct omap_hwmod_class l3_hwmod_class = {
|
||||
+ .name = "l3"
|
||||
+};
|
||||
+
|
||||
+struct omap_hwmod_class l4_hwmod_class = {
|
||||
+ .name = "l4"
|
||||
+};
|
||||
+
|
||||
+struct omap_hwmod_class mpu_hwmod_class = {
|
||||
+ .name = "mpu"
|
||||
+};
|
||||
+
|
||||
+struct omap_hwmod_class iva_hwmod_class = {
|
||||
+ .name = "iva"
|
||||
+};
|
||||
+
|
||||
+/* Common MPU IRQ line data */
|
||||
+
|
||||
struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = {
|
||||
{ .irq = 37, },
|
||||
{ .irq = -1 }
|
||||
@@ -138,5 +162,73 @@ struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = {
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
+/* Common DMA request line data */
|
||||
+struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = {
|
||||
+ { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
|
||||
+ { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
|
||||
+ { .dma_req = -1 }
|
||||
+};
|
||||
+
|
||||
+struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = {
|
||||
+ { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
|
||||
+ { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
|
||||
+ { .dma_req = -1 }
|
||||
+};
|
||||
+
|
||||
+struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = {
|
||||
+ { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
|
||||
+ { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
|
||||
+ { .dma_req = -1 }
|
||||
+};
|
||||
+
|
||||
+struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = {
|
||||
+ { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
|
||||
+ { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
|
||||
+ { .dma_req = -1 }
|
||||
+};
|
||||
+
|
||||
+struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = {
|
||||
+ { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
|
||||
+ { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
|
||||
+ { .dma_req = -1 }
|
||||
+};
|
||||
+
|
||||
+struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = {
|
||||
+ { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */
|
||||
+ { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */
|
||||
+ { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */
|
||||
+ { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */
|
||||
+ { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */
|
||||
+ { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */
|
||||
+ { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */
|
||||
+ { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */
|
||||
+ { .dma_req = -1 }
|
||||
+};
|
||||
+
|
||||
+struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = {
|
||||
+ { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */
|
||||
+ { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */
|
||||
+ { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */
|
||||
+ { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */
|
||||
+ { .dma_req = -1 }
|
||||
+};
|
||||
+
|
||||
+struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = {
|
||||
+ { .name = "rx", .dma_req = 32 },
|
||||
+ { .name = "tx", .dma_req = 31 },
|
||||
+ { .dma_req = -1 }
|
||||
+};
|
||||
+
|
||||
+struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = {
|
||||
+ { .name = "rx", .dma_req = 34 },
|
||||
+ { .name = "tx", .dma_req = 33 },
|
||||
+ { .dma_req = -1 }
|
||||
+};
|
||||
+
|
||||
+struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = {
|
||||
+ { .name = "rx", .dma_req = 18 },
|
||||
+ { .name = "tx", .dma_req = 17 },
|
||||
+ { .dma_req = -1 }
|
||||
+};
|
||||
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
|
||||
index 5a078a6..f5b63ef 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
|
||||
@@ -10,6 +10,7 @@
|
||||
*/
|
||||
#include <plat/omap_hwmod.h>
|
||||
#include <plat/serial.h>
|
||||
+#include <plat/dma.h>
|
||||
|
||||
#include <mach/irqs.h>
|
||||
|
||||
@@ -19,3 +20,8 @@ struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = {
|
||||
{ .irq = 48, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
+
|
||||
+struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = {
|
||||
+ { .name = "dispc", .dma_req = 5 },
|
||||
+ { .dma_req = -1 }
|
||||
+};
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
|
||||
index 265f0b1..001f67b 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
|
||||
@@ -1210,12 +1210,6 @@ static struct omap_hwmod_class uart_class = {
|
||||
|
||||
/* UART1 */
|
||||
|
||||
-static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
|
||||
- { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
|
||||
- { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = {
|
||||
&omap3_l4_core__uart1,
|
||||
};
|
||||
@@ -1223,7 +1217,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = {
|
||||
static struct omap_hwmod omap3xxx_uart1_hwmod = {
|
||||
.name = "uart1",
|
||||
.mpu_irqs = omap2_uart1_mpu_irqs,
|
||||
- .sdma_reqs = uart1_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_uart1_sdma_reqs,
|
||||
.main_clk = "uart1_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -1242,12 +1236,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
|
||||
|
||||
/* UART2 */
|
||||
|
||||
-static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
|
||||
- { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
|
||||
- { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = {
|
||||
&omap3_l4_core__uart2,
|
||||
};
|
||||
@@ -1255,7 +1243,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = {
|
||||
static struct omap_hwmod omap3xxx_uart2_hwmod = {
|
||||
.name = "uart2",
|
||||
.mpu_irqs = omap2_uart2_mpu_irqs,
|
||||
- .sdma_reqs = uart2_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_uart2_sdma_reqs,
|
||||
.main_clk = "uart2_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -1274,12 +1262,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
|
||||
|
||||
/* UART3 */
|
||||
|
||||
-static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
|
||||
- { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
|
||||
- { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = {
|
||||
&omap3_l4_per__uart3,
|
||||
};
|
||||
@@ -1287,7 +1269,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = {
|
||||
static struct omap_hwmod omap3xxx_uart3_hwmod = {
|
||||
.name = "uart3",
|
||||
.mpu_irqs = omap2_uart3_mpu_irqs,
|
||||
- .sdma_reqs = uart3_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_uart3_sdma_reqs,
|
||||
.main_clk = "uart3_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -1714,12 +1696,6 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = {
|
||||
.fifo_depth = 8, /* bytes */
|
||||
};
|
||||
|
||||
-static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
|
||||
- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
|
||||
- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = {
|
||||
&omap3_l4_core__i2c1,
|
||||
};
|
||||
@@ -1727,7 +1703,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = {
|
||||
static struct omap_hwmod omap3xxx_i2c1_hwmod = {
|
||||
.name = "i2c1",
|
||||
.mpu_irqs = omap2_i2c1_mpu_irqs,
|
||||
- .sdma_reqs = i2c1_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_i2c1_sdma_reqs,
|
||||
.main_clk = "i2c1_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -1751,12 +1727,6 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = {
|
||||
.fifo_depth = 8, /* bytes */
|
||||
};
|
||||
|
||||
-static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
|
||||
- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
|
||||
- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = {
|
||||
&omap3_l4_core__i2c2,
|
||||
};
|
||||
@@ -1764,7 +1734,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = {
|
||||
static struct omap_hwmod omap3xxx_i2c2_hwmod = {
|
||||
.name = "i2c2",
|
||||
.mpu_irqs = omap2_i2c2_mpu_irqs,
|
||||
- .sdma_reqs = i2c2_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_i2c2_sdma_reqs,
|
||||
.main_clk = "i2c2_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -2269,12 +2239,6 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = {
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
-static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = {
|
||||
- { .name = "rx", .dma_req = 32 },
|
||||
- { .name = "tx", .dma_req = 31 },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = {
|
||||
{
|
||||
.name = "mpu",
|
||||
@@ -2303,7 +2267,7 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
|
||||
.name = "mcbsp1",
|
||||
.class = &omap3xxx_mcbsp_hwmod_class,
|
||||
.mpu_irqs = omap3xxx_mcbsp1_irqs,
|
||||
- .sdma_reqs = omap3xxx_mcbsp1_sdma_chs,
|
||||
+ .sdma_reqs = omap2_mcbsp1_sdma_reqs,
|
||||
.main_clk = "mcbsp1_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -2327,12 +2291,6 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = {
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
-static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = {
|
||||
- { .name = "rx", .dma_req = 34 },
|
||||
- { .name = "tx", .dma_req = 33 },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = {
|
||||
{
|
||||
.name = "mpu",
|
||||
@@ -2349,7 +2307,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2 = {
|
||||
.slave = &omap3xxx_mcbsp2_hwmod,
|
||||
.clk = "mcbsp2_ick",
|
||||
.addr = omap3xxx_mcbsp2_addrs,
|
||||
-
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
@@ -2366,7 +2323,7 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
|
||||
.name = "mcbsp2",
|
||||
.class = &omap3xxx_mcbsp_hwmod_class,
|
||||
.mpu_irqs = omap3xxx_mcbsp2_irqs,
|
||||
- .sdma_reqs = omap3xxx_mcbsp2_sdma_chs,
|
||||
+ .sdma_reqs = omap2_mcbsp2_sdma_reqs,
|
||||
.main_clk = "mcbsp2_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -2391,12 +2348,6 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = {
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
-static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = {
|
||||
- { .name = "rx", .dma_req = 18 },
|
||||
- { .name = "tx", .dma_req = 17 },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = {
|
||||
{
|
||||
.name = "mpu",
|
||||
@@ -2429,7 +2380,7 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
|
||||
.name = "mcbsp3",
|
||||
.class = &omap3xxx_mcbsp_hwmod_class,
|
||||
.mpu_irqs = omap3xxx_mcbsp3_irqs,
|
||||
- .sdma_reqs = omap3xxx_mcbsp3_sdma_chs,
|
||||
+ .sdma_reqs = omap2_mcbsp3_sdma_reqs,
|
||||
.main_clk = "mcbsp3_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -2939,18 +2890,6 @@ static struct omap_hwmod_class omap34xx_mcspi_class = {
|
||||
};
|
||||
|
||||
/* mcspi1 */
|
||||
-static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = {
|
||||
- { .name = "tx0", .dma_req = 35 },
|
||||
- { .name = "rx0", .dma_req = 36 },
|
||||
- { .name = "tx1", .dma_req = 37 },
|
||||
- { .name = "rx1", .dma_req = 38 },
|
||||
- { .name = "tx2", .dma_req = 39 },
|
||||
- { .name = "rx2", .dma_req = 40 },
|
||||
- { .name = "tx3", .dma_req = 41 },
|
||||
- { .name = "rx3", .dma_req = 42 },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap34xx_mcspi1_slaves[] = {
|
||||
&omap34xx_l4_core__mcspi1,
|
||||
};
|
||||
@@ -2962,7 +2901,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
|
||||
static struct omap_hwmod omap34xx_mcspi1 = {
|
||||
.name = "mcspi1",
|
||||
.mpu_irqs = omap2_mcspi1_mpu_irqs,
|
||||
- .sdma_reqs = omap34xx_mcspi1_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_mcspi1_sdma_reqs,
|
||||
.main_clk = "mcspi1_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@@ -2981,14 +2920,6 @@ static struct omap_hwmod omap34xx_mcspi1 = {
|
||||
};
|
||||
|
||||
/* mcspi2 */
|
||||
-static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = {
|
||||
- { .name = "tx0", .dma_req = 43 },
|
||||
- { .name = "rx0", .dma_req = 44 },
|
||||
- { .name = "tx1", .dma_req = 45 },
|
||||
- { .name = "rx1", .dma_req = 46 },
|
||||
- { .dma_req = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_ocp_if *omap34xx_mcspi2_slaves[] = {
|
||||
&omap34xx_l4_core__mcspi2,
|
||||
};
|
||||
@@ -3000,7 +2931,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
|
||||
static struct omap_hwmod omap34xx_mcspi2 = {
|
||||
.name = "mcspi2",
|
||||
.mpu_irqs = omap2_mcspi2_mpu_irqs,
|
||||
- .sdma_reqs = omap34xx_mcspi2_sdma_reqs,
|
||||
+ .sdma_reqs = omap2_mcspi2_sdma_reqs,
|
||||
.main_clk = "mcspi2_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c
|
||||
index 08a1342..de832eb 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c
|
||||
@@ -49,23 +49,3 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = {
|
||||
.srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT,
|
||||
};
|
||||
|
||||
-
|
||||
-/*
|
||||
- * omap_hwmod class data
|
||||
- */
|
||||
-
|
||||
-struct omap_hwmod_class l3_hwmod_class = {
|
||||
- .name = "l3"
|
||||
-};
|
||||
-
|
||||
-struct omap_hwmod_class l4_hwmod_class = {
|
||||
- .name = "l4"
|
||||
-};
|
||||
-
|
||||
-struct omap_hwmod_class mpu_hwmod_class = {
|
||||
- .name = "mpu"
|
||||
-};
|
||||
-
|
||||
-struct omap_hwmod_class iva_hwmod_class = {
|
||||
- .name = "iva"
|
||||
-};
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h
|
||||
index 1ac878c..b636cf6 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.h
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h
|
||||
@@ -51,6 +51,21 @@ extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[];
|
||||
|
||||
/* Common IP block data across OMAP2xxx */
|
||||
extern struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[];
|
||||
+extern struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[];
|
||||
+
|
||||
+/* Common IP block data */
|
||||
+extern struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[];
|
||||
+extern struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[];
|
||||
+extern struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[];
|
||||
+extern struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[];
|
||||
+extern struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[];
|
||||
+extern struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[];
|
||||
+extern struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[];
|
||||
+extern struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[];
|
||||
+extern struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[];
|
||||
+
|
||||
+/* Common IP block data on OMAP2430/OMAP3 */
|
||||
+extern struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[];
|
||||
|
||||
/* Common IP block data across OMAP2/3 */
|
||||
extern struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[];
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+1730
File diff suppressed because it is too large
Load Diff
+116
@@ -0,0 +1,116 @@
|
||||
From 96fade0623664f946eceba792415d3dc78e3ec52 Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Sat, 9 Jul 2011 19:14:27 -0600
|
||||
Subject: [PATCH 044/149] OMAP4: hwmod data: Fix L3 interconnect data order and alignement
|
||||
|
||||
Change the position of the ocp_if structure to match the template.
|
||||
|
||||
Remove unneeded comma at the end of address space flag field.
|
||||
|
||||
Remove USER_SDMA since this ocp link is only from the l3_main_1
|
||||
path that is accessible only from the MPU in that case and not
|
||||
the SDMA.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Paul Walmsley <paul@pwsan.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 27 +++++++++++++--------------
|
||||
1 files changed, 13 insertions(+), 14 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
index 316e922..94c0b60 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
@@ -216,6 +216,12 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = {
|
||||
};
|
||||
|
||||
/* l3_main_1 interface data */
|
||||
+static struct omap_hwmod_irq_info omap44xx_l3_main_1_irqs[] = {
|
||||
+ { .name = "dbg_err", .irq = 9 + OMAP44XX_IRQ_GIC_START },
|
||||
+ { .name = "app_err", .irq = 10 + OMAP44XX_IRQ_GIC_START },
|
||||
+ { .irq = -1 }
|
||||
+};
|
||||
+
|
||||
/* dsp -> l3_main_1 */
|
||||
static struct omap_hwmod_ocp_if omap44xx_dsp__l3_main_1 = {
|
||||
.master = &omap44xx_dsp_hwmod,
|
||||
@@ -264,18 +270,11 @@ static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = {
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
-/* L3 target configuration and error log registers */
|
||||
-static struct omap_hwmod_irq_info omap44xx_l3_targ_irqs[] = {
|
||||
- { .irq = 9 + OMAP44XX_IRQ_GIC_START },
|
||||
- { .irq = 10 + OMAP44XX_IRQ_GIC_START },
|
||||
- { .irq = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x44000000,
|
||||
.pa_end = 0x44000fff,
|
||||
- .flags = ADDR_TYPE_RT,
|
||||
+ .flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
@@ -286,7 +285,7 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = {
|
||||
.slave = &omap44xx_l3_main_1_hwmod,
|
||||
.clk = "l3_div_ck",
|
||||
.addr = omap44xx_l3_main_1_addrs,
|
||||
- .user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
+ .user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
/* l3_main_1 slave ports */
|
||||
@@ -303,9 +302,9 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = {
|
||||
static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
|
||||
.name = "l3_main_1",
|
||||
.class = &omap44xx_l3_hwmod_class,
|
||||
- .mpu_irqs = omap44xx_l3_targ_irqs,
|
||||
.slaves = omap44xx_l3_main_1_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves),
|
||||
+ .mpu_irqs = omap44xx_l3_main_1_irqs,
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
@@ -354,7 +353,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_2_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x44800000,
|
||||
.pa_end = 0x44801fff,
|
||||
- .flags = ADDR_TYPE_RT,
|
||||
+ .flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
@@ -365,7 +364,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = {
|
||||
.slave = &omap44xx_l3_main_2_hwmod,
|
||||
.clk = "l3_div_ck",
|
||||
.addr = omap44xx_l3_main_2_addrs,
|
||||
- .user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
+ .user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
/* l4_cfg -> l3_main_2 */
|
||||
@@ -409,7 +408,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x45000000,
|
||||
.pa_end = 0x45000fff,
|
||||
- .flags = ADDR_TYPE_RT,
|
||||
+ .flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
@@ -420,7 +419,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = {
|
||||
.slave = &omap44xx_l3_main_3_hwmod,
|
||||
.clk = "l3_div_ck",
|
||||
.addr = omap44xx_l3_main_3_addrs,
|
||||
- .user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
+ .user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
/* l3_main_2 -> l3_main_3 */
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+42
@@ -0,0 +1,42 @@
|
||||
From 526bd55990b58164ec3f96c5cc6c365418112e35 Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Sat, 9 Jul 2011 19:14:28 -0600
|
||||
Subject: [PATCH 045/149] OMAP4: hwmod data: Remove un-needed parens
|
||||
|
||||
A couple of parens were added around some flags.
|
||||
|
||||
Remove them, since they are not needed and not used
|
||||
for any other hwmods.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Paul Walmsley <paul@pwsan.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 4 ++--
|
||||
1 files changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
index 94c0b60..7eed6a2 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
@@ -3736,7 +3736,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_masters[] = {
|
||||
static struct omap_hwmod omap44xx_mpu_hwmod = {
|
||||
.name = "mpu",
|
||||
.class = &omap44xx_mpu_hwmod_class,
|
||||
- .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
|
||||
+ .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
|
||||
.mpu_irqs = omap44xx_mpu_irqs,
|
||||
.main_clk = "dpll_mpu_m2_ck",
|
||||
.prcm = {
|
||||
@@ -4750,7 +4750,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = {
|
||||
static struct omap_hwmod omap44xx_uart3_hwmod = {
|
||||
.name = "uart3",
|
||||
.class = &omap44xx_uart_hwmod_class,
|
||||
- .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
|
||||
+ .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
|
||||
.mpu_irqs = omap44xx_uart3_irqs,
|
||||
.sdma_reqs = omap44xx_uart3_sdma_reqs,
|
||||
.main_clk = "uart3_fck",
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+218
@@ -0,0 +1,218 @@
|
||||
From 834f307ec9057bbdfb5136714f7a1e7ba629d556 Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Sat, 9 Jul 2011 19:14:28 -0600
|
||||
Subject: [PATCH 046/149] OMAP4: hwmod data: Fix bad alignement
|
||||
|
||||
Fix .prcm alignement and usb_otg_hs class and hwmod structures.
|
||||
|
||||
Add a couple of more potential hwmods in the comment.
|
||||
Remove hsi, since it is already included in the data.
|
||||
|
||||
Remove one blank line.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Paul Walmsley <paul@pwsan.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 45 ++++++++++++++-------------
|
||||
1 files changed, 23 insertions(+), 22 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
index 7eed6a2..1975b05 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
@@ -632,7 +632,9 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
|
||||
* gpmc
|
||||
* gpu
|
||||
* hdq1w
|
||||
- * hsi
|
||||
+ * mcasp
|
||||
+ * mpu_c0
|
||||
+ * mpu_c1
|
||||
* ocmc_ram
|
||||
* ocp2scp_usb_phy
|
||||
* ocp_wp_noc
|
||||
@@ -740,7 +742,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = {
|
||||
.mpu_irqs = omap44xx_aess_irqs,
|
||||
.sdma_reqs = omap44xx_aess_sdma_reqs,
|
||||
.main_clk = "aess_fck",
|
||||
- .prcm = {
|
||||
+ .prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL,
|
||||
},
|
||||
@@ -769,7 +771,7 @@ static struct omap_hwmod_opt_clk bandgap_opt_clks[] = {
|
||||
static struct omap_hwmod omap44xx_bandgap_hwmod = {
|
||||
.name = "bandgap",
|
||||
.class = &omap44xx_bandgap_hwmod_class,
|
||||
- .prcm = {
|
||||
+ .prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL,
|
||||
},
|
||||
@@ -828,7 +830,7 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = {
|
||||
.class = &omap44xx_counter_hwmod_class,
|
||||
.flags = HWMOD_SWSUP_SIDLE,
|
||||
.main_clk = "sys_32k_ck",
|
||||
- .prcm = {
|
||||
+ .prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_reg = OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL,
|
||||
},
|
||||
@@ -1004,7 +1006,7 @@ static struct omap_hwmod omap44xx_dmic_hwmod = {
|
||||
.mpu_irqs = omap44xx_dmic_irqs,
|
||||
.sdma_reqs = omap44xx_dmic_sdma_reqs,
|
||||
.main_clk = "dmic_fck",
|
||||
- .prcm = {
|
||||
+ .prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_reg = OMAP4430_CM1_ABE_DMIC_CLKCTRL,
|
||||
},
|
||||
@@ -2094,7 +2096,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod = {
|
||||
.class = &omap44xx_hsi_hwmod_class,
|
||||
.mpu_irqs = omap44xx_hsi_irqs,
|
||||
.main_clk = "hsi_fck",
|
||||
- .prcm = {
|
||||
+ .prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_reg = OMAP4430_CM_L3INIT_HSI_CLKCTRL,
|
||||
},
|
||||
@@ -2391,7 +2393,7 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = {
|
||||
.flags = HWMOD_INIT_NO_RESET,
|
||||
.rst_lines = omap44xx_ipu_c0_resets,
|
||||
.rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets),
|
||||
- .prcm = {
|
||||
+ .prcm = {
|
||||
.omap4 = {
|
||||
.rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL,
|
||||
},
|
||||
@@ -2406,7 +2408,7 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = {
|
||||
.flags = HWMOD_INIT_NO_RESET,
|
||||
.rst_lines = omap44xx_ipu_c1_resets,
|
||||
.rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets),
|
||||
- .prcm = {
|
||||
+ .prcm = {
|
||||
.omap4 = {
|
||||
.rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL,
|
||||
},
|
||||
@@ -2421,7 +2423,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
|
||||
.rst_lines = omap44xx_ipu_resets,
|
||||
.rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets),
|
||||
.main_clk = "ipu_fck",
|
||||
- .prcm = {
|
||||
+ .prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_reg = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL,
|
||||
.rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL,
|
||||
@@ -2507,7 +2509,7 @@ static struct omap_hwmod omap44xx_iss_hwmod = {
|
||||
.mpu_irqs = omap44xx_iss_irqs,
|
||||
.sdma_reqs = omap44xx_iss_sdma_reqs,
|
||||
.main_clk = "iss_fck",
|
||||
- .prcm = {
|
||||
+ .prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_reg = OMAP4430_CM_CAM_ISS_CLKCTRL,
|
||||
},
|
||||
@@ -2687,7 +2689,7 @@ static struct omap_hwmod omap44xx_kbd_hwmod = {
|
||||
.class = &omap44xx_kbd_hwmod_class,
|
||||
.mpu_irqs = omap44xx_kbd_irqs,
|
||||
.main_clk = "kbd_fck",
|
||||
- .prcm = {
|
||||
+ .prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_reg = OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL,
|
||||
},
|
||||
@@ -2751,7 +2753,7 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = {
|
||||
.name = "mailbox",
|
||||
.class = &omap44xx_mailbox_hwmod_class,
|
||||
.mpu_irqs = omap44xx_mailbox_irqs,
|
||||
- .prcm = {
|
||||
+ .prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL,
|
||||
},
|
||||
@@ -3133,7 +3135,7 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
|
||||
.mpu_irqs = omap44xx_mcpdm_irqs,
|
||||
.sdma_reqs = omap44xx_mcpdm_sdma_reqs,
|
||||
.main_clk = "mcpdm_fck",
|
||||
- .prcm = {
|
||||
+ .prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_reg = OMAP4430_CM1_ABE_PDM_CLKCTRL,
|
||||
},
|
||||
@@ -3430,7 +3432,6 @@ static struct omap_hwmod_class omap44xx_mmc_hwmod_class = {
|
||||
};
|
||||
|
||||
/* mmc1 */
|
||||
-
|
||||
static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = {
|
||||
{ .irq = 83 + OMAP44XX_IRQ_GIC_START },
|
||||
{ .irq = -1 }
|
||||
@@ -3481,7 +3482,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = {
|
||||
.mpu_irqs = omap44xx_mmc1_irqs,
|
||||
.sdma_reqs = omap44xx_mmc1_sdma_reqs,
|
||||
.main_clk = "mmc1_fck",
|
||||
- .prcm = {
|
||||
+ .prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL,
|
||||
},
|
||||
@@ -3540,7 +3541,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = {
|
||||
.mpu_irqs = omap44xx_mmc2_irqs,
|
||||
.sdma_reqs = omap44xx_mmc2_sdma_reqs,
|
||||
.main_clk = "mmc2_fck",
|
||||
- .prcm = {
|
||||
+ .prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL,
|
||||
},
|
||||
@@ -3594,7 +3595,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = {
|
||||
.mpu_irqs = omap44xx_mmc3_irqs,
|
||||
.sdma_reqs = omap44xx_mmc3_sdma_reqs,
|
||||
.main_clk = "mmc3_fck",
|
||||
- .prcm = {
|
||||
+ .prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_reg = OMAP4430_CM_L4PER_MMCSD3_CLKCTRL,
|
||||
},
|
||||
@@ -3647,7 +3648,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = {
|
||||
|
||||
.sdma_reqs = omap44xx_mmc4_sdma_reqs,
|
||||
.main_clk = "mmc4_fck",
|
||||
- .prcm = {
|
||||
+ .prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_reg = OMAP4430_CM_L4PER_MMCSD4_CLKCTRL,
|
||||
},
|
||||
@@ -3699,7 +3700,7 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = {
|
||||
.mpu_irqs = omap44xx_mmc5_irqs,
|
||||
.sdma_reqs = omap44xx_mmc5_sdma_reqs,
|
||||
.main_clk = "mmc5_fck",
|
||||
- .prcm = {
|
||||
+ .prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_reg = OMAP4430_CM_L4PER_MMCSD5_CLKCTRL,
|
||||
},
|
||||
@@ -4835,8 +4836,8 @@ static struct omap_hwmod_class_sysconfig omap44xx_usb_otg_hs_sysc = {
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class omap44xx_usb_otg_hs_hwmod_class = {
|
||||
- .name = "usb_otg_hs",
|
||||
- .sysc = &omap44xx_usb_otg_hs_sysc,
|
||||
+ .name = "usb_otg_hs",
|
||||
+ .sysc = &omap44xx_usb_otg_hs_sysc,
|
||||
};
|
||||
|
||||
/* usb_otg_hs */
|
||||
@@ -4890,7 +4891,7 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = {
|
||||
},
|
||||
},
|
||||
.opt_clks = usb_otg_hs_opt_clks,
|
||||
- .opt_clks_cnt = ARRAY_SIZE(usb_otg_hs_opt_clks),
|
||||
+ .opt_clks_cnt = ARRAY_SIZE(usb_otg_hs_opt_clks),
|
||||
.slaves = omap44xx_usb_otg_hs_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_slaves),
|
||||
.masters = omap44xx_usb_otg_hs_masters,
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+154
@@ -0,0 +1,154 @@
|
||||
From ade0c25089e78eb5df97faf56924d9e65ec4a096 Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Sat, 9 Jul 2011 19:14:28 -0600
|
||||
Subject: [PATCH 047/149] OMAP4: hwmod data: Align interconnect format with regular modules
|
||||
|
||||
The interconnect modules were using a slightly different layout than
|
||||
the regular modules.
|
||||
Align the layout for better consitency.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Paul Walmsley <paul@pwsan.com>
|
||||
Cc: Rajendra Nayak <rnayak@ti.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 36 ++++++++++++++--------------
|
||||
1 files changed, 18 insertions(+), 18 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
index 1975b05..e011437 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
@@ -80,7 +80,12 @@ static struct omap_hwmod_class omap44xx_dmm_hwmod_class = {
|
||||
.name = "dmm",
|
||||
};
|
||||
|
||||
-/* dmm interface data */
|
||||
+/* dmm */
|
||||
+static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = {
|
||||
+ { .irq = 113 + OMAP44XX_IRQ_GIC_START },
|
||||
+ { .irq = -1 }
|
||||
+};
|
||||
+
|
||||
/* l3_main_1 -> dmm */
|
||||
static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = {
|
||||
.master = &omap44xx_l3_main_1_hwmod,
|
||||
@@ -113,17 +118,12 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = {
|
||||
&omap44xx_mpu__dmm,
|
||||
};
|
||||
|
||||
-static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = {
|
||||
- { .irq = 113 + OMAP44XX_IRQ_GIC_START },
|
||||
- { .irq = -1 }
|
||||
-};
|
||||
-
|
||||
static struct omap_hwmod omap44xx_dmm_hwmod = {
|
||||
.name = "dmm",
|
||||
.class = &omap44xx_dmm_hwmod_class,
|
||||
+ .mpu_irqs = omap44xx_dmm_irqs,
|
||||
.slaves = omap44xx_dmm_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves),
|
||||
- .mpu_irqs = omap44xx_dmm_irqs,
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
@@ -135,7 +135,7 @@ static struct omap_hwmod_class omap44xx_emif_fw_hwmod_class = {
|
||||
.name = "emif_fw",
|
||||
};
|
||||
|
||||
-/* emif_fw interface data */
|
||||
+/* emif_fw */
|
||||
/* dmm -> emif_fw */
|
||||
static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = {
|
||||
.master = &omap44xx_dmm_hwmod,
|
||||
@@ -184,7 +184,7 @@ static struct omap_hwmod_class omap44xx_l3_hwmod_class = {
|
||||
.name = "l3",
|
||||
};
|
||||
|
||||
-/* l3_instr interface data */
|
||||
+/* l3_instr */
|
||||
/* iva -> l3_instr */
|
||||
static struct omap_hwmod_ocp_if omap44xx_iva__l3_instr = {
|
||||
.master = &omap44xx_iva_hwmod,
|
||||
@@ -215,7 +215,7 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = {
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
-/* l3_main_1 interface data */
|
||||
+/* l3_main_1 */
|
||||
static struct omap_hwmod_irq_info omap44xx_l3_main_1_irqs[] = {
|
||||
{ .name = "dbg_err", .irq = 9 + OMAP44XX_IRQ_GIC_START },
|
||||
{ .name = "app_err", .irq = 10 + OMAP44XX_IRQ_GIC_START },
|
||||
@@ -302,13 +302,13 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = {
|
||||
static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
|
||||
.name = "l3_main_1",
|
||||
.class = &omap44xx_l3_hwmod_class,
|
||||
+ .mpu_irqs = omap44xx_l3_main_1_irqs,
|
||||
.slaves = omap44xx_l3_main_1_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves),
|
||||
- .mpu_irqs = omap44xx_l3_main_1_irqs,
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
-/* l3_main_2 interface data */
|
||||
+/* l3_main_2 */
|
||||
/* dma_system -> l3_main_2 */
|
||||
static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = {
|
||||
.master = &omap44xx_dma_system_hwmod,
|
||||
@@ -403,7 +403,7 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = {
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
-/* l3_main_3 interface data */
|
||||
+/* l3_main_3 */
|
||||
static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x45000000,
|
||||
@@ -461,7 +461,7 @@ static struct omap_hwmod_class omap44xx_l4_hwmod_class = {
|
||||
.name = "l4",
|
||||
};
|
||||
|
||||
-/* l4_abe interface data */
|
||||
+/* l4_abe */
|
||||
/* aess -> l4_abe */
|
||||
static struct omap_hwmod_ocp_if omap44xx_aess__l4_abe = {
|
||||
.master = &omap44xx_aess_hwmod,
|
||||
@@ -510,7 +510,7 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = {
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
-/* l4_cfg interface data */
|
||||
+/* l4_cfg */
|
||||
/* l3_main_1 -> l4_cfg */
|
||||
static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = {
|
||||
.master = &omap44xx_l3_main_1_hwmod,
|
||||
@@ -532,7 +532,7 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = {
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
-/* l4_per interface data */
|
||||
+/* l4_per */
|
||||
/* l3_main_2 -> l4_per */
|
||||
static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l4_per = {
|
||||
.master = &omap44xx_l3_main_2_hwmod,
|
||||
@@ -554,7 +554,7 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = {
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
-/* l4_wkup interface data */
|
||||
+/* l4_wkup */
|
||||
/* l4_cfg -> l4_wkup */
|
||||
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l4_wkup = {
|
||||
.master = &omap44xx_l4_cfg_hwmod,
|
||||
@@ -584,7 +584,7 @@ static struct omap_hwmod_class omap44xx_mpu_bus_hwmod_class = {
|
||||
.name = "mpu_bus",
|
||||
};
|
||||
|
||||
-/* mpu_private interface data */
|
||||
+/* mpu_private */
|
||||
/* mpu -> mpu_private */
|
||||
static struct omap_hwmod_ocp_if omap44xx_mpu__mpu_private = {
|
||||
.master = &omap44xx_mpu_hwmod,
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+31
@@ -0,0 +1,31 @@
|
||||
From 8324148fb1a7879854e2afdf20f911ac9ea57210 Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Sat, 9 Jul 2011 19:14:45 -0600
|
||||
Subject: [PATCH 048/149] OMAP4: clock data: Add sddiv to USB DPLL
|
||||
|
||||
The USB DPLL is a J-Type DPLL with the sddiv extra parameter. Add it
|
||||
in USB DPLL.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Paul Walmsley <paul@pwsan.com>
|
||||
[paul@pwsan.com: dropped UNIPRO change since it is removed in a later patch]
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/clock44xx_data.c | 1 +
|
||||
1 files changed, 1 insertions(+), 0 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
|
||||
index 8c96567..f28a9c9 100644
|
||||
--- a/arch/arm/mach-omap2/clock44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/clock44xx_data.c
|
||||
@@ -1015,6 +1015,7 @@ static struct dpll_data dpll_usb_dd = {
|
||||
.enable_mask = OMAP4430_DPLL_EN_MASK,
|
||||
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
|
||||
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
|
||||
+ .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK,
|
||||
.max_multiplier = OMAP4430_MAX_DPLL_MULT,
|
||||
.max_divider = OMAP4430_MAX_DPLL_DIV,
|
||||
.min_divider = 1,
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+48
@@ -0,0 +1,48 @@
|
||||
From e5deffffe7722ea30862908bc7bcfe933ee98dbf Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Sat, 9 Jul 2011 19:14:45 -0600
|
||||
Subject: [PATCH 049/149] OMAP4: clock data: Remove usb_host_fs clkdev with NULL dev
|
||||
|
||||
usb_host_fs_fck does have a clkdev mapping with "usbhs-omap.0"
|
||||
and "fs_fck" alias used by the driver.
|
||||
The entry with NULL dev is thus not needed anymore.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Paul Walmsley <paul@pwsan.com>
|
||||
Cc: Felipe Balbi <balbi@ti.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/clock44xx_data.c | 3 ---
|
||||
1 files changed, 0 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
|
||||
index f28a9c9..0fa1cb8 100644
|
||||
--- a/arch/arm/mach-omap2/clock44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/clock44xx_data.c
|
||||
@@ -3205,7 +3205,6 @@ static struct omap_clk omap44xx_clks[] = {
|
||||
CLK(NULL, "uart2_fck", &uart2_fck, CK_443X),
|
||||
CLK(NULL, "uart3_fck", &uart3_fck, CK_443X),
|
||||
CLK(NULL, "uart4_fck", &uart4_fck, CK_443X),
|
||||
- CLK(NULL, "usb_host_fs_fck", &usb_host_fs_fck, CK_443X),
|
||||
CLK("usbhs-omap.0", "fs_fck", &usb_host_fs_fck, CK_443X),
|
||||
CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X),
|
||||
CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X),
|
||||
@@ -3217,7 +3216,6 @@ static struct omap_clk omap44xx_clks[] = {
|
||||
CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk, CK_443X),
|
||||
CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X),
|
||||
CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X),
|
||||
- CLK(NULL, "usb_host_hs_fck", &usb_host_hs_fck, CK_443X),
|
||||
CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X),
|
||||
CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X),
|
||||
@@ -3227,7 +3225,6 @@ static struct omap_clk omap44xx_clks[] = {
|
||||
CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk, CK_443X),
|
||||
CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X),
|
||||
CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X),
|
||||
- CLK(NULL, "usb_tll_hs_ick", &usb_tll_hs_ick, CK_443X),
|
||||
CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X),
|
||||
CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "usim_ck", &usim_ck, CK_443X),
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+229
@@ -0,0 +1,229 @@
|
||||
From 64e6adf28c555e90d22260217e56f393b504262f Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Sat, 9 Jul 2011 19:14:45 -0600
|
||||
Subject: [PATCH 050/149] OMAP4: clock data: Re-order some clock nodes and structure fields
|
||||
|
||||
A couple of fieds were edited manually and thus do not stick
|
||||
to the template used by the generator and by other structures.
|
||||
|
||||
Move them to the correct location.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Paul Walmsley <paul@pwsan.com>
|
||||
[paul@pwsan.com: dropped the UNIPRO changes since those will be removed
|
||||
in a later patch]
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/clock44xx_data.c | 66 +++++++++++++++++----------------
|
||||
1 files changed, 34 insertions(+), 32 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
|
||||
index 0fa1cb8..4b57d55 100644
|
||||
--- a/arch/arm/mach-omap2/clock44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/clock44xx_data.c
|
||||
@@ -53,9 +53,9 @@ static struct clk extalt_clkin_ck = {
|
||||
static struct clk pad_clks_ck = {
|
||||
.name = "pad_clks_ck",
|
||||
.rate = 12000000,
|
||||
- .ops = &clkops_omap2_dflt,
|
||||
- .enable_reg = OMAP4430_CM_CLKSEL_ABE,
|
||||
- .enable_bit = OMAP4430_PAD_CLKS_GATE_SHIFT,
|
||||
+ .ops = &clkops_omap2_dflt,
|
||||
+ .enable_reg = OMAP4430_CM_CLKSEL_ABE,
|
||||
+ .enable_bit = OMAP4430_PAD_CLKS_GATE_SHIFT,
|
||||
};
|
||||
|
||||
static struct clk pad_slimbus_core_clks_ck = {
|
||||
@@ -73,9 +73,9 @@ static struct clk secure_32k_clk_src_ck = {
|
||||
static struct clk slimbus_clk = {
|
||||
.name = "slimbus_clk",
|
||||
.rate = 12000000,
|
||||
- .ops = &clkops_omap2_dflt,
|
||||
- .enable_reg = OMAP4430_CM_CLKSEL_ABE,
|
||||
- .enable_bit = OMAP4430_SLIMBUS_CLK_GATE_SHIFT,
|
||||
+ .ops = &clkops_omap2_dflt,
|
||||
+ .enable_reg = OMAP4430_CM_CLKSEL_ABE,
|
||||
+ .enable_bit = OMAP4430_SLIMBUS_CLK_GATE_SHIFT,
|
||||
};
|
||||
|
||||
static struct clk sys_32k_ck = {
|
||||
@@ -278,10 +278,10 @@ static struct clk dpll_abe_ck = {
|
||||
static struct clk dpll_abe_x2_ck = {
|
||||
.name = "dpll_abe_x2_ck",
|
||||
.parent = &dpll_abe_ck,
|
||||
+ .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE,
|
||||
.flags = CLOCK_CLKOUTX2,
|
||||
.ops = &clkops_omap4_dpllmx_ops,
|
||||
.recalc = &omap3_clkoutx2_recalc,
|
||||
- .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE,
|
||||
};
|
||||
|
||||
static const struct clksel_rate div31_1to31_rates[] = {
|
||||
@@ -622,11 +622,11 @@ static struct clk dpll_core_m3x2_ck = {
|
||||
.clksel_reg = OMAP4430_CM_DIV_M3_DPLL_CORE,
|
||||
.clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK,
|
||||
.ops = &clkops_omap2_dflt,
|
||||
- .enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE,
|
||||
- .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
|
||||
.recalc = &omap2_clksel_recalc,
|
||||
.round_rate = &omap2_clksel_round_rate,
|
||||
.set_rate = &omap2_clksel_set_rate,
|
||||
+ .enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE,
|
||||
+ .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
|
||||
};
|
||||
|
||||
static struct clk dpll_core_m7x2_ck = {
|
||||
@@ -850,10 +850,10 @@ static struct clk dpll_per_m2_ck = {
|
||||
static struct clk dpll_per_x2_ck = {
|
||||
.name = "dpll_per_x2_ck",
|
||||
.parent = &dpll_per_ck,
|
||||
+ .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER,
|
||||
.flags = CLOCK_CLKOUTX2,
|
||||
.ops = &clkops_omap4_dpllmx_ops,
|
||||
.recalc = &omap3_clkoutx2_recalc,
|
||||
- .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER,
|
||||
};
|
||||
|
||||
static const struct clksel dpll_per_m2x2_div[] = {
|
||||
@@ -880,11 +880,11 @@ static struct clk dpll_per_m3x2_ck = {
|
||||
.clksel_reg = OMAP4430_CM_DIV_M3_DPLL_PER,
|
||||
.clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK,
|
||||
.ops = &clkops_omap2_dflt,
|
||||
- .enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER,
|
||||
- .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
|
||||
.recalc = &omap2_clksel_recalc,
|
||||
.round_rate = &omap2_clksel_round_rate,
|
||||
.set_rate = &omap2_clksel_set_rate,
|
||||
+ .enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER,
|
||||
+ .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
|
||||
};
|
||||
|
||||
static struct clk dpll_per_m4x2_ck = {
|
||||
@@ -970,8 +970,9 @@ static struct clk dpll_unipro_ck = {
|
||||
static struct clk dpll_unipro_x2_ck = {
|
||||
.name = "dpll_unipro_x2_ck",
|
||||
.parent = &dpll_unipro_ck,
|
||||
+ .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO,
|
||||
.flags = CLOCK_CLKOUTX2,
|
||||
- .ops = &clkops_null,
|
||||
+ .ops = &clkops_omap4_dpllmx_ops,
|
||||
.recalc = &omap3_clkoutx2_recalc,
|
||||
};
|
||||
|
||||
@@ -1036,8 +1037,8 @@ static struct clk dpll_usb_ck = {
|
||||
static struct clk dpll_usb_clkdcoldo_ck = {
|
||||
.name = "dpll_usb_clkdcoldo_ck",
|
||||
.parent = &dpll_usb_ck,
|
||||
- .ops = &clkops_omap4_dpllmx_ops,
|
||||
.clksel_reg = OMAP4430_CM_CLKDCOLDO_DPLL_USB,
|
||||
+ .ops = &clkops_omap4_dpllmx_ops,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
@@ -1847,8 +1848,8 @@ static struct clk l3_instr_ick = {
|
||||
.ops = &clkops_omap2_dflt,
|
||||
.enable_reg = OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL,
|
||||
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
|
||||
- .clkdm_name = "l3_instr_clkdm",
|
||||
.flags = ENABLE_ON_INIT,
|
||||
+ .clkdm_name = "l3_instr_clkdm",
|
||||
.parent = &l3_div_ck,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
@@ -1858,8 +1859,8 @@ static struct clk l3_main_3_ick = {
|
||||
.ops = &clkops_omap2_dflt,
|
||||
.enable_reg = OMAP4430_CM_L3INSTR_L3_3_CLKCTRL,
|
||||
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
|
||||
- .clkdm_name = "l3_instr_clkdm",
|
||||
.flags = ENABLE_ON_INIT,
|
||||
+ .clkdm_name = "l3_instr_clkdm",
|
||||
.parent = &l3_div_ck,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
@@ -2163,8 +2164,8 @@ static struct clk ocp_wp_noc_ick = {
|
||||
.ops = &clkops_omap2_dflt,
|
||||
.enable_reg = OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL,
|
||||
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
|
||||
- .clkdm_name = "l3_instr_clkdm",
|
||||
.flags = ENABLE_ON_INIT,
|
||||
+ .clkdm_name = "l3_instr_clkdm",
|
||||
.parent = &l3_div_ck,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
@@ -2896,6 +2897,7 @@ static struct clk auxclk2_ck = {
|
||||
.enable_reg = OMAP4_SCRM_AUXCLK2,
|
||||
.enable_bit = OMAP4_ENABLE_SHIFT,
|
||||
};
|
||||
+
|
||||
static struct clk auxclk3_ck = {
|
||||
.name = "auxclk3_ck",
|
||||
.parent = &sys_clkin_ck,
|
||||
@@ -3217,7 +3219,6 @@ static struct omap_clk omap44xx_clks[] = {
|
||||
CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X),
|
||||
CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X),
|
||||
CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X),
|
||||
- CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X),
|
||||
CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X),
|
||||
CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X),
|
||||
@@ -3226,15 +3227,25 @@ static struct omap_clk omap44xx_clks[] = {
|
||||
CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X),
|
||||
CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X),
|
||||
CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X),
|
||||
- CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "usim_ck", &usim_ck, CK_443X),
|
||||
CLK(NULL, "usim_fclk", &usim_fclk, CK_443X),
|
||||
CLK(NULL, "usim_fck", &usim_fck, CK_443X),
|
||||
CLK("omap_wdt", "fck", &wd_timer2_fck, CK_443X),
|
||||
- CLK(NULL, "mailboxes_ick", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, CK_443X),
|
||||
CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, CK_443X),
|
||||
CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, CK_443X),
|
||||
+ CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X),
|
||||
+ CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X),
|
||||
+ CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X),
|
||||
+ CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X),
|
||||
+ CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X),
|
||||
+ CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X),
|
||||
+ CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X),
|
||||
+ CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X),
|
||||
+ CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X),
|
||||
+ CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X),
|
||||
+ CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X),
|
||||
+ CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X),
|
||||
CLK(NULL, "gpmc_ck", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "gpt1_ick", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "gpt2_ick", &dummy_ck, CK_443X),
|
||||
@@ -3251,6 +3262,7 @@ static struct omap_clk omap44xx_clks[] = {
|
||||
CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X),
|
||||
CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X),
|
||||
CLK("omap_i2c.4", "ick", &dummy_ck, CK_443X),
|
||||
+ CLK(NULL, "mailboxes_ick", &dummy_ck, CK_443X),
|
||||
CLK("omap_hsmmc.0", "ick", &dummy_ck, CK_443X),
|
||||
CLK("omap_hsmmc.1", "ick", &dummy_ck, CK_443X),
|
||||
CLK("omap_hsmmc.2", "ick", &dummy_ck, CK_443X),
|
||||
@@ -3268,19 +3280,9 @@ static struct omap_clk omap44xx_clks[] = {
|
||||
CLK(NULL, "uart2_ick", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "uart3_ick", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "uart4_ick", &dummy_ck, CK_443X),
|
||||
+ CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X),
|
||||
+ CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X),
|
||||
CLK("omap_wdt", "ick", &dummy_ck, CK_443X),
|
||||
- CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X),
|
||||
- CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X),
|
||||
- CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X),
|
||||
- CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X),
|
||||
- CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X),
|
||||
- CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X),
|
||||
- CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X),
|
||||
- CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X),
|
||||
- CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X),
|
||||
- CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X),
|
||||
- CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X),
|
||||
- CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X),
|
||||
};
|
||||
|
||||
int __init omap4xxx_clk_init(void)
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+143
@@ -0,0 +1,143 @@
|
||||
From 6bf20dc93c089368a608a08926b8ac386102815f Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Sat, 9 Jul 2011 19:14:46 -0600
|
||||
Subject: [PATCH 051/149] OMAP4: clock data: Fix max mult and div for USB DPLL
|
||||
|
||||
The DPLL USB can generate higher speed (x2) than the regular ones.
|
||||
The max multiplication value is then twice the previous value.
|
||||
|
||||
Fix both max_mult and max_div with that correct values.
|
||||
|
||||
Change the max_div variable type to u16 to allow storing up to 256.
|
||||
|
||||
Replace as well the define with the value to avoid
|
||||
unneeded indirection and provide a better readability.
|
||||
|
||||
Remove the defines that become useless.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Paul Walmsley <paul@pwsan.com>
|
||||
Cc: Rajendra Nayak <rnayak@ti.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/clock44xx.h | 7 -------
|
||||
arch/arm/mach-omap2/clock44xx_data.c | 29 ++++++++++++++---------------
|
||||
arch/arm/plat-omap/include/plat/clock.h | 2 +-
|
||||
3 files changed, 15 insertions(+), 23 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/clock44xx.h b/arch/arm/mach-omap2/clock44xx.h
|
||||
index 6be1095..7ceb870 100644
|
||||
--- a/arch/arm/mach-omap2/clock44xx.h
|
||||
+++ b/arch/arm/mach-omap2/clock44xx.h
|
||||
@@ -8,13 +8,6 @@
|
||||
#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H
|
||||
#define __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H
|
||||
|
||||
-/*
|
||||
- * XXX Missing values for the OMAP4 DPLL_USB
|
||||
- * XXX Missing min_multiplier values for all OMAP4 DPLLs
|
||||
- */
|
||||
-#define OMAP4430_MAX_DPLL_MULT 2047
|
||||
-#define OMAP4430_MAX_DPLL_DIV 128
|
||||
-
|
||||
int omap4xxx_clk_init(void);
|
||||
|
||||
#endif
|
||||
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
|
||||
index 4b57d55..8307c9e 100644
|
||||
--- a/arch/arm/mach-omap2/clock44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/clock44xx_data.c
|
||||
@@ -258,8 +258,8 @@ static struct dpll_data dpll_abe_dd = {
|
||||
.enable_mask = OMAP4430_DPLL_EN_MASK,
|
||||
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
|
||||
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
|
||||
- .max_multiplier = OMAP4430_MAX_DPLL_MULT,
|
||||
- .max_divider = OMAP4430_MAX_DPLL_DIV,
|
||||
+ .max_multiplier = 2047,
|
||||
+ .max_divider = 128,
|
||||
.min_divider = 1,
|
||||
};
|
||||
|
||||
@@ -434,8 +434,8 @@ static struct dpll_data dpll_core_dd = {
|
||||
.enable_mask = OMAP4430_DPLL_EN_MASK,
|
||||
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
|
||||
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
|
||||
- .max_multiplier = OMAP4430_MAX_DPLL_MULT,
|
||||
- .max_divider = OMAP4430_MAX_DPLL_DIV,
|
||||
+ .max_multiplier = 2047,
|
||||
+ .max_divider = 128,
|
||||
.min_divider = 1,
|
||||
};
|
||||
|
||||
@@ -672,8 +672,8 @@ static struct dpll_data dpll_iva_dd = {
|
||||
.enable_mask = OMAP4430_DPLL_EN_MASK,
|
||||
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
|
||||
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
|
||||
- .max_multiplier = OMAP4430_MAX_DPLL_MULT,
|
||||
- .max_divider = OMAP4430_MAX_DPLL_DIV,
|
||||
+ .max_multiplier = 2047,
|
||||
+ .max_divider = 128,
|
||||
.min_divider = 1,
|
||||
};
|
||||
|
||||
@@ -740,8 +740,8 @@ static struct dpll_data dpll_mpu_dd = {
|
||||
.enable_mask = OMAP4430_DPLL_EN_MASK,
|
||||
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
|
||||
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
|
||||
- .max_multiplier = OMAP4430_MAX_DPLL_MULT,
|
||||
- .max_divider = OMAP4430_MAX_DPLL_DIV,
|
||||
+ .max_multiplier = 2047,
|
||||
+ .max_divider = 128,
|
||||
.min_divider = 1,
|
||||
};
|
||||
|
||||
@@ -813,8 +813,8 @@ static struct dpll_data dpll_per_dd = {
|
||||
.enable_mask = OMAP4430_DPLL_EN_MASK,
|
||||
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
|
||||
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
|
||||
- .max_multiplier = OMAP4430_MAX_DPLL_MULT,
|
||||
- .max_divider = OMAP4430_MAX_DPLL_DIV,
|
||||
+ .max_multiplier = 2047,
|
||||
+ .max_divider = 128,
|
||||
.min_divider = 1,
|
||||
};
|
||||
|
||||
@@ -949,9 +949,8 @@ static struct dpll_data dpll_unipro_dd = {
|
||||
.enable_mask = OMAP4430_DPLL_EN_MASK,
|
||||
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
|
||||
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
|
||||
- .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK,
|
||||
- .max_multiplier = OMAP4430_MAX_DPLL_MULT,
|
||||
- .max_divider = OMAP4430_MAX_DPLL_DIV,
|
||||
+ .max_multiplier = 2047,
|
||||
+ .max_divider = 128,
|
||||
.min_divider = 1,
|
||||
};
|
||||
|
||||
@@ -1017,8 +1016,8 @@ static struct dpll_data dpll_usb_dd = {
|
||||
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
|
||||
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
|
||||
.sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK,
|
||||
- .max_multiplier = OMAP4430_MAX_DPLL_MULT,
|
||||
- .max_divider = OMAP4430_MAX_DPLL_DIV,
|
||||
+ .max_multiplier = 4095,
|
||||
+ .max_divider = 256,
|
||||
.min_divider = 1,
|
||||
};
|
||||
|
||||
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
|
||||
index 006e599..f57e064 100644
|
||||
--- a/arch/arm/plat-omap/include/plat/clock.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/clock.h
|
||||
@@ -152,7 +152,7 @@ struct dpll_data {
|
||||
u16 max_multiplier;
|
||||
u8 last_rounded_n;
|
||||
u8 min_divider;
|
||||
- u8 max_divider;
|
||||
+ u16 max_divider;
|
||||
u8 modes;
|
||||
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
|
||||
void __iomem *autoidle_reg;
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+256
@@ -0,0 +1,256 @@
|
||||
From 911f0274537657d1697f1bce1ba9594281d4fbf6 Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Sat, 9 Jul 2011 19:15:04 -0600
|
||||
Subject: [PATCH 052/149] OMAP4: prcm: Fix errors in few defines name
|
||||
|
||||
A couple of macros were wrongly changed during the _MOD to _INST
|
||||
rename done in the following commit:
|
||||
|
||||
OMAP4: PRCM: rename _MOD macros to _INST
|
||||
cdb54c4457d68994da7c2e16907adfbfc130060d
|
||||
|
||||
Fix them to their original name.
|
||||
|
||||
Some CM and PRM instances were not well aligned. Align them.
|
||||
|
||||
Remove one blank line in cm2_44xx.h to align the output with
|
||||
the other (cm1_44xx.h, prm44xx.h) files.
|
||||
|
||||
Update header copyright date.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Paul Walmsley <paul@pwsan.com>
|
||||
Cc: Rajendra Nayak <rnayak@ti.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/cm1_44xx.h | 28 ++++++++++++++--------------
|
||||
arch/arm/mach-omap2/cm2_44xx.h | 23 +++++++++++------------
|
||||
arch/arm/mach-omap2/prm44xx.h | 22 +++++++++++-----------
|
||||
3 files changed, 36 insertions(+), 37 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-omap2/cm1_44xx.h
|
||||
index e2d7a56..fc649f5 100644
|
||||
--- a/arch/arm/mach-omap2/cm1_44xx.h
|
||||
+++ b/arch/arm/mach-omap2/cm1_44xx.h
|
||||
@@ -1,7 +1,7 @@
|
||||
/*
|
||||
* OMAP44xx CM1 instance offset macros
|
||||
*
|
||||
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
|
||||
+ * Copyright (C) 2009-2011 Texas Instruments, Inc.
|
||||
* Copyright (C) 2009-2010 Nokia Corporation
|
||||
*
|
||||
* Paul Walmsley (paul@pwsan.com)
|
||||
@@ -41,9 +41,9 @@
|
||||
#define OMAP4430_CM1_INSTR_INST 0x0f00
|
||||
|
||||
/* CM1 clockdomain register offsets (from instance start) */
|
||||
-#define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000
|
||||
-#define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000
|
||||
-#define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000
|
||||
+#define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000
|
||||
+#define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000
|
||||
+#define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000
|
||||
|
||||
/* CM1 */
|
||||
|
||||
@@ -82,8 +82,8 @@
|
||||
#define OMAP4430_CM_DIV_M7_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0044)
|
||||
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_OFFSET 0x0048
|
||||
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0048)
|
||||
-#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_CORE_OFFSET 0x004c
|
||||
-#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c)
|
||||
+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_CORE_OFFSET 0x004c
|
||||
+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c)
|
||||
#define OMAP4_CM_EMU_OVERRIDE_DPLL_CORE_OFFSET 0x0050
|
||||
#define OMAP4430_CM_EMU_OVERRIDE_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0050)
|
||||
#define OMAP4_CM_CLKMODE_DPLL_MPU_OFFSET 0x0060
|
||||
@@ -98,8 +98,8 @@
|
||||
#define OMAP4430_CM_DIV_M2_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0070)
|
||||
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_MPU_OFFSET 0x0088
|
||||
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0088)
|
||||
-#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_MPU_OFFSET 0x008c
|
||||
-#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c)
|
||||
+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_MPU_OFFSET 0x008c
|
||||
+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c)
|
||||
#define OMAP4_CM_BYPCLK_DPLL_MPU_OFFSET 0x009c
|
||||
#define OMAP4430_CM_BYPCLK_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x009c)
|
||||
#define OMAP4_CM_CLKMODE_DPLL_IVA_OFFSET 0x00a0
|
||||
@@ -116,8 +116,8 @@
|
||||
#define OMAP4430_CM_DIV_M5_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00bc)
|
||||
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_IVA_OFFSET 0x00c8
|
||||
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00c8)
|
||||
-#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_IVA_OFFSET 0x00cc
|
||||
-#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc)
|
||||
+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_IVA_OFFSET 0x00cc
|
||||
+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc)
|
||||
#define OMAP4_CM_BYPCLK_DPLL_IVA_OFFSET 0x00dc
|
||||
#define OMAP4430_CM_BYPCLK_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00dc)
|
||||
#define OMAP4_CM_CLKMODE_DPLL_ABE_OFFSET 0x00e0
|
||||
@@ -134,8 +134,8 @@
|
||||
#define OMAP4430_CM_DIV_M3_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00f4)
|
||||
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_ABE_OFFSET 0x0108
|
||||
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0108)
|
||||
-#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_ABE_OFFSET 0x010c
|
||||
-#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c)
|
||||
+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_ABE_OFFSET 0x010c
|
||||
+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c)
|
||||
#define OMAP4_CM_CLKMODE_DPLL_DDRPHY_OFFSET 0x0120
|
||||
#define OMAP4430_CM_CLKMODE_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0120)
|
||||
#define OMAP4_CM_IDLEST_DPLL_DDRPHY_OFFSET 0x0124
|
||||
@@ -154,8 +154,8 @@
|
||||
#define OMAP4430_CM_DIV_M6_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0140)
|
||||
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_DDRPHY_OFFSET 0x0148
|
||||
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0148)
|
||||
-#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_DDRPHY_OFFSET 0x014c
|
||||
-#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c)
|
||||
+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_DDRPHY_OFFSET 0x014c
|
||||
+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c)
|
||||
#define OMAP4_CM_SHADOW_FREQ_CONFIG1_OFFSET 0x0160
|
||||
#define OMAP4430_CM_SHADOW_FREQ_CONFIG1 OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0160)
|
||||
#define OMAP4_CM_SHADOW_FREQ_CONFIG2_OFFSET 0x0164
|
||||
diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach-omap2/cm2_44xx.h
|
||||
index aa47450..8036a16 100644
|
||||
--- a/arch/arm/mach-omap2/cm2_44xx.h
|
||||
+++ b/arch/arm/mach-omap2/cm2_44xx.h
|
||||
@@ -1,7 +1,7 @@
|
||||
/*
|
||||
* OMAP44xx CM2 instance offset macros
|
||||
*
|
||||
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
|
||||
+ * Copyright (C) 2009-2011 Texas Instruments, Inc.
|
||||
* Copyright (C) 2009-2010 Nokia Corporation
|
||||
*
|
||||
* Paul Walmsley (paul@pwsan.com)
|
||||
@@ -40,9 +40,9 @@
|
||||
#define OMAP4430_CM2_CAM_INST 0x1000
|
||||
#define OMAP4430_CM2_DSS_INST 0x1100
|
||||
#define OMAP4430_CM2_GFX_INST 0x1200
|
||||
-#define OMAP4430_CM2_L3INIT_INST 0x1300
|
||||
+#define OMAP4430_CM2_L3INIT_INST 0x1300
|
||||
#define OMAP4430_CM2_L4PER_INST 0x1400
|
||||
-#define OMAP4430_CM2_CEFUSE_INST 0x1600
|
||||
+#define OMAP4430_CM2_CEFUSE_INST 0x1600
|
||||
#define OMAP4430_CM2_RESTORE_INST 0x1e00
|
||||
#define OMAP4430_CM2_INSTR_INST 0x1f00
|
||||
|
||||
@@ -65,7 +65,6 @@
|
||||
#define OMAP4430_CM2_L4PER_L4SEC_CDOFFS 0x0180
|
||||
#define OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS 0x0000
|
||||
|
||||
-
|
||||
/* CM2 */
|
||||
|
||||
/* CM2.OCP_SOCKET_CM2 register offsets */
|
||||
@@ -121,8 +120,8 @@
|
||||
#define OMAP4430_CM_DIV_M7_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0064)
|
||||
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_PER_OFFSET 0x0068
|
||||
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0068)
|
||||
-#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_PER_OFFSET 0x006c
|
||||
-#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c)
|
||||
+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_PER_OFFSET 0x006c
|
||||
+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c)
|
||||
#define OMAP4_CM_CLKMODE_DPLL_USB_OFFSET 0x0080
|
||||
#define OMAP4430_CM_CLKMODE_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0080)
|
||||
#define OMAP4_CM_IDLEST_DPLL_USB_OFFSET 0x0084
|
||||
@@ -135,8 +134,8 @@
|
||||
#define OMAP4430_CM_DIV_M2_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0090)
|
||||
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_USB_OFFSET 0x00a8
|
||||
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00a8)
|
||||
-#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_USB_OFFSET 0x00ac
|
||||
-#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac)
|
||||
+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_USB_OFFSET 0x00ac
|
||||
+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac)
|
||||
#define OMAP4_CM_CLKDCOLDO_DPLL_USB_OFFSET 0x00b4
|
||||
#define OMAP4430_CM_CLKDCOLDO_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00b4)
|
||||
#define OMAP4_CM_CLKMODE_DPLL_UNIPRO_OFFSET 0x00c0
|
||||
@@ -151,8 +150,8 @@
|
||||
#define OMAP4430_CM_DIV_M2_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00d0)
|
||||
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_UNIPRO_OFFSET 0x00e8
|
||||
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00e8)
|
||||
-#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_UNIPRO_OFFSET 0x00ec
|
||||
-#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec)
|
||||
+#define OMAP4_CM_SSC_MODFREQDIV_DPLL_UNIPRO_OFFSET 0x00ec
|
||||
+#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec)
|
||||
|
||||
/* CM2.ALWAYS_ON_CM2 register offsets */
|
||||
#define OMAP4_CM_ALWON_CLKSTCTRL_OFFSET 0x0000
|
||||
@@ -227,8 +226,8 @@
|
||||
#define OMAP4430_CM_D2D_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0508)
|
||||
#define OMAP4_CM_D2D_SAD2D_CLKCTRL_OFFSET 0x0520
|
||||
#define OMAP4430_CM_D2D_SAD2D_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0520)
|
||||
-#define OMAP4_CM_D2D_INSTEM_ICR_CLKCTRL_OFFSET 0x0528
|
||||
-#define OMAP4430_CM_D2D_INSTEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528)
|
||||
+#define OMAP4_CM_D2D_MODEM_ICR_CLKCTRL_OFFSET 0x0528
|
||||
+#define OMAP4430_CM_D2D_MODEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528)
|
||||
#define OMAP4_CM_D2D_SAD2D_FW_CLKCTRL_OFFSET 0x0530
|
||||
#define OMAP4430_CM_D2D_SAD2D_FW_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0530)
|
||||
#define OMAP4_CM_L4CFG_CLKSTCTRL_OFFSET 0x0600
|
||||
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
|
||||
index 67a0d3f..2aec8c8 100644
|
||||
--- a/arch/arm/mach-omap2/prm44xx.h
|
||||
+++ b/arch/arm/mach-omap2/prm44xx.h
|
||||
@@ -31,7 +31,7 @@
|
||||
#define OMAP4430_PRM_BASE 0x4a306000
|
||||
|
||||
#define OMAP44XX_PRM_REGADDR(inst, reg) \
|
||||
- OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg))
|
||||
+ OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg))
|
||||
|
||||
|
||||
/* PRM instances */
|
||||
@@ -46,14 +46,14 @@
|
||||
#define OMAP4430_PRM_CAM_INST 0x1000
|
||||
#define OMAP4430_PRM_DSS_INST 0x1100
|
||||
#define OMAP4430_PRM_GFX_INST 0x1200
|
||||
-#define OMAP4430_PRM_L3INIT_INST 0x1300
|
||||
+#define OMAP4430_PRM_L3INIT_INST 0x1300
|
||||
#define OMAP4430_PRM_L4PER_INST 0x1400
|
||||
-#define OMAP4430_PRM_CEFUSE_INST 0x1600
|
||||
+#define OMAP4430_PRM_CEFUSE_INST 0x1600
|
||||
#define OMAP4430_PRM_WKUP_INST 0x1700
|
||||
#define OMAP4430_PRM_WKUP_CM_INST 0x1800
|
||||
#define OMAP4430_PRM_EMU_INST 0x1900
|
||||
-#define OMAP4430_PRM_EMU_CM_INST 0x1a00
|
||||
-#define OMAP4430_PRM_DEVICE_INST 0x1b00
|
||||
+#define OMAP4430_PRM_EMU_CM_INST 0x1a00
|
||||
+#define OMAP4430_PRM_DEVICE_INST 0x1b00
|
||||
#define OMAP4430_PRM_INSTR_INST 0x1f00
|
||||
|
||||
/* PRM clockdomain register offsets (from instance start) */
|
||||
@@ -247,8 +247,8 @@
|
||||
#define OMAP4430_RM_MEMIF_DLL_H_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0464)
|
||||
#define OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET 0x0524
|
||||
#define OMAP4430_RM_D2D_SAD2D_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0524)
|
||||
-#define OMAP4_RM_D2D_INSTEM_ICR_CONTEXT_OFFSET 0x052c
|
||||
-#define OMAP4430_RM_D2D_INSTEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c)
|
||||
+#define OMAP4_RM_D2D_MODEM_ICR_CONTEXT_OFFSET 0x052c
|
||||
+#define OMAP4430_RM_D2D_MODEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c)
|
||||
#define OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET 0x0534
|
||||
#define OMAP4430_RM_D2D_SAD2D_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0534)
|
||||
#define OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET 0x0624
|
||||
@@ -713,8 +713,8 @@
|
||||
#define OMAP4430_PRM_VC_VAL_BYPASS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a0)
|
||||
#define OMAP4_PRM_VC_CFG_CHANNEL_OFFSET 0x00a4
|
||||
#define OMAP4430_PRM_VC_CFG_CHANNEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a4)
|
||||
-#define OMAP4_PRM_VC_CFG_I2C_INSTE_OFFSET 0x00a8
|
||||
-#define OMAP4430_PRM_VC_CFG_I2C_INSTE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8)
|
||||
+#define OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET 0x00a8
|
||||
+#define OMAP4430_PRM_VC_CFG_I2C_MODE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8)
|
||||
#define OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET 0x00ac
|
||||
#define OMAP4430_PRM_VC_CFG_I2C_CLK OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ac)
|
||||
#define OMAP4_PRM_SRAM_COUNT_OFFSET 0x00b0
|
||||
@@ -751,8 +751,8 @@
|
||||
#define OMAP4430_PRM_PHASE2A_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ec)
|
||||
#define OMAP4_PRM_PHASE2B_CNDP_OFFSET 0x00f0
|
||||
#define OMAP4430_PRM_PHASE2B_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f0)
|
||||
-#define OMAP4_PRM_INSTEM_IF_CTRL_OFFSET 0x00f4
|
||||
-#define OMAP4430_PRM_INSTEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4)
|
||||
+#define OMAP4_PRM_MODEM_IF_CTRL_OFFSET 0x00f4
|
||||
+#define OMAP4430_PRM_MODEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4)
|
||||
#define OMAP4_PRM_VC_ERRST_OFFSET 0x00f8
|
||||
#define OMAP4430_PRM_VC_ERRST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f8)
|
||||
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+50
@@ -0,0 +1,50 @@
|
||||
From e81a8c54e4567ecfdadb83d1574cc8a1cd865eac Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Sat, 9 Jul 2011 19:15:04 -0600
|
||||
Subject: [PATCH 053/149] OMAP4: prm: Remove wrong clockdomain offsets
|
||||
|
||||
The following commit introduced new macros to define an offset
|
||||
per clock domain in an instance.
|
||||
|
||||
commit e4156ee52fe617c2c2d80b5db993ff4bf07d7c3c
|
||||
|
||||
OMAP4: CM instances: add clockdomain register offsets
|
||||
|
||||
The PRM contains only two clock controls management entities:
|
||||
EMU and WKUP.
|
||||
Remove the other ones.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Paul Walmsley <paul@pwsan.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/prm44xx.h | 12 ------------
|
||||
1 files changed, 0 insertions(+), 12 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
|
||||
index 2aec8c8..6e53120 100644
|
||||
--- a/arch/arm/mach-omap2/prm44xx.h
|
||||
+++ b/arch/arm/mach-omap2/prm44xx.h
|
||||
@@ -57,19 +57,7 @@
|
||||
#define OMAP4430_PRM_INSTR_INST 0x1f00
|
||||
|
||||
/* PRM clockdomain register offsets (from instance start) */
|
||||
-#define OMAP4430_PRM_MPU_MPU_CDOFFS 0x0000
|
||||
-#define OMAP4430_PRM_TESLA_TESLA_CDOFFS 0x0000
|
||||
-#define OMAP4430_PRM_ABE_ABE_CDOFFS 0x0000
|
||||
-#define OMAP4430_PRM_CORE_CORE_CDOFFS 0x0000
|
||||
-#define OMAP4430_PRM_IVAHD_IVAHD_CDOFFS 0x0000
|
||||
-#define OMAP4430_PRM_CAM_CAM_CDOFFS 0x0000
|
||||
-#define OMAP4430_PRM_DSS_DSS_CDOFFS 0x0000
|
||||
-#define OMAP4430_PRM_GFX_GFX_CDOFFS 0x0000
|
||||
-#define OMAP4430_PRM_L3INIT_L3INIT_CDOFFS 0x0000
|
||||
-#define OMAP4430_PRM_L4PER_L4PER_CDOFFS 0x0000
|
||||
-#define OMAP4430_PRM_CEFUSE_CEFUSE_CDOFFS 0x0000
|
||||
#define OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS 0x0000
|
||||
-#define OMAP4430_PRM_EMU_EMU_CDOFFS 0x0000
|
||||
#define OMAP4430_PRM_EMU_CM_EMU_CDOFFS 0x0000
|
||||
|
||||
/* OMAP4 specific register offsets */
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+109
@@ -0,0 +1,109 @@
|
||||
From 5e989827a7af4f126e5e6ecbcadf6b28eddfeb5f Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Sat, 9 Jul 2011 19:15:05 -0600
|
||||
Subject: [PATCH 054/149] OMAP4: powerdomain data: Fix indentation
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
Indent flags to be aligned with other fields.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Paul Walmsley <paul@pwsan.com>
|
||||
Cc: Rajendra Nayak <rnayak@ti.com>
|
||||
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
[paul@pwsan.com: split this patch from an earlier patch by Benoît;
|
||||
edited commit message]
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/powerdomains44xx_data.c | 18 +++++++++---------
|
||||
1 files changed, 9 insertions(+), 9 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c
|
||||
index c4222c7..3a7e678 100644
|
||||
--- a/arch/arm/mach-omap2/powerdomains44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c
|
||||
@@ -53,7 +53,7 @@ static struct powerdomain core_44xx_pwrdm = {
|
||||
[3] = PWRSTS_ON, /* ducati_l2ram */
|
||||
[4] = PWRSTS_ON, /* ducati_unicache */
|
||||
},
|
||||
- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
};
|
||||
|
||||
/* gfx_44xx_pwrdm: 3D accelerator power domain */
|
||||
@@ -70,7 +70,7 @@ static struct powerdomain gfx_44xx_pwrdm = {
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* gfx_mem */
|
||||
},
|
||||
- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
};
|
||||
|
||||
/* abe_44xx_pwrdm: Audio back end power domain */
|
||||
@@ -90,7 +90,7 @@ static struct powerdomain abe_44xx_pwrdm = {
|
||||
[0] = PWRSTS_ON, /* aessmem */
|
||||
[1] = PWRSTS_ON, /* periphmem */
|
||||
},
|
||||
- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
};
|
||||
|
||||
/* dss_44xx_pwrdm: Display subsystem power domain */
|
||||
@@ -108,7 +108,7 @@ static struct powerdomain dss_44xx_pwrdm = {
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* dss_mem */
|
||||
},
|
||||
- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
};
|
||||
|
||||
/* tesla_44xx_pwrdm: Tesla processor power domain */
|
||||
@@ -130,7 +130,7 @@ static struct powerdomain tesla_44xx_pwrdm = {
|
||||
[1] = PWRSTS_ON, /* tesla_l1 */
|
||||
[2] = PWRSTS_ON, /* tesla_l2 */
|
||||
},
|
||||
- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
};
|
||||
|
||||
/* wkup_44xx_pwrdm: Wake-up power domain */
|
||||
@@ -241,7 +241,7 @@ static struct powerdomain ivahd_44xx_pwrdm = {
|
||||
[2] = PWRSTS_ON, /* tcm1_mem */
|
||||
[3] = PWRSTS_ON, /* tcm2_mem */
|
||||
},
|
||||
- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
};
|
||||
|
||||
/* cam_44xx_pwrdm: Camera subsystem power domain */
|
||||
@@ -258,7 +258,7 @@ static struct powerdomain cam_44xx_pwrdm = {
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* cam_mem */
|
||||
},
|
||||
- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
};
|
||||
|
||||
/* l3init_44xx_pwrdm: L3 initators pheripherals power domain */
|
||||
@@ -276,7 +276,7 @@ static struct powerdomain l3init_44xx_pwrdm = {
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* l3init_bank1 */
|
||||
},
|
||||
- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
};
|
||||
|
||||
/* l4per_44xx_pwrdm: Target peripherals power domain */
|
||||
@@ -296,7 +296,7 @@ static struct powerdomain l4per_44xx_pwrdm = {
|
||||
[0] = PWRSTS_ON, /* nonretained_bank */
|
||||
[1] = PWRSTS_ON, /* retained_bank */
|
||||
},
|
||||
- .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
};
|
||||
|
||||
/*
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+1523
File diff suppressed because it is too large
Load Diff
+111
@@ -0,0 +1,111 @@
|
||||
From 947ba5ed8ddd22fded6dd2a8a16741a43742857b Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Sat, 9 Jul 2011 19:15:06 -0600
|
||||
Subject: [PATCH 056/149] OMAP4: prcm_mpu: Fix indent in few macros
|
||||
|
||||
Some maros were not well aligned. Re-align them.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Paul Walmsley <paul@pwsan.com>
|
||||
Cc: Rajendra Nayak <rnayak@ti.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/prcm_mpu44xx.h | 69 +++++++++++++++++------------------
|
||||
1 files changed, 34 insertions(+), 35 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h
|
||||
index d22d1b4..8a6e250 100644
|
||||
--- a/arch/arm/mach-omap2/prcm_mpu44xx.h
|
||||
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.h
|
||||
@@ -31,7 +31,6 @@
|
||||
OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE + (inst) + (reg))
|
||||
|
||||
/* PRCM_MPU instances */
|
||||
-
|
||||
#define OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST 0x0000
|
||||
#define OMAP4430_PRCM_MPU_DEVICE_PRM_INST 0x0200
|
||||
#define OMAP4430_PRCM_MPU_CPU0_INST 0x0400
|
||||
@@ -52,46 +51,46 @@
|
||||
*/
|
||||
|
||||
/* PRCM_MPU.OCP_SOCKET_PRCM register offsets */
|
||||
-#define OMAP4_REVISION_PRCM_OFFSET 0x0000
|
||||
-#define OMAP4430_REVISION_PRCM OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST, 0x0000)
|
||||
+#define OMAP4_REVISION_PRCM_OFFSET 0x0000
|
||||
+#define OMAP4430_REVISION_PRCM OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST, 0x0000)
|
||||
|
||||
/* PRCM_MPU.DEVICE_PRM register offsets */
|
||||
-#define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET 0x0000
|
||||
-#define OMAP4430_PRCM_MPU_PRM_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0000)
|
||||
-#define OMAP4_PRCM_MPU_PRM_PSCON_COUNT_OFFSET 0x0004
|
||||
-#define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0004)
|
||||
+#define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET 0x0000
|
||||
+#define OMAP4430_PRCM_MPU_PRM_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0000)
|
||||
+#define OMAP4_PRCM_MPU_PRM_PSCON_COUNT_OFFSET 0x0004
|
||||
+#define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0004)
|
||||
|
||||
/* PRCM_MPU.CPU0 register offsets */
|
||||
-#define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET 0x0000
|
||||
-#define OMAP4430_PM_CPU0_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0000)
|
||||
-#define OMAP4_PM_CPU0_PWRSTST_OFFSET 0x0004
|
||||
-#define OMAP4430_PM_CPU0_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0004)
|
||||
-#define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0008
|
||||
-#define OMAP4430_RM_CPU0_CPU0_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0008)
|
||||
-#define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x000c
|
||||
-#define OMAP4430_RM_CPU0_CPU0_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x000c)
|
||||
-#define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET 0x0010
|
||||
-#define OMAP4430_RM_CPU0_CPU0_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0010)
|
||||
-#define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0014
|
||||
-#define OMAP4430_CM_CPU0_CPU0_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0014)
|
||||
-#define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET 0x0018
|
||||
-#define OMAP4430_CM_CPU0_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0018)
|
||||
+#define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET 0x0000
|
||||
+#define OMAP4430_PM_CPU0_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0000)
|
||||
+#define OMAP4_PM_CPU0_PWRSTST_OFFSET 0x0004
|
||||
+#define OMAP4430_PM_CPU0_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0004)
|
||||
+#define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0008
|
||||
+#define OMAP4430_RM_CPU0_CPU0_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0008)
|
||||
+#define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x000c
|
||||
+#define OMAP4430_RM_CPU0_CPU0_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x000c)
|
||||
+#define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET 0x0010
|
||||
+#define OMAP4430_RM_CPU0_CPU0_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0010)
|
||||
+#define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0014
|
||||
+#define OMAP4430_CM_CPU0_CPU0_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0014)
|
||||
+#define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET 0x0018
|
||||
+#define OMAP4430_CM_CPU0_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0018)
|
||||
|
||||
/* PRCM_MPU.CPU1 register offsets */
|
||||
-#define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET 0x0000
|
||||
-#define OMAP4430_PM_CPU1_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0000)
|
||||
-#define OMAP4_PM_CPU1_PWRSTST_OFFSET 0x0004
|
||||
-#define OMAP4430_PM_CPU1_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0004)
|
||||
-#define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0008
|
||||
-#define OMAP4430_RM_CPU1_CPU1_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0008)
|
||||
-#define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x000c
|
||||
-#define OMAP4430_RM_CPU1_CPU1_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x000c)
|
||||
-#define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET 0x0010
|
||||
-#define OMAP4430_RM_CPU1_CPU1_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0010)
|
||||
-#define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0014
|
||||
-#define OMAP4430_CM_CPU1_CPU1_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0014)
|
||||
-#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018
|
||||
-#define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018)
|
||||
+#define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET 0x0000
|
||||
+#define OMAP4430_PM_CPU1_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0000)
|
||||
+#define OMAP4_PM_CPU1_PWRSTST_OFFSET 0x0004
|
||||
+#define OMAP4430_PM_CPU1_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0004)
|
||||
+#define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0008
|
||||
+#define OMAP4430_RM_CPU1_CPU1_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0008)
|
||||
+#define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x000c
|
||||
+#define OMAP4430_RM_CPU1_CPU1_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x000c)
|
||||
+#define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET 0x0010
|
||||
+#define OMAP4430_RM_CPU1_CPU1_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0010)
|
||||
+#define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0014
|
||||
+#define OMAP4430_CM_CPU1_CPU1_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0014)
|
||||
+#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018
|
||||
+#define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018)
|
||||
|
||||
/* Function prototypes */
|
||||
# ifndef __ASSEMBLER__
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+294
@@ -0,0 +1,294 @@
|
||||
From 80cd994630a18bc3e6854fec1d47c837ebd97082 Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Sat, 9 Jul 2011 19:15:06 -0600
|
||||
Subject: [PATCH 057/149] OMAP4: clockdomain data: Fix data order and wrong name
|
||||
|
||||
MPUSS was renamed MPU and L3_D2D D2D.
|
||||
The rename will slightly change the order of the structure
|
||||
and thus generate some structures moves.
|
||||
|
||||
Add a comment and remove a comma.
|
||||
|
||||
Update Copyright for TI and Nokia and add back Paul
|
||||
in the author list.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Paul Walmsley <paul@pwsan.com>
|
||||
Cc: Rajendra Nayak <rnayak@ti.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/clockdomains44xx_data.c | 124 ++++++++++++++-------------
|
||||
1 files changed, 63 insertions(+), 61 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
|
||||
index a607ec1..66090f2 100644
|
||||
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
|
||||
@@ -1,11 +1,12 @@
|
||||
/*
|
||||
* OMAP4 Clock domains framework
|
||||
*
|
||||
- * Copyright (C) 2009 Texas Instruments, Inc.
|
||||
- * Copyright (C) 2009 Nokia Corporation
|
||||
+ * Copyright (C) 2009-2011 Texas Instruments, Inc.
|
||||
+ * Copyright (C) 2009-2011 Nokia Corporation
|
||||
*
|
||||
* Abhijit Pagare (abhijitpagare@ti.com)
|
||||
* Benoit Cousson (b-cousson@ti.com)
|
||||
+ * Paul Walmsley (paul@pwsan.com)
|
||||
*
|
||||
* This file is automatically generated from the OMAP hardware databases.
|
||||
* We respectfully ask that any modifications to this file be coordinated
|
||||
@@ -32,7 +33,7 @@
|
||||
|
||||
/* Static Dependencies for OMAP4 Clock Domains */
|
||||
|
||||
-static struct clkdm_dep ducati_wkup_sleep_deps[] = {
|
||||
+static struct clkdm_dep d2d_wkup_sleep_deps[] = {
|
||||
{
|
||||
.clkdm_name = "abe_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
@@ -50,103 +51,103 @@ static struct clkdm_dep ducati_wkup_sleep_deps[] = {
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
- .clkdm_name = "l3_dss_clkdm",
|
||||
+ .clkdm_name = "l3_emif_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
- .clkdm_name = "l3_emif_clkdm",
|
||||
+ .clkdm_name = "l3_init_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
- .clkdm_name = "l3_gfx_clkdm",
|
||||
+ .clkdm_name = "l4_cfg_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
- .clkdm_name = "l3_init_clkdm",
|
||||
+ .clkdm_name = "l4_per_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
+ { NULL },
|
||||
+};
|
||||
+
|
||||
+static struct clkdm_dep ducati_wkup_sleep_deps[] = {
|
||||
{
|
||||
- .clkdm_name = "l4_cfg_clkdm",
|
||||
+ .clkdm_name = "abe_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
- .clkdm_name = "l4_per_clkdm",
|
||||
+ .clkdm_name = "ivahd_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
- .clkdm_name = "l4_secure_clkdm",
|
||||
+ .clkdm_name = "l3_1_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
- .clkdm_name = "l4_wkup_clkdm",
|
||||
+ .clkdm_name = "l3_2_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
- .clkdm_name = "tesla_clkdm",
|
||||
+ .clkdm_name = "l3_dss_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
- { NULL },
|
||||
-};
|
||||
-
|
||||
-static struct clkdm_dep iss_wkup_sleep_deps[] = {
|
||||
{
|
||||
- .clkdm_name = "ivahd_clkdm",
|
||||
+ .clkdm_name = "l3_emif_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
- .clkdm_name = "l3_1_clkdm",
|
||||
+ .clkdm_name = "l3_gfx_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
- .clkdm_name = "l3_emif_clkdm",
|
||||
+ .clkdm_name = "l3_init_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
- { NULL },
|
||||
-};
|
||||
-
|
||||
-static struct clkdm_dep ivahd_wkup_sleep_deps[] = {
|
||||
{
|
||||
- .clkdm_name = "l3_1_clkdm",
|
||||
+ .clkdm_name = "l4_cfg_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
- .clkdm_name = "l3_emif_clkdm",
|
||||
+ .clkdm_name = "l4_per_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
- { NULL },
|
||||
-};
|
||||
-
|
||||
-static struct clkdm_dep l3_d2d_wkup_sleep_deps[] = {
|
||||
{
|
||||
- .clkdm_name = "abe_clkdm",
|
||||
+ .clkdm_name = "l4_secure_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
- .clkdm_name = "ivahd_clkdm",
|
||||
+ .clkdm_name = "l4_wkup_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
- .clkdm_name = "l3_1_clkdm",
|
||||
+ .clkdm_name = "tesla_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
+ { NULL },
|
||||
+};
|
||||
+
|
||||
+static struct clkdm_dep iss_wkup_sleep_deps[] = {
|
||||
{
|
||||
- .clkdm_name = "l3_2_clkdm",
|
||||
+ .clkdm_name = "ivahd_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
- .clkdm_name = "l3_emif_clkdm",
|
||||
+ .clkdm_name = "l3_1_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
- .clkdm_name = "l3_init_clkdm",
|
||||
+ .clkdm_name = "l3_emif_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
+ { NULL },
|
||||
+};
|
||||
+
|
||||
+static struct clkdm_dep ivahd_wkup_sleep_deps[] = {
|
||||
{
|
||||
- .clkdm_name = "l4_cfg_clkdm",
|
||||
+ .clkdm_name = "l3_1_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
- .clkdm_name = "l4_per_clkdm",
|
||||
+ .clkdm_name = "l3_emif_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{ NULL },
|
||||
@@ -280,7 +281,7 @@ static struct clkdm_dep l4_secure_wkup_sleep_deps[] = {
|
||||
{ NULL },
|
||||
};
|
||||
|
||||
-static struct clkdm_dep mpuss_wkup_sleep_deps[] = {
|
||||
+static struct clkdm_dep mpu_wkup_sleep_deps[] = {
|
||||
{
|
||||
.clkdm_name = "abe_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
@@ -497,14 +498,14 @@ static struct clockdomain l3_init_44xx_clkdm = {
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
-static struct clockdomain mpuss_44xx_clkdm = {
|
||||
- .name = "mpuss_clkdm",
|
||||
- .pwrdm = { .name = "mpu_pwrdm" },
|
||||
- .prcm_partition = OMAP4430_CM1_PARTITION,
|
||||
- .cm_inst = OMAP4430_CM1_MPU_INST,
|
||||
- .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS,
|
||||
- .wkdep_srcs = mpuss_wkup_sleep_deps,
|
||||
- .sleepdep_srcs = mpuss_wkup_sleep_deps,
|
||||
+static struct clockdomain d2d_44xx_clkdm = {
|
||||
+ .name = "d2d_clkdm",
|
||||
+ .pwrdm = { .name = "core_pwrdm" },
|
||||
+ .prcm_partition = OMAP4430_CM2_PARTITION,
|
||||
+ .cm_inst = OMAP4430_CM2_CORE_INST,
|
||||
+ .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS,
|
||||
+ .wkdep_srcs = d2d_wkup_sleep_deps,
|
||||
+ .sleepdep_srcs = d2d_wkup_sleep_deps,
|
||||
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
@@ -563,6 +564,18 @@ static struct clockdomain ducati_44xx_clkdm = {
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
+static struct clockdomain mpu_44xx_clkdm = {
|
||||
+ .name = "mpu_clkdm",
|
||||
+ .pwrdm = { .name = "mpu_pwrdm" },
|
||||
+ .prcm_partition = OMAP4430_CM1_PARTITION,
|
||||
+ .cm_inst = OMAP4430_CM1_MPU_INST,
|
||||
+ .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS,
|
||||
+ .wkdep_srcs = mpu_wkup_sleep_deps,
|
||||
+ .sleepdep_srcs = mpu_wkup_sleep_deps,
|
||||
+ .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
|
||||
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
+};
|
||||
+
|
||||
static struct clockdomain l3_2_44xx_clkdm = {
|
||||
.name = "l3_2_clkdm",
|
||||
.pwrdm = { .name = "core_pwrdm" },
|
||||
@@ -585,18 +598,6 @@ static struct clockdomain l3_1_44xx_clkdm = {
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
-static struct clockdomain l3_d2d_44xx_clkdm = {
|
||||
- .name = "l3_d2d_clkdm",
|
||||
- .pwrdm = { .name = "core_pwrdm" },
|
||||
- .prcm_partition = OMAP4430_CM2_PARTITION,
|
||||
- .cm_inst = OMAP4430_CM2_CORE_INST,
|
||||
- .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS,
|
||||
- .wkdep_srcs = l3_d2d_wkup_sleep_deps,
|
||||
- .sleepdep_srcs = l3_d2d_wkup_sleep_deps,
|
||||
- .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
|
||||
- .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
-};
|
||||
-
|
||||
static struct clockdomain iss_44xx_clkdm = {
|
||||
.name = "iss_clkdm",
|
||||
.pwrdm = { .name = "cam_pwrdm" },
|
||||
@@ -655,6 +656,7 @@ static struct clockdomain l3_dma_44xx_clkdm = {
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
+/* As clockdomains are added or removed above, this list must also be changed */
|
||||
static struct clockdomain *clockdomains_omap44xx[] __initdata = {
|
||||
&l4_cefuse_44xx_clkdm,
|
||||
&l4_cfg_44xx_clkdm,
|
||||
@@ -666,21 +668,21 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = {
|
||||
&abe_44xx_clkdm,
|
||||
&l3_instr_44xx_clkdm,
|
||||
&l3_init_44xx_clkdm,
|
||||
- &mpuss_44xx_clkdm,
|
||||
+ &d2d_44xx_clkdm,
|
||||
&mpu0_44xx_clkdm,
|
||||
&mpu1_44xx_clkdm,
|
||||
&l3_emif_44xx_clkdm,
|
||||
&l4_ao_44xx_clkdm,
|
||||
&ducati_44xx_clkdm,
|
||||
+ &mpu_44xx_clkdm,
|
||||
&l3_2_44xx_clkdm,
|
||||
&l3_1_44xx_clkdm,
|
||||
- &l3_d2d_44xx_clkdm,
|
||||
&iss_44xx_clkdm,
|
||||
&l3_dss_44xx_clkdm,
|
||||
&l4_wkup_44xx_clkdm,
|
||||
&emu_sys_44xx_clkdm,
|
||||
&l3_dma_44xx_clkdm,
|
||||
- NULL,
|
||||
+ NULL
|
||||
};
|
||||
|
||||
void __init omap44xx_clockdomains_init(void)
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+84
@@ -0,0 +1,84 @@
|
||||
From 2033d2c00170e64c9d634cafaf8bd1cf1a5f3ee1 Mon Sep 17 00:00:00 2001
|
||||
From: Kevin Hilman <khilman@ti.com>
|
||||
Date: Sat, 9 Jul 2011 19:15:20 -0600
|
||||
Subject: [PATCH 058/149] OMAP: omap_device: replace _find_by_pdev() with to_omap_device()
|
||||
|
||||
The omap_device layer currently has two ways of getting an omap_device
|
||||
pointer from a platform_device pointer.
|
||||
|
||||
Replace current usage of _find_by_pdev() with to_omap_device() since
|
||||
to_omap_device() is more familiar to the existing to_platform_device()
|
||||
used when getting a platform_device pointer from a struct device pointer.
|
||||
|
||||
Cc: Felipe Balbi <balbi@ti.com>
|
||||
Signed-off-by: Kevin Hilman <khilman@ti.com>
|
||||
Reviewed-by: Felipe Balbi <balbi@ti.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/plat-omap/omap_device.c | 15 +++++----------
|
||||
1 files changed, 5 insertions(+), 10 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
|
||||
index 49fc0df..c8b9cd1 100644
|
||||
--- a/arch/arm/plat-omap/omap_device.c
|
||||
+++ b/arch/arm/plat-omap/omap_device.c
|
||||
@@ -236,11 +236,6 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat)
|
||||
return 0;
|
||||
}
|
||||
|
||||
-static inline struct omap_device *_find_by_pdev(struct platform_device *pdev)
|
||||
-{
|
||||
- return container_of(pdev, struct omap_device, pdev);
|
||||
-}
|
||||
-
|
||||
/**
|
||||
* _add_optional_clock_clkdev - Add clkdev entry for hwmod optional clocks
|
||||
* @od: struct omap_device *od
|
||||
@@ -316,7 +311,7 @@ u32 omap_device_get_context_loss_count(struct platform_device *pdev)
|
||||
struct omap_device *od;
|
||||
u32 ret = 0;
|
||||
|
||||
- od = _find_by_pdev(pdev);
|
||||
+ od = to_omap_device(pdev);
|
||||
|
||||
if (od->hwmods_cnt)
|
||||
ret = omap_hwmod_get_context_loss_count(od->hwmods[0]);
|
||||
@@ -611,7 +606,7 @@ int omap_device_enable(struct platform_device *pdev)
|
||||
int ret;
|
||||
struct omap_device *od;
|
||||
|
||||
- od = _find_by_pdev(pdev);
|
||||
+ od = to_omap_device(pdev);
|
||||
|
||||
if (od->_state == OMAP_DEVICE_STATE_ENABLED) {
|
||||
WARN(1, "omap_device: %s.%d: %s() called from invalid state %d\n",
|
||||
@@ -650,7 +645,7 @@ int omap_device_idle(struct platform_device *pdev)
|
||||
int ret;
|
||||
struct omap_device *od;
|
||||
|
||||
- od = _find_by_pdev(pdev);
|
||||
+ od = to_omap_device(pdev);
|
||||
|
||||
if (od->_state != OMAP_DEVICE_STATE_ENABLED) {
|
||||
WARN(1, "omap_device: %s.%d: %s() called from invalid state %d\n",
|
||||
@@ -681,7 +676,7 @@ int omap_device_shutdown(struct platform_device *pdev)
|
||||
int ret, i;
|
||||
struct omap_device *od;
|
||||
|
||||
- od = _find_by_pdev(pdev);
|
||||
+ od = to_omap_device(pdev);
|
||||
|
||||
if (od->_state != OMAP_DEVICE_STATE_ENABLED &&
|
||||
od->_state != OMAP_DEVICE_STATE_IDLE) {
|
||||
@@ -722,7 +717,7 @@ int omap_device_align_pm_lat(struct platform_device *pdev,
|
||||
int ret = -EINVAL;
|
||||
struct omap_device *od;
|
||||
|
||||
- od = _find_by_pdev(pdev);
|
||||
+ od = to_omap_device(pdev);
|
||||
|
||||
if (new_wakeup_lat_limit == od->dev_wakeup_lat)
|
||||
return 0;
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+63
@@ -0,0 +1,63 @@
|
||||
From f0b12908ee88cda0e51a3b416387cc6d7605b809 Mon Sep 17 00:00:00 2001
|
||||
From: Jean Pihet <jean.pihet@newoldbits.com>
|
||||
Date: Sat, 9 Jul 2011 19:15:41 -0600
|
||||
Subject: [PATCH 059/149] OMAP PM: remove OMAP_PM_NONE config option
|
||||
|
||||
The current code base is not linking with the OMAP_PM_NONE
|
||||
option set.
|
||||
Since the option OMAP_PM_NOOP provides a no-op/debug layer,
|
||||
OMAP_PM_NONE can be removed.
|
||||
OMAP_PM_NOOP is enabled by default by Kconfig.
|
||||
|
||||
Signed-off-by: Jean Pihet <j-pihet@ti.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/plat-omap/Kconfig | 3 ---
|
||||
arch/arm/plat-omap/include/plat/omap-pm.h | 8 --------
|
||||
2 files changed, 0 insertions(+), 11 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
|
||||
index 49a4c75..6e6735f 100644
|
||||
--- a/arch/arm/plat-omap/Kconfig
|
||||
+++ b/arch/arm/plat-omap/Kconfig
|
||||
@@ -211,9 +211,6 @@ choice
|
||||
depends on ARCH_OMAP
|
||||
default OMAP_PM_NOOP
|
||||
|
||||
-config OMAP_PM_NONE
|
||||
- bool "No PM layer"
|
||||
-
|
||||
config OMAP_PM_NOOP
|
||||
bool "No-op/debug PM layer"
|
||||
|
||||
diff --git a/arch/arm/plat-omap/include/plat/omap-pm.h b/arch/arm/plat-omap/include/plat/omap-pm.h
|
||||
index c0a7520..0840df8 100644
|
||||
--- a/arch/arm/plat-omap/include/plat/omap-pm.h
|
||||
+++ b/arch/arm/plat-omap/include/plat/omap-pm.h
|
||||
@@ -40,11 +40,7 @@
|
||||
* framework starts. The "_if_" is to avoid name collisions with the
|
||||
* PM idle-loop code.
|
||||
*/
|
||||
-#ifdef CONFIG_OMAP_PM_NONE
|
||||
-#define omap_pm_if_early_init() 0
|
||||
-#else
|
||||
int __init omap_pm_if_early_init(void);
|
||||
-#endif
|
||||
|
||||
/**
|
||||
* omap_pm_if_init - OMAP PM init code called after clock fw init
|
||||
@@ -52,11 +48,7 @@ int __init omap_pm_if_early_init(void);
|
||||
* The main initialization code. OPP tables are passed in here. The
|
||||
* "_if_" is to avoid name collisions with the PM idle-loop code.
|
||||
*/
|
||||
-#ifdef CONFIG_OMAP_PM_NONE
|
||||
-#define omap_pm_if_init() 0
|
||||
-#else
|
||||
int __init omap_pm_if_init(void);
|
||||
-#endif
|
||||
|
||||
/**
|
||||
* omap_pm_if_exit - OMAP PM exit code
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+178
@@ -0,0 +1,178 @@
|
||||
From a5224876877da3dce7971e82d89a58d58f4917fb Mon Sep 17 00:00:00 2001
|
||||
From: Jon Hunter <jon-hunter@ti.com>
|
||||
Date: Sat, 9 Jul 2011 19:14:47 -0600
|
||||
Subject: [PATCH 060/149] OMAP4: clock data: Remove McASP2, McASP3 and MMC6 clocks
|
||||
|
||||
McASP2, 3 and MMC6 modules are not present in the OMAP4 family.
|
||||
Remove the fclk and the clksel related to these nodes.
|
||||
Rename the references that were potentially re-used in order nodes.
|
||||
|
||||
Remove related macros in prcm header files.
|
||||
|
||||
Update TI copyright date.
|
||||
|
||||
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
|
||||
[b-cousson@ti.com: Update the patch according to autogen output]
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
[paul@pwsan.com: split PRCM data changes into a separate patch]
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/clock44xx_data.c | 86 ++++++++++++---------------------
|
||||
1 files changed, 31 insertions(+), 55 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
|
||||
index 8307c9e..96bc668 100644
|
||||
--- a/arch/arm/mach-omap2/clock44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/clock44xx_data.c
|
||||
@@ -1170,19 +1170,6 @@ static struct clk func_96m_fclk = {
|
||||
.set_rate = &omap2_clksel_set_rate,
|
||||
};
|
||||
|
||||
-static const struct clksel hsmmc6_fclk_sel[] = {
|
||||
- { .parent = &func_64m_fclk, .rates = div_1_0_rates },
|
||||
- { .parent = &func_96m_fclk, .rates = div_1_1_rates },
|
||||
- { .parent = NULL },
|
||||
-};
|
||||
-
|
||||
-static struct clk hsmmc6_fclk = {
|
||||
- .name = "hsmmc6_fclk",
|
||||
- .parent = &func_64m_fclk,
|
||||
- .ops = &clkops_null,
|
||||
- .recalc = &followparent_recalc,
|
||||
-};
|
||||
-
|
||||
static const struct clksel_rate div2_1to8_rates[] = {
|
||||
{ .div = 1, .val = 0, .flags = RATE_IN_4430 },
|
||||
{ .div = 8, .val = 1, .flags = RATE_IN_4430 },
|
||||
@@ -1265,6 +1252,21 @@ static struct clk l4_wkup_clk_mux_ck = {
|
||||
.recalc = &omap2_clksel_recalc,
|
||||
};
|
||||
|
||||
+static struct clk ocp_abe_iclk = {
|
||||
+ .name = "ocp_abe_iclk",
|
||||
+ .parent = &aess_fclk,
|
||||
+ .ops = &clkops_null,
|
||||
+ .recalc = &followparent_recalc,
|
||||
+};
|
||||
+
|
||||
+static struct clk per_abe_24m_fclk = {
|
||||
+ .name = "per_abe_24m_fclk",
|
||||
+ .parent = &dpll_abe_m2_ck,
|
||||
+ .ops = &clkops_null,
|
||||
+ .fixed_div = 4,
|
||||
+ .recalc = &omap_fixed_divisor_recalc,
|
||||
+};
|
||||
+
|
||||
static const struct clksel per_abe_nc_fclk_div[] = {
|
||||
{ .parent = &dpll_abe_m2_ck, .rates = div2_1to2_rates },
|
||||
{ .parent = NULL },
|
||||
@@ -1282,41 +1284,6 @@ static struct clk per_abe_nc_fclk = {
|
||||
.set_rate = &omap2_clksel_set_rate,
|
||||
};
|
||||
|
||||
-static const struct clksel mcasp2_fclk_sel[] = {
|
||||
- { .parent = &func_96m_fclk, .rates = div_1_0_rates },
|
||||
- { .parent = &per_abe_nc_fclk, .rates = div_1_1_rates },
|
||||
- { .parent = NULL },
|
||||
-};
|
||||
-
|
||||
-static struct clk mcasp2_fclk = {
|
||||
- .name = "mcasp2_fclk",
|
||||
- .parent = &func_96m_fclk,
|
||||
- .ops = &clkops_null,
|
||||
- .recalc = &followparent_recalc,
|
||||
-};
|
||||
-
|
||||
-static struct clk mcasp3_fclk = {
|
||||
- .name = "mcasp3_fclk",
|
||||
- .parent = &func_96m_fclk,
|
||||
- .ops = &clkops_null,
|
||||
- .recalc = &followparent_recalc,
|
||||
-};
|
||||
-
|
||||
-static struct clk ocp_abe_iclk = {
|
||||
- .name = "ocp_abe_iclk",
|
||||
- .parent = &aess_fclk,
|
||||
- .ops = &clkops_null,
|
||||
- .recalc = &followparent_recalc,
|
||||
-};
|
||||
-
|
||||
-static struct clk per_abe_24m_fclk = {
|
||||
- .name = "per_abe_24m_fclk",
|
||||
- .parent = &dpll_abe_m2_ck,
|
||||
- .ops = &clkops_null,
|
||||
- .fixed_div = 4,
|
||||
- .recalc = &omap_fixed_divisor_recalc,
|
||||
-};
|
||||
-
|
||||
static const struct clksel pmd_stm_clock_mux_sel[] = {
|
||||
{ .parent = &sys_clkin_ck, .rates = div_1_0_rates },
|
||||
{ .parent = &dpll_core_m6x2_ck, .rates = div_1_1_rates },
|
||||
@@ -1996,10 +1963,16 @@ static struct clk mcbsp3_fck = {
|
||||
.clkdm_name = "abe_clkdm",
|
||||
};
|
||||
|
||||
+static const struct clksel mcbsp4_sync_mux_sel[] = {
|
||||
+ { .parent = &func_96m_fclk, .rates = div_1_0_rates },
|
||||
+ { .parent = &per_abe_nc_fclk, .rates = div_1_1_rates },
|
||||
+ { .parent = NULL },
|
||||
+};
|
||||
+
|
||||
static struct clk mcbsp4_sync_mux_ck = {
|
||||
.name = "mcbsp4_sync_mux_ck",
|
||||
.parent = &func_96m_fclk,
|
||||
- .clksel = mcasp2_fclk_sel,
|
||||
+ .clksel = mcbsp4_sync_mux_sel,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.clksel_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL,
|
||||
.clksel_mask = OMAP4430_CLKSEL_INTERNAL_SOURCE_MASK,
|
||||
@@ -2078,11 +2051,17 @@ static struct clk mcspi4_fck = {
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
+static const struct clksel hsmmc1_fclk_sel[] = {
|
||||
+ { .parent = &func_64m_fclk, .rates = div_1_0_rates },
|
||||
+ { .parent = &func_96m_fclk, .rates = div_1_1_rates },
|
||||
+ { .parent = NULL },
|
||||
+};
|
||||
+
|
||||
/* Merged hsmmc1_fclk into mmc1 */
|
||||
static struct clk mmc1_fck = {
|
||||
.name = "mmc1_fck",
|
||||
.parent = &func_64m_fclk,
|
||||
- .clksel = hsmmc6_fclk_sel,
|
||||
+ .clksel = hsmmc1_fclk_sel,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.clksel_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL,
|
||||
.clksel_mask = OMAP4430_CLKSEL_MASK,
|
||||
@@ -2097,7 +2076,7 @@ static struct clk mmc1_fck = {
|
||||
static struct clk mmc2_fck = {
|
||||
.name = "mmc2_fck",
|
||||
.parent = &func_64m_fclk,
|
||||
- .clksel = hsmmc6_fclk_sel,
|
||||
+ .clksel = hsmmc1_fclk_sel,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.clksel_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL,
|
||||
.clksel_mask = OMAP4430_CLKSEL_MASK,
|
||||
@@ -3094,17 +3073,14 @@ static struct omap_clk omap44xx_clks[] = {
|
||||
CLK(NULL, "func_48mc_fclk", &func_48mc_fclk, CK_443X),
|
||||
CLK(NULL, "func_64m_fclk", &func_64m_fclk, CK_443X),
|
||||
CLK(NULL, "func_96m_fclk", &func_96m_fclk, CK_443X),
|
||||
- CLK(NULL, "hsmmc6_fclk", &hsmmc6_fclk, CK_443X),
|
||||
CLK(NULL, "init_60m_fclk", &init_60m_fclk, CK_443X),
|
||||
CLK(NULL, "l3_div_ck", &l3_div_ck, CK_443X),
|
||||
CLK(NULL, "l4_div_ck", &l4_div_ck, CK_443X),
|
||||
CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_443X),
|
||||
CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_443X),
|
||||
- CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X),
|
||||
- CLK(NULL, "mcasp2_fclk", &mcasp2_fclk, CK_443X),
|
||||
- CLK(NULL, "mcasp3_fclk", &mcasp3_fclk, CK_443X),
|
||||
CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_443X),
|
||||
CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_443X),
|
||||
+ CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X),
|
||||
CLK(NULL, "pmd_stm_clock_mux_ck", &pmd_stm_clock_mux_ck, CK_443X),
|
||||
CLK(NULL, "pmd_trace_clk_mux_ck", &pmd_trace_clk_mux_ck, CK_443X),
|
||||
CLK(NULL, "syc_clk_div_ck", &syc_clk_div_ck, CK_443X),
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+99
@@ -0,0 +1,99 @@
|
||||
From 12b5876bb1ee9c2bc2ba266c759358235d3cd2bc Mon Sep 17 00:00:00 2001
|
||||
From: Jon Hunter <jon-hunter@ti.com>
|
||||
Date: Sat, 9 Jul 2011 19:14:47 -0600
|
||||
Subject: [PATCH 061/149] OMAP4: clock data: Remove UNIPRO clock nodes
|
||||
|
||||
UNIPRO was removed from OMAP4 devices from ES2.0 onwards.
|
||||
Since this IP was anyway non-functional and not supported,
|
||||
it is best to remove it completely.
|
||||
|
||||
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
|
||||
[b-cousson@ti.com: Update the changelog]
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
[paul@pwsan.com: split PRCM header file changes into a separate patch]
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/clock44xx_data.c | 60 ----------------------------------
|
||||
1 files changed, 0 insertions(+), 60 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
|
||||
index 96bc668..044df38 100644
|
||||
--- a/arch/arm/mach-omap2/clock44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/clock44xx_data.c
|
||||
@@ -935,63 +935,6 @@ static struct clk dpll_per_m7x2_ck = {
|
||||
.set_rate = &omap2_clksel_set_rate,
|
||||
};
|
||||
|
||||
-/* DPLL_UNIPRO */
|
||||
-static struct dpll_data dpll_unipro_dd = {
|
||||
- .mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_UNIPRO,
|
||||
- .clk_bypass = &sys_clkin_ck,
|
||||
- .clk_ref = &sys_clkin_ck,
|
||||
- .control_reg = OMAP4430_CM_CLKMODE_DPLL_UNIPRO,
|
||||
- .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED),
|
||||
- .autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_UNIPRO,
|
||||
- .idlest_reg = OMAP4430_CM_IDLEST_DPLL_UNIPRO,
|
||||
- .mult_mask = OMAP4430_DPLL_MULT_MASK,
|
||||
- .div1_mask = OMAP4430_DPLL_DIV_MASK,
|
||||
- .enable_mask = OMAP4430_DPLL_EN_MASK,
|
||||
- .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
|
||||
- .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
|
||||
- .max_multiplier = 2047,
|
||||
- .max_divider = 128,
|
||||
- .min_divider = 1,
|
||||
-};
|
||||
-
|
||||
-
|
||||
-static struct clk dpll_unipro_ck = {
|
||||
- .name = "dpll_unipro_ck",
|
||||
- .parent = &sys_clkin_ck,
|
||||
- .dpll_data = &dpll_unipro_dd,
|
||||
- .init = &omap2_init_dpll_parent,
|
||||
- .ops = &clkops_omap3_noncore_dpll_ops,
|
||||
- .recalc = &omap3_dpll_recalc,
|
||||
- .round_rate = &omap2_dpll_round_rate,
|
||||
- .set_rate = &omap3_noncore_dpll_set_rate,
|
||||
-};
|
||||
-
|
||||
-static struct clk dpll_unipro_x2_ck = {
|
||||
- .name = "dpll_unipro_x2_ck",
|
||||
- .parent = &dpll_unipro_ck,
|
||||
- .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO,
|
||||
- .flags = CLOCK_CLKOUTX2,
|
||||
- .ops = &clkops_omap4_dpllmx_ops,
|
||||
- .recalc = &omap3_clkoutx2_recalc,
|
||||
-};
|
||||
-
|
||||
-static const struct clksel dpll_unipro_m2x2_div[] = {
|
||||
- { .parent = &dpll_unipro_x2_ck, .rates = div31_1to31_rates },
|
||||
- { .parent = NULL },
|
||||
-};
|
||||
-
|
||||
-static struct clk dpll_unipro_m2x2_ck = {
|
||||
- .name = "dpll_unipro_m2x2_ck",
|
||||
- .parent = &dpll_unipro_x2_ck,
|
||||
- .clksel = dpll_unipro_m2x2_div,
|
||||
- .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO,
|
||||
- .clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK,
|
||||
- .ops = &clkops_omap4_dpllmx_ops,
|
||||
- .recalc = &omap2_clksel_recalc,
|
||||
- .round_rate = &omap2_clksel_round_rate,
|
||||
- .set_rate = &omap2_clksel_set_rate,
|
||||
-};
|
||||
-
|
||||
static struct clk usb_hs_clk_div_ck = {
|
||||
.name = "usb_hs_clk_div_ck",
|
||||
.parent = &dpll_abe_m3x2_ck,
|
||||
@@ -3058,9 +3001,6 @@ static struct omap_clk omap44xx_clks[] = {
|
||||
CLK(NULL, "dpll_per_m5x2_ck", &dpll_per_m5x2_ck, CK_443X),
|
||||
CLK(NULL, "dpll_per_m6x2_ck", &dpll_per_m6x2_ck, CK_443X),
|
||||
CLK(NULL, "dpll_per_m7x2_ck", &dpll_per_m7x2_ck, CK_443X),
|
||||
- CLK(NULL, "dpll_unipro_ck", &dpll_unipro_ck, CK_443X),
|
||||
- CLK(NULL, "dpll_unipro_x2_ck", &dpll_unipro_x2_ck, CK_443X),
|
||||
- CLK(NULL, "dpll_unipro_m2x2_ck", &dpll_unipro_m2x2_ck, CK_443X),
|
||||
CLK(NULL, "usb_hs_clk_div_ck", &usb_hs_clk_div_ck, CK_443X),
|
||||
CLK(NULL, "dpll_usb_ck", &dpll_usb_ck, CK_443X),
|
||||
CLK(NULL, "dpll_usb_clkdcoldo_ck", &dpll_usb_clkdcoldo_ck, CK_443X),
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+153
@@ -0,0 +1,153 @@
|
||||
From 884e583d87b2acda00edb3bfb96f2d7516bd58f6 Mon Sep 17 00:00:00 2001
|
||||
From: Tomi Valkeinen <tomi.valkeinen@ti.com>
|
||||
Date: Sat, 9 Jul 2011 20:39:44 -0600
|
||||
Subject: [PATCH 062/149] OMAP4: hwmod data: Modify DSS opt clocks
|
||||
|
||||
Add missing DSS optional clocks to HWMOD data for OMAP4xxx.
|
||||
|
||||
Add HWMOD_CONTROL_OPT_CLKS_IN_RESET flag for dispc to fix dispc reset.
|
||||
|
||||
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
|
||||
[b-cousson@ti.com: Remove a comment and update the subject]
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
|
||||
[paul@pwsan.com: removed DSS "fck" role and some clkdev aliases at Tomi's
|
||||
request]
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/clock44xx_data.c | 8 +++---
|
||||
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 33 ++++++++++++++++++++++++++++
|
||||
2 files changed, 37 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
|
||||
index 044df38..7a0b112 100644
|
||||
--- a/arch/arm/mach-omap2/clock44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/clock44xx_data.c
|
||||
@@ -3032,10 +3032,10 @@ static struct omap_clk omap44xx_clks[] = {
|
||||
CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X),
|
||||
CLK(NULL, "dmic_fck", &dmic_fck, CK_443X),
|
||||
CLK(NULL, "dsp_fck", &dsp_fck, CK_443X),
|
||||
- CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X),
|
||||
- CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X),
|
||||
- CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X),
|
||||
- CLK("omapdss_dss", "fck", &dss_dss_clk, CK_443X),
|
||||
+ CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X),
|
||||
+ CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X),
|
||||
+ CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X),
|
||||
+ CLK(NULL, "dss_dss_clk", &dss_dss_clk, CK_443X),
|
||||
CLK("omapdss_dss", "ick", &dss_fck, CK_443X),
|
||||
CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X),
|
||||
CLK(NULL, "emif1_fck", &emif1_fck, CK_443X),
|
||||
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
index e011437..a7fbe5c 100644
|
||||
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
|
||||
@@ -1267,9 +1267,16 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = {
|
||||
&omap44xx_l4_per__dss_dispc,
|
||||
};
|
||||
|
||||
+static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = {
|
||||
+ { .role = "sys_clk", .clk = "dss_sys_clk" },
|
||||
+ { .role = "tv_clk", .clk = "dss_tv_clk" },
|
||||
+ { .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
|
||||
+};
|
||||
+
|
||||
static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
|
||||
.name = "dss_dispc",
|
||||
.class = &omap44xx_dispc_hwmod_class,
|
||||
+ .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap44xx_dss_dispc_irqs,
|
||||
.sdma_reqs = omap44xx_dss_dispc_sdma_reqs,
|
||||
.main_clk = "dss_fck",
|
||||
@@ -1278,6 +1285,8 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
|
||||
.clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
|
||||
},
|
||||
},
|
||||
+ .opt_clks = dss_dispc_opt_clks,
|
||||
+ .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks),
|
||||
.slaves = omap44xx_dss_dispc_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves),
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
@@ -1358,6 +1367,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dsi1_slaves[] = {
|
||||
&omap44xx_l4_per__dss_dsi1,
|
||||
};
|
||||
|
||||
+static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = {
|
||||
+ { .role = "sys_clk", .clk = "dss_sys_clk" },
|
||||
+};
|
||||
+
|
||||
static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
|
||||
.name = "dss_dsi1",
|
||||
.class = &omap44xx_dsi_hwmod_class,
|
||||
@@ -1369,6 +1382,8 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
|
||||
.clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
|
||||
},
|
||||
},
|
||||
+ .opt_clks = dss_dsi1_opt_clks,
|
||||
+ .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks),
|
||||
.slaves = omap44xx_dss_dsi1_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_slaves),
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
@@ -1428,6 +1443,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dsi2_slaves[] = {
|
||||
&omap44xx_l4_per__dss_dsi2,
|
||||
};
|
||||
|
||||
+static struct omap_hwmod_opt_clk dss_dsi2_opt_clks[] = {
|
||||
+ { .role = "sys_clk", .clk = "dss_sys_clk" },
|
||||
+};
|
||||
+
|
||||
static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
|
||||
.name = "dss_dsi2",
|
||||
.class = &omap44xx_dsi_hwmod_class,
|
||||
@@ -1439,6 +1458,8 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
|
||||
.clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
|
||||
},
|
||||
},
|
||||
+ .opt_clks = dss_dsi2_opt_clks,
|
||||
+ .opt_clks_cnt = ARRAY_SIZE(dss_dsi2_opt_clks),
|
||||
.slaves = omap44xx_dss_dsi2_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_slaves),
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
@@ -1518,6 +1539,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_hdmi_slaves[] = {
|
||||
&omap44xx_l4_per__dss_hdmi,
|
||||
};
|
||||
|
||||
+static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = {
|
||||
+ { .role = "sys_clk", .clk = "dss_sys_clk" },
|
||||
+};
|
||||
+
|
||||
static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
|
||||
.name = "dss_hdmi",
|
||||
.class = &omap44xx_hdmi_hwmod_class,
|
||||
@@ -1529,6 +1554,8 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
|
||||
.clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
|
||||
},
|
||||
},
|
||||
+ .opt_clks = dss_hdmi_opt_clks,
|
||||
+ .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks),
|
||||
.slaves = omap44xx_dss_hdmi_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_slaves),
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
@@ -1603,6 +1630,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_rfbi_slaves[] = {
|
||||
&omap44xx_l4_per__dss_rfbi,
|
||||
};
|
||||
|
||||
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
|
||||
+ { .role = "ick", .clk = "dss_fck" },
|
||||
+};
|
||||
+
|
||||
static struct omap_hwmod omap44xx_dss_rfbi_hwmod = {
|
||||
.name = "dss_rfbi",
|
||||
.class = &omap44xx_rfbi_hwmod_class,
|
||||
@@ -1613,6 +1644,8 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = {
|
||||
.clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
|
||||
},
|
||||
},
|
||||
+ .opt_clks = dss_rfbi_opt_clks,
|
||||
+ .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
|
||||
.slaves = omap44xx_dss_rfbi_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_slaves),
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+39
@@ -0,0 +1,39 @@
|
||||
From 65037bbeca82d31f8d9d6bd7183a16a0021acddd Mon Sep 17 00:00:00 2001
|
||||
From: Rajendra Nayak <rnayak@ti.com>
|
||||
Date: Sat, 9 Jul 2011 20:42:11 -0600
|
||||
Subject: [PATCH 063/149] OMAP2+: PM: Initialise sleep_switch to a non-valid value
|
||||
|
||||
sleep_switch which is initialised to 0 in omap_set_pwrdm_state
|
||||
happens to be a valid sleep_switch type (FORCEWAKEUP_SWITCH)
|
||||
which are defined as:
|
||||
|
||||
#define FORCEWAKEUP_SWITCH 0
|
||||
#define LOWPOWERSTATE_SWITCH 1
|
||||
|
||||
This causes the function to wrongly program some clock domains
|
||||
even when the Powerdomain is in ON state.
|
||||
|
||||
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
|
||||
Cc: Paul Walmsley <paul@pwsan.com>
|
||||
Acked-by: Kevin Hilman <khilman@ti.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/pm.c | 2 +-
|
||||
1 files changed, 1 insertions(+), 1 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
|
||||
index 49486f5..d48813f 100644
|
||||
--- a/arch/arm/mach-omap2/pm.c
|
||||
+++ b/arch/arm/mach-omap2/pm.c
|
||||
@@ -106,7 +106,7 @@ static void omap2_init_processor_devices(void)
|
||||
int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
|
||||
{
|
||||
u32 cur_state;
|
||||
- int sleep_switch = 0;
|
||||
+ int sleep_switch = -1;
|
||||
int ret = 0;
|
||||
|
||||
if (pwrdm == NULL || IS_ERR(pwrdm))
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+68
@@ -0,0 +1,68 @@
|
||||
From 1b1789929e1329fe61d65c142890045ab1c38d56 Mon Sep 17 00:00:00 2001
|
||||
From: Benoit Cousson <b-cousson@ti.com>
|
||||
Date: Sat, 9 Jul 2011 20:42:11 -0600
|
||||
Subject: [PATCH 064/149] OMAP4: powerdomain data: Fix core mem states and missing cefuse flag
|
||||
|
||||
Since ES2.0, the core ocmram does not support a different state
|
||||
than the main power domain anymore during both ON and RET power
|
||||
domain state.
|
||||
Since PM is not supported at all in ES1.0, update the common
|
||||
structure.
|
||||
|
||||
LOWPOWERSTATECHANGE is supported by the cefuse power domain but
|
||||
the flag was missing.
|
||||
Add the PWRDM_HAS_LOWPOWERSTATECHANGE in flags field.
|
||||
|
||||
Update the TI copyright date to 2011.
|
||||
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Paul Walmsley <paul@pwsan.com>
|
||||
Cc: Rajendra Nayak <rnayak@ti.com>
|
||||
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
[paul@pwsan.com: moved the indentation changes to a different patch set]
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/powerdomains44xx_data.c | 7 ++++---
|
||||
1 files changed, 4 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c
|
||||
index 3a7e678..8f46e7d 100644
|
||||
--- a/arch/arm/mach-omap2/powerdomains44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c
|
||||
@@ -1,7 +1,7 @@
|
||||
/*
|
||||
* OMAP4 Power domains framework
|
||||
*
|
||||
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
|
||||
+ * Copyright (C) 2009-2011 Texas Instruments, Inc.
|
||||
* Copyright (C) 2009-2011 Nokia Corporation
|
||||
*
|
||||
* Abhijit Pagare (abhijitpagare@ti.com)
|
||||
@@ -41,14 +41,14 @@ static struct powerdomain core_44xx_pwrdm = {
|
||||
.banks = 5,
|
||||
.pwrsts_mem_ret = {
|
||||
[0] = PWRSTS_OFF, /* core_nret_bank */
|
||||
- [1] = PWRSTS_OFF_RET, /* core_ocmram */
|
||||
+ [1] = PWRSTS_RET, /* core_ocmram */
|
||||
[2] = PWRSTS_RET, /* core_other_bank */
|
||||
[3] = PWRSTS_OFF_RET, /* ducati_l2ram */
|
||||
[4] = PWRSTS_OFF_RET, /* ducati_unicache */
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* core_nret_bank */
|
||||
- [1] = PWRSTS_OFF_RET, /* core_ocmram */
|
||||
+ [1] = PWRSTS_ON, /* core_ocmram */
|
||||
[2] = PWRSTS_ON, /* core_other_bank */
|
||||
[3] = PWRSTS_ON, /* ducati_l2ram */
|
||||
[4] = PWRSTS_ON, /* ducati_unicache */
|
||||
@@ -318,6 +318,7 @@ static struct powerdomain cefuse_44xx_pwrdm = {
|
||||
.prcm_partition = OMAP4430_PRM_PARTITION,
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
|
||||
};
|
||||
|
||||
/*
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
+45
@@ -0,0 +1,45 @@
|
||||
From bee17d851a4354f1b5fed60e5464b42e5e4cc31c Mon Sep 17 00:00:00 2001
|
||||
From: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
Date: Sat, 9 Jul 2011 20:42:59 -0600
|
||||
Subject: [PATCH 065/149] OMAP4: clock data: Keep GPMC clocks always enabled and hardware managed
|
||||
|
||||
On OMAP4, CPU accesses on unmapped addresses are redirected to GPMC by
|
||||
L3 interconnect. Because of CPU speculative nature, such accesses are
|
||||
possible which can lead to indirect access to GPMC and if it's clock is
|
||||
not running, it can result in hang/abort on the platform.
|
||||
|
||||
Above makes access to GPMC unpredictable during the execution, so it's
|
||||
module mode needs to be kept under hardware control instead of software
|
||||
control.
|
||||
Since the auto gating is supported for GPMC, there isn't any power impact
|
||||
because of this change.
|
||||
|
||||
The issue was un-covered with security middleware running along with HLOS.
|
||||
In this case GPMC had a valid MMU descriptor on secure side where as HLOS
|
||||
didn't map the GMPC because it isn't being used.
|
||||
|
||||
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
[b-cousson@ti.com: Update subject and fix typos in the changelog]
|
||||
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
|
||||
Cc: Kevin Hilman <khilman@ti.com>
|
||||
Cc: Rajendra Nayak <rnayak@ti.com>
|
||||
Signed-off-by: Paul Walmsley <paul@pwsan.com>
|
||||
---
|
||||
arch/arm/mach-omap2/clock44xx_data.c | 1 +
|
||||
1 files changed, 1 insertions(+), 0 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
|
||||
index 7a0b112..2578820 100644
|
||||
--- a/arch/arm/mach-omap2/clock44xx_data.c
|
||||
+++ b/arch/arm/mach-omap2/clock44xx_data.c
|
||||
@@ -1605,6 +1605,7 @@ static struct clk gpmc_ick = {
|
||||
.ops = &clkops_omap2_dflt,
|
||||
.enable_reg = OMAP4430_CM_L3_2_GPMC_CLKCTRL,
|
||||
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
|
||||
+ .flags = ENABLE_ON_INIT,
|
||||
.clkdm_name = "l3_2_clkdm",
|
||||
.parent = &l3_div_ck,
|
||||
.recalc = &followparent_recalc,
|
||||
--
|
||||
1.6.6.1
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user