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Denys Dmytriyenko 31247cdfb7 j7-evm: add config for J7 (J721e) machine
The J721E SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable lower system costs
of automotive applications such as infotainment, cluster, premium
Audio, Gateway, industrial and a range of broad market applications.
This SoC is designed around reducing the system cost by eliminating
the need of an external system MCU and is targeted towards ASIL-B/C
certification/requirements in addition to allowing complex software
and system use-cases.

Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, three clusters of lockstep
  capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA),
  C7x floating point Vector DSP, Two C66x floating point DSPs.
* 3D GPU PowerVR Rogue 8XE GE8430
* Vision Processing Accelerator (VPAC) with image signal processor and Depth
  and Motion Processing Accelerator (DMPAC)
* Two Gigabit Industrial Communication Subsystems (ICSSG), each with dual
  PRUs and dual RTUs
* Two CSI2.0 4L RX plus one CSI2.0 4L TX, one eDP/DP, One DSI Tx, and
  up to two DPI interfaces.
* Integrated Ethernet switch supporting up to a total of 8 external ports in
  addition to legacy Ethernet switch of up to 2 ports.
* System MMU (SMMU) Version 3.0 and advanced virtualisation
  capabilities.
* Upto 4 PCIe-GEN3 controllers, 2 USB3.0 Dual-role device subsystems,
  16 MCANs, 12 McASP, eMMC and SD, UFS, OSPI/HyperBus memory controller, QSPI,
  I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals.
* Two hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
  management.
* Configurable L3 Cache and IO-coherent architecture with high data throughput
  capable distributed DMA architecture under NAVSS
* Centralized System Controller for Security, Power, and Resource
  Management (DMSC)

See J721E Technical Reference Manual (SPRUIL1, May 2019)
for further details: http://www.ti.com/lit/pdf/spruil1

Signed-off-by: Denys Dmytriyenko <denys@ti.com>
2019-06-10 23:54:41 +00:00
2011-03-31 16:05:45 +02:00

The official OpenEmbedded/Yocto BSP layer for Texas Instruments platforms.

It is hosted on http://git.yoctoproject.org/cgit/cgit.cgi/meta-ti/ with the
source repository at git://git.yoctoproject.org/meta-ti


This layer depends on:

URI: git://git.openembedded.org/openembedded-core
layers: meta
branch: thud


The base BSP part of meta-ti should work with different OpenEmbedded/Yocto
distributions and layer stacks, such as:
distro-less (only with OE-Core), with Yocto/Poky, with Angstrom or Arago.

Please follow the recommended setup procedures of your OE distribution.


Send pull requests, patches, comments or questions to meta-ti@yoctoproject.org
Please note - meta-ti mailing list requires subscription for posting:
https://lists.yoctoproject.org/listinfo/meta-ti

Maintainers: Denys Dmytriyenko <denys@ti.com>
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