mirror of
https://git.yoctoproject.org/poky
synced 2026-05-09 05:29:32 +00:00
openssl: use linux-generic64 target for Aarch64 (LE and BE)
Update configure-targets.patch: - drop linux-aarch64 configuration Update do_configure(): - add linux-aarch64* case to cover linux-aarch64 and linux-aarch64_be - use linux-generic64 target in above case Backport initial-aarch64-bits.patch: - first order optimizations for Aarch64 (From OE-Core rev: 3252110ee5c8272a1f09563f2a794cac545e29d5) Signed-off-by: Fathi Boudra <fathi.boudra@linaro.org> Signed-off-by: Saul Wold <sgw@linux.intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
This commit is contained in:
Fathi Boudra
committed by
Richard Purdie
Richard Purdie
parent
c9fc9b9444
commit
137d141ee3
@@ -4,14 +4,12 @@ The number of colons are important :)
|
||||
|
||||
|
||||
---
|
||||
Configure | 17 +++++++++++++++++
|
||||
1 file changed, 17 insertions(+)
|
||||
Configure | 16 ++++++++++++++++
|
||||
1 file changed, 16 insertions(+)
|
||||
|
||||
Index: openssl-1.0.1e/Configure
|
||||
===================================================================
|
||||
--- openssl-1.0.1e.orig/Configure
|
||||
+++ openssl-1.0.1e/Configure
|
||||
@@ -403,6 +403,23 @@ my %table=(
|
||||
--- a/Configure
|
||||
+++ b/Configure
|
||||
@@ -403,6 +403,22 @@ my %table=(
|
||||
"linux-alpha-ccc","ccc:-fast -readonly_strings -DL_ENDIAN -DTERMIO::-D_REENTRANT:::SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_INT DES_PTR DES_RISC1 DES_UNROLL:${alpha_asm}",
|
||||
"linux-alpha+bwx-ccc","ccc:-fast -readonly_strings -DL_ENDIAN -DTERMIO::-D_REENTRANT:::SIXTY_FOUR_BIT_LONG RC4_CHAR RC4_CHUNK DES_INT DES_PTR DES_RISC1 DES_UNROLL:${alpha_asm}",
|
||||
|
||||
@@ -22,7 +20,6 @@ Index: openssl-1.0.1e/Configure
|
||||
+"linux-gnueabi-armeb","$ENV{'CC'}:-DB_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
|
||||
+"linux-uclibceabi-arm","$ENV{'CC'}:-DL_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
|
||||
+"linux-uclibceabi-armeb","$ENV{'CC'}:-DB_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
|
||||
+"linux-aarch64","$ENV{'CC'}:-DL_ENDIAN -DTERMIO -O2 -pipe -g -feliminate-unused-debug-types -Wall -DHAVE_CRYPTODEV -DUSE_CRYPTODEV_DIGESTS::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHAR RC4_CHUNK DES_INT DES_UNROLL BF_PTR:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
|
||||
+
|
||||
+"linux-avr32","$ENV{'CC'}:-DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).",
|
||||
+
|
||||
|
||||
@@ -0,0 +1,111 @@
|
||||
From: Andy Polyakov <appro@openssl.org>
|
||||
Date: Sun, 13 Oct 2013 17:15:15 +0000 (+0200)
|
||||
Subject: Initial aarch64 bits.
|
||||
X-Git-Url: http://git.openssl.org/gitweb/?p=openssl.git;a=commitdiff_plain;h=039081b80977e2a5de84e1f88f8b4d025b559956
|
||||
|
||||
Initial aarch64 bits.
|
||||
---
|
||||
crypto/bn/bn_lcl.h | 9 +++++++++
|
||||
crypto/md32_common.h | 18 ++++++++++++++++++
|
||||
crypto/modes/modes_lcl.h | 8 ++++++++
|
||||
crypto/sha/sha512.c | 13 +++++++++++++
|
||||
4 files changed, 48 insertions(+)
|
||||
|
||||
--- a/crypto/bn/bn_lcl.h
|
||||
+++ b/crypto/bn/bn_lcl.h
|
||||
@@ -300,6 +300,15 @@ extern "C" {
|
||||
: "r"(a), "r"(b));
|
||||
# endif
|
||||
# endif
|
||||
+# elif defined(__aarch64__) && defined(SIXTY_FOUR_BIT_LONG)
|
||||
+# if defined(__GNUC__) && __GNUC__>=2
|
||||
+# define BN_UMULT_HIGH(a,b) ({ \
|
||||
+ register BN_ULONG ret; \
|
||||
+ asm ("umulh %0,%1,%2" \
|
||||
+ : "=r"(ret) \
|
||||
+ : "r"(a), "r"(b)); \
|
||||
+ ret; })
|
||||
+# endif
|
||||
# endif /* cpu */
|
||||
#endif /* OPENSSL_NO_ASM */
|
||||
|
||||
--- a/crypto/md32_common.h
|
||||
+++ b/crypto/md32_common.h
|
||||
@@ -213,6 +213,24 @@
|
||||
asm ("bswapl %0":"=r"(r):"0"(r)); \
|
||||
*((unsigned int *)(c))=r; (c)+=4; r; })
|
||||
# endif
|
||||
+# elif defined(__aarch64__)
|
||||
+# if defined(__BYTE_ORDER__)
|
||||
+# if defined(__ORDER_LITTLE_ENDIAN__) && __BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__
|
||||
+# define HOST_c2l(c,l) ({ unsigned int r; \
|
||||
+ asm ("rev %w0,%w1" \
|
||||
+ :"=r"(r) \
|
||||
+ :"r"(*((const unsigned int *)(c))));\
|
||||
+ (c)+=4; (l)=r; })
|
||||
+# define HOST_l2c(l,c) ({ unsigned int r; \
|
||||
+ asm ("rev %w0,%w1" \
|
||||
+ :"=r"(r) \
|
||||
+ :"r"((unsigned int)(l)));\
|
||||
+ *((unsigned int *)(c))=r; (c)+=4; r; })
|
||||
+# elif defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
|
||||
+# define HOST_c2l(c,l) ((l)=*((const unsigned int *)(c)), (c)+=4, (l))
|
||||
+# define HOST_l2c(l,c) (*((unsigned int *)(c))=(l), (c)+=4, (l))
|
||||
+# endif
|
||||
+# endif
|
||||
# endif
|
||||
# endif
|
||||
#endif
|
||||
--- a/crypto/modes/modes_lcl.h
|
||||
+++ b/crypto/modes/modes_lcl.h
|
||||
@@ -29,6 +29,7 @@ typedef unsigned char u8;
|
||||
#if defined(__i386) || defined(__i386__) || \
|
||||
defined(__x86_64) || defined(__x86_64__) || \
|
||||
defined(_M_IX86) || defined(_M_AMD64) || defined(_M_X64) || \
|
||||
+ defined(__aarch64__) || \
|
||||
defined(__s390__) || defined(__s390x__) || \
|
||||
( (defined(__arm__) || defined(__arm)) && \
|
||||
(defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) || \
|
||||
@@ -53,6 +54,13 @@ typedef unsigned char u8;
|
||||
# define BSWAP4(x) ({ u32 ret=(x); \
|
||||
asm ("bswapl %0" \
|
||||
: "+r"(ret)); ret; })
|
||||
+# elif defined(__aarch64__)
|
||||
+# define BSWAP8(x) ({ u64 ret; \
|
||||
+ asm ("rev %0,%1" \
|
||||
+ : "=r"(ret) : "r"(x)); ret; })
|
||||
+# define BSWAP4(x) ({ u32 ret; \
|
||||
+ asm ("rev %w0,%w1" \
|
||||
+ : "=r"(ret) : "r"(x)); ret; })
|
||||
# elif (defined(__arm__) || defined(__arm)) && !defined(STRICT_ALIGNMENT)
|
||||
# define BSWAP8(x) ({ u32 lo=(u64)(x)>>32,hi=(x); \
|
||||
asm ("rev %0,%0; rev %1,%1" \
|
||||
--- a/crypto/sha/sha512.c
|
||||
+++ b/crypto/sha/sha512.c
|
||||
@@ -55,6 +55,7 @@ const char SHA512_version[]="SHA-512" OP
|
||||
#if defined(__i386) || defined(__i386__) || defined(_M_IX86) || \
|
||||
defined(__x86_64) || defined(_M_AMD64) || defined(_M_X64) || \
|
||||
defined(__s390__) || defined(__s390x__) || \
|
||||
+ defined(__aarch64__) || \
|
||||
defined(SHA512_ASM)
|
||||
#define SHA512_BLOCK_CAN_MANAGE_UNALIGNED_DATA
|
||||
#endif
|
||||
@@ -340,6 +341,18 @@ static const SHA_LONG64 K512[80] = {
|
||||
asm ("rotrdi %0,%1,%2" \
|
||||
: "=r"(ret) \
|
||||
: "r"(a),"K"(n)); ret; })
|
||||
+# elif defined(__aarch64__)
|
||||
+# define ROTR(a,n) ({ SHA_LONG64 ret; \
|
||||
+ asm ("ror %0,%1,%2" \
|
||||
+ : "=r"(ret) \
|
||||
+ : "r"(a),"I"(n)); ret; })
|
||||
+# if defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && \
|
||||
+ __BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__
|
||||
+# define PULL64(x) ({ SHA_LONG64 ret; \
|
||||
+ asm ("rev %0,%1" \
|
||||
+ : "=r"(ret) \
|
||||
+ : "r"(*((const SHA_LONG64 *)(&(x))))); ret; })
|
||||
+# endif
|
||||
# endif
|
||||
# elif defined(_MSC_VER)
|
||||
# if defined(_WIN64) /* applies to both IA-64 and AMD64 */
|
||||
@@ -66,6 +66,9 @@ do_configure () {
|
||||
linux-armeb)
|
||||
target=linux-elf-armeb
|
||||
;;
|
||||
linux-aarch64*)
|
||||
target=linux-generic64
|
||||
;;
|
||||
linux-sh3)
|
||||
target=debian-sh3
|
||||
;;
|
||||
|
||||
@@ -33,6 +33,7 @@ SRC_URI += "file://configure-targets.patch \
|
||||
file://fix-cipher-des-ede3-cfb1.patch \
|
||||
file://openssl-avoid-NULL-pointer-dereference-in-EVP_DigestInit_ex.patch \
|
||||
file://openssl-avoid-NULL-pointer-dereference-in-dh_pub_encode.patch \
|
||||
file://initial-aarch64-bits.patch \
|
||||
file://find.pl \
|
||||
"
|
||||
|
||||
|
||||
Reference in New Issue
Block a user