linux-moblin2: Add moblin2 kernel

git-svn-id: https://svn.o-hand.com/repos/poky/trunk@5166 311d38ba-8fff-0310-9ca6-ca027cbcb966
2026-05-09 05:29:32 +00:00 · 2008-09-10 15:37:14 +00:00
parent f680c855cf
commit 4f82c5078e
15 changed files with 29499 additions and 0 deletions
@@ -0,0 +1,27 @@
+From: Keith Packard <keithp@keithp.com>
+Date: Fri, 20 Jun 2008 07:08:06 +0000 (-0700)
+Subject: Export shmem_file_setup for DRM-GEM
+X-Git-Tag: v2.6.12-rc2
+X-Git-Url: http://gitweb.freedesktop.org/?p=users/anholt/anholt/linux-2.6.git;a=commitdiff;h=350ea3ece12744ae154bbc2ea13da6ba84ca5515
+
+Export shmem_file_setup for DRM-GEM
+
+GEM needs to create shmem files to back buffer objects.  Though currently
+creation of files for objects could have been driven from userland, the
+modesetting work will require allocation of buffer objects before userland
+is running, for boot-time message display.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+
+--- a/mm/shmem.c
+++ b/mm/shmem.c
+@@ -2582,6 +2582,7 @@ put_memory:
+ 	shmem_unacct_size(flags, size);
+ 	return ERR_PTR(error);
+ }
+EXPORT_SYMBOL(shmem_file_setup);
+ 
+ /**
+  * shmem_zero_setup - setup a shared anonymous mapping
+
@@ -0,0 +1,421 @@
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 29 Jul 2008 19:10:39 +0000 (-0700)
+Subject: i915: Add support for MSI and interrupt mitigation.
+X-Git-Tag: v2.6.12-rc2
+X-Git-Url: http://gitweb.freedesktop.org/?p=users/anholt/anholt/linux-2.6.git;a=commitdiff;h=aae4223e2fd3b29ae8e070b7a16d8cfc70c6a0c0
+
+i915: Add support for MSI and interrupt mitigation.
+
+Previous attempts at interrupt mitigation had been foiled by i915_wait_irq's
+failure to update the sarea seqno value when the status page indicated that
+the seqno had already been passed.  MSI support has been seen to cut CPU
+costs by up to 40% in some workloads by avoiding other expensive interrupt
+handlers for frequent graphics interrupts.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+
+--- a/drivers/gpu/drm/drm_irq.c
+++ b/drivers/gpu/drm/drm_irq.c
+@@ -63,7 +63,7 @@ int drm_irq_by_busid(struct drm_device *
+ 	    p->devnum != PCI_SLOT(dev->pdev->devfn) || p->funcnum != PCI_FUNC(dev->pdev->devfn))
+ 		return -EINVAL;
+ 
+-	p->irq = dev->irq;
+	p->irq = dev->pdev->irq;
+ 
+ 	DRM_DEBUG("%d:%d:%d => IRQ %d\n", p->busnum, p->devnum, p->funcnum,
+ 		  p->irq);
+@@ -89,7 +89,7 @@ static int drm_irq_install(struct drm_de
+ 	if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
+ 		return -EINVAL;
+ 
+-	if (dev->irq == 0)
+	if (dev->pdev->irq == 0)
+ 		return -EINVAL;
+ 
+ 	mutex_lock(&dev->struct_mutex);
+@@ -107,7 +107,7 @@ static int drm_irq_install(struct drm_de
+ 	dev->irq_enabled = 1;
+ 	mutex_unlock(&dev->struct_mutex);
+ 
+-	DRM_DEBUG("irq=%d\n", dev->irq);
+	DRM_DEBUG("irq=%d\n", dev->pdev->irq);
+ 
+ 	if (drm_core_check_feature(dev, DRIVER_IRQ_VBL)) {
+ 		init_waitqueue_head(&dev->vbl_queue);
+@@ -127,8 +127,12 @@ static int drm_irq_install(struct drm_de
+ 	if (drm_core_check_feature(dev, DRIVER_IRQ_SHARED))
+ 		sh_flags = IRQF_SHARED;
+ 
+-	ret = request_irq(dev->irq, dev->driver->irq_handler,
+	ret = request_irq(dev->pdev->irq, dev->driver->irq_handler,
+ 			  sh_flags, dev->devname, dev);
+	/* Expose the device irq number to drivers that want to export it for
+	 * whatever reason.
+	 */
+	dev->irq = dev->pdev->irq;
+ 	if (ret < 0) {
+ 		mutex_lock(&dev->struct_mutex);
+ 		dev->irq_enabled = 0;
+@@ -164,11 +168,11 @@ int drm_irq_uninstall(struct drm_device 
+ 	if (!irq_enabled)
+ 		return -EINVAL;
+ 
+-	DRM_DEBUG("irq=%d\n", dev->irq);
+	DRM_DEBUG("irq=%d\n", dev->pdev->irq);
+ 
+ 	dev->driver->irq_uninstall(dev);
+ 
+-	free_irq(dev->irq, dev);
+	free_irq(dev->pdev->irq, dev);
+ 
+ 	dev->locked_tasklet_func = NULL;
+ 
+@@ -201,7 +205,7 @@ int drm_control(struct drm_device *dev, 
+ 		if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
+ 			return 0;
+ 		if (dev->if_version < DRM_IF_VERSION(1, 2) &&
+-		    ctl->irq != dev->irq)
+		    ctl->irq != dev->pdev->irq)
+ 			return -EINVAL;
+ 		return drm_irq_install(dev);
+ 	case DRM_UNINST_HANDLER:
+@@ -239,7 +243,7 @@ int drm_wait_vblank(struct drm_device *d
+ 	int ret = 0;
+ 	unsigned int flags, seq;
+ 
+-	if ((!dev->irq) || (!dev->irq_enabled))
+	if ((!dev->pdev->irq) || (!dev->irq_enabled))
+ 		return -EINVAL;
+ 
+ 	if (vblwait->request.type &
+--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
+@@ -84,7 +84,7 @@ static int i915_dma_cleanup(struct drm_d
+ 	 * may not have been called from userspace and after dev_private
+ 	 * is freed, it's too late.
+ 	 */
+-	if (dev->irq)
+	if (dev->irq_enabled)
+ 		drm_irq_uninstall(dev);
+ 
+ 	if (dev_priv->ring.virtual_start) {
+@@ -644,7 +644,7 @@ static int i915_getparam(struct drm_devi
+ 
+ 	switch (param->param) {
+ 	case I915_PARAM_IRQ_ACTIVE:
+-		value = dev->irq ? 1 : 0;
+		value = dev->irq_enabled;
+ 		break;
+ 	case I915_PARAM_ALLOW_BATCHBUFFER:
+ 		value = dev_priv->allow_batchbuffer ? 1 : 0;
+@@ -763,6 +763,20 @@ int i915_driver_load(struct drm_device *
+ 	ret = drm_addmap(dev, base, size, _DRM_REGISTERS,
+ 			 _DRM_KERNEL | _DRM_DRIVER,
+ 			 &dev_priv->mmio_map);
+
+
+	/* On the 945G/GM, the chipset reports the MSI capability on the
+	 * integrated graphics even though the support isn't actually there
+	 * according to the published specs.  It doesn't appear to function
+	 * correctly in testing on 945G.
+	 * This may be a side effect of MSI having been made available for PEG
+	 * and the registers being closely associated.
+	 */
+	if (!IS_I945G(dev) && !IS_I945GM(dev))
+		pci_enable_msi(dev->pdev);
+
+	spin_lock_init(&dev_priv->user_irq_lock);
+
+ 	return ret;
+ }
+ 
+@@ -770,6 +784,9 @@ int i915_driver_unload(struct drm_device
+ {
+ 	struct drm_i915_private *dev_priv = dev->dev_private;
+ 
+	if (dev->pdev->msi_enabled)
+		pci_disable_msi(dev->pdev);
+
+ 	if (dev_priv->mmio_map)
+ 		drm_rmmap(dev, dev_priv->mmio_map);
+ 
+--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
+@@ -105,6 +105,12 @@ typedef struct drm_i915_private {
+ 	wait_queue_head_t irq_queue;
+ 	atomic_t irq_received;
+ 	atomic_t irq_emitted;
+	/** Protects user_irq_refcount and irq_mask_reg */
+	spinlock_t user_irq_lock;
+	/** Refcount for i915_user_irq_get() versus i915_user_irq_put(). */
+	int user_irq_refcount;
+	/** Cached value of IMR to avoid reads in updating the bitfield */
+	u32 irq_mask_reg;
+ 
+ 	int tex_lru_log_granularity;
+ 	int allow_batchbuffer;
+--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
+@@ -33,6 +33,31 @@
+ 
+ #define MAX_NOPID ((u32)~0)
+ 
+/** These are the interrupts used by the driver */
+#define I915_INTERRUPT_ENABLE_MASK (I915_USER_INTERRUPT |		\
+				    I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT | \
+				    I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT)
+
+static inline void
+i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask)
+{
+	if ((dev_priv->irq_mask_reg & mask) != 0) {
+		dev_priv->irq_mask_reg &= ~mask;
+		I915_WRITE(IMR, dev_priv->irq_mask_reg);
+		(void) I915_READ(IMR);
+	}
+}
+
+static inline void
+i915_disable_irq(drm_i915_private_t *dev_priv, u32 mask)
+{
+	if ((dev_priv->irq_mask_reg & mask) != mask) {
+		dev_priv->irq_mask_reg |= mask;
+		I915_WRITE(IMR, dev_priv->irq_mask_reg);
+		(void) I915_READ(IMR);
+	}
+}
+
+ /**
+  * Emit blits for scheduled buffer swaps.
+  *
+@@ -229,46 +254,50 @@ irqreturn_t i915_driver_irq_handler(DRM_
+ {
+ 	struct drm_device *dev = (struct drm_device *) arg;
+ 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+-	u16 temp;
+ 	u32 pipea_stats, pipeb_stats;
+	u32 iir;
+ 
+ 	pipea_stats = I915_READ(PIPEASTAT);
+ 	pipeb_stats = I915_READ(PIPEBSTAT);
+ 
+-	temp = I915_READ16(IIR);
+-
+-	temp &= (I915_USER_INTERRUPT |
+-		 I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT |
+-		 I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT);
+-
+-	DRM_DEBUG("%s flag=%08x\n", __FUNCTION__, temp);
+-
+-	if (temp == 0)
+	if (dev->pdev->msi_enabled)
+		I915_WRITE(IMR, ~0);
+	iir = I915_READ(IIR);
+
+	DRM_DEBUG("iir=%08x\n", iir);
+
+	if (iir == 0) {
+		if (dev->pdev->msi_enabled) {
+			I915_WRITE(IMR, dev_priv->irq_mask_reg);
+			(void) I915_READ(IMR);
+		}
+ 		return IRQ_NONE;
+	}
+ 
+-	I915_WRITE16(IIR, temp);
+-	(void) I915_READ16(IIR);
+-	DRM_READMEMORYBARRIER();
+	I915_WRITE(IIR, iir);
+	if (dev->pdev->msi_enabled)
+		I915_WRITE(IMR, dev_priv->irq_mask_reg);
+	(void) I915_READ(IIR); /* Flush posted writes */
+ 
+ 	dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
+ 
+-	if (temp & I915_USER_INTERRUPT)
+	if (iir & I915_USER_INTERRUPT)
+ 		DRM_WAKEUP(&dev_priv->irq_queue);
+ 
+-	if (temp & (I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT |
+-		    I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT)) {
+	if (iir & (I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT |
+		   I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT)) {
+ 		int vblank_pipe = dev_priv->vblank_pipe;
+ 
+ 		if ((vblank_pipe &
+ 		     (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B))
+ 		    == (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B)) {
+-			if (temp & I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT)
+			if (iir & I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT)
+ 				atomic_inc(&dev->vbl_received);
+-			if (temp & I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT)
+			if (iir & I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT)
+ 				atomic_inc(&dev->vbl_received2);
+-		} else if (((temp & I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT) &&
+		} else if (((iir & I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT) &&
+ 			    (vblank_pipe & DRM_I915_VBLANK_PIPE_A)) ||
+-			   ((temp & I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT) &&
+			   ((iir & I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT) &&
+ 			    (vblank_pipe & DRM_I915_VBLANK_PIPE_B)))
+ 			atomic_inc(&dev->vbl_received);
+ 
+@@ -314,6 +343,27 @@ static int i915_emit_irq(struct drm_devi
+ 	return dev_priv->counter;
+ }
+ 
+static void i915_user_irq_get(struct drm_device *dev)
+{
+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+
+	spin_lock(&dev_priv->user_irq_lock);
+	if (dev->irq_enabled && (++dev_priv->user_irq_refcount == 1))
+		i915_enable_irq(dev_priv, I915_USER_INTERRUPT);
+	spin_unlock(&dev_priv->user_irq_lock);
+}
+
+static void i915_user_irq_put(struct drm_device *dev)
+{
+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+
+	spin_lock(&dev_priv->user_irq_lock);
+	BUG_ON(dev->irq_enabled && dev_priv->user_irq_refcount <= 0);
+	if (dev->irq_enabled && (--dev_priv->user_irq_refcount == 0))
+		i915_disable_irq(dev_priv, I915_USER_INTERRUPT);
+	spin_unlock(&dev_priv->user_irq_lock);
+}
+
+ static int i915_wait_irq(struct drm_device * dev, int irq_nr)
+ {
+ 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+@@ -322,13 +372,17 @@ static int i915_wait_irq(struct drm_devi
+ 	DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
+ 		  READ_BREADCRUMB(dev_priv));
+ 
+-	if (READ_BREADCRUMB(dev_priv) >= irq_nr)
+	if (READ_BREADCRUMB(dev_priv) >= irq_nr) {
+		dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
+ 		return 0;
+	}
+ 
+ 	dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
+ 
+	i915_user_irq_get(dev);
+ 	DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
+ 		    READ_BREADCRUMB(dev_priv) >= irq_nr);
+	i915_user_irq_put(dev);
+ 
+ 	if (ret == -EBUSY) {
+ 		DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
+@@ -413,20 +467,6 @@ int i915_irq_wait(struct drm_device *dev
+ 	return i915_wait_irq(dev, irqwait->irq_seq);
+ }
+ 
+-static void i915_enable_interrupt (struct drm_device *dev)
+-{
+-	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+-	u16 flag;
+-
+-	flag = 0;
+-	if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_A)
+-		flag |= I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT;
+-	if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B)
+-		flag |= I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
+-
+-	I915_WRITE16(IER, I915_USER_INTERRUPT | flag);
+-}
+-
+ /* Set the vblank monitor pipe
+  */
+ int i915_vblank_pipe_set(struct drm_device *dev, void *data,
+@@ -434,6 +474,7 @@ int i915_vblank_pipe_set(struct drm_devi
+ {
+ 	drm_i915_private_t *dev_priv = dev->dev_private;
+ 	drm_i915_vblank_pipe_t *pipe = data;
+	u32 enable_mask = 0, disable_mask = 0;
+ 
+ 	if (!dev_priv) {
+ 		DRM_ERROR("called with no initialization\n");
+@@ -445,9 +486,20 @@ int i915_vblank_pipe_set(struct drm_devi
+ 		return -EINVAL;
+ 	}
+ 
+-	dev_priv->vblank_pipe = pipe->pipe;
+	if (pipe->pipe & DRM_I915_VBLANK_PIPE_A)
+		enable_mask |= I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT;
+	else
+		disable_mask |= I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT;
+
+	if (pipe->pipe & DRM_I915_VBLANK_PIPE_B)
+		enable_mask |= I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
+	else
+		disable_mask |= I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
+ 
+-	i915_enable_interrupt (dev);
+	i915_enable_irq(dev_priv, enable_mask);
+	i915_disable_irq(dev_priv, disable_mask);
+
+	dev_priv->vblank_pipe = pipe->pipe;
+ 
+ 	return 0;
+ }
+@@ -464,7 +516,7 @@ int i915_vblank_pipe_get(struct drm_devi
+ 		return -EINVAL;
+ 	}
+ 
+-	flag = I915_READ(IER);
+	flag = I915_READ(IMR);
+ 	pipe->pipe = 0;
+ 	if (flag & I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT)
+ 		pipe->pipe |= DRM_I915_VBLANK_PIPE_A;
+@@ -586,9 +638,9 @@ void i915_driver_irq_preinstall(struct d
+ {
+ 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+ 
+-	I915_WRITE16(HWSTAM, 0xfffe);
+-	I915_WRITE16(IMR, 0x0);
+-	I915_WRITE16(IER, 0x0);
+	I915_WRITE(HWSTAM, 0xfffe);
+	I915_WRITE(IMR, 0x0);
+	I915_WRITE(IER, 0x0);
+ }
+ 
+ void i915_driver_irq_postinstall(struct drm_device * dev)
+@@ -601,7 +653,18 @@ void i915_driver_irq_postinstall(struct 
+ 
+ 	if (!dev_priv->vblank_pipe)
+ 		dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A;
+-	i915_enable_interrupt(dev);
+
+	/* Set initial unmasked IRQs to just the selected vblank pipes. */
+	dev_priv->irq_mask_reg = ~0;
+	if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_A)
+		dev_priv->irq_mask_reg &= ~I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT;
+	if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B)
+		dev_priv->irq_mask_reg &= ~I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
+
+	I915_WRITE(IMR, dev_priv->irq_mask_reg);
+	I915_WRITE(IER, I915_INTERRUPT_ENABLE_MASK);
+	(void) I915_READ(IER);
+
+ 	DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
+ }
+ 
+@@ -613,10 +676,10 @@ void i915_driver_irq_uninstall(struct dr
+ 	if (!dev_priv)
+ 		return;
+ 
+-	I915_WRITE16(HWSTAM, 0xffff);
+-	I915_WRITE16(IMR, 0xffff);
+-	I915_WRITE16(IER, 0x0);
+	I915_WRITE(HWSTAM, 0xffff);
+	I915_WRITE(IMR, 0xffff);
+	I915_WRITE(IER, 0x0);
+ 
+-	temp = I915_READ16(IIR);
+-	I915_WRITE16(IIR, temp);
+	temp = I915_READ(IIR);
+	I915_WRITE(IIR, temp);
+ }
+
@@ -0,0 +1,47 @@
+From: Keith Packard <keithp@keithp.com>
+Date: Wed, 30 Jul 2008 19:21:20 +0000 (-0700)
+Subject: i915: Track progress inside of batchbuffers for determining wedgedness.
+X-Git-Tag: v2.6.12-rc2
+X-Git-Url: http://gitweb.freedesktop.org/?p=users/anholt/anholt/linux-2.6.git;a=commitdiff;h=f0740db2246e4217384e8de32de6ebb4fbd807c9
+
+i915: Track progress inside of batchbuffers for determining wedgedness.
+
+This avoids early termination for long-running commands.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+
+--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
+@@ -40,11 +40,15 @@ int i915_wait_ring(struct drm_device * d
+ {
+ 	drm_i915_private_t *dev_priv = dev->dev_private;
+ 	drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
+	u32 acthd_reg = IS_I965G(dev) ? ACTHD_I965 : ACTHD;
+	u32 last_acthd = I915_READ(acthd_reg);
+	u32 acthd;
+ 	u32 last_head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
+ 	int i;
+ 
+-	for (i = 0; i < 10000; i++) {
+	for (i = 0; i < 100000; i++) {
+ 		ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
+		acthd = I915_READ(acthd_reg);
+ 		ring->space = ring->head - (ring->tail + 8);
+ 		if (ring->space < 0)
+ 			ring->space += ring->Size;
+@@ -55,8 +59,13 @@ int i915_wait_ring(struct drm_device * d
+ 
+ 		if (ring->head != last_head)
+ 			i = 0;
+		if (acthd != last_acthd)
+			i = 0;
+ 
+ 		last_head = ring->head;
+		last_acthd = acthd;
+		msleep_interruptible(10);
+
+ 	}
+ 
+ 	return -EBUSY;
+
@@ -0,0 +1,59 @@
+From: Keith Packard <keithp@keithp.com>
+Date: Wed, 30 Jul 2008 19:28:47 +0000 (-0700)
+Subject: i915: remove settable use_mi_batchbuffer_start
+X-Git-Tag: v2.6.12-rc2
+X-Git-Url: http://gitweb.freedesktop.org/?p=users/anholt/anholt/linux-2.6.git;a=commitdiff;h=6fcd9a69a91c53d733870df20e095eea2b73620c
+
+i915: remove settable use_mi_batchbuffer_start
+
+The driver can know what hardware requires MI_BATCH_BUFFER vs
+MI_BATCH_BUFFER_START; there's no reason to let user mode configure this.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+
+--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
+@@ -159,13 +159,6 @@ static int i915_initialize(struct drm_de
+ 	dev_priv->current_page = 0;
+ 	dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
+ 
+-	/* We are using separate values as placeholders for mechanisms for
+-	 * private backbuffer/depthbuffer usage.
+-	 */
+-	dev_priv->use_mi_batchbuffer_start = 0;
+-	if (IS_I965G(dev)) /* 965 doesn't support older method */
+-		dev_priv->use_mi_batchbuffer_start = 1;
+-
+ 	/* Allow hardware batchbuffers unless told otherwise.
+ 	 */
+ 	dev_priv->allow_batchbuffer = 1;
+@@ -486,7 +479,7 @@ static int i915_dispatch_batchbuffer(str
+ 				return ret;
+ 		}
+ 
+-		if (dev_priv->use_mi_batchbuffer_start) {
+		if (!IS_I830(dev) && !IS_845G(dev)) {
+ 			BEGIN_LP_RING(2);
+ 			if (IS_I965G(dev)) {
+ 				OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965);
+@@ -697,8 +690,6 @@ static int i915_setparam(struct drm_devi
+ 
+ 	switch (param->param) {
+ 	case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
+-		if (!IS_I965G(dev))
+-			dev_priv->use_mi_batchbuffer_start = param->value;
+ 		break;
+ 	case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
+ 		dev_priv->tex_lru_log_granularity = param->value;
+--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
+@@ -99,7 +99,6 @@ typedef struct drm_i915_private {
+ 	int front_offset;
+ 	int current_page;
+ 	int page_flipping;
+-	int use_mi_batchbuffer_start;
+ 
+ 	wait_queue_head_t irq_queue;
+ 	atomic_t irq_received;
+
@@ -0,0 +1,42 @@
+From: Keith Packard <keithp@keithp.com>
+Date: Wed, 30 Jul 2008 19:36:08 +0000 (-0700)
+Subject: i915: Ignore X server provided mmio address
+X-Git-Tag: v2.6.12-rc2
+X-Git-Url: http://gitweb.freedesktop.org/?p=users/anholt/anholt/linux-2.6.git;a=commitdiff;h=5d34a0e06e6e70b01ee070094322695b9e3f0029
+
+i915: Ignore X server provided mmio address
+
+It is already correctly detected by the kernel for use in suspend/resume.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+
+--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
+@@ -121,13 +121,6 @@ static int i915_initialize(struct drm_de
+ 		return -EINVAL;
+ 	}
+ 
+-	dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
+-	if (!dev_priv->mmio_map) {
+-		i915_dma_cleanup(dev);
+-		DRM_ERROR("can not find mmio map!\n");
+-		return -EINVAL;
+-	}
+-
+ 	dev_priv->sarea_priv = (drm_i915_sarea_t *)
+ 	    ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset);
+ 
+@@ -194,11 +187,6 @@ static int i915_dma_resume(struct drm_de
+ 		return -EINVAL;
+ 	}
+ 
+-	if (!dev_priv->mmio_map) {
+-		DRM_ERROR("can not find mmio map!\n");
+-		return -EINVAL;
+-	}
+-
+ 	if (dev_priv->ring.map.handle == NULL) {
+ 		DRM_ERROR("can not ioremap virtual address for"
+ 			  " ring buffer\n");
+
@@ -0,0 +1,138 @@
+From: Keith Packard <keithp@keithp.com>
+Date: Wed, 30 Jul 2008 20:03:43 +0000 (-0700)
+Subject: i915: Initialize hardware status page at device load when possible.
+X-Git-Tag: v2.6.12-rc2
+X-Git-Url: http://gitweb.freedesktop.org/?p=users/anholt/anholt/linux-2.6.git;a=commitdiff;h=ddb354254f88965f5f057e67ef775fbb4b35fef8
+
+i915: Initialize hardware status page at device load when possible.
+
+Some chips were unstable with repeated setup/teardown of the hardware status
+page.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+
+--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
+@@ -71,6 +71,52 @@ int i915_wait_ring(struct drm_device * d
+ 	return -EBUSY;
+ }
+ 
+/**
+ * Sets up the hardware status page for devices that need a physical address
+ * in the register.
+ */
+int i915_init_phys_hws(struct drm_device *dev)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	/* Program Hardware Status Page */
+	dev_priv->status_page_dmah =
+		drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
+
+	if (!dev_priv->status_page_dmah) {
+		DRM_ERROR("Can not allocate hardware status page\n");
+		return -ENOMEM;
+	}
+	dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
+	dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
+
+	memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
+
+	I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
+	DRM_DEBUG("Enabled hardware status page\n");
+	return 0;
+}
+
+/**
+ * Frees the hardware status page, whether it's a physical address or a virtual
+ * address set up by the X Server.
+ */
+void i915_free_hws(struct drm_device *dev)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	if (dev_priv->status_page_dmah) {
+		drm_pci_free(dev, dev_priv->status_page_dmah);
+		dev_priv->status_page_dmah = NULL;
+	}
+
+	if (dev_priv->status_gfx_addr) {
+		dev_priv->status_gfx_addr = 0;
+		drm_core_ioremapfree(&dev_priv->hws_map, dev);
+	}
+
+	/* Need to rewrite hardware status page */
+	I915_WRITE(HWS_PGA, 0x1ffff000);
+}
+
+ void i915_kernel_lost_context(struct drm_device * dev)
+ {
+ 	drm_i915_private_t *dev_priv = dev->dev_private;
+@@ -103,18 +149,9 @@ static int i915_dma_cleanup(struct drm_d
+ 		dev_priv->ring.map.size = 0;
+ 	}
+ 
+-	if (dev_priv->status_page_dmah) {
+-		drm_pci_free(dev, dev_priv->status_page_dmah);
+-		dev_priv->status_page_dmah = NULL;
+-		/* Need to rewrite hardware status page */
+-		I915_WRITE(HWS_PGA, 0x1ffff000);
+-	}
+-
+-	if (dev_priv->status_gfx_addr) {
+-		dev_priv->status_gfx_addr = 0;
+-		drm_core_ioremapfree(&dev_priv->hws_map, dev);
+-		I915_WRITE(HWS_PGA, 0x1ffff000);
+-	}
+	/* Clear the HWS virtual address at teardown */
+	if (I915_NEED_GFX_HWS(dev))
+		i915_free_hws(dev);
+ 
+ 	return 0;
+ }
+@@ -165,23 +202,6 @@ static int i915_initialize(struct drm_de
+ 	 */
+ 	dev_priv->allow_batchbuffer = 1;
+ 
+-	/* Program Hardware Status Page */
+-	if (!I915_NEED_GFX_HWS(dev)) {
+-		dev_priv->status_page_dmah =
+-			drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
+-
+-		if (!dev_priv->status_page_dmah) {
+-			i915_dma_cleanup(dev);
+-			DRM_ERROR("Can not allocate hardware status page\n");
+-			return -ENOMEM;
+-		}
+-		dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
+-		dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
+-
+-		memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
+-		I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
+-	}
+-	DRM_DEBUG("Enabled hardware status page\n");
+ 	return 0;
+ }
+ 
+@@ -773,6 +793,12 @@ int i915_driver_load(struct drm_device *
+ 			 _DRM_KERNEL | _DRM_DRIVER,
+ 			 &dev_priv->mmio_map);
+ 
+	/* Init HWS */
+	if (!I915_NEED_GFX_HWS(dev)) {
+		ret = i915_init_phys_hws(dev);
+		if (ret != 0)
+			return ret;
+	}
+ 
+ 	/* On the 945G/GM, the chipset reports the MSI capability on the
+ 	 * integrated graphics even though the support isn't actually there
+@@ -796,6 +822,8 @@ int i915_driver_unload(struct drm_device
+ 	if (dev->pdev->msi_enabled)
+ 		pci_disable_msi(dev->pdev);
+ 
+	i915_free_hws(dev);
+
+ 	if (dev_priv->mmio_map)
+ 		drm_rmmap(dev, dev_priv->mmio_map);
+ 
+
@@ -0,0 +1,10 @@
+--- linux.trees.git/include/linux/videodev2.h.org	2008-08-15 16:31:03.000000000 -0700
+++ linux.trees.git/include/linux/videodev2.h	2008-08-15 16:31:11.000000000 -0700
+@@ -59,7 +59,6 @@
+ #include <linux/time.h>     /* need struct timeval */
+ #include <linux/compiler.h> /* need __user */
+ #else
+-#define __user
+ #include <sys/time.h>
+ #endif
+ #include <linux/ioctl.h>
@@ -0,0 +1,153 @@
+The following patch adds support for Intel's 945GME graphics chip to
+the intelfb driver.  I have assumed that the 945GME is identical to the
+already-supported 945GM apart from its PCI IDs; this is based on a quick
+look at the X driver for these chips which seems to treat them
+identically.
+
+Signed-off-by: Phil Endecott <spam_from_intelfb@chezphil.org>
+
+---
+
+The 945GME is used in the ASUS Eee 901, and I coded this in the hope that 
+I'd be able to use it to get a console at the native 1024x600 resolution 
+which is not known to the BIOS.  I realised too late that the intelfb 
+driver does not support mode changing on laptops, so it won't be any 
+use for me.  But rather than throw it away I will post it here as 
+essentially "untested"; maybe someone who knows more about this driver, 
+and with more useful hardware to test on, can pick it up.
+
+diff --git a/Documentation/fb/intelfb.txt b/Documentation/fb/intelfb.txt
+index 27a3160..dd9e944 100644
+--- a/Documentation/fb/intelfb.txt
+++ b/Documentation/fb/intelfb.txt
+@@ -14,6 +14,7 @@ graphics devices.  These would include:
+ 	Intel 915GM
+ 	Intel 945G
+ 	Intel 945GM
+	Intel 945GME
+ 	Intel 965G
+ 	Intel 965GM
+ 
+diff --git a/drivers/video/intelfb/intelfb.h b/drivers/video/intelfb/intelfb.h
+index 3325fbd..a50bea6 100644
+--- a/drivers/video/intelfb/intelfb.h
+++ b/drivers/video/intelfb/intelfb.h
+@@ -12,9 +12,9 @@
+ #endif
+ 
+ /*** Version/name ***/
+-#define INTELFB_VERSION			"0.9.5"
+#define INTELFB_VERSION			"0.9.6"
+ #define INTELFB_MODULE_NAME		"intelfb"
+-#define SUPPORTED_CHIPSETS		"830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/965G/965GM"
+#define SUPPORTED_CHIPSETS		"830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/945GME/965G/965GM"
+ 
+ 
+ /*** Debug/feature defines ***/
+@@ -58,6 +58,7 @@
+ #define PCI_DEVICE_ID_INTEL_915GM	0x2592
+ #define PCI_DEVICE_ID_INTEL_945G	0x2772
+ #define PCI_DEVICE_ID_INTEL_945GM	0x27A2
+#define PCI_DEVICE_ID_INTEL_945GME	0x27AE
+ #define PCI_DEVICE_ID_INTEL_965G	0x29A2
+ #define PCI_DEVICE_ID_INTEL_965GM	0x2A02
+ 
+@@ -160,6 +161,7 @@ enum intel_chips {
+ 	INTEL_915GM,
+ 	INTEL_945G,
+ 	INTEL_945GM,
+	INTEL_945GME,
+ 	INTEL_965G,
+ 	INTEL_965GM,
+ };
+@@ -363,6 +365,7 @@ struct intelfb_info {
+ 			((dinfo)->chipset == INTEL_915GM) ||	\
+ 			((dinfo)->chipset == INTEL_945G) ||	\
+ 			((dinfo)->chipset == INTEL_945GM) ||	\
+			((dinfo)->chipset == INTEL_945GME) ||	\
+ 			((dinfo)->chipset == INTEL_965G) ||	\
+ 			((dinfo)->chipset == INTEL_965GM))
+ 
+diff --git a/drivers/video/intelfb/intelfb_i2c.c b/drivers/video/intelfb/intelfb_i2c.c
+index fcf9fad..5d896b8 100644
+--- a/drivers/video/intelfb/intelfb_i2c.c
+++ b/drivers/video/intelfb/intelfb_i2c.c
+@@ -171,6 +171,7 @@ void intelfb_create_i2c_busses(struct intelfb_info *dinfo)
+ 		/* has some LVDS + tv-out */
+ 	case INTEL_945G:
+ 	case INTEL_945GM:
+	case INTEL_945GME:
+ 	case INTEL_965G:
+ 	case INTEL_965GM:
+ 		/* SDVO ports have a single control bus - 2 devices */
+diff --git a/drivers/video/intelfb/intelfbdrv.c b/drivers/video/intelfb/intelfbdrv.c
+index e44303f..a09e236 100644
+--- a/drivers/video/intelfb/intelfbdrv.c
+++ b/drivers/video/intelfb/intelfbdrv.c
+@@ -2,7 +2,7 @@
+  * intelfb
+  *
+  * Linux framebuffer driver for Intel(R) 830M/845G/852GM/855GM/865G/915G/915GM/
+- * 945G/945GM/965G/965GM integrated graphics chips.
+ * 945G/945GM/945GME/965G/965GM integrated graphics chips.
+  *
+  * Copyright © 2002, 2003 David Dawes <dawes@xfree86.org>
+  *                   2004 Sylvain Meyer
+@@ -102,6 +102,9 @@
+  *
+  *    04/2008 - Version 0.9.5
+  *              Add support for 965G/965GM. (Maik Broemme <mbroemme@plusserver.de>)
+ *
+ *    08/2008 - Version 0.9.6
+ *              Add support for 945GME. (Phil Endecott <spam_from_intelfb@chezphil.org>)
+  */
+ 
+ #include <linux/module.h>
+@@ -183,6 +186,7 @@ static struct pci_device_id intelfb_pci_table[] __devinitdata = {
+ 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_915GM, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_915GM },
+ 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_945G, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_945G },
+ 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_945GM, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_945GM },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_945GME, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_945GME },
+ 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_965G, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_965G },
+ 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_965GM, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_965GM },
+ 	{ 0, }
+@@ -555,6 +559,7 @@ static int __devinit intelfb_pci_register(struct pci_dev *pdev,
+ 	    (ent->device == PCI_DEVICE_ID_INTEL_915GM) ||
+ 	    (ent->device == PCI_DEVICE_ID_INTEL_945G)  ||
+ 	    (ent->device == PCI_DEVICE_ID_INTEL_945GM) ||
+	    (ent->device == PCI_DEVICE_ID_INTEL_945GME) ||
+ 	    (ent->device == PCI_DEVICE_ID_INTEL_965G) ||
+ 	    (ent->device == PCI_DEVICE_ID_INTEL_965GM)) {
+ 
+diff --git a/drivers/video/intelfb/intelfbhw.c b/drivers/video/intelfb/intelfbhw.c
+index 8e6d6a4..8b26b27 100644
+--- a/drivers/video/intelfb/intelfbhw.c
+++ b/drivers/video/intelfb/intelfbhw.c
+@@ -143,6 +143,12 @@ int intelfbhw_get_chipset(struct pci_dev *pdev, struct intelfb_info *dinfo)
+ 		dinfo->mobile = 1;
+ 		dinfo->pll_index = PLLS_I9xx;
+ 		return 0;
+	case PCI_DEVICE_ID_INTEL_945GME:
+		dinfo->name = "Intel(R) 945GME";
+		dinfo->chipset = INTEL_945GME;
+		dinfo->mobile = 1;
+		dinfo->pll_index = PLLS_I9xx;
+		return 0;
+ 	case PCI_DEVICE_ID_INTEL_965G:
+ 		dinfo->name = "Intel(R) 965G";
+ 		dinfo->chipset = INTEL_965G;
+@@ -186,6 +192,7 @@ int intelfbhw_get_memory(struct pci_dev *pdev, int *aperture_size,
+ 	case PCI_DEVICE_ID_INTEL_915GM:
+ 	case PCI_DEVICE_ID_INTEL_945G:
+ 	case PCI_DEVICE_ID_INTEL_945GM:
+	case PCI_DEVICE_ID_INTEL_945GME:
+ 	case PCI_DEVICE_ID_INTEL_965G:
+ 	case PCI_DEVICE_ID_INTEL_965GM:
+ 		/* 915, 945 and 965 chipsets support a 256MB aperture.
+
+
+--
+To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
+the body of a message to majordomo@vger.kernel.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
+Please read the FAQ at  http://www.tux.org/lkml/
@@ -0,0 +1,18 @@
+DESCRIPTION = "2.6 Linux Development Kernel for moblin2 platforms"
+SECTION = "kernel"
+LICENSE = "GPL"
+
+inherit kernel
+
+do_configure() {
+
+	rm -f ${S}/.config || true
+
+   	cp ${WORKDIR}/defconfig-${MACHINE} ${S}/.config
+
+        yes '' | oe_runmake oldconfig
+
+}
+
+
+COMPATIBLE_MACHINE = "eee901"
@@ -0,0 +1,23 @@
+require linux-moblin2.inc
+
+PR = "r0"
+
+DEFAULT_PREFERENCE_eee901 = "1"
+
+SRC_URI = "${KERNELORG_MIRROR}pub/linux/kernel/v2.6/linux-2.6.26.tar.bz2 \
+		${KERNELORG_MIRROR}pub/linux/kernel/v2.6/testing/patch-2.6.27-rc1.bz2;patch=1 \
+		file://0001_Export_shmem_file_setup_for_DRM-GEM.patch;patch=1 \
+	   	file://0002_i915.Use_more_consistent_names_for_regs.patch;patch=1 \
+		file://0003_i915.Add_support_for_MSI_and_interrupt_mitigation.patch;patch=1 \
+		file://0004_i915.Track_progress_inside_of_batchbuffers_for_determining_wedgedness.patch;patch=1 \
+		file://0005_i915.remove_settable_use_mi_batchbuffer_start.patch;patch=1 \
+		file://0006_i915.Ignore_X_server_provided_mmio_address.patch;patch=1 \
+		file://0007_i915.Initialize_hardware_status_page_at_device_load_when_possible.patch;patch=1 \
+		file://0008_drm.Add_GEM_graphics_execution_manager_to_i915_driver.patch;patch=1 \
+		file://0009-squashfs3.3-2.6.27.patch;patch=1 \
+		file://0010_unionfs-2.4_for_2.6.27-rc1.patch;patch=1 \
+		file://0011_workaround_unidef_step.patch;patch=1 \
+		file://0012_intelfb_945gme.patch;patch=1 \
+		file://defconfig-eee901"
+
+S = "${WORKDIR}/linux-2.6.26"