mirrors/poky
1
0
Fork 0
mirror of https://git.yoctoproject.org/poky synced 2026-07-16 15:57:04 +00:00
Code Issues Projects Releases Wiki Activity

llvm: fix typo in CVE-2024-0151.patch

Browse Source 
During backporting the patch, accidentally a variable was removed.
In case the recipe is compiled for 32-bit Arm target, compilation
fails with the following error:

3.0.1-r0/git/llvm/lib/Target/ARM/ARMISelLowering.cpp:4481:13: error: 'RegVT' was not declared in this scope
|  4481 |         if (RegVT == MVT::f16 || RegVT == MVT::bf16)
|       |             ^~~~~

This patch corrects the patch, and adds back the removed RegVT variable.

(From OE-Core rev: 77f29f8fea58de40459186952d25279877ce4994)

Signed-off-by: Gyorgy Sarvari <skandigraun@gmail.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
This commit is contained in:
Gyorgy Sarvari
2025-09-08 22:18:44 +02:00
committed by Steve Sakoman
parent 4f27d5ff82
commit 7c76036780
1 changed files with 8 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files
meta/recipes-devtools/llvm/llvm/CVE-2024-0151.patch
+8 -5
View File
@@ -32,6 +32,10 @@ Date: Thu Jun 20 10:22:01 2024 +0100
Upstream-Status: Backport [https://github.com/llvm/llvm-project/commit/78ff617d3f573fb3a9b2fef180fa0fd43d5584ea]
CVE: CVE-2024-0151
Signed-off-by: Deepesh Varatharajan <Deepesh.Varatharajan@windriver.com>
Added back RegVT variable, which was accidentally removed during backporting.
Signed-off-by: Gyorgy Sarvari <skandigraun@gmail.com>
---
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 900113244e41..e12f8c183db2 100644
@@ -98,16 +102,15 @@ index 900113244e41..e12f8c183db2 100644
Function::const_arg_iterator CurOrigArg = MF.getFunction().arg_begin();
unsigned CurArgIdx = 0;
@@ -4432,7 +4450,7 @@ SDValue ARMTargetLowering::LowerFormalArguments(
}
@@ -4433,6 +4451,7 @@ SDValue ARMTargetLowering::LowerFormalArguments(
// Arguments stored in registers.
if (VA.isRegLoc()) {
- EVT RegVT = VA.getLocVT();
EVT RegVT = VA.getLocVT();
+ SDValue ArgValue;
if (VA.needsCustom() && VA.getLocVT() == MVT::v2f64) {
// f64 and vector types are split up into multiple registers or
@@ -4496,16 +4514,6 @@ SDValue ARMTargetLowering::LowerFormalArguments(
@@ -4496,16 +4515,6 @@ SDValue ARMTargetLowering::LowerFormalArguments(
case CCValAssign::BCvt:
ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue);
break;
@@ -124,7 +127,7 @@ index 900113244e41..e12f8c183db2 100644
}
// f16 arguments have their size extended to 4 bytes and passed as if they
@@ -4515,6 +4523,15 @@ SDValue ARMTargetLowering::LowerFormalArguments(
@@ -4515,6 +4524,15 @@ SDValue ARMTargetLowering::LowerFormalArguments(
(VA.getValVT() == MVT::f16 || VA.getValVT() == MVT::bf16))
ArgValue = MoveToHPR(dl, DAG, VA.getLocVT(), VA.getValVT(), ArgValue);