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Bruce Ashfield
f47fedbb42
Backporting the following pinctrl commits to enable controllers on Intel Cannon Lake: 4b7a5c1b4ec5 pinctrl: intel: Add Intel Cannon Lake PCH-H pin controller support 044631ce1937 pinctrl: intel: Add Intel Cannon Lake PCH pin controller support 2054b0ea59a7 pinctrl: intel: Make it possible to specify mode per pin in a group 55b9053b5a5a pinctrl: intel: Add support for variable size pad groups (From OE-Core rev: 7636a42fb615b9ea4881483a61d3dac0ec72a5a6) Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com> Signed-off-by: Ross Burton <ross.burton@intel.com> (cherry picked from commit 4c05eb243c2cf10304383f6265721b695750cb9b) Signed-off-by: Armin Kuster <akuster808@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
QEMU Emulation Targets ====================== To simplify development, the build system supports building images to work with the QEMU emulator in system emulation mode. Several architectures are currently supported in 32 and 64 bit variants: * ARM (qemuarm + qemuarm64) * x86 (qemux86 + qemux86-64) * PowerPC (qemuppc only) * MIPS (qemumips + qemumips64) Use of the QEMU images is covered in the Yocto Project Reference Manual. The appropriate MACHINE variable value corresponding to the target is given in brackets.