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arm-bsp/n1sdp: Enable OP-TEE cache in N1SDP

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This change enables N1SDP cache to improve performance
by removing this patch:
HACK-disable-instruction-cache-and-data-cache.patch

Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>
This commit is contained in:
Mariam Elshakfy
2023-10-17 15:26:40 +00:00
committed by Jon Mason
parent 0e35e4b951
commit 9bcc166bd5
5 changed files with 3 additions and 50 deletions
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46
meta-arm-bsp/recipes-security/optee/files/optee-os/n1sdp/0003-HACK-disable-instruction-cache-and-data-cache.patch
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@@ -1,46 +0,0 @@
Upstream-Status: Pending [Not submitted to upstream yet]
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
From 0c3ce4c09cd7d2ff4cd2e62acab899dd88dc9514 Mon Sep 17 00:00:00 2001
From: Vishnu Banavath <vishnu.banavath@arm.com>
Date: Wed, 20 Jul 2022 16:45:59 +0100
Subject: [PATCH] HACK: disable instruction cache and data cache.
For some reason, n1sdp fails to boot with instruction cache and
data cache enabled. This is a temporary change to disable I cache
and D cache until a proper fix is found.
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
%% original patch: 0003-HACK-disable-instruction-cache-and-data-cache.patch
diff --git a/core/arch/arm/kernel/entry_a64.S b/core/arch/arm/kernel/entry_a64.S
index 875b6e69..594d6928 100644
--- a/core/arch/arm/kernel/entry_a64.S
+++ b/core/arch/arm/kernel/entry_a64.S
@@ -52,7 +52,7 @@
.macro set_sctlr_el1
mrs x0, sctlr_el1
- orr x0, x0, #SCTLR_I
+ bic x0, x0, #SCTLR_I
orr x0, x0, #SCTLR_SA
orr x0, x0, #SCTLR_SPAN
#if defined(CFG_CORE_RWDATA_NOEXEC)
@@ -490,11 +490,11 @@ LOCAL_FUNC enable_mmu , : , .identity_map
isb
/* Enable I and D cache */
- mrs x1, sctlr_el1
+ /* mrs x1, sctlr_el1
orr x1, x1, #SCTLR_I
orr x1, x1, #SCTLR_C
msr sctlr_el1, x1
- isb
+ isb */
/* Adjust stack pointers and return address */
msr spsel, #1
--
2.17.1

0
meta-arm-bsp/recipes-security/optee/files/optee-os/n1sdp/0004-Handle-logging-syscall.patch → meta-arm-bsp/recipes-security/optee/files/optee-os/n1sdp/0003-Handle-logging-syscall.patch
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0
meta-arm-bsp/recipes-security/optee/files/optee-os/n1sdp/0005-plat-n1sdp-register-DRAM1-to-optee-os.patch → meta-arm-bsp/recipes-security/optee/files/optee-os/n1sdp/0004-plat-n1sdp-register-DRAM1-to-optee-os.patch
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0
meta-arm-bsp/recipes-security/optee/files/optee-os/n1sdp/0006-plat-n1sdp-add-external-device-tree-base-and-size.patch → meta-arm-bsp/recipes-security/optee/files/optee-os/n1sdp/0005-plat-n1sdp-add-external-device-tree-base-and-size.patch
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7
meta-arm-bsp/recipes-security/optee/optee-os-n1sdp.inc
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@@ -8,10 +8,9 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files/optee-os/n1sdp:"
SRC_URI:append = " \
file://0001-core-arm-add-MPIDR-affinity-shift-and-mask-for-32-bi.patch \
file://0002-plat-n1sdp-add-N1SDP-platform-support.patch \
file://0003-HACK-disable-instruction-cache-and-data-cache.patch \
file://0004-Handle-logging-syscall.patch \
file://0005-plat-n1sdp-register-DRAM1-to-optee-os.patch \
file://0006-plat-n1sdp-add-external-device-tree-base-and-size.patch \
file://0003-Handle-logging-syscall.patch \
file://0004-plat-n1sdp-register-DRAM1-to-optee-os.patch \
file://0005-plat-n1sdp-add-external-device-tree-base-and-size.patch \
"
EXTRA_OEMAKE += " CFG_TEE_CORE_LOG_LEVEL=4"