arm-autonomy/u-boot: Modified kernel_addr for fvp-base with xen

Modified the default booti command for fvp-base with xen to boot
into xen at 0x84000000, rather than requiring the user to break
into the u-boot prompt.

Issue-Id: SCM-2195
Signed-off-by: Nathan Dunne <Nathan.Dunne@arm.com>
Change-Id: I91f324ce77716474596a78f97e74f432969d9803
Signed-off-by: Jon Mason <jon.mason@arm.com>

.gitlab-ci.yml

@@ -0,0 +1,103 @@
+# Use our custom Crops-derived image
+image: $CI_REGISTRY/$CI_PROJECT_NAMESPACE/yocto-builder:master
+
+  # First do a common bootstrap, and then build all the targets
+stages:
+  - bootstrap
+  - build
+
+# Common job fragment to get a worker ready
+.setup:
+  # Retry because the runner is flakey (see https://gitlab.com/gitlab-org/gitlab-runner/-/issues/2890)
+  retry: 2
+  stage: build
+  variables:
+    KAS_WORK_DIR: $CI_PROJECT_DIR/work
+    SSTATE_DIR: $CI_BUILDS_DIR/persist/sstate
+    DL_DIR: $CI_BUILDS_DIR/persist/downloads
+    BB_LOGCONFIG: $CI_PROJECT_DIR/kas/logging.yml
+  before_script:
+    - echo KAS_WORK_DIR = $KAS_WORK_DIR
+    - echo SSTATE_DIR = $SSTATE_DIR
+    - echo DL_DIR = $DL_DIR
+    - mkdir --verbose --parents $KAS_WORK_DIR $SSTATE_DIR $DL_DIR
+
+# Generalised fragment to do a Kas build
+.build:
+  extends: .setup
+  script:
+  - KASFILES=$(kas/jobs-to-kas $CI_JOB_NAME)
+  - kas shell --update --force-checkout $KASFILES -c 'cat conf/*.conf'
+  - kas build $KASFILES
+  - ./kas/check-warnings $KAS_WORK_DIR/build/warnings.log
+
+
+#
+# First phase, bootstrap and machine coverage
+#
+
+# Build a number of native tools first to ensure the other builders don't race
+# over them
+n1sdp/bootstrap:
+  extends: .build
+  stage: bootstrap
+
+# What percentage of machines in the layer do we build
+machine-coverage:
+  stage: bootstrap
+  script:
+  - ./kas/check-machine-coverage
+  coverage: '/Coverage: \d+/'
+
+
+#
+# Second phase, the actual build jobs
+#
+
+a5ds:
+  extends: .build
+
+foundation-armv8:
+  extends: .build
+
+fvp-base:
+  extends: .build
+
+gem5-arm64:
+  extends: .build
+
+juno:
+  extends: .build
+
+juno/musl:
+  extends: .build
+
+n1sdp:
+  extends: .build
+
+n1sdp/armgcc:
+  extends: .build
+
+tc0:
+  extends: .build
+
+
+#
+# Utility tasks, not executed automatically
+#
+
+# Report on disk usage
+usage:
+  extends: .setup
+  stage: bootstrap
+  when: manual
+  script:
+  - du -h -s $DL_DIR $SSTATE_DIR
+
+# Wipe out old sstate
+prune-sstate:
+  extends: .setup
+  stage: bootstrap
+  when: manual
+  script:
+  - find $SSTATE_DIR -type f -atime +30 -delete

kas/a5ds.yml

@@ -0,0 +1,6 @@
+header:
+  version: 9
+  includes:
+    - base.yml
+
+machine: a5ds

kas/armgcc.yml

@@ -0,0 +1,6 @@
+header:
+  version: 9
+
+local_conf_header:
+  libc: |
+    GCCVERSION = "arm-9.2"

kas/base.yml

@@ -0,0 +1,48 @@
+header:
+  version: 9
+
+distro: poky
+
+defaults:
+  repos:
+    refspec: dunfell
+
+repos:
+  meta-arm:
+    layers:
+      meta-arm:
+      meta-arm-bsp:
+      meta-arm-toolchain:
+
+  poky:
+    url: https://git.yoctoproject.org/git/poky
+    layers:
+      meta:
+      meta-poky:
+
+  meta-openembedded:
+    url: https://git.openembedded.org/meta-openembedded
+    layers:
+      meta-oe:
+
+env:
+  BB_LOGCONFIG: ""
+
+local_conf_header:
+  base: |
+    CONF_VERSION = "1"
+    PACKAGE_CLASSES = "package_ipk"
+    LICENSE_FLAGS_WHITELIST += "armcompiler"
+    PACKAGECONFIG_remove_pn-qemu-system-native = "gtk+ sdl"
+    BB_NUMBER_THREADS = "16"
+    PARALLEL_MAKE = "-j16"
+    INHERIT += "rm_work"
+    ERROR_QA = "${WARN_QA}"
+  ptest: |
+    DISTRO_FEATURES_remove = "ptest"
+
+machine: unset
+
+target:
+  - core-image-base
+#  - perf

kas/bootstrap.yml

@@ -0,0 +1,9 @@
+header:
+  version: 9
+
+target:
+  - binutils-cross-aarch64
+  - gcc-cross-aarch64
+  - python3-native
+  - opkg-native
+  - rpm-native

kas/check-machine-coverage

@@ -0,0 +1,26 @@
+#! /usr/bin/env python3
+
+from pathlib import Path
+import sys
+
+metaarm = Path.cwd()
+
+if metaarm.name != "meta-arm":
+    print("Not running inside meta-arm")
+    sys.exit(1)
+
+# All machine configurations
+machines = metaarm.glob("meta-*/conf/machine/*.conf")
+machines = set(p.stem for p in machines)
+
+# All kas files
+kas = metaarm.glob("kas/*.yml")
+kas = set(p.stem for p in kas)
+
+missing = machines - kas
+print(f"The following machines are missing: {', '.join(sorted(missing))}.")
+
+covered = len(machines) - len(missing)
+total = len(machines)
+percent = int(covered / total * 100)
+print(f"Coverage: {percent}%")

kas/check-warnings

@@ -0,0 +1,18 @@
+#! /bin/bash
+
+# Expects the path to a log file as $1, and if this file has any content
+# then display the contents and exit with an error code.
+
+set -e -u
+
+LOGFILE=$1
+
+if test -s $LOGFILE; then
+    echo ==============================
+    echo The build had warnings/errors:
+    echo ==============================
+    cat $LOGFILE
+    exit 1
+fi
+
+exit 0

kas/clang.yml

@@ -0,0 +1,10 @@
+header:
+  version: 9
+
+repos:
+  meta-clang:
+    url: https://github.com/kraj/meta-clang
+
+local_conf_header:
+  clang: |
+    TOOLCHAIN = "clang"

kas/foundation-armv8.yml

@@ -0,0 +1,6 @@
+header:
+  version: 9
+  includes:
+    - base.yml
+
+machine: foundation-armv8

kas/fvp-base.yml

@@ -0,0 +1,7 @@
+header:
+  version: 9
+  includes:
+    - base.yml
+
+machine: fvp-base
+

kas/gem5-arm64.yml

@@ -0,0 +1,10 @@
+header:
+  version: 9
+  includes:
+    - base.yml
+
+machine: gem5-arm64
+
+target:
+  - core-image-minimal
+  - gem5-aarch64-native

kas/jobs-to-kas

@@ -0,0 +1,19 @@
+#! /bin/bash
+
+# Read a GitLab CI job name on $1 and transform it to a
+# list of Kas yaml files
+
+set -e -u
+
+# Read Job namne from $1 and split on /
+IFS=/ read -r -a PARTS<<<$1
+
+# Prefix each part with kas/
+PARTS=("${PARTS[@]/#/kas/}")
+
+# Suffix each part with .yml
+PARTS=("${PARTS[@]/%/.yml}")
+
+# Print colon-separated
+IFS=":"
+echo "${PARTS[*]}"

kas/juno.yml

@@ -0,0 +1,6 @@
+header:
+  version: 9
+  includes:
+    - base.yml
+
+machine: juno

kas/logging.yml

@@ -0,0 +1,13 @@
+# Python logging configuration to write all warnings to a separate file
+version: 1
+
+handlers:
+  warnings:
+    class: logging.FileHandler
+    level: WARNING
+    filename: warnings.log
+    formatter: BitBake.logfileFormatter
+
+loggers:
+  BitBake:
+    handlers: [warnings]

kas/musl.yml

@@ -0,0 +1,6 @@
+header:
+  version: 9
+
+local_conf_header:
+  libc: |
+    TCLIBC = "musl"

kas/n1sdp.yml

@@ -0,0 +1,6 @@
+header:
+  version: 9
+  includes:
+    - base.yml
+
+machine: n1sdp

kas/tc0.yml

@@ -0,0 +1,6 @@
+header:
+  version: 9
+  includes:
+    - base.yml
+
+machine: tc0

meta-arm-autonomy/conf/distro/include/arm-autonomy-host.inc

@@ -2,6 +2,7 @@
 
 # We need to have xen and ipv4 activated
 DISTRO_FEATURES_append = " xen ipv4"
+DISTRO_FEATURES_NATIVE_append = " arm-autonomy-host"
 
 # Don't include kernels in standard images when building arm-autonomy-host
 # If the kernel image is needed in the rootfs the following should be set from

meta-arm-autonomy/conf/layer.conf

@@ -14,6 +14,7 @@ LAYERDEPENDS_meta-arm-autonomy = " \
    core \
    yocto \
    openembedded-layer \
+   networking-layer \
    virtualization-layer \
 "
 LAYERSERIES_COMPAT_meta-arm-autonomy = "dunfell"

meta-arm-autonomy/documentation/arm-autonomy-quickstart.md

@@ -115,6 +115,10 @@ To boot the system using an u-boot base board you will need to:
 
 In this example the addresses might need to be adapted depending on your board.
 
+For arm-autonomy host on FVP-Base u-boot has been modified such that
+`booti 0x84000000 - 0x83000000` is the default boot command. If FVP-Base is your
+MACHINE target there should be no need to interfere with u-boot.
+
 Guest project
 -------------
 The guest projects are not target specific and will use a Yocto MACHINE defined

meta-arm-autonomy/dynamic-layers/meta-arm-bsp/recipes-devtools/gem5/gem5-aarch64-native_20.bbappend

@@ -0,0 +1,7 @@
+# When booting gem5-arm64 with Xen we need to set the cpu as Cortex A53 and
+# remove support for pointer authentification
+GEM5_RUN_EXTRA_append = " \
+${@bb.utils.contains('DISTRO_FEATURES_NATIVE', 'arm-autonomy-host', \
+'--param=system.cpu_cluster[0].cpus[0].isa[0].midr=0x410fd030 \
+--param=system.cpu_cluster[0].cpus[0].isa[0].id_aa64isar1_el1=0x0', \
+'', d)}"

meta-arm-autonomy/dynamic-layers/meta-arm-bsp/recipes-extended/xenguest/xenguest-network-bridge.bbappend

@@ -1,2 +1,10 @@
+XENGUEST_NETWORK_BRIDGE_MEMBERS_n1sdp ?= "eth0"
+
+XENGUEST_NETWORK_BRIDGE_MEMBERS_fvp-base ?= "eth0"
+
+XENGUEST_NETWORK_BRIDGE_MEMBERS_foundation-armv8 ?= "eth0"
+
+XENGUEST_NETWORK_BRIDGE_MEMBERS_gem5-arm64 ?= "eth0"
+
 # Juno board has 2 network interfaces, add both of them to the bridge
 XENGUEST_NETWORK_BRIDGE_MEMBERS_juno ?= "eth0 eth1"

meta-arm-autonomy/recipes-bsp/u-boot/u-boot-2020.01/fvp-base/xen_u-boot_kernel_addr.patch

@@ -0,0 +1,16 @@
+Upstream Status: Inappropriate [meta-arm-autonomy specifc u-boot config]
+Signed-off-by: Nathan Dunne <nathan.dunne@arm.com>
+
+diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h
+index e63c335f85..9ee050a4a6 100644
+--- a/include/configs/vexpress_aemv8a.h
++++ b/include/configs/vexpress_aemv8a.h
+@@ -162,7 +162,7 @@
+ #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP
+ #define CONFIG_EXTRA_ENV_SETTINGS	\
+ 				"kernel_name=Image\0"		\
+-				"kernel_addr=0x80080000\0"	\
++				"kernel_addr=0x84000000\0"	\
+ 				"initrd_name=ramdisk.img\0"	\
+ 				"initrd_addr=0x88000000\0"	\
+ 				"fdtfile=devtree.dtb\0"		\

meta-arm-autonomy/recipes-bsp/u-boot/u-boot_2020.01.bbappend

@@ -0,0 +1,9 @@
+# Machine specific u-boot
+
+FILESEXTRAPATHS_prepend := "${THISDIR}/${BP}:"
+
+#
+# FVP BASE
+#
+
+SRC_URI_append_fvp-base = "${@bb.utils.contains('DISTRO_FEATURES', 'arm-autonomy-host', ' file://xen_u-boot_kernel_addr.patch', '', d)}"

meta-arm-autonomy/recipes-extended/xenguest/files/xenguest-init

@@ -12,6 +12,9 @@ fi
 
 source ${XENGUEST_CONF_BASE}/xenguest-manager.conf
 
+# Make sure we properly initialized the Dom0
+/usr/bin/xenguest-manager check-xen || exit $?
+
 # Create guest list
 guestlist=$(/usr/bin/xenguest-manager list)
 

meta-arm-autonomy/recipes-extended/xenguest/files/xenguest-manager

@@ -56,10 +56,14 @@ EOF
 
 function xenguest_volume_init()
 {
+    # Return:
+    # 0 - success
+    # 1 - failure
+
     if [ -z "${XENGUEST_VOLUME_DEVICE:-}" -o \
         ! -b ${XENGUEST_VOLUME_DEVICE:-} ]; then
         echo "${PREF} Invalid volume device in configuration: ${XENGUEST_VOLUME_DEVICE:-}"
-        exit 1
+        return 1
     fi
 
     if [ -z "${XENGUEST_VOLUME_NAME:-}" ]; then
@@ -69,14 +73,26 @@ function xenguest_volume_init()
 
     pvs ${XENGUEST_VOLUME_DEVICE} > /dev/null 2>&1
     if [ $? -ne 0 ]; then
-        echo "${PREF} Initialize lvm on ${XENGUEST_VOLUME_DEVICE}"
-        echo "pvcreate -f ${XENGUEST_VOLUME_DEVICE}" >> ${LOGFILE} 2>&1
-        pvcreate -f ${XENGUEST_VOLUME_DEVICE} >> ${LOGFILE} 2>&1
-        if [ $? -ne 0 ]; then
-            echo "${PREF} Error"
-            exit 1
+        # Check if there is no filesystem in the block device
+        echo "lsblk -n -o FSTYPE ${XENGUEST_VOLUME_DEVICE}" >> ${LOGFILE} 2>&1
+        filesystem=$(lsblk -n -o FSTYPE ${XENGUEST_VOLUME_DEVICE} 2>> ${LOGFILE})
+        if [[ $? -eq 0 && -z "$filesystem" ]]; then
+            echo "${PREF} Initialize lvm on ${XENGUEST_VOLUME_DEVICE}"
+            echo "pvcreate -f ${XENGUEST_VOLUME_DEVICE}" >> ${LOGFILE} 2>&1
+            pvcreate -f ${XENGUEST_VOLUME_DEVICE} >> ${LOGFILE} 2>&1
+            if [ $? -ne 0 ]; then
+                echo "${PREF} Error: initialing lvm on " \
+                     "${XENGUEST_VOLUME_DEVICE} failed." | tee -a ${LOGFILE}
+                return 1
+            fi
+        else
+            [ -z "$filesystem" ] || \
+                echo "${PREF} Error: The ${XENGUEST_VOLUME_DEVICE} is already " \
+                     "formatted as $filesystem." | tee -a ${LOGFILE}
+            return 1
         fi
     fi
+
     vgs ${XENGUEST_VOLUME_NAME} > /dev/null 2>&1
     if [ $? -ne 0 ]; then
         echo "${PREF} Create ${XENGUEST_VOLUME_NAME} volume"
@@ -85,10 +101,13 @@ function xenguest_volume_init()
         vgcreate ${XENGUEST_VOLUME_NAME} ${XENGUEST_VOLUME_DEVICE} \
             >> ${LOGFILE} 2>&1
         if [ $? -ne 0 ]; then
-            echo "${PREF} Error"
-            exit 1
+            echo "${PREF} Error: creating ${XENGUEST_VOLUME_NAME} volume " \
+                 "failed."  | tee -a ${LOGFILE}
+            return 1
         fi
     fi
+
+    return 0
 }
 
 # Detach a disk we attached to xen
@@ -102,12 +121,21 @@ function xenguest_detach_disk()
         >> ${LOGFILE} 2>&1
     if [ $? -ne 0 ]; then
         echo "${PREF} Error detaching partition ${part}"
-        exit 1
+        return 1
     fi
 }
 
 function xenguest_disk_init()
 {
+    # Inputs:
+    # $1 - guestname
+    # $2 - guestfile
+    #
+    # Outputs:
+    # 0 - success
+    # 1 - failed at guest disk preparation
+    # 2 - failed at guest disk creation
+
     guestname="$1"
     guestfile="$2"
     devname="/dev/${XENGUEST_VOLUME_NAME}/${guestname}"
@@ -119,12 +147,16 @@ function xenguest_disk_init()
         return
     fi
 
-    echo "${PREF} Create ${guestname} disk"
+    echo "${PREF} Create ${guestname} disk."
 
     # Init our volume
-    xenguest_volume_init
+    xenguest_volume_init ${guestname}
+    if [ $? -ne 0 ]; then
+        return 1
+    fi
 
-    echo "${PREF} Create hard drive for ${guestname}"
+    echo "${PREF} Create hard drive for ${guestname}." \
+         "This might take a while..."
 
 
     # Remove volume if it already exist
@@ -135,7 +167,7 @@ function xenguest_disk_init()
         lvremove -y ${devname} >> ${LOGFILE} 2>&1
         if [ $? -ne 0 ]; then
             echo "${PREF} Error removing volume ${guestname}"
-            exit 1
+            return 1
         fi
     fi
 
@@ -146,7 +178,7 @@ function xenguest_disk_init()
         >> ${LOGFILE} 2>&1
     if [ $? -ne 0 ]; then
         echo "${PREF} Error creating volume ${guestname}"
-        exit 1
+        return 1
     fi
 
     # Add partition table
@@ -154,7 +186,7 @@ function xenguest_disk_init()
     parted -s ${devname} mklabel msdos >> ${LOGFILE} 2>&1
     if [ $? -ne 0 ]; then
         echo "${PREF} Error creating partition table on ${guestname}"
-        exit 1
+        return 1
     fi
 
     # Setup disk name in xen configuration
@@ -164,7 +196,7 @@ function xenguest_disk_init()
         --xen-disk=${devname} >> ${LOGFILE} 2>&1
     if [ $? -ne 0 ]; then
         echo "${PREF} Error setting disk in xen configuration"
-        exit 1
+        return 1
     fi
 
     # Create partitions
@@ -197,7 +229,7 @@ function xenguest_disk_init()
                 ${partend} >> ${LOGFILE} 2>&1
             if [ $? -ne 0 ]; then
                 echo "${PREF} Error adding partition ${part}"
-                exit 1
+                return 1
             fi
 
             # Set next partition start to current partition end
@@ -219,7 +251,7 @@ function xenguest_disk_init()
                     *)
                         echo "${PREF} partition ${part} of ${guestname}" \
                             "fstype is invalid: ${fstype}"
-                        exit 1
+                        return 1
                         ;;
                 esac
             else
@@ -231,7 +263,7 @@ function xenguest_disk_init()
             xl block-attach 0 phy:${devname} xvda w >> ${LOGFILE} 2>&1
             if [ $? -ne 0 ]; then
                 echo "${PREF} Error attaching partition ${part}"
-                exit 1
+                return 1
             fi
 
 
@@ -247,8 +279,7 @@ function xenguest_disk_init()
 
             if [ ! -b /dev/xvda${part} ]; then
                 echo "${PREF} Partition ${part} creation error"
-                xenguest_detach_disk
-                exit 1
+                return 2
             fi
 
             if [ -n "${formatcmd}" ]; then
@@ -256,8 +287,7 @@ function xenguest_disk_init()
                 ${formatcmd} /dev/xvda${part}
                 if [ $? -ne 0 ]; then
                     echo "${PREF} Cannot create partition ${part} FS"
-                    xenguest_detach_disk
-                    exit 1
+                    return 2
                 fi
             fi
 
@@ -277,8 +307,7 @@ function xenguest_disk_init()
                         *)
                             # invalid/unknown compression type
                             echo "${PREF} Invalid file format in disk ${content}"
-                            xenguest_detach_disk
-                            exit 1
+                            return 2
                             ;;
                     esac
                     # dd into partition
@@ -288,8 +317,7 @@ function xenguest_disk_init()
                         | ${decompress} | dd of=/dev/xvda${part} >> ${LOGFILE} 2>&1
                     if [ $? -ne 0 ]; then
                         echo "${PREF} Cannot populate partition ${part}"
-                        xenguest_detach_disk
-                        exit 1
+                        return 2
                     fi
                     ;;
                 *.tar*)
@@ -310,8 +338,7 @@ function xenguest_disk_init()
                         *)
                             # invalid/unknown tar type
                             echo "${PREF} Invalid file format in disk ${content}"
-                            xenguest_detach_disk
-                            exit 1
+                            return 2
                             ;;
                     esac
 
@@ -321,9 +348,8 @@ function xenguest_disk_init()
                     mount /dev/xvda${part} ${mntdir} >> ${LOGFILE} 2>&1
                     if [ $? -ne 0 ]; then
                         echo "${PREF} Cannot mount partition ${part}"
-                        xenguest_detach_disk
                         rm -rf ${mntdir}
-                        exit 1
+                        return 2
                     fi
 
                     # tar and unmount
@@ -336,16 +362,14 @@ function xenguest_disk_init()
                         echo "${PREF} Cannot populate partition ${part}"
                         umount ${mntdir}
                         rm -rf ${mntdir}
-                        xenguest_detach_disk
-                        exit 1
+                        return 2
                     fi
                     echo "umount ${mntdir}" >> ${LOGFILE} 2>&1
                     umount ${mntdir} >> ${LOGFILE} 2>&1
                     if [ $? -ne 0 ]; then
                         echo "${PREF} Error unmounting ${part}"
-                        xenguest_detach_disk
                         rm -rf ${mntdir}
-                        exit 1
+                        return 2
                     fi
                     rm -rf ${mntdir}
                     ;;
@@ -356,6 +380,9 @@ function xenguest_disk_init()
 
             # Detach disk
             xenguest_detach_disk
+            if [ $? -ne 0 ]; then
+                return 1
+            fi
         fi
     done
 
@@ -392,10 +419,21 @@ function xenguest_guest_create()
         --xen-name=${guestname} >> ${LOGFILE} 2>&1
     if [ $? -ne 0 ]; then
         echo "${PREF} Error setting guest name"
+        xenguest_guest_remove ${guestname}
         exit 1
     fi
 
     xenguest_disk_init ${guestname} ${guestfile}
+    disk_init_status=$?
+    if [ $disk_init_status -ne 0 ]; then
+        echo "${PREF} Error: ${guestname} disk creation failed."
+        if [ $disk_init_status -eq 2 ]; then
+            xenguest_detach_disk
+        fi
+        xenguest_guest_remove ${guestname}
+        exit 1
+    fi
+
 }
 
 function xenguest_guest_remove()
@@ -408,6 +446,7 @@ function xenguest_guest_remove()
     lvs ${XENGUEST_VOLUME_NAME}/${guestname} >> ${LOGFILE} 2>&1
     if [ $? -eq 0 ]; then
         # Remove guest volume
+        echo "${PREF} Removing ${guestname} volume. This might take a while..."
         echo "lvremove -y ${devname}" >> ${LOGFILE} 2>&1
         lvremove -y ${devname} >> ${LOGFILE} 2>&1
         if [ $? -ne 0 ]; then
@@ -417,6 +456,7 @@ function xenguest_guest_remove()
     fi
 
     # remove guest files
+    echo "${PREF} Removing ${guestname} configuration files."
     rm -rf ${XENGUEST_CONF_BASE}/guests/${guestname}
 }
 
@@ -566,6 +606,24 @@ case ${cmd} in
         usage
         exit 0
         ;;
+
+esac
+
+# Check if we have a valid Dom0 booted with Xen
+ERROR_MSG=$(xl info 2>&1)
+if [ $? -ne 0 ]; then
+    echo "ERROR: Xen environment is not valid!!!" | tee -a ${LOGFILE}
+    echo "ERROR: Check if Xen has booted and the kernel configuration." \
+        | tee -a ${LOGFILE}
+    echo "ERROR: Output from 'xl info' command:" | tee -a ${LOGFILE}
+    echo "$ERROR_MSG" | tee -a ${LOGFILE}
+    exit 1
+fi
+
+case ${cmd} in
+    check-xen)
+        exit 0
+        ;;
     create)
         guestfile="${arg1}"
         guestname="${arg2}"
@@ -584,6 +642,7 @@ case ${cmd} in
         fi
 
         xenguest_guest_create ${guestfile} ${guestname}
+        echo "${PREF} ${guestname} created."
         ;;
     remove)
         guestname="${arg1:-}"
@@ -601,6 +660,7 @@ case ${cmd} in
             fi
         fi
         xenguest_guest_remove ${guestname}
+        echo "${PREF} ${guestname} removed."
         ;;
     start)
         guestname="${arg1:-}"

meta-arm-autonomy/recipes-extended/xenguest/xenguest-manager.bb

@@ -46,7 +46,7 @@ do_install() {
 }
 
 # Things that we need on the target
-RDEPENDS_${PN} += "bash tar xenguest-mkimage lvm2 xen-tools parted e2fsprogs"
+RDEPENDS_${PN} += "bash tar xenguest-mkimage lvm2 xen-tools parted e2fsprogs dosfstools"
 
 FILES_${PN} += "${bindir}/xenguest-manager \
                ${sysconfdir}/xenguest"

meta-arm-autonomy/recipes-extended/xenguest/xenguest-network-bridge.bb

@@ -9,7 +9,11 @@ S = "${WORKDIR}"
 # Please refer to documentation/xenguest-network-bridge.md for documentation on
 # those parameters
 XENGUEST_NETWORK_BRIDGE_NAME ?= "xenbr0"
-XENGUEST_NETWORK_BRIDGE_MEMBERS ?= "eth0"
+
+# The XENGUEST_NETWORK_BRIDGE_MEMBERS should be set in a machine.conf
+# or bbappend file.
+#XENGUEST_NETWORK_BRIDGE_MEMBERS ?= "eth0"
+
 XENGUEST_NETWORK_BRIDGE_CONFIG ?= "xenguest-network-bridge-dhcp.cfg.in"
 
 SRC_URI = " \

meta-arm-bsp/README.md

@@ -0,0 +1 @@
+See ../README.md

meta-arm-bsp/classes/image_types_disk_img.bbclass

@@ -51,7 +51,7 @@ disk_img_createpart() {
     local imagefile="$1"
     local start="$2"
     local size="$3"
-    local fstype="${4:-ext4}"
+    local fstype="${4:-}"
     local content="${5:-}"
     local formatargs=""
 

meta-arm-bsp/conf/machine/a5ds.conf

@@ -6,9 +6,10 @@
 
 require conf/machine/include/tune-cortexa5.inc
 
-PREFERRED_PROVIDER_virtual/kernel ?= "linux-upstream-arm"
-PREFERRED_VERSION_linux-upstream-arm ?= "5.3%"
+PREFERRED_PROVIDER_virtual/kernel ?= "linux-yocto"
+PREFERRED_VERSION_linux-yocto ?= "5.3%"
 KBUILD_DEFCONFIG = "multi_v7_defconfig"
+KCONFIG_MODE = "--alldefconfig"
 
 EXTRA_IMAGEDEPENDS += "virtual/trusted-firmware-a u-boot"
 

meta-arm-bsp/conf/machine/n1sdp.conf

@@ -15,9 +15,25 @@ IMAGE_FSTYPES += "tar.bz2 ext4"
 
 SERIAL_CONSOLES = "115200;ttyAMA0"
 
+# Set default WKS
+WKS_FILE ?= "${@bb.utils.contains("EFI_PROVIDER", "systemd-boot", "systemd-bootdisk.wks", "mkefidisk.wks", d)}"
+
 # Use kernel provided by linaro (Contains support for SCMi or HDMI)
 PREFERRED_PROVIDER_virtual/kernel ?= "linux-linaro-arm"
 PREFERRED_VERSION_linux-linaro-arm ?= "5.4%"
 
 # RTL8168E Gigabit Ethernet Controller is attached to the PCIe interface
 MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "linux-firmware-rtl8168"
+
+# Trusted firmware v2.2 version
+PREFERRED_PROVIDER_virtual/trusted-firmware-a ?= "trusted-firmware-a"
+PREFERRED_VERSION_trusted-firmware-a ?= "2.2%"
+
+EXTRA_IMAGEDEPENDS += "virtual/trusted-firmware-a"
+EXTRA_IMAGEDEPENDS += "virtual/control-processor-firmware"
+
+#UEFI EDK2 firmware
+EXTRA_IMAGEDEPENDS += "virtual/uefi-firmware"
+
+#grub-efi
+EFI_PROVIDER ?= "grub-efi"

meta-arm-bsp/conf/machine/tc0.conf

@@ -0,0 +1,27 @@
+# Configuration for TC0
+
+#@TYPE: Machine
+#@NAME: TC0
+#@DESCRIPTION: Machine configuration for TC0
+
+TUNE_FEATURES = "aarch64"
+
+require conf/machine/include/arm/arch-armv8a.inc
+
+# Das U-boot
+UBOOT_MACHINE ?= "total_compute_defconfig"
+
+# Trusted firmware A v2.3
+PREFERRED_PROVIDER_virtual/trusted-firmware-a ?= "trusted-firmware-a"
+PREFERRED_VERSION_trusted-firmware-a ?= "2.3%"
+
+EXTRA_IMAGEDEPENDS += "virtual/trusted-firmware-a"
+
+PREFERRED_PROVIDER_virtual/kernel ?= "linux-arm64-ack"
+
+# Cannot use the default zImage on arm64
+KERNEL_IMAGETYPE = "Image"
+KERNEL_BOOTCMD = "booti"
+IMAGE_FSTYPES += "cpio.gz.u-boot"
+
+SERIAL_CONSOLES = "115200;ttyAMA0"

meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware-n1sdp.inc

@@ -0,0 +1,32 @@
+# N1SDP specific SCP configurations and build instructions
+
+SRCREV_scp    = "fd7c83561a7d76c7681d5d017fb23aa3664c028c"
+SRCREV_cmsis  = "refs/tags/5.2.0"
+SCP_PLATFORM  = "n1sdp"
+SCP_LOG_LEVEL = "INFO"
+
+COMPATIBLE_MACHINE_n1sdp = "n1sdp"
+
+PV = "2.6+git${SRCPV}"
+
+DEPENDS += "fiptool-native"
+DEPENDS += "virtual/trusted-firmware-a"
+
+do_install_append() {
+   fiptool \
+       create \
+       --scp-fw "${D}/firmware/scp_ramfw.bin" \
+       --soc-fw "${RECIPE_SYSROOT}/firmware/bl31.bin" \
+       "scp_fw.bin"
+
+   fiptool \
+       create \
+       --blob uuid=54464222-a4cf-4bf8-b1b6-cee7dade539e,file="${D}/firmware/mcp_ramfw.bin" \
+       "mcp_fw.bin"
+
+   install "scp_fw.bin" "${D}/firmware/scp_fw.bin"
+   install "mcp_fw.bin" "${D}/firmware/mcp_fw.bin"
+
+   ln -sf "scp_romfw.bin" "${D}/firmware/scp_rom.bin"
+   ln -sf "mcp_romfw.bin" "${D}/firmware/mcp_rom.bin"
+}

meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware-tc0.inc

@@ -0,0 +1,13 @@
+# TC0 specicif SCP configuration
+
+# Intermediate SHA with 2.6 baseline version
+SRCREV_scp    = "ba1db5fb0ee4a520836722f7a694177d461ab716"
+# 5.2.0 tag commit
+SRCREV_cmsis  = "80cc44bba16cb4c8f495b7aa9709d41ac50e9529"
+
+COMPATIBLE_MACHINE = "tc0"
+
+SCP_PLATFORM = "tc0"
+FW_TARGETS = "scp"
+
+PV = "2.6+git${SRCPV}"

meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware_git.bbappend

@@ -0,0 +1,8 @@
+# Include machine specific SCP configurations
+
+MACHINE_SCP_REQUIRE ?= ""
+
+MACHINE_SCP_REQUIRE_n1sdp = "scp-firmware-n1sdp.inc"
+MACHINE_SCP_REQUIRE_tc0 = "scp-firmware-tc0.inc"
+
+require ${MACHINE_SCP_REQUIRE}

meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/a5ds/0001-plat-arm-a5ds-move-dtb-to-a-new-address.patch

@@ -1,31 +0,0 @@
-From d3cadbc6f1060020960dc05af0465db919bbbe2b Mon Sep 17 00:00:00 2001
-From: Rui Miguel Silva <rui.silva@linaro.org>
-Date: Fri, 30 Aug 2019 13:38:44 +0100
-Subject: [PATCH] plat/arm: a5ds: move dtb to a new address
-
-When Using bigger kernel images (>8.4MB compressed zImage) and at
-decompress and final location init stage of kernel start makes it
-override dtb at this address, to avoid this move the dtb a little
-higher in address related.
-
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
----
- plat/arm/board/a5ds/fdts/a5ds_tb_fw_config.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/plat/arm/board/a5ds/fdts/a5ds_tb_fw_config.dts b/plat/arm/board/a5ds/fdts/a5ds_tb_fw_config.dts
-index 9ab2d9656600..c616ff772237 100644
---- a/plat/arm/board/a5ds/fdts/a5ds_tb_fw_config.dts
-+++ b/plat/arm/board/a5ds/fdts/a5ds_tb_fw_config.dts
-@@ -10,7 +10,7 @@
-       /* Platform Config */
-       plat_arm_bl2 {
-               compatible = "arm,tb_fw";
--              hw_config_addr = <0x0 0x82000000>;
-+              hw_config_addr = <0x0 0x83000000>;
-               hw_config_max_size = <0x01000000>;
-               /* Disable authentication for development */
-               disable_auth = <0x0>;
---
-2.22.1
-

meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/0001-n1sdp-arm-tf-disable-workaround-for-N1-Erratum-13157.patch

@@ -0,0 +1,46 @@
+From 76847eb46e77d094eb8611760dd1ab880f617321 Mon Sep 17 00:00:00 2001
+From: James Yang <James.Yang@arm.com>
+Date: Wed, 4 Sep 2019 10:49:45 -0500
+Subject: [PATCH] n1sdp/arm-tf: disable workaround for N1 Erratum 1315703 and
+ Spectre v4
+
+This patch disables the workaround for Erratum 1315703 so that the N1 CPU
+performance in the N1 SDP better reflects that of released versions of the
+N1 for software that does not require mitigation for Spectre Variant 4.
+
+N1 SDP uses N1 version r1p0, which is affected by Erratum 1315703, which
+is fixed in N1 r3p1.  The workaround for r1p0 disables the CPU performance
+feature of bypassing of stores by younger loads.  This can significantly
+affect performance.  The Erratum is classified "Cat A (Rare)" and requires
+a specific sequence of events to occur.
+
+Disabling this CPU performance feature is also the mitigation for Spectre
+Variant 4 (CVE-2018-3639).  On CPUs that provide the PSTATE.SBSS feature,
+the OS selectively applies the mitigation only to programs that require it,
+leaving the performance of other programs unaffected.  However, N1 r1p0
+does not have the PSTATE.SBSS feature (which is introduced in N1 r3p1), and
+Arm-TF does not provide the interface to to dynamically disable the CPU
+performance feature.  Therefore, applying the workaround penalizes ALL
+software running on N1 SDP, including those that do not require mitigation.
+
+This patch is meant for performance evaluation purposes ONLY and should not
+be used for software that requires a seccomp computing environment.
+
+Signed-off-by: James Yang <James.Yang@arm.com>
+---
+ plat/arm/board/n1sdp/platform.mk | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/plat/arm/board/n1sdp/platform.mk b/plat/arm/board/n1sdp/platform.mk
+index 986bd70a..7e30c857 100644
+--- a/plat/arm/board/n1sdp/platform.mk
++++ b/plat/arm/board/n1sdp/platform.mk
+@@ -66,3 +66,5 @@ include plat/arm/common/arm_common.mk
+ include plat/arm/css/common/css_common.mk
+ include plat/arm/board/common/board_common.mk
+ 
++# N1SDP: disable workaround for Errata 1315703 and global Spectre v4 mitigation
++override ERRATA_N1_1315703 := 0
+-- 
+2.17.1
+

meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-a5ds.inc

@@ -7,9 +7,6 @@ TFA_UBOOT = "1"
 TFA_BUILD_TARGET = "all fip"
 TFA_INSTALL_TARGET = "bl1.bin fip.bin"
 
-SRCREV = "5d3ee0764b03567bf3501edf47d67d72daff0cb3"
-LIC_FILES_CHKSUM = "file://license.rst;md5=1dd070c98a281d18d9eefd938729b031"
-
 EXTRA_OEMAKE_append = " \
                     ARCH=aarch32 \
                     FVP_HW_CONFIG_DTS=fdts/a5ds.dts \
@@ -18,5 +15,3 @@ EXTRA_OEMAKE_append = " \
                     ARM_CORTEX_A5=yes \
                     ARM_XLAT_TABLES_LIB_V1=1 \
                     "
-
-

meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-n1sdp.inc

@@ -0,0 +1,12 @@
+# N1SDP specific TFA support
+
+COMPATIBLE_MACHINE = "n1sdp"
+TFA_PLATFORM       = "n1sdp"
+TFA_BUILD_TARGET   = "bl31"
+TFA_DEBUG          = "1"
+TFA_MBEDTLS        = "0"
+TFA_UBOOT          = "0"
+
+SRC_URI_append = " \
+    file://0001-n1sdp-arm-tf-disable-workaround-for-N1-Erratum-13157.patch \
+    "

meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-tc0.inc

@@ -0,0 +1,21 @@
+# TCO specific TFA configuration
+
+# Intermediate SHA with 2.3 baseline version
+SRCREV_tfa = "2fe7d18b0d99fdf4c4dbf84863bb2036dfebc537"
+
+SRC_URI_append = " ${SRC_URI_MBEDTLS}"
+
+DEPENDS += "scp-firmware"
+
+COMPATIBLE_MACHINE = "tc0"
+
+TFA_PLATFORM = "tc0"
+TFA_BUILD_TARGET = "all fip"
+TFA_UBOOT = "1"
+TFA_INSTALL_TARGET = "bl1 fip"
+TFA_MBEDTLS = "1"
+TFA_DEBUG = "1"
+
+EXTRA_OEMAKE += "SCP_BL2=${RECIPE_SYSROOT}/firmware/scp_ramfw.bin"
+EXTRA_OEMAKE += "MBEDTLS_DIR=mbedtls TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 ARM_ROTPK_LOCATION=devel_rsa \
+                     ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem"

meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.%.bbappend

@@ -1,9 +1,3 @@
-# Machine specific TFAs
+FILESEXTRAPATHS_prepend := "${THISDIR}/files/:"
 
-MACHINE_TFA_REQUIRE ?= ""
-
-MACHINE_TFA_REQUIRE_foundation-armv8 = "trusted-firmware-a-fvp.inc"
-MACHINE_TFA_REQUIRE_fvp-base = "trusted-firmware-a-fvp.inc"
-MACHINE_TFA_REQUIRE_juno = "trusted-firmware-a-juno.inc"
-
-require ${MACHINE_TFA_REQUIRE}
+# Don't put machine customisation in here, use a versioned append.

meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.1.bbappend

@@ -1,7 +1,6 @@
 # Machine specific TFAs
 
 MACHINE_TFA_REQUIRE ?= ""
-
-MACHINE_TFA_REQUIRE_a5ds = "trusted-firmware-a-a5ds.inc"
+MACHINE_TFA_REQUIRE_juno = "trusted-firmware-a-juno.inc"
 
 require ${MACHINE_TFA_REQUIRE}

meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.2.bbappend

@@ -0,0 +1,11 @@
+# Machine specific TFAs
+
+MACHINE_TFA_REQUIRE ?= ""
+MACHINE_TFA_REQUIRE_n1sdp = "trusted-firmware-a-n1sdp.inc"
+
+require ${MACHINE_TFA_REQUIRE}
+
+# TFA referred in release tag N1SDP-2020.03.26
+SRCREV_tfa_n1sdp = "cfb3f73344217aa000aaff9d84baad7527af75bf"
+
+PV_n1sdp = "2.2+git${SRCPV}"

meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.3.bbappend

@@ -0,0 +1,9 @@
+# Machine specific TFAs
+
+MACHINE_TFA_REQUIRE ?= ""
+MACHINE_TFA_REQUIRE_tc0 = "trusted-firmware-a-tc0.inc"
+MACHINE_TFA_REQUIRE_a5ds = "trusted-firmware-a-a5ds.inc"
+MACHINE_TFA_REQUIRE_foundation-armv8 = "trusted-firmware-a-fvp.inc"
+MACHINE_TFA_REQUIRE_fvp-base = "trusted-firmware-a-fvp.inc"
+
+require ${MACHINE_TFA_REQUIRE}

meta-arm-bsp/recipes-bsp/u-boot/files/a5ds/0001-armv7-add-mmio-timer.patch

@@ -1,12 +1,13 @@
-From 8525c72c438b0aa66f1f38db37bd7aacf7e3ce34 Mon Sep 17 00:00:00 2001
+From 42fd533d68fd70e23a1150715da3dea7ce87b51f Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Wed, 18 Dec 2019 21:52:34 +0000
-Subject: [PATCH 1/2] armv7: add mmio timer
+Subject: [PATCH] armv7: add mmio timer
 
 This timer can be used by u-boot when arch-timer is not available in
 core, for example, Cortex-A5.
 
 Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
+
 ---
  arch/arm/cpu/armv7/Makefile     |  1 +
  arch/arm/cpu/armv7/mmio_timer.c | 56 +++++++++++++++++++++++++++++++++
@@ -18,17 +19,17 @@ diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
 index 8c955d0d5284..82af9c031277 100644
 --- a/arch/arm/cpu/armv7/Makefile
 +++ b/arch/arm/cpu/armv7/Makefile
-@@ -28,6 +28,7 @@ obj-$(CONFIG_ARMV7_PSCI)     += psci.o psci-common.o
+@@ -28,6 +28,7 @@ obj-$(CONFIG_ARMV7_PSCI)	+= psci.o psci-common.o
  obj-$(CONFIG_IPROC) += iproc-common/
  obj-$(CONFIG_KONA) += kona-common/
  obj-$(CONFIG_SYS_ARCH_TIMER) += arch_timer.o
 +obj-$(CONFIG_SYS_MMIO_TIMER) += mmio_timer.o
-
+ 
  ifneq (,$(filter s5pc1xx exynos,$(SOC)))
  obj-y += s5p-common/
 diff --git a/arch/arm/cpu/armv7/mmio_timer.c b/arch/arm/cpu/armv7/mmio_timer.c
 new file mode 100644
-index 000000000000..1b905db8bb19
+index 000000000000..5d6f66172398
 --- /dev/null
 +++ b/arch/arm/cpu/armv7/mmio_timer.c
 @@ -0,0 +1,56 @@
@@ -100,6 +101,3 @@ index cf1808e051c8..8624714ae7a6 100644
  CONFIG_SYS_MONITOR_
  CONFIG_SYS_MONITOR_BASE
  CONFIG_SYS_MONITOR_BASE_EARLY
---
-2.25.0
-

meta-arm-bsp/recipes-bsp/u-boot/files/a5ds/0002-board-arm-add-designstart-cortex-a5-board.patch

@@ -1,12 +1,13 @@
-From 2417d0991f73ee2c83946fcac208a7d6894f4530 Mon Sep 17 00:00:00 2001
+From 9bd7c18ca08257826557ce177457bb5a89780e64 Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Wed, 8 Jan 2020 09:48:11 +0000
-Subject: [PATCH 2/2] board: arm: add designstart cortex-a5 board
+Subject: [PATCH] board: arm: add designstart cortex-a5 board
 
 Arm added a new board, designstart, with a cortex-a5 chip, add the
 default configuration, initialization and makefile for this system.
 
 Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
+
 ---
  arch/arm/Kconfig                       |   7 ++
  board/armltd/designstart/Kconfig       |  12 +++
@@ -22,13 +23,13 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
  create mode 100644 include/configs/designstart_ca5.h
 
 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index f9dab073ea14..2cc9413114de 100644
+index 36c9c2fecd01..4fe0796fd1f1 100644
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
 @@ -628,6 +628,12 @@ config ARCH_BCM6858
-       select OF_CONTROL
-       imply CMD_DM
-
+ 	select OF_CONTROL
+ 	imply CMD_DM
+ 
 +config TARGET_DESIGNSTART_CA5
 +      bool "Support Designstart Cortex-A5"
 +      select CPU_V7A
@@ -36,8 +37,8 @@ index f9dab073ea14..2cc9413114de 100644
 +      select PL01X_SERIAL
 +
  config TARGET_VEXPRESS_CA15_TC2
-       bool "Support vexpress_ca15_tc2"
-       select CPU_V7A
+ 	bool "Support vexpress_ca15_tc2"
+ 	select CPU_V7A
 @@ -1782,6 +1788,7 @@ source "board/Marvell/gplugd/Kconfig"
  source "board/armadeus/apf27/Kconfig"
  source "board/armltd/vexpress/Kconfig"
@@ -48,7 +49,7 @@ index f9dab073ea14..2cc9413114de 100644
  source "board/broadcom/bcm963158/Kconfig"
 diff --git a/board/armltd/designstart/Kconfig b/board/armltd/designstart/Kconfig
 new file mode 100644
-index 000000000000..6446fe3f4492
+index 000000000000..a9564e8655e2
 --- /dev/null
 +++ b/board/armltd/designstart/Kconfig
 @@ -0,0 +1,12 @@
@@ -66,7 +67,7 @@ index 000000000000..6446fe3f4492
 +endif
 diff --git a/board/armltd/designstart/Makefile b/board/armltd/designstart/Makefile
 new file mode 100644
-index 000000000000..b64c905c7021
+index 000000000000..d2dc2b74ed85
 --- /dev/null
 +++ b/board/armltd/designstart/Makefile
 @@ -0,0 +1,8 @@
@@ -80,7 +81,7 @@ index 000000000000..b64c905c7021
 +obj-y := designstart.o
 diff --git a/board/armltd/designstart/designstart.c b/board/armltd/designstart/designstart.c
 new file mode 100644
-index 000000000000..b0400f110ce2
+index 000000000000..658057a00330
 --- /dev/null
 +++ b/board/armltd/designstart/designstart.c
 @@ -0,0 +1,49 @@
@@ -178,7 +179,7 @@ index 000000000000..a2a756740295
 +
 diff --git a/include/configs/designstart_ca5.h b/include/configs/designstart_ca5.h
 new file mode 100644
-index 000000000000..79c4b36060d2
+index 000000000000..6db5b1cf4ac2
 --- /dev/null
 +++ b/include/configs/designstart_ca5.h
 @@ -0,0 +1,122 @@
@@ -304,6 +305,3 @@ index 000000000000..79c4b36060d2
 +#define CONFIG_ENV_SIZE                       CONFIG_ENV_SECT_SIZE
 +#define CONFIG_ENV_IS_IN_FLASH                1
 +#endif
---
-2.25.0
-

meta-arm-bsp/recipes-bsp/u-boot/files/tc0/0001-Add-support-for-Total-Compute.patch

@@ -0,0 +1,307 @@
+From 854c5d7b8a010d47da38735f15a31d0b7d10ae3c Mon Sep 17 00:00:00 2001
+From: Usama Arif <usama.arif@arm.com>
+Date: Fri, 3 Jul 2020 10:26:56 +0100
+Subject: [PATCH] Add support for Total Compute
+
+This includes basic platform patch support and boots
+kernel and ramdisk that have been sideloaded in DRAM.
+
+Change-Id: I2e35a1d983efd1d27572f671cad5a9fe4ad68ee6
+Signed-off-by: Usama Arif <usama.arif@arm.com>
+Upstream-Status: Pending
+---
+ arch/arm/Kconfig                         |  9 +++
+ board/armltd/totalcompute/Kconfig        | 12 ++++
+ board/armltd/totalcompute/MAINTAINERS    |  6 ++
+ board/armltd/totalcompute/Makefile       |  6 ++
+ board/armltd/totalcompute/totalcompute.c | 74 +++++++++++++++++++++++
+ configs/total_compute_defconfig          | 39 ++++++++++++
+ include/configs/total_compute.h          | 77 ++++++++++++++++++++++++
+ 7 files changed, 223 insertions(+)
+ create mode 100644 board/armltd/totalcompute/Kconfig
+ create mode 100644 board/armltd/totalcompute/MAINTAINERS
+ create mode 100644 board/armltd/totalcompute/Makefile
+ create mode 100644 board/armltd/totalcompute/totalcompute.c
+ create mode 100644 configs/total_compute_defconfig
+ create mode 100644 include/configs/total_compute.h
+
+diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
+index 36c9c2fecd0..b423b7655b6 100644
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -635,6 +635,14 @@ config TARGET_VEXPRESS_CA15_TC2
+ 	select CPU_V7_HAS_VIRT
+ 	select PL011_SERIAL
+ 
++config TARGET_TOTAL_COMPUTE
++	bool "Support Total Compute Platform"
++	select ARM64
++	select PL01X_SERIAL
++	select DM
++	select DM_SERIAL
++	select DM_ETH
++
+ config ARCH_BCMSTB
+ 	bool "Broadcom BCM7XXX family"
+ 	select CPU_V7A
+@@ -1774,6 +1782,7 @@ source "arch/arm/cpu/armv8/Kconfig"
+ 
+ source "arch/arm/mach-imx/Kconfig"
+ 
++source "board/armltd/totalcompute/Kconfig"
+ source "board/bosch/shc/Kconfig"
+ source "board/bosch/guardian/Kconfig"
+ source "board/CarMediaLab/flea3/Kconfig"
+diff --git a/board/armltd/totalcompute/Kconfig b/board/armltd/totalcompute/Kconfig
+new file mode 100644
+index 00000000000..8bd8c30a6b5
+--- /dev/null
++++ b/board/armltd/totalcompute/Kconfig
+@@ -0,0 +1,12 @@
++if TARGET_TOTAL_COMPUTE
++
++config SYS_BOARD
++	default "totalcompute"
++
++config SYS_VENDOR
++	default "armltd"
++
++config SYS_CONFIG_NAME
++	default "total_compute"
++
++endif
+diff --git a/board/armltd/totalcompute/MAINTAINERS b/board/armltd/totalcompute/MAINTAINERS
+new file mode 100644
+index 00000000000..bb09a90a309
+--- /dev/null
++++ b/board/armltd/totalcompute/MAINTAINERS
+@@ -0,0 +1,6 @@
++TOTAL_COMPUTE BOARD
++M:	Usama Arif <usama.arif@arm.com>
++S:	Maintained
++F:	board/armltd/totalcompute/
++F:	include/configs/total_compute.h
++F:	configs/total_compute_defconfig
+diff --git a/board/armltd/totalcompute/Makefile b/board/armltd/totalcompute/Makefile
+new file mode 100644
+index 00000000000..4c40afef723
+--- /dev/null
++++ b/board/armltd/totalcompute/Makefile
+@@ -0,0 +1,6 @@
++# SPDX-License-Identifier: GPL-2.0+
++#
++# (C) Copyright 2020 ARM Limited
++# Usama Arif <usama.arif@arm.com>
++
++obj-y	:= totalcompute.o
+diff --git a/board/armltd/totalcompute/totalcompute.c b/board/armltd/totalcompute/totalcompute.c
+new file mode 100644
+index 00000000000..21247e4ef0f
+--- /dev/null
++++ b/board/armltd/totalcompute/totalcompute.c
+@@ -0,0 +1,74 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * (C) Copyright 2020 ARM Limited
++ * Usama Arif <usama.arif@arm.com>
++ */
++#include <common.h>
++#include <dm.h>
++#include <init.h>
++#include <malloc.h>
++#include <errno.h>
++#include <netdev.h>
++#include <asm/io.h>
++#include <linux/compiler.h>
++#include <dm/platform_data/serial_pl01x.h>
++#include <asm/armv8/mmu.h>
++
++DECLARE_GLOBAL_DATA_PTR;
++
++static const struct pl01x_serial_platdata serial_platdata = {
++	.base = UART0_BASE,
++	.type = TYPE_PL011,
++	.clock = CONFIG_PL011_CLOCK,
++};
++
++U_BOOT_DEVICE(total_compute_serials) = {
++	.name = "serial_pl01x",
++	.platdata = &serial_platdata,
++};
++
++static struct mm_region total_compute_mem_map[] = {
++	{
++		.virt = 0x0UL,
++		.phys = 0x0UL,
++		.size = 0x80000000UL,
++		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
++			 PTE_BLOCK_NON_SHARE |
++			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
++	}, {
++		.virt = 0x80000000UL,
++		.phys = 0x80000000UL,
++		.size = 0xff80000000UL,
++		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
++			 PTE_BLOCK_INNER_SHARE
++	}, {
++		/* List terminator */
++		0,
++	}
++};
++
++struct mm_region *mem_map = total_compute_mem_map;
++
++int board_init(void)
++{
++	return 0;
++}
++
++int dram_init(void)
++{
++	gd->ram_size = PHYS_SDRAM_1_SIZE;
++	return 0;
++}
++
++int dram_init_banksize(void)
++{
++	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
++	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
++
++	return 0;
++}
++
++void reset_cpu(ulong addr)
++{
++}
++
+diff --git a/configs/total_compute_defconfig b/configs/total_compute_defconfig
+new file mode 100644
+index 00000000000..31d97dddc21
+--- /dev/null
++++ b/configs/total_compute_defconfig
+@@ -0,0 +1,39 @@
++CONFIG_ARM=y
++CONFIG_TARGET_TOTAL_COMPUTE=y
++CONFIG_SYS_TEXT_BASE=0xe0000000
++CONFIG_SYS_MALLOC_F_LEN=0x2000
++CONFIG_ENV_SIZE=0x10000
++CONFIG_NR_DRAM_BANKS=2
++CONFIG_DISTRO_DEFAULTS=y
++CONFIG_BOOTDELAY=1
++CONFIG_USE_BOOTARGS=y
++CONFIG_BOOTARGS="console=ttyAMA0 debug user_debug=31 earlycon=pl011,0x7ff80000 loglevel=9 androidboot.hardware=total_compute video=640x480-32@60 root=/dev/vda2 ip=dhcp androidboot.selinux=permissive"
++# CONFIG_USE_BOOTCOMMAND is not set
++# CONFIG_DISPLAY_CPUINFO is not set
++# CONFIG_DISPLAY_BOARDINFO is not set
++CONFIG_SYS_PROMPT="TOTAL_COMPUTE# "
++# CONFIG_CMD_CONSOLE is not set
++# CONFIG_CMD_XIMG is not set
++# CONFIG_CMD_EDITENV is not set
++CONFIG_CMD_MEMTEST=y
++CONFIG_SYS_MEMTEST_START=0x80000000
++CONFIG_SYS_MEMTEST_END=0xff000000
++CONFIG_CMD_ARMFLASH=y
++# CONFIG_CMD_LOADS is not set
++# CONFIG_CMD_ITEST is not set
++# CONFIG_CMD_SETEXPR is not set
++# CONFIG_CMD_NFS is not set
++CONFIG_CMD_CACHE=y
++# CONFIG_CMD_MISC is not set
++CONFIG_CMD_UBI=y
++# CONFIG_ISO_PARTITION is not set
++# CONFIG_EFI_PARTITION is not set
++# CONFIG_MMC is not set
++CONFIG_MTD=y
++CONFIG_MTD_DEVICE=y
++CONFIG_MTD_NOR_FLASH=y
++CONFIG_FLASH_CFI_DRIVER=y
++CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
++CONFIG_SYS_FLASH_PROTECTION=y
++CONFIG_SYS_FLASH_CFI=y
++CONFIG_OF_LIBFDT=y
+diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h
+new file mode 100644
+index 00000000000..54086205db6
+--- /dev/null
++++ b/include/configs/total_compute.h
+@@ -0,0 +1,77 @@
++/* SPDX-License-Identifier: GPL-2.0+ */
++/*
++ * Configuration for Total Compute. Parts were derived from other ARM
++ * configurations.
++ * (C) Copyright 2020 ARM Limited
++ * Usama Arif <usama.arif@arm.com>
++ */
++
++#ifndef __TOTAL_COMPUTE_H
++#define __TOTAL_COMPUTE_H
++
++#define CONFIG_REMAKE_ELF
++
++/* Link Definitions */
++#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
++#define CONFIG_ENV_SIZE	0x10000
++
++
++#define CONFIG_SYS_BOOTM_LEN (64 << 20)
++
++#define UART0_BASE			0x7ff80000
++
++/* Generic Timer Definitions */
++#define COUNTER_FREQUENCY		(0x1800000)	/* 24MHz */
++
++/* Generic Interrupt Controller Definitions */
++
++#define GICD_BASE			(0x2C010000)
++#define GICC_BASE			(0x2C02f000)
++
++/* Size of malloc() pool */
++#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (8 << 20))
++
++/* PL011 Serial Configuration */
++#define CONFIG_PL011_CLOCK		7372800
++
++/* BOOTP options */
++#define CONFIG_BOOTP_BOOTFILESIZE
++
++/* Miscellaneous configurable options */
++#define CONFIG_SYS_LOAD_ADDR		0x90000000
++
++/* Physical Memory Map */
++#define PHYS_SDRAM_1			0x80000000
++/* Top 32MB reserved for secure world use */
++#define DRAM_SEC_SIZE		0x02000000
++#define PHYS_SDRAM_1_SIZE	0x80000000 - DRAM_SEC_SIZE
++#define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
++
++/* Enable memtest */
++#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_1
++#define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)
++
++#define CONFIG_EXTRA_ENV_SETTINGS	\
++				"kernel_addr_r=0x80080000\0"	\
++				"initrd_addr_r=0x88000000\0"	\
++				"fdt_addr_r=0x83000000\0"	\
++				"fdt_high=0xffffffffffffffff\0"	\
++				"initrd_high=0xffffffffffffffff\0"
++
++#define CONFIG_BOOTCOMMAND	"booti ${kernel_addr_r} ${initrd_addr_r} ${fdt_addr_r}"
++
++/* Monitor Command Prompt */
++#define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
++#define CONFIG_SYS_MAXARGS		64	/* max command args */
++
++#define CONFIG_SYS_FLASH_BASE		0x0C000000
++/* 256 x 256KiB sectors */
++#define CONFIG_SYS_MAX_FLASH_SECT	256
++
++#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_32BIT
++#define CONFIG_SYS_MAX_FLASH_BANKS	1
++
++#define CONFIG_SYS_FLASH_EMPTY_INFO	/* flinfo indicates empty blocks */
++#define FLASH_MAX_SECTOR_SIZE		0x00040000
++
++#endif /* __TOTAL_COMPUTE_H */
+-- 
+2.17.1
+

meta-arm-bsp/recipes-bsp/u-boot/u-boot-tc0.inc

@@ -0,0 +1,3 @@
+# TC0 specific Das U-Boot configuration and patch
+
+SRC_URI_append = ' file://0001-Add-support-for-Total-Compute.patch'

meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend

@@ -5,4 +5,8 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/files/${MACHINE}:"
 SRC_URI_append_a5ds = " file://0001-armv7-add-mmio-timer.patch \
                     file://0002-board-arm-add-designstart-cortex-a5-board.patch"
 
+MACHINE_UBOOT_REQUIRE ?= ""
 
+MACHINE_UBOOT_REQUIRE_tc0 = "u-boot-tc0.inc"
+
+require ${MACHINE_UBOOT_REQUIRE}

meta-arm-bsp/recipes-bsp/uefi/edk2-firmware-n1sdp.inc

@@ -0,0 +1,19 @@
+SRC_URI = "\
+    git://git.linaro.org/landing-teams/working/arm/edk2.git;name=edk2;destsuffix=git/edk2;nobranch=1 \
+    git://git.linaro.org/landing-teams/working/arm/edk2-platforms.git;name=edk2-platforms;destsuffix=git/edk2/edk2-platforms;nobranch=1 \
+"
+
+# TAGS and commit ID as per N1SDP-2020.03.26 release
+SRCREV_edk2           = "3ff8a6bffabad761279817252014d59b6069d68a"
+SRCREV_edk2-platforms = "b6bfc4417ff13168d69c4cbf2338f62c89c82dfd"
+
+# N1SDP specific EDK2 configurations
+EDK2_BUILD_RELEASE = "0"
+EDK2_PLATFORM      = "n1sdp"
+EDK2_PLATFORM_DSC  = "N1SdpPkg/N1SdpPlatform.dsc"
+EDK2_BIN_NAME      = "BL33_AP_UEFI.fd"
+EDK2_ARCH          = "AARCH64"
+
+COMPATIBLE_MACHINE = "n1sdp"
+
+PV = "201908+git${SRCPV}"

meta-arm-bsp/recipes-bsp/uefi/edk2-firmware_git.bbappend

@@ -0,0 +1,7 @@
+# Include machine specific configurations for UEFI EDK2
+
+MACHINE_EDK2_REQUIRE ?= ""
+
+MACHINE_EDK2_REQUIRE_n1sdp = "edk2-firmware-n1sdp.inc"
+
+require ${MACHINE_EDK2_REQUIRE}

meta-arm-bsp/recipes-core/init-ifupdown/init-ifupdown_1.0.bbappend

@@ -3,5 +3,6 @@
 #
 # Enable second network interface on startup
 #
+PACKAGE_ARCH = "${MACHINE_ARCH}"
 
-FILESEXTRAPATHS_prepend_juno := "${THISDIR}/files/juno:"
+FILESEXTRAPATHS_prepend := "${THISDIR}/files:"

meta-arm-bsp/recipes-devtools/gem5/gem5-aarch64-bootloader.inc

@@ -5,10 +5,12 @@ LICENSE = "BSD"
 
 inherit deploy
 
-PROVIDES = "virtual/gem5-bootloader"
+PROVIDES += "virtual/gem5-bootloader"
 
 COMPATIBLE_MACHINE = "gem5-arm64"
 
+BOOTLOADER_SRC_PATH ?= "${S}/system/arm/bootloader/arm64"
+
 # no configure step
 do_configure[noexec] = "1"
 
@@ -16,11 +18,11 @@ do_configure[noexec] = "1"
 do_install[noexec] = "1"
 
 do_compile() {
-    oe_runmake -C system/arm/aarch64_bootloader all CROSS_COMPILE=${TARGET_PREFIX}
+    oe_runmake -C ${BOOTLOADER_SRC_PATH} all CROSS_COMPILE=${TARGET_PREFIX}
 }
 
 do_deploy() {
-    oe_runmake -C system/arm/aarch64_bootloader install \
+    oe_runmake -C ${BOOTLOADER_SRC_PATH} install \
         CROSS_COMPILE=${TARGET_PREFIX} DESTDIR=${DEPLOYDIR}/binaries
 }
 

meta-arm-bsp/recipes-devtools/gem5/gem5-aarch64-bootloader_20.bb

@@ -3,16 +3,14 @@
 LIC_FILES_CHKSUM = "file://COPYING;md5=2d9514d69d8abf88b6e9125e759bf0ab \
                     file://LICENSE;md5=a585e2893cee63d16a1d8bc16c6297ec"
 
-# The recipe is currently using a version in the release staging branch of gem5
-# until version 20 is released
-SRC_URI = "git://gem5.googlesource.com/public/gem5;protocol=https;branch=release-staging-v20.0.0.0"
+SRC_URI = "git://gem5.googlesource.com/public/gem5;protocol=https;nobranch=1"
+RELEASE_TAG = "v20.0.0.1"
+SRCREV = "332a9de33db603e0aefedae1e05134db4257ea3e"
 
-PV = "git${SRCPV}"
+PV = "${RELEASE_TAG}"
 
 S = "${WORKDIR}/git"
 
-SRCREV = "0bc5d77ed27e0765953d93c2376a4b4aea675a01"
-
 BPN = "gem5-aarch64-bootloader"
 
 require gem5-aarch64-bootloader.inc

meta-arm-bsp/recipes-devtools/gem5/gem5-aarch64-native/0001-scons-Add-MARSHAL_XXFLAGS_EXTRA-for-the-marshal-object.patch

@@ -0,0 +1,85 @@
+From 1303d0497bad151f9389ee30c37dc5f9fe325f6e Mon Sep 17 00:00:00 2001
+From: Giacomo Travaglini <giacomo.travaglini@arm.com>
+Date: Thu, 04 Jun 2020 12:45:52 +0100
+Subject: [PATCH] scons: Add MARSHAL_XXFLAGS_EXTRA for the marshal object
+
+We already provide to the user the CCFLAGS_EXTRA, LDFLAGS_EXTRA
+variables to pass flags to scons when compiling/linking gem5.
+Those variables are not passed to the marshal object.
+We add an extra pair:
+
+MARSHAL_CCFLAGS_EXTRA, MARSHAL_LDFLAGS_EXTRA
+
+to add flag injection capabilities to the marshal object.
+
+The patch is also renaming base_py_env to marshal_env.
+This happens for 2 reasons:
+
+1) At the moment the marshal compilation is the only task
+making use of the base python environment.
+
+2) Consistency with the EXTRA variable names added with this patch.
+I could have named them as BASE_XXFLAGS_EXTRA, but it seems too much
+generic and users might be confused by that, as they might think
+the BASE_XXFLAGS_EXTRA is a subset of the XXFLAGS_EXTRA so that
+setting it will affect gem5 compilation as well.
+
+Change-Id: I3e420caa897059455ff8f35462db2b38da050e93
+Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
+---
+
+diff --git a/SConstruct b/SConstruct
+index 3a03af4..5a66bba 100755
+--- a/SConstruct
++++ b/SConstruct
+@@ -276,6 +276,8 @@
+     ('CXX', 'C++ compiler', environ.get('CXX', main['CXX'])),
+     ('CCFLAGS_EXTRA', 'Extra C and C++ compiler flags', ''),
+     ('LDFLAGS_EXTRA', 'Extra linker flags', ''),
++    ('MARSHAL_CCFLAGS_EXTRA', 'Extra C and C++ marshal compiler flags', ''),
++    ('MARSHAL_LDFLAGS_EXTRA', 'Extra marshal linker flags', ''),
+     ('PYTHON_CONFIG', 'Python config binary to use',
+      [ 'python2.7-config', 'python-config', 'python3-config' ]),
+     ('PROTOC', 'protoc tool', environ.get('PROTOC', 'protoc')),
+@@ -734,7 +736,9 @@
+ 
+ main.Prepend(CPPPATH=Dir('ext/pybind11/include/'))
+ # Bare minimum environment that only includes python
+-base_py_env = main.Clone()
++marshal_env = main.Clone()
++marshal_env.Append(CCFLAGS='$MARSHAL_CCFLAGS_EXTRA')
++marshal_env.Append(LINKFLAGS='$MARSHAL_LDFLAGS_EXTRA')
+ 
+ # On Solaris you need to use libsocket for socket ops
+ if not conf.CheckLibWithHeader(None, 'sys/socket.h', 'C++', 'accept(0,0,0);'):
+@@ -1285,7 +1289,7 @@
+     # to the configured variables.  It returns a list of environments,
+     # one for each variant build (debug, opt, etc.)
+     SConscript('src/SConscript', variant_dir=variant_path,
+-               exports=['env', 'base_py_env'])
++               exports=['env', 'marshal_env'])
+ 
+ # base help text
+ Help('''
+diff --git a/src/SConscript b/src/SConscript
+index 7cd628a..aa233c8 100644
+--- a/src/SConscript
++++ b/src/SConscript
+@@ -1140,7 +1140,7 @@
+ # Build a small helper that marshals the Python code using the same
+ # version of Python as gem5. This is in an unorthodox location to
+ # avoid building it for every variant.
+-py_marshal = base_py_env.Program('marshal', 'python/marshal.cc')[0]
++py_marshal = marshal_env.Program('marshal', 'python/marshal.cc')[0]
+ 
+ # Embed python files.  All .py files that have been indicated by a
+ # PySource() call in a SConscript need to be embedded into the M5
+@@ -1196,7 +1196,7 @@
+     code.write(str(target[0]))
+ 
+ for source in PySource.all:
+-    base_py_env.Command(source.cpp, [ py_marshal, source.tnode ],
++    marshal_env.Command(source.cpp, [ py_marshal, source.tnode ],
+                         MakeAction(embedPyFile, Transform("EMBED PY")))
+     Source(source.cpp, tags=source.tags, add_tags='python')
+ 

meta-arm-bsp/recipes-devtools/gem5/gem5-aarch64-native/0002-arch-arm-Introduce-HavePACExt-helper.patch

@@ -0,0 +1,55 @@
+Upstream-Status: Backport [https://gem5.googlesource.com/public/gem5/+/6d15745532df2dd306ecc15bd0e9f79914be1682]
+Signed-off-by: Diego Sueiro <diego.sueiro@arm.com>
+
+From 6d15745532df2dd306ecc15bd0e9f79914be1682 Mon Sep 17 00:00:00 2001
+From: Giacomo Travaglini <giacomo.travaglini@arm.com>
+Date: Tue, 25 Aug 2020 12:15:17 +0100
+Subject: [PATCH] arch-arm: Introduce HavePACExt helper
+
+This will check for presence of pointer authentication extension.
+According to the reference manual, Pointer authentication is
+implemented if the value of at least one of
+
+ID_AA64ISAR1_EL1.{APA, API, GPA, GPI}
+
+is not 0b0000.
+
+Change-Id: I4e98e65758e8edc953794e5b618d2c6c3f6000ae
+Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
+Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33454
+Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
+Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
+Tested-by: kokoro <noreply+kokoro@google.com>
+---
+
+diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
+index ad0a3da..a189c4a 100644
+--- a/src/arch/arm/utility.cc
++++ b/src/arch/arm/utility.cc
+@@ -315,6 +315,14 @@
+ }
+ 
+ bool
++HavePACExt(ThreadContext *tc)
++{
++    AA64ISAR1 id_aa64isar1 = tc->readMiscReg(MISCREG_ID_AA64ISAR1_EL1);
++    return id_aa64isar1.api | id_aa64isar1.apa |
++        id_aa64isar1.gpi | id_aa64isar1.gpa;
++}
++
++bool
+ HaveVirtHostExt(ThreadContext *tc)
+ {
+     AA64MMFR1 id_aa64mmfr1 = tc->readMiscReg(MISCREG_ID_AA64MMFR1_EL1);
+diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
+index f00f606..f17ebc5 100644
+--- a/src/arch/arm/utility.hh
++++ b/src/arch/arm/utility.hh
+@@ -151,6 +151,7 @@
+     return opModeToEL((OperatingMode) (uint8_t)cpsr.mode);
+ }
+ 
++bool HavePACExt(ThreadContext *tc);
+ bool HaveVirtHostExt(ThreadContext *tc);
+ bool HaveSecureEL2Ext(ThreadContext *tc);
+ bool IsSecureEL2Enabled(ThreadContext *tc);

meta-arm-bsp/recipes-devtools/gem5/gem5-aarch64-native/0003-arch-arm-Check-if-PAC-is-implemented-before-executing-insts.patch

@@ -0,0 +1,174 @@
+Upstream-Status: Backport [https://gem5.googlesource.com/public/gem5/+/b50d61fb9ff5d94f401af98bb0b7f8e25d21d012]
+Signed-off-by: Diego Sueiro <diego.sueiro@arm.com>
+
+From b50d61fb9ff5d94f401af98bb0b7f8e25d21d012 Mon Sep 17 00:00:00 2001
+From: Giacomo Travaglini <giacomo.travaglini@arm.com>
+Date: Tue, 25 Aug 2020 13:10:23 +0100
+Subject: [PATCH] arch-arm: Check if PAC is implemented before executing insts
+
+If Armv8.3-PAuth (PAC) extension is not supported, most instrucions
+will trigger an Undefined Instruction fault; except for a group of
+them living in the HINT space; those should be treated as NOP.
+
+Change-Id: Idec920ed15e0310ec9132a3cb3701cdb7e7cf9d1
+Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
+Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33455
+Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
+Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
+Tested-by: kokoro <noreply+kokoro@google.com>
+---
+
+diff --git a/src/arch/arm/isa/insts/pauth.isa b/src/arch/arm/isa/insts/pauth.isa
+index 4c5b371..4806e6a 100644
+--- a/src/arch/arm/isa/insts/pauth.isa
++++ b/src/arch/arm/isa/insts/pauth.isa
+@@ -1,5 +1,6 @@
+ // -*- mode:c++ -*-
+ 
++// Copyright (c) 2020 ARM Limited
+ // Copyright (c) 2020 Metempsy Technology Consulting
+ // All rights reserved
+ //
+@@ -41,20 +42,39 @@
+     decoder_output = ""
+     exec_output = ""
+ 
++    def pacEnabledCode(hint):
++        if hint:
++            code = """
++                if (!HavePACExt(xc->tcBase())) {
++                    return NoFault;
++                }
++                """
++        else:
++            code = """
++                if (!HavePACExt(xc->tcBase())) {
++                    return std::make_shared<UndefinedInstruction>(
++                        machInst, true);
++                }
++                """
++        return code
+ 
+-    def buildPauthObject(mnem, templateBase, opcode, optArgs=[]):
++    def buildPauthObject(mnem, templateBase, opcode, hint, optArgs=[]):
+         global header_output, decoder_output, exec_output
+-        pac_code = '''//uint64_t val = 0;
+-                uint64_t res;
+-                fault = %(op)s(xc->tcBase(), %(op1)s, %(op2)s, &res);
+-                XDest = res;
+-                '''
++        pac_code = '''
++            %(enabled)s
++
++            uint64_t res;
++            fault = %(op)s(xc->tcBase(), %(op1)s, %(op2)s, &res);
++            XDest = res;
++            '''
+         if templateBase=='DataX2Reg':
+-            code = pac_code % {"op1": 'Op164',
++            code = pac_code % {"enabled": pacEnabledCode(hint),
++                               "op1": 'Op164',
+                                "op2": 'Op264',
+                                "op":  opcode }
+         else:
+-            code = pac_code % {"op1": 'XDest',
++            code = pac_code % {"enabled": pacEnabledCode(hint),
++                               "op1": 'XDest',
+                                "op2": 'Op164',
+                                "op":  opcode }
+ 
+@@ -63,13 +83,15 @@
+         decoder_output += eval(templateBase + "Constructor").subst(iop)
+         exec_output += BasicExecute.subst(iop)
+ 
+-    def buildXPauthObject(mnem, optArgs=[]):
++    def buildXPauthObject(mnem, hint, optArgs=[]):
+         global header_output, decoder_output, exec_output
+         templateBase = "XPauthOpRegReg"
+ 
+-        code =  'uint64_t res;\n'\
+-                'fault = stripPAC(xc->tcBase(), XDest, data, &res);\n'
+-        code += 'XDest = res;'
++        code = pacEnabledCode(hint) + """
++            uint64_t res;
++            fault = stripPAC(xc->tcBase(), XDest, data, &res);
++            XDest = res;
++            """
+         regoptype = 'RegOp'
+ 
+         iop = InstObjParams(mnem, mnem, regoptype, code, optArgs)
+@@ -78,42 +100,42 @@
+         exec_output += BasicExecute.subst(iop)
+ 
+ 
+-    buildPauthObject("Pacda",  "DataX1Reg", 'addPACDA')
+-    buildPauthObject("Pacdza", "DataX1Reg", 'addPACDA')
+-    buildPauthObject("Pacdb",  "DataX1Reg", 'addPACDB')
+-    buildPauthObject("Pacdzb", "DataX1Reg", 'addPACDB')
+-    buildPauthObject("Pacga",  "DataX2Reg", 'addPACGA')
++    buildPauthObject("Pacda",  "DataX1Reg", 'addPACDA', hint=False)
++    buildPauthObject("Pacdza", "DataX1Reg", 'addPACDA', hint=False)
++    buildPauthObject("Pacdb",  "DataX1Reg", 'addPACDB', hint=False)
++    buildPauthObject("Pacdzb", "DataX1Reg", 'addPACDB', hint=False)
++    buildPauthObject("Pacga",  "DataX2Reg", 'addPACGA', hint=False)
+ 
+-    buildPauthObject("Pacia",     "DataX1Reg", 'addPACIA')
+-    buildPauthObject("Pacia1716", "DataX1Reg", 'addPACIA')
+-    buildPauthObject("Paciasp",   "DataX1Reg", 'addPACIA')
+-    buildPauthObject("Paciaz",    "DataX1Reg", 'addPACIA')
+-    buildPauthObject("Paciza",    "DataX1Reg", 'addPACIA')
++    buildPauthObject("Pacia",     "DataX1Reg", 'addPACIA', hint=False)
++    buildPauthObject("Pacia1716", "DataX1Reg", 'addPACIA', hint=True)
++    buildPauthObject("Paciasp",   "DataX1Reg", 'addPACIA', hint=True)
++    buildPauthObject("Paciaz",    "DataX1Reg", 'addPACIA', hint=True)
++    buildPauthObject("Paciza",    "DataX1Reg", 'addPACIA', hint=False)
+ 
+-    buildPauthObject("Pacib",     "DataX1Reg", 'addPACIB')
+-    buildPauthObject("Pacib1716", "DataX1Reg", 'addPACIB')
+-    buildPauthObject("Pacibsp",   "DataX1Reg", 'addPACIB')
+-    buildPauthObject("Pacibz",    "DataX1Reg", 'addPACIB')
+-    buildPauthObject("Pacizb",    "DataX1Reg", 'addPACIB')
++    buildPauthObject("Pacib",     "DataX1Reg", 'addPACIB', hint=False)
++    buildPauthObject("Pacib1716", "DataX1Reg", 'addPACIB', hint=True)
++    buildPauthObject("Pacibsp",   "DataX1Reg", 'addPACIB', hint=True)
++    buildPauthObject("Pacibz",    "DataX1Reg", 'addPACIB', hint=True)
++    buildPauthObject("Pacizb",    "DataX1Reg", 'addPACIB', hint=False)
+ 
+-    buildPauthObject("Autda",     "DataX1Reg", 'authDA')
+-    buildPauthObject("Autdza",    "DataX1Reg", 'authDA')
+-    buildPauthObject("Autdb",     "DataX1Reg", 'authDB')
+-    buildPauthObject("Autdzb",    "DataX1Reg", 'authDB')
++    buildPauthObject("Autda",     "DataX1Reg", 'authDA', hint=False)
++    buildPauthObject("Autdza",    "DataX1Reg", 'authDA', hint=False)
++    buildPauthObject("Autdb",     "DataX1Reg", 'authDB', hint=False)
++    buildPauthObject("Autdzb",    "DataX1Reg", 'authDB', hint=False)
+ 
+-    buildPauthObject("Autia",     "DataX1Reg", 'authIA')
+-    buildPauthObject("Autia1716", "DataX1Reg", 'authIA')
+-    buildPauthObject("Autiasp",   "DataX1Reg", 'authIA')
+-    buildPauthObject("Autiaz",    "DataX1Reg", 'authIA')
+-    buildPauthObject("Autiza",    "DataX1Reg", 'authIA')
++    buildPauthObject("Autia",     "DataX1Reg", 'authIA', hint=False)
++    buildPauthObject("Autia1716", "DataX1Reg", 'authIA', hint=True)
++    buildPauthObject("Autiasp",   "DataX1Reg", 'authIA', hint=True)
++    buildPauthObject("Autiaz",    "DataX1Reg", 'authIA', hint=True)
++    buildPauthObject("Autiza",    "DataX1Reg", 'authIA', hint=False)
+ 
+-    buildPauthObject("Autib",     "DataX1Reg", 'authIB')
+-    buildPauthObject("Autib1716", "DataX1Reg", 'authIB')
+-    buildPauthObject("Autibsp",   "DataX1Reg", 'authIB')
+-    buildPauthObject("Autibz",    "DataX1Reg", 'authIB')
+-    buildPauthObject("Autizb",    "DataX1Reg", 'authIB')
++    buildPauthObject("Autib",     "DataX1Reg", 'authIB', hint=False)
++    buildPauthObject("Autib1716", "DataX1Reg", 'authIB', hint=True)
++    buildPauthObject("Autibsp",   "DataX1Reg", 'authIB', hint=True)
++    buildPauthObject("Autibz",    "DataX1Reg", 'authIB', hint=True)
++    buildPauthObject("Autizb",    "DataX1Reg", 'authIB', hint=False)
+ 
+-    buildXPauthObject("Xpacd")
+-    buildXPauthObject("Xpaci")
+-    buildXPauthObject("Xpaclri")
++    buildXPauthObject("Xpacd", hint=False)
++    buildXPauthObject("Xpaci", hint=False)
++    buildXPauthObject("Xpaclri", hint=True)
+ }};

meta-arm-bsp/recipes-devtools/gem5/gem5-aarch64-native_20.bb

@@ -0,0 +1,35 @@
+# gem5 simulator source and checksum information
+
+LIC_FILES_CHKSUM = "file://COPYING;md5=2d9514d69d8abf88b6e9125e759bf0ab \
+                    file://LICENSE;md5=a585e2893cee63d16a1d8bc16c6297ec"
+
+SRC_URI = "git://gem5.googlesource.com/public/gem5;protocol=https;nobranch=1 \
+           file://0001-scons-Add-MARSHAL_XXFLAGS_EXTRA-for-the-marshal-object.patch \
+           file://0002-arch-arm-Introduce-HavePACExt-helper.patch \
+           file://0003-arch-arm-Check-if-PAC-is-implemented-before-executing-insts.patch \
+          "
+RELEASE_TAG = "v20.0.0.1"
+SRCREV = "332a9de33db603e0aefedae1e05134db4257ea3e"
+
+PV = "${RELEASE_TAG}"
+
+S = "${WORKDIR}/git"
+
+BPN = "gem5-aarch64-native"
+
+require gem5-aarch64-native.inc
+require gem5-native.inc
+
+# Get rid of compiler errors when building protobuf
+GEM5_SCONS_ARGS_append = " CCFLAGS_EXTRA='-Wno-error=unused-variable' --verbose"
+
+# Get rid of linker errors and have a faster link process
+GEM5_SCONS_ARGS_append = " LDFLAGS_EXTRA='${BUILD_LDFLAGS}' \
+MARSHAL_LDFLAGS_EXTRA='${BUILD_LDFLAGS}' --force-lto "
+
+do_compile_prepend() {
+    # Gem5 expect to have python in the path (can be python2 or 3)
+    # Create a link named python to python3
+    real=$(which ${PYTHON})
+    ln -snf $real $(dirname $real)/python
+}

meta-arm-bsp/recipes-devtools/gem5/gem5-aarch64-native_git.bb

@@ -1,26 +0,0 @@
-# gem5 simulator source and checksum information
-
-LIC_FILES_CHKSUM = "file://COPYING;md5=2d9514d69d8abf88b6e9125e759bf0ab \
-                    file://LICENSE;md5=a585e2893cee63d16a1d8bc16c6297ec"
-
-# The recipe is currently using a version in the release staging branch of gem5
-# until version 20 is released
-SRC_URI = "git://gem5.googlesource.com/public/gem5;protocol=https;branch=release-staging-v20.0.0.0"
-
-PV = "git${SRCPV}"
-
-S = "${WORKDIR}/git"
-
-SRCREV = "0bc5d77ed27e0765953d93c2376a4b4aea675a01"
-
-BPN = "gem5-aarch64-native"
-
-require gem5-aarch64-native.inc
-require gem5-native.inc
-
-do_compile_prepend() {
-    # Gem5 expect to have python in the path (can be python2 or 3)
-    # Create a link named python to python3
-    real=$(which ${PYTHON})
-    ln -snf $real $(dirname $real)/python
-}

meta-arm-bsp/recipes-devtools/gem5/gem5-native.inc

@@ -30,12 +30,6 @@ DEPENDS += "python3-six-native protobuf-native hdf5-native pkgconfig-native \
 
 EXTRA_OESCONS = "${GEM5_SCONS_ARGS}"
 
-do_compile_prepend() {
-    # We need to use the proper native libraries when executing
-    # compiled applications
-    export LD_LIBRARY_PATH="${STAGING_LIBDIR_NATIVE}"
-}
-
 do_install() {
 
     install -d ${D}${datadir}/gem5

meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/fvp/fvp-timer.cfg

@@ -1,3 +1,4 @@
 # Dual timer module
+CONFIG_COMPILE_TEST=y
 CONFIG_ARM_TIMER_SP804=y
 CONFIG_CLK_SP810=y

meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/gem5-arm64/gem5-arm64-drm.cfg

@@ -1,5 +1,4 @@
 CONFIG_DRM=y
-CONFIG_DRM_ARM=y
 CONFIG_DRM_HDLCD=y
 CONFIG_FB=y
 CONFIG_FB_ARMCLCD=y

meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-pci.cfg

@@ -1,5 +1,6 @@
 CONFIG_PCI=y
 CONFIG_PCI_MSI=y
+CONFIG_PCI_IOV=y
 CONFIG_PCI_REALLOC_ENABLE_AUTO=y
 CONFIG_PCI_PRI=y
 CONFIG_PCI_PASID=y

meta-arm-bsp/recipes-kernel/linux/arm-platforms-kmeta/bsp/arm-platforms/juno/juno-sound.cfg

@@ -2,6 +2,7 @@ CONFIG_SOUND=y
 CONFIG_SND=y
 CONFIG_SND_SEQUENCER=y
 CONFIG_SND_SEQ_DUMMY=y
+CONFIG_SND_OSSEMUL=y
 CONFIG_SND_MIXER_OSS=y
 CONFIG_SND_PCM_OSS=y
 CONFIG_SND_SEQUENCER_OSS=y

meta-arm-bsp/recipes-kernel/linux/files/dts/arm/fvp-base-gicv3-psci-common-custom.dtsi

@@ -1,264 +0,0 @@
-/*
- * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/memreserve/ 0x80000000 0x00010000;
-
-/include/ "rtsm_ve-motherboard-nomap.dtsi"
-
-/ {
-	model = "FVP Base";
-	compatible = "arm,vfp-base", "arm,vexpress";
-	interrupt-parent = <&gic>;
-	#address-cells = <2>;
-	#size-cells = <2>;
-
-	aliases {
-		serial0 = &v2m_serial0;
-		serial1 = &v2m_serial1;
-		serial2 = &v2m_serial2;
-		serial3 = &v2m_serial3;
-	};
-
-	psci {
-		compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
-		method = "smc";
-		cpu_suspend = <0xc4000001>;
-		cpu_off = <0x84000002>;
-		cpu_on = <0xc4000003>;
-		sys_poweroff = <0x84000008>;
-		sys_reset = <0x84000009>;
-	};
-
-	cpus {
-		#address-cells = <2>;
-		#size-cells = <0>;
-
-		cpu-map {
-			cluster0 {
-				core0 {
-					cpu = <&CPU0>;
-				};
-				core1 {
-					cpu = <&CPU1>;
-				};
-				core2 {
-					cpu = <&CPU2>;
-				};
-				core3 {
-					cpu = <&CPU3>;
-				};
-			};
-
-			cluster1 {
-				core0 {
-					cpu = <&CPU4>;
-				};
-				core1 {
-					cpu = <&CPU5>;
-				};
-				core2 {
-					cpu = <&CPU6>;
-				};
-				core3 {
-					cpu = <&CPU7>;
-				};
-			};
-		};
-
-		idle-states {
-			entry-method = "arm,psci";
-
-			CPU_SLEEP_0: cpu-sleep-0 {
-				compatible = "arm,idle-state";
-				local-timer-stop;
-				arm,psci-suspend-param = <0x0010000>;
-				entry-latency-us = <40>;
-				exit-latency-us = <100>;
-				min-residency-us = <150>;
-			};
-
-			CLUSTER_SLEEP_0: cluster-sleep-0 {
-				compatible = "arm,idle-state";
-				local-timer-stop;
-				arm,psci-suspend-param = <0x1010000>;
-				entry-latency-us = <500>;
-				exit-latency-us = <1000>;
-				min-residency-us = <2500>;
-			};
-		};
-
-		CPU0:cpu@0 {
-			device_type = "cpu";
-			compatible = "arm,armv8";
-			reg = <0x0 0x0>;
-			enable-method = "psci";
-			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
-			next-level-cache = <&L2_0>;
-		};
-
-		CPU1:cpu@1 {
-			device_type = "cpu";
-			compatible = "arm,armv8";
-			reg = <0x0 0x1>;
-			enable-method = "psci";
-			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
-			next-level-cache = <&L2_0>;
-		};
-
-		CPU2:cpu@2 {
-			device_type = "cpu";
-			compatible = "arm,armv8";
-			reg = <0x0 0x2>;
-			enable-method = "psci";
-			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
-			next-level-cache = <&L2_0>;
-		};
-
-		CPU3:cpu@3 {
-			device_type = "cpu";
-			compatible = "arm,armv8";
-			reg = <0x0 0x3>;
-			enable-method = "psci";
-			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
-			next-level-cache = <&L2_0>;
-		};
-
-		CPU4:cpu@100 {
-			device_type = "cpu";
-			compatible = "arm,armv8";
-			reg = <0x0 0x100>;
-			enable-method = "psci";
-			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
-			next-level-cache = <&L2_0>;
-		};
-
-		CPU5:cpu@101 {
-			device_type = "cpu";
-			compatible = "arm,armv8";
-			reg = <0x0 0x101>;
-			enable-method = "psci";
-			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
-			next-level-cache = <&L2_0>;
-		};
-
-		CPU6:cpu@102 {
-			device_type = "cpu";
-			compatible = "arm,armv8";
-			reg = <0x0 0x102>;
-			enable-method = "psci";
-			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
-			next-level-cache = <&L2_0>;
-		};
-
-		CPU7:cpu@103 {
-			device_type = "cpu";
-			compatible = "arm,armv8";
-			reg = <0x0 0x103>;
-			enable-method = "psci";
-			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
-			next-level-cache = <&L2_0>;
-		};
-
-		L2_0: l2-cache0 {
-			compatible = "cache";
-		};
-	};
-
-	memory@80000000 {
-		device_type = "memory";
-		reg = <0x00000000 0x80000000 0 0x7F000000>,
-		      <0x00000008 0x80000000 0 0x80000000>;
-	};
-
-	gic: interrupt-controller@2f000000 {
-		compatible = "arm,gic-v3";
-		#interrupt-cells = <3>;
-		#address-cells = <2>;
-		#size-cells = <2>;
-		ranges;
-		interrupt-controller;
-		reg = <0x0 0x2f000000 0 0x10000>,	// GICD
-		      <0x0 0x2f100000 0 0x200000>,	// GICR
-		      <0x0 0x2c000000 0 0x2000>,	// GICC
-		      <0x0 0x2c010000 0 0x2000>,	// GICH
-		      <0x0 0x2c02f000 0 0x2000>;	// GICV
-		interrupts = <1 9 4>;
-
-		its: its@2f020000 {
-			compatible = "arm,gic-v3-its";
-			msi-controller;
-			reg = <0x0 0x2f020000 0x0 0x20000>; // GITS
-		};
-	};
-
-	timer {
-		compatible = "arm,armv8-timer";
-		interrupts = <1 13 0xff01>,
-			     <1 14 0xff01>,
-			     <1 11 0xff01>,
-			     <1 10 0xff01>;
-		clock-frequency = <100000000>;
-	};
-
-	timer@2a810000 {
-			compatible = "arm,armv7-timer-mem";
-			reg = <0x0 0x2a810000 0x0 0x10000>;
-			clock-frequency = <100000000>;
-			#address-cells = <2>;
-			#size-cells = <2>;
-			ranges;
-			frame@2a830000 {
-				frame-number = <1>;
-				interrupts = <0 26 4>;
-				reg = <0x0 0x2a830000 0x0 0x10000>;
-			};
-	};
-
-	pmu {
-		compatible = "arm,armv8-pmuv3";
-		interrupts = <0 60 4>,
-			     <0 61 4>,
-			     <0 62 4>,
-			     <0 63 4>;
-	};
-
-	smb@8000000 {
-		compatible = "simple-bus";
-
-		#address-cells = <2>;
-		#size-cells = <1>;
-		ranges = <0 0 0 0x08000000 0x04000000>,
-			 <1 0 0 0x14000000 0x04000000>,
-			 <2 0 0 0x18000000 0x04000000>,
-			 <3 0 0 0x1c000000 0x04000000>,
-			 <4 0 0 0x0c000000 0x04000000>,
-			 <5 0 0 0x10000000 0x04000000>;
-	};
-
-	panels {
-		panel {
-			compatible	= "panel";
-			mode		= "XVGA";
-			refresh		= <60>;
-			xres		= <1024>;
-			yres		= <768>;
-			pixclock	= <15748>;
-			left_margin	= <152>;
-			right_margin	= <48>;
-			upper_margin	= <23>;
-			lower_margin	= <3>;
-			hsync_len	= <104>;
-			vsync_len	= <4>;
-			sync		= <0>;
-			vmode		= "FB_VMODE_NONINTERLACED";
-			tim2		= "TIM2_BCD", "TIM2_IPC";
-			cntl		= "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)";
-			caps		= "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888";
-			bpp		= <16>;
-		};
-	};
-
-};

meta-arm-bsp/recipes-kernel/linux/files/dts/arm/fvp-base-gicv3-psci-custom.dts

@@ -1,9 +0,0 @@
-/*
- * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/dts-v1/;
-
-/include/ "fvp-base-gicv3-psci-common-custom.dtsi"

meta-arm-bsp/recipes-kernel/linux/files/dts/arm/rtsm_ve-motherboard-nomap.dtsi

@@ -1,282 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * ARM Ltd. Fast Models
- *
- * Versatile Express (VE) system model
- * Motherboard component
- *
- * VEMotherBoard.lisa
- *
- * This is a duplicate of rtsm_ve-motherboard.dtsi but not
- * using interrupt-map as this is not properly supported in
- * xen right now
- */
-/ {
-	smb@8000000 {
-		motherboard {
-			arm,v2m-memory-map = "rs1";
-			compatible = "arm,vexpress,v2m-p1", "simple-bus";
-			#address-cells = <2>; /* SMB chipselect number and offset */
-			#size-cells = <1>;
-			ranges;
-
-			flash@0,00000000 {
-				compatible = "arm,vexpress-flash", "cfi-flash";
-				reg = <0 0x00000000 0x04000000>,
-				      <4 0x00000000 0x04000000>;
-				bank-width = <4>;
-			};
-
-			v2m_video_ram: vram@2,00000000 {
-				compatible = "arm,vexpress-vram";
-				reg = <2 0x00000000 0x00800000>;
-			};
-
-			ethernet@2,02000000 {
-				compatible = "smsc,lan91c111";
-				reg = <2 0x02000000 0x10000>;
-				interrupts = <0 15 4>;
-			};
-
-			v2m_clk24mhz: clk24mhz {
-				compatible = "fixed-clock";
-				#clock-cells = <0>;
-				clock-frequency = <24000000>;
-				clock-output-names = "v2m:clk24mhz";
-			};
-
-			v2m_refclk1mhz: refclk1mhz {
-				compatible = "fixed-clock";
-				#clock-cells = <0>;
-				clock-frequency = <1000000>;
-				clock-output-names = "v2m:refclk1mhz";
-			};
-
-			v2m_refclk32khz: refclk32khz {
-				compatible = "fixed-clock";
-				#clock-cells = <0>;
-				clock-frequency = <32768>;
-				clock-output-names = "v2m:refclk32khz";
-			};
-
-			iofpga@3,00000000 {
-				compatible = "simple-bus";
-				#address-cells = <1>;
-				#size-cells = <1>;
-				ranges = <0 3 0 0x200000>;
-
-				v2m_sysreg: sysreg@10000 {
-					compatible = "arm,vexpress-sysreg";
-					reg = <0x010000 0x1000>;
-					gpio-controller;
-					#gpio-cells = <2>;
-				};
-
-				v2m_sysctl: sysctl@20000 {
-					compatible = "arm,sp810", "arm,primecell";
-					reg = <0x020000 0x1000>;
-					clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>;
-					clock-names = "refclk", "timclk", "apb_pclk";
-					#clock-cells = <1>;
-					clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
-					assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
-					assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
-				};
-
-				aaci@40000 {
-					compatible = "arm,pl041", "arm,primecell";
-					reg = <0x040000 0x1000>;
-					interrupts = <0 11 4>;
-					clocks = <&v2m_clk24mhz>;
-					clock-names = "apb_pclk";
-				};
-
-				mmci@50000 {
-					compatible = "arm,pl180", "arm,primecell";
-					reg = <0x050000 0x1000>;
-					interrupts = <0 9 4 0 10 4>;
-					cd-gpios = <&v2m_sysreg 0 0>;
-					wp-gpios = <&v2m_sysreg 1 0>;
-					max-frequency = <12000000>;
-					vmmc-supply = <&v2m_fixed_3v3>;
-					clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-					clock-names = "mclk", "apb_pclk";
-				};
-
-				kmi@60000 {
-					compatible = "arm,pl050", "arm,primecell";
-					reg = <0x060000 0x1000>;
-					interrupts = <0 12 4>;
-					clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-					clock-names = "KMIREFCLK", "apb_pclk";
-				};
-
-				kmi@70000 {
-					compatible = "arm,pl050", "arm,primecell";
-					reg = <0x070000 0x1000>;
-					interrupts = <0 13 4>;
-					clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-					clock-names = "KMIREFCLK", "apb_pclk";
-				};
-
-				v2m_serial0: uart@90000 {
-					compatible = "arm,pl011", "arm,primecell";
-					reg = <0x090000 0x1000>;
-					interrupts = <0 5 4>;
-					clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-					clock-names = "uartclk", "apb_pclk";
-				};
-
-				v2m_serial1: uart@a0000 {
-					compatible = "arm,pl011", "arm,primecell";
-					reg = <0x0a0000 0x1000>;
-					interrupts = <0 6 4>;
-					clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-					clock-names = "uartclk", "apb_pclk";
-				};
-
-				v2m_serial2: uart@b0000 {
-					compatible = "arm,pl011", "arm,primecell";
-					reg = <0x0b0000 0x1000>;
-					interrupts = <0 7 4>;
-					clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-					clock-names = "uartclk", "apb_pclk";
-				};
-
-				v2m_serial3: uart@c0000 {
-					compatible = "arm,pl011", "arm,primecell";
-					reg = <0x0c0000 0x1000>;
-					interrupts = <0 8 4>;
-					clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-					clock-names = "uartclk", "apb_pclk";
-				};
-
-				wdt@f0000 {
-					compatible = "arm,sp805", "arm,primecell";
-					reg = <0x0f0000 0x1000>;
-					interrupts = <0 0 4>;
-					clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>;
-					clock-names = "wdogclk", "apb_pclk";
-				};
-
-				v2m_timer01: timer@110000 {
-					compatible = "arm,sp804", "arm,primecell";
-					reg = <0x110000 0x1000>;
-					interrupts = <0 2 4>;
-					clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>;
-					clock-names = "timclken1", "timclken2", "apb_pclk";
-				};
-
-				v2m_timer23: timer@120000 {
-					compatible = "arm,sp804", "arm,primecell";
-					reg = <0x120000 0x1000>;
-					interrupts = <0 3 4>;
-					clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>;
-					clock-names = "timclken1", "timclken2", "apb_pclk";
-				};
-
-				rtc@170000 {
-					compatible = "arm,pl031", "arm,primecell";
-					reg = <0x170000 0x1000>;
-					interrupts = <0 4 4>;
-					clocks = <&v2m_clk24mhz>;
-					clock-names = "apb_pclk";
-				};
-
-				clcd@1f0000 {
-					compatible = "arm,pl111", "arm,primecell";
-					reg = <0x1f0000 0x1000>;
-					interrupt-names = "combined";
-					interrupts = <0 14 4>;
-					clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>;
-					clock-names = "clcdclk", "apb_pclk";
-					arm,pl11x,framebuffer = <0x18000000 0x00180000>;
-					memory-region = <&v2m_video_ram>;
-					max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */
-
-					port {
-						v2m_clcd_pads: endpoint {
-							remote-endpoint = <&v2m_clcd_panel>;
-							arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
-						};
-					};
-
-					panel {
-						compatible = "panel-dpi";
-
-						port {
-							v2m_clcd_panel: endpoint {
-								remote-endpoint = <&v2m_clcd_pads>;
-							};
-						};
-
-						panel-timing {
-							clock-frequency = <63500127>;
-							hactive = <1024>;
-							hback-porch = <152>;
-							hfront-porch = <48>;
-							hsync-len = <104>;
-							vactive = <768>;
-							vback-porch = <23>;
-							vfront-porch = <3>;
-							vsync-len = <4>;
-						};
-					};
-				};
-
-				virtio-block@130000 {
-					compatible = "virtio,mmio";
-					reg = <0x130000 0x200>;
-					interrupts = <0 42 4>;
-				};
-			};
-
-			v2m_fixed_3v3: v2m-3v3 {
-				compatible = "regulator-fixed";
-				regulator-name = "3V3";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-always-on;
-			};
-
-			mcc {
-				compatible = "arm,vexpress,config-bus";
-				arm,vexpress,config-bridge = <&v2m_sysreg>;
-
-				v2m_oscclk1: oscclk1 {
-					/* CLCD clock */
-					compatible = "arm,vexpress-osc";
-					arm,vexpress-sysreg,func = <1 1>;
-					freq-range = <23750000 63500000>;
-					#clock-cells = <0>;
-					clock-output-names = "v2m:oscclk1";
-				};
-
-				reset {
-					compatible = "arm,vexpress-reset";
-					arm,vexpress-sysreg,func = <5 0>;
-				};
-
-				muxfpga {
-					compatible = "arm,vexpress-muxfpga";
-					arm,vexpress-sysreg,func = <7 0>;
-				};
-
-				shutdown {
-					compatible = "arm,vexpress-shutdown";
-					arm,vexpress-sysreg,func = <8 0>;
-				};
-
-				reboot {
-					compatible = "arm,vexpress-reboot";
-					arm,vexpress-sysreg,func = <9 0>;
-				};
-
-				dvimode {
-					compatible = "arm,vexpress-dvimode";
-					arm,vexpress-sysreg,func = <11 0>;
-				};
-			};
-		};
-	};
-};

meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_1cpu.dts

@@ -1,95 +0,0 @@
-/*
- * Copyright (c) 2015-2016 ARM Limited
- * All rights reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Andreas Sandberg
- */
-
-/dts-v1/;
-
-/memreserve/ 0x80000000 0x00010000;
-
-/include/ "vexpress_gem5_v2.dtsi"
-
-/ {
-	model = "V2P-AARCH64";
-	compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
-
-	memory@80000000 {
-		device_type = "memory";
-		reg = <0 0x80000000 0x4 0x00000000>;
-	};
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-        cpu@0 {
-            device_type = "cpu";
-            compatible = "gem5,armv8", "arm,armv8";
-            reg = < 0 >;
-            enable-method = "spin-table";
-            cpu-release-addr = <0 0x8000fff8>;
-        };
-
-	};
-
-	virt-encoder {
-		compatible = "drm,virtual-encoder";
-		port {
-			dp0_virt_input: endpoint@0 {
-				remote-endpoint = <&dp0_output>;
-			};
-		};
-
-		display-timings {
-			native-mode = <&timing0>;
-
-			timing0: timing_1080p60 {
-				/* 1920x1080-60 */
-				clock-frequency = <148500000>;
-				hactive = <1920>;
-				vactive = <1080>;
-				hfront-porch = <148>;
-				hback-porch = <88>;
-				hsync-len = <44>;
-				vfront-porch = <36>;
-				vback-porch = <4>;
-				vsync-len = <5>;
-			};
-		};
-	};
-};
-
-&dp0 {
-	status = "ok"
-
-	port {
-		dp0_output: endpoint@0 {
-			remote-endpoint = <&dp0_virt_input>;
-		};
-	};
-};

meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_2cpu.dts

@@ -1,103 +0,0 @@
-/*
- * Copyright (c) 2015-2016 ARM Limited
- * All rights reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Andreas Sandberg
- */
-
-/dts-v1/;
-
-/memreserve/ 0x80000000 0x00010000;
-
-/include/ "vexpress_gem5_v2.dtsi"
-
-/ {
-	model = "V2P-AARCH64";
-	compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
-
-	memory@80000000 {
-		device_type = "memory";
-		reg = <0 0x80000000 0x4 0x00000000>;
-	};
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-        cpu@0 {
-            device_type = "cpu";
-            compatible = "gem5,armv8", "arm,armv8";
-            reg = < 0 >;
-            enable-method = "spin-table";
-            cpu-release-addr = <0 0x8000fff8>;
-        };
-
-        cpu@1 {
-            device_type = "cpu";
-            compatible = "gem5,armv8", "arm,armv8";
-            reg = < 1 >;
-            enable-method = "spin-table";
-            cpu-release-addr = <0 0x8000fff8>;
-        };
-
-	};
-
-	virt-encoder {
-		compatible = "drm,virtual-encoder";
-		port {
-			dp0_virt_input: endpoint@0 {
-				remote-endpoint = <&dp0_output>;
-			};
-		};
-
-		display-timings {
-			native-mode = <&timing0>;
-
-			timing0: timing_1080p60 {
-				/* 1920x1080-60 */
-				clock-frequency = <148500000>;
-				hactive = <1920>;
-				vactive = <1080>;
-				hfront-porch = <148>;
-				hback-porch = <88>;
-				hsync-len = <44>;
-				vfront-porch = <36>;
-				vback-porch = <4>;
-				vsync-len = <5>;
-			};
-		};
-	};
-};
-
-&dp0 {
-	status = "ok"
-
-	port {
-		dp0_output: endpoint@0 {
-			remote-endpoint = <&dp0_virt_input>;
-		};
-	};
-};

meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_4cpu.dts

@@ -1,119 +0,0 @@
-/*
- * Copyright (c) 2015-2016 ARM Limited
- * All rights reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Andreas Sandberg
- */
-
-/dts-v1/;
-
-/memreserve/ 0x80000000 0x00010000;
-
-/include/ "vexpress_gem5_v2.dtsi"
-
-/ {
-	model = "V2P-AARCH64";
-	compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
-
-	memory@80000000 {
-		device_type = "memory";
-		reg = <0 0x80000000 0x4 0x00000000>;
-	};
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-        cpu@0 {
-            device_type = "cpu";
-            compatible = "gem5,armv8", "arm,armv8";
-            reg = < 0 >;
-            enable-method = "spin-table";
-            cpu-release-addr = <0 0x8000fff8>;
-        };
-
-        cpu@1 {
-            device_type = "cpu";
-            compatible = "gem5,armv8", "arm,armv8";
-            reg = < 1 >;
-            enable-method = "spin-table";
-            cpu-release-addr = <0 0x8000fff8>;
-        };
-
-        cpu@2 {
-            device_type = "cpu";
-            compatible = "gem5,armv8", "arm,armv8";
-            reg = < 2 >;
-            enable-method = "spin-table";
-            cpu-release-addr = <0 0x8000fff8>;
-        };
-
-        cpu@3 {
-            device_type = "cpu";
-            compatible = "gem5,armv8", "arm,armv8";
-            reg = < 3 >;
-            enable-method = "spin-table";
-            cpu-release-addr = <0 0x8000fff8>;
-        };
-
-	};
-
-	virt-encoder {
-		compatible = "drm,virtual-encoder";
-		port {
-			dp0_virt_input: endpoint@0 {
-				remote-endpoint = <&dp0_output>;
-			};
-		};
-
-		display-timings {
-			native-mode = <&timing0>;
-
-			timing0: timing_1080p60 {
-				/* 1920x1080-60 */
-				clock-frequency = <148500000>;
-				hactive = <1920>;
-				vactive = <1080>;
-				hfront-porch = <148>;
-				hback-porch = <88>;
-				hsync-len = <44>;
-				vfront-porch = <36>;
-				vback-porch = <4>;
-				vsync-len = <5>;
-			};
-		};
-	};
-};
-
-&dp0 {
-	status = "ok"
-
-	port {
-		dp0_output: endpoint@0 {
-			remote-endpoint = <&dp0_virt_input>;
-		};
-	};
-};

meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_8cpu.dts

@@ -1,151 +0,0 @@
-/*
- * Copyright (c) 2015-2016 ARM Limited
- * All rights reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Andreas Sandberg
- */
-
-/dts-v1/;
-
-/memreserve/ 0x80000000 0x00010000;
-
-/include/ "vexpress_gem5_v2.dtsi"
-
-/ {
-	model = "V2P-AARCH64";
-	compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
-
-	memory@80000000 {
-		device_type = "memory";
-		reg = <0 0x80000000 0x4 0x00000000>;
-	};
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-        cpu@0 {
-            device_type = "cpu";
-            compatible = "gem5,armv8", "arm,armv8";
-            reg = < 0 >;
-            enable-method = "spin-table";
-            cpu-release-addr = <0 0x8000fff8>;
-        };
-
-        cpu@1 {
-            device_type = "cpu";
-            compatible = "gem5,armv8", "arm,armv8";
-            reg = < 1 >;
-            enable-method = "spin-table";
-            cpu-release-addr = <0 0x8000fff8>;
-        };
-
-        cpu@2 {
-            device_type = "cpu";
-            compatible = "gem5,armv8", "arm,armv8";
-            reg = < 2 >;
-            enable-method = "spin-table";
-            cpu-release-addr = <0 0x8000fff8>;
-        };
-
-        cpu@3 {
-            device_type = "cpu";
-            compatible = "gem5,armv8", "arm,armv8";
-            reg = < 3 >;
-            enable-method = "spin-table";
-            cpu-release-addr = <0 0x8000fff8>;
-        };
-
-        cpu@4 {
-            device_type = "cpu";
-            compatible = "gem5,armv8", "arm,armv8";
-            reg = < 4 >;
-            enable-method = "spin-table";
-            cpu-release-addr = <0 0x8000fff8>;
-        };
-
-        cpu@5 {
-            device_type = "cpu";
-            compatible = "gem5,armv8", "arm,armv8";
-            reg = < 5 >;
-            enable-method = "spin-table";
-            cpu-release-addr = <0 0x8000fff8>;
-        };
-
-        cpu@6 {
-            device_type = "cpu";
-            compatible = "gem5,armv8", "arm,armv8";
-            reg = < 6 >;
-            enable-method = "spin-table";
-            cpu-release-addr = <0 0x8000fff8>;
-        };
-
-        cpu@7 {
-            device_type = "cpu";
-            compatible = "gem5,armv8", "arm,armv8";
-            reg = < 7 >;
-            enable-method = "spin-table";
-            cpu-release-addr = <0 0x8000fff8>;
-        };
-
-	};
-
-	virt-encoder {
-		compatible = "drm,virtual-encoder";
-		port {
-			dp0_virt_input: endpoint@0 {
-				remote-endpoint = <&dp0_output>;
-			};
-		};
-
-		display-timings {
-			native-mode = <&timing0>;
-
-			timing0: timing_1080p60 {
-				/* 1920x1080-60 */
-				clock-frequency = <148500000>;
-				hactive = <1920>;
-				vactive = <1080>;
-				hfront-porch = <148>;
-				hback-porch = <88>;
-				hsync-len = <44>;
-				vfront-porch = <36>;
-				vback-porch = <4>;
-				vsync-len = <5>;
-			};
-		};
-	};
-};
-
-&dp0 {
-	status = "ok"
-
-	port {
-		dp0_output: endpoint@0 {
-			remote-endpoint = <&dp0_virt_input>;
-		};
-	};
-};

meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2.dtsi

@@ -1,46 +0,0 @@
-/*
- * Copyright (c) 2015-2018 ARM Limited
- * All rights reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Andreas Sandberg
- */
-
-/include/ "vexpress_gem5_v2_base.dtsi"
-
-/ {
-	/* The display processor needs custom configuration to setup its
-	 * output ports. Disable it by default in the platform until the
-	 * DT bindings have stabilize.
-	 */
-	dp0: hdlcd@2b000000 {
-		compatible = "arm,hdlcd";
-		reg = <0x0 0x2b000000 0x0 0x1000>;
-		interrupts = <0 63 4>;
-		clocks = <&osc_pxl>;
-		clock-names = "pxlclk";
-		status = "disabled";
-	};
-};

meta-arm-bsp/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2_base.dtsi

@@ -1,202 +0,0 @@
-/*
- * Copyright (c) 2015-2017, 2019 ARM Limited
- * All rights reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Andreas Sandberg
- */
-
-/ {
-	arm,hbi = <0x0>;
-	arm,vexpress,site = <0xf>;
-	interrupt-parent = <&gic>;
-	#address-cells = <2>;
-	#size-cells = <2>;
-
-	gic: interrupt-controller@2c000000 {
-		compatible = "arm,gic-v3";
-		#interrupt-cells = <0x3>;
-		#address-cells = <0x2>;
-		ranges;
-		interrupt-controller;
-		redistributor-stride = <0x0 0x40000>; // 256kB stride
-		reg = <0x0 0x2c000000 0x0 0x10000
-		       0x0 0x2c010000 0x0 0x2000000 // room for 128 redistributors using 128K each (256K strided...)
-		       0x0 0x0 0x0 0x0>;
-		interrupts = <1 9 0xf04>;
-		#size-cells = <0x2>;
-		linux,phandle = <0x1>;
-		phandle = <0x1>;
-
-		gic-its@2e010000 {
-			compatible = "arm,gic-v3-its";
-			msi-controller;
-			#msi-cells = <1>;
-			reg = <0x0 0x2e010000 0 0x20000>;
-		};
-	};
-
-	timer {
-		compatible = "arm,cortex-a15-timer",
-			     "arm,armv7-timer";
-		interrupts = <1 13 0xf08>,
-		             <1 14 0xf08>,
-			     <1 11 0xf08>,
-		             <1 10 0xf08>;
-		clocks = <&osc_sys>;
-		clock-names="apb_pclk";
-	};
-
-	pci {
-		compatible = "pci-host-ecam-generic";
-		device_type = "pci";
-		#address-cells = <0x3>;
-		#size-cells = <0x2>;
-		#interrupt-cells = <0x1>;
-
-		reg = <0x0 0x30000000 0x0 0x10000000>;
-
-		ranges = <0x01000000 0x0 0x00000000  0x0 0x2f000000  0x0 0x00010000>,
-		         <0x02000000 0x0 0x40000000  0x0 0x40000000  0x0 0x40000000>;
-
-	/*
-	  child unit address, #cells = #address-cells
-	  child interrupt specifier, #cells = #interrupt-cells (INTA = 1, INTB = 2, INTC = 3 and INTD = 4)
-	  interrupt-parent, phandle
-	  parent unit address, #cells = #address-cells@gic
-	  parent interrupt specifier, #cells = #interrupt-cells@gic
-	*/
-	interrupt-map = <0x0    0x0 0x0  0x1  &gic  0x0 0x0  0x0 0x44 0x1
-		         0x800  0x0 0x0  0x1  &gic  0x0 0x0  0x0 0x45 0x1
-		         0x1000 0x0 0x0  0x1  &gic  0x0 0x0  0x0 0x46 0x1
-		         0x1800 0x0 0x0  0x1  &gic  0x0 0x0  0x0 0x47 0x1>;
-
-	interrupt-map-mask = <0x001800 0x0 0x0 0x0>;
-	dma-coherent;
-	};
-
-	kmi@1c060000 {
-		compatible = "arm,pl050", "arm,primecell";
-		reg = <0x0 0x1c060000 0x0 0x1000>;
-		interrupts = <0 12 4>;
-		clocks = <&v2m_clk24mhz>, <&osc_smb>;
-		clock-names = "KMIREFCLK", "apb_pclk";
-	};
-
-	kmi@1c070000 {
-		compatible = "arm,pl050", "arm,primecell";
-		reg = <0x0 0x1c070000 0x0 0x1000>;
-		interrupts = <0 13 4>;
-		clocks = <&v2m_clk24mhz>, <&osc_smb>;
-		clock-names = "KMIREFCLK", "apb_pclk";
-	};
-
-	uart0: uart@1c090000 {
-		compatible = "arm,pl011", "arm,primecell";
-		reg = <0x0 0x1c090000 0x0 0x1000>;
-		interrupts = <0 5 4>;
-		clocks = <&osc_peripheral>, <&osc_smb>;
-		clock-names = "uartclk", "apb_pclk";
-	};
-
-	rtc@1c170000 {
-		compatible = "arm,pl031", "arm,primecell";
-		reg = <0x0 0x1c170000 0x0 0x1000>;
-		interrupts = <0 4 4>;
-		clocks = <&osc_smb>;
-		clock-names = "apb_pclk";
-	};
-
-	v2m_clk24mhz: clk24mhz {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <24000000>;
-		clock-output-names = "v2m:clk24mhz";
-	};
-
-
-	v2m_sysreg: sysreg@1c010000 {
-		compatible = "arm,vexpress-sysreg";
-		reg = <0 0x1c010000 0x0 0x1000>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	vio@1c130000 {
-		compatible = "virtio,mmio";
-		reg = <0 0x1c130000 0x0 0x1000>;
-		interrupts = <0 42 4>;
-	};
-
-	vio@1c140000 {
-		compatible = "virtio,mmio";
-		reg = <0 0x1c140000 0x0 0x1000>;
-		interrupts = <0 43 4>;
-	};
-
-	dcc {
-		compatible = "arm,vexpress,config-bus";
-		arm,vexpress,config-bridge = <&v2m_sysreg>;
-
-		osc_pxl: osc@5 {
-			compatible = "arm,vexpress-osc";
-			arm,vexpress-sysreg,func = <1 5>;
-			freq-range = <23750000 1000000000>;
-			#clock-cells = <0>;
-			clock-output-names = "oscclk5";
-		};
-
-		osc_smb: osc@6 {
-			compatible = "arm,vexpress-osc";
-			arm,vexpress-sysreg,func = <1 6>;
-			freq-range = <20000000 50000000>;
-			#clock-cells = <0>;
-			clock-output-names = "oscclk6";
-		};
-
-		osc_sys: osc@7 {
-			compatible = "arm,vexpress-osc";
-			arm,vexpress-sysreg,func = <1 7>;
-			freq-range = <20000000 60000000>;
-			#clock-cells = <0>;
-			clock-output-names = "oscclk7";
-		};
-	};
-
-
-	mcc {
-		compatible = "arm,vexpress,config-bus";
-		arm,vexpress,config-bridge = <&v2m_sysreg>;
-		arm,vexpress,site = <0>;
-
-		osc_peripheral: osc@2 {
-			compatible = "arm,vexpress-osc";
-			arm,vexpress-sysreg,func = <1 2>;
-			freq-range = <24000000 24000000>;
-			#clock-cells = <0>;
-			clock-output-names = "v2m:oscclk2";
-		};
-	};
-};

meta-arm-bsp/recipes-kernel/linux/files/fvp-base-dts.patch

@@ -0,0 +1,578 @@
+Add DTS files which are not yet upstream. In the future these will be provided by TF-A.
+
+Upstream-Status: Inappropriate
+Signed-off-by: Anders Dellien <anders.dellien@arm.com
+
+diff --git a/arch/arm64/boot/dts/arm/fvp-base-gicv3-psci-common-custom.dtsi b/arch/arm64/boot/dts/arm/fvp-base-gicv3-psci-common-custom.dtsi
+new file mode 100644
+index 000000000000..f4601c7f99f8
+--- /dev/null
++++ b/arch/arm64/boot/dts/arm/fvp-base-gicv3-psci-common-custom.dtsi
+@@ -0,0 +1,264 @@
++/*
++ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
++ *
++ * SPDX-License-Identifier: BSD-3-Clause
++ */
++
++/memreserve/ 0x80000000 0x00010000;
++
++/include/ "rtsm_ve-motherboard-nomap.dtsi"
++
++/ {
++       model = "FVP Base";
++       compatible = "arm,vfp-base", "arm,vexpress";
++       interrupt-parent = <&gic>;
++       #address-cells = <2>;
++       #size-cells = <2>;
++
++       aliases {
++               serial0 = &v2m_serial0;
++               serial1 = &v2m_serial1;
++               serial2 = &v2m_serial2;
++               serial3 = &v2m_serial3;
++       };
++
++       psci {
++               compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
++               method = "smc";
++               cpu_suspend = <0xc4000001>;
++               cpu_off = <0x84000002>;
++               cpu_on = <0xc4000003>;
++               sys_poweroff = <0x84000008>;
++               sys_reset = <0x84000009>;
++       };
++
++       cpus {
++               #address-cells = <2>;
++               #size-cells = <0>;
++
++               cpu-map {
++                       cluster0 {
++                               core0 {
++                                       cpu = <&CPU0>;
++                               };
++                               core1 {
++                                       cpu = <&CPU1>;
++                               };
++                               core2 {
++                                       cpu = <&CPU2>;
++                               };
++                               core3 {
++                                       cpu = <&CPU3>;
++                               };
++                       };
++
++                       cluster1 {
++                               core0 {
++                                       cpu = <&CPU4>;
++                               };
++                               core1 {
++                                       cpu = <&CPU5>;
++                               };
++                               core2 {
++                                       cpu = <&CPU6>;
++                               };
++                               core3 {
++                                       cpu = <&CPU7>;
++                               };
++                       };
++               };
++
++               idle-states {
++                       entry-method = "arm,psci";
++
++                       CPU_SLEEP_0: cpu-sleep-0 {
++                               compatible = "arm,idle-state";
++                               local-timer-stop;
++                               arm,psci-suspend-param = <0x0010000>;
++                               entry-latency-us = <40>;
++                               exit-latency-us = <100>;
++                               min-residency-us = <150>;
++                       };
++
++                       CLUSTER_SLEEP_0: cluster-sleep-0 {
++                               compatible = "arm,idle-state";
++                               local-timer-stop;
++                               arm,psci-suspend-param = <0x1010000>;
++                               entry-latency-us = <500>;
++                               exit-latency-us = <1000>;
++                               min-residency-us = <2500>;
++                       };
++               };
++
++               CPU0:cpu@0 {
++                       device_type = "cpu";
++                       compatible = "arm,armv8";
++                       reg = <0x0 0x0>;
++                       enable-method = "psci";
++                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
++                       next-level-cache = <&L2_0>;
++               };
++
++               CPU1:cpu@1 {
++                       device_type = "cpu";
++                       compatible = "arm,armv8";
++                       reg = <0x0 0x1>;
++                       enable-method = "psci";
++                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
++                       next-level-cache = <&L2_0>;
++               };
++
++               CPU2:cpu@2 {
++                       device_type = "cpu";
++                       compatible = "arm,armv8";
++                       reg = <0x0 0x2>;
++                       enable-method = "psci";
++                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
++                       next-level-cache = <&L2_0>;
++               };
++
++               CPU3:cpu@3 {
++                       device_type = "cpu";
++                       compatible = "arm,armv8";
++                       reg = <0x0 0x3>;
++                       enable-method = "psci";
++                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
++                       next-level-cache = <&L2_0>;
++               };
++
++               CPU4:cpu@100 {
++                       device_type = "cpu";
++                       compatible = "arm,armv8";
++                       reg = <0x0 0x100>;
++                       enable-method = "psci";
++                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
++                       next-level-cache = <&L2_0>;
++               };
++
++               CPU5:cpu@101 {
++                       device_type = "cpu";
++                       compatible = "arm,armv8";
++                       reg = <0x0 0x101>;
++                       enable-method = "psci";
++                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
++                       next-level-cache = <&L2_0>;
++               };
++
++               CPU6:cpu@102 {
++                       device_type = "cpu";
++                       compatible = "arm,armv8";
++                       reg = <0x0 0x102>;
++                       enable-method = "psci";
++                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
++                       next-level-cache = <&L2_0>;
++               };
++
++               CPU7:cpu@103 {
++                       device_type = "cpu";
++                       compatible = "arm,armv8";
++                       reg = <0x0 0x103>;
++                       enable-method = "psci";
++                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
++                       next-level-cache = <&L2_0>;
++               };
++
++               L2_0: l2-cache0 {
++                       compatible = "cache";
++               };
++       };
++
++       memory@80000000 {
++               device_type = "memory";
++               reg = <0x00000000 0x80000000 0 0x7F000000>,
++                     <0x00000008 0x80000000 0 0x80000000>;
++       };
++
++       gic: interrupt-controller@2f000000 {
++               compatible = "arm,gic-v3";
++               #interrupt-cells = <3>;
++               #address-cells = <2>;
++               #size-cells = <2>;
++               ranges;
++               interrupt-controller;
++               reg = <0x0 0x2f000000 0 0x10000>,       // GICD
++                     <0x0 0x2f100000 0 0x200000>,      // GICR
++                     <0x0 0x2c000000 0 0x2000>,        // GICC
++                     <0x0 0x2c010000 0 0x2000>,        // GICH
++                     <0x0 0x2c02f000 0 0x2000>;        // GICV
++               interrupts = <1 9 4>;
++
++               its: its@2f020000 {
++                       compatible = "arm,gic-v3-its";
++                       msi-controller;
++                       reg = <0x0 0x2f020000 0x0 0x20000>; // GITS
++               };
++       };
++
++       timer {
++               compatible = "arm,armv8-timer";
++               interrupts = <1 13 0xff01>,
++                            <1 14 0xff01>,
++                            <1 11 0xff01>,
++                            <1 10 0xff01>;
++               clock-frequency = <100000000>;
++       };
++
++       timer@2a810000 {
++                       compatible = "arm,armv7-timer-mem";
++                       reg = <0x0 0x2a810000 0x0 0x10000>;
++                       clock-frequency = <100000000>;
++                       #address-cells = <2>;
++                       #size-cells = <2>;
++                       ranges;
++                       frame@2a830000 {
++                               frame-number = <1>;
++                               interrupts = <0 26 4>;
++                               reg = <0x0 0x2a830000 0x0 0x10000>;
++                       };
++       };
++
++       pmu {
++               compatible = "arm,armv8-pmuv3";
++               interrupts = <0 60 4>,
++                            <0 61 4>,
++                            <0 62 4>,
++                            <0 63 4>;
++       };
++
++       smb@8000000 {
++               compatible = "simple-bus";
++
++               #address-cells = <2>;
++               #size-cells = <1>;
++               ranges = <0 0 0 0x08000000 0x04000000>,
++                        <1 0 0 0x14000000 0x04000000>,
++                        <2 0 0 0x18000000 0x04000000>,
++                        <3 0 0 0x1c000000 0x04000000>,
++                        <4 0 0 0x0c000000 0x04000000>,
++                        <5 0 0 0x10000000 0x04000000>;
++       };
++
++       panels {
++               panel {
++                       compatible      = "panel";
++                       mode            = "XVGA";
++                       refresh         = <60>;
++                       xres            = <1024>;
++                       yres            = <768>;
++                       pixclock        = <15748>;
++                       left_margin     = <152>;
++                       right_margin    = <48>;
++                       upper_margin    = <23>;
++                       lower_margin    = <3>;
++                       hsync_len       = <104>;
++                       vsync_len       = <4>;
++                       sync            = <0>;
++                       vmode           = "FB_VMODE_NONINTERLACED";
++                       tim2            = "TIM2_BCD", "TIM2_IPC";
++                       cntl            = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)";
++                       caps            = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888";
++                       bpp             = <16>;
++               };
++       };
++
++};
+diff --git a/arch/arm64/boot/dts/arm/fvp-base-gicv3-psci-custom.dts b/arch/arm64/boot/dts/arm/fvp-base-gicv3-psci-custom.dts
+new file mode 100644
+index 000000000000..984dbca90126
+--- /dev/null
++++ b/arch/arm64/boot/dts/arm/fvp-base-gicv3-psci-custom.dts
+@@ -0,0 +1,9 @@
++/*
++ * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
++ *
++ * SPDX-License-Identifier: BSD-3-Clause
++ */
++
++/dts-v1/;
++
++/include/ "fvp-base-gicv3-psci-common-custom.dtsi"
+diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-nomap.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-nomap.dtsi
+new file mode 100644
+index 000000000000..a94f7cb863a2
+--- /dev/null
++++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-nomap.dtsi
+@@ -0,0 +1,282 @@
++// SPDX-License-Identifier: GPL-2.0
++/*
++ * ARM Ltd. Fast Models
++ *
++ * Versatile Express (VE) system model
++ * Motherboard component
++ *
++ * VEMotherBoard.lisa
++ *
++ * This is a duplicate of rtsm_ve-motherboard.dtsi but not
++ * using interrupt-map as this is not properly supported in
++ * xen right now
++ */
++/ {
++       smb@8000000 {
++               motherboard {
++                       arm,v2m-memory-map = "rs1";
++                       compatible = "arm,vexpress,v2m-p1", "simple-bus";
++                       #address-cells = <2>; /* SMB chipselect number and offset */
++                       #size-cells = <1>;
++                       ranges;
++
++                       flash@0,00000000 {
++                               compatible = "arm,vexpress-flash", "cfi-flash";
++                               reg = <0 0x00000000 0x04000000>,
++                                     <4 0x00000000 0x04000000>;
++                               bank-width = <4>;
++                       };
++
++                       v2m_video_ram: vram@2,00000000 {
++                               compatible = "arm,vexpress-vram";
++                               reg = <2 0x00000000 0x00800000>;
++                       };
++
++                       ethernet@2,02000000 {
++                               compatible = "smsc,lan91c111";
++                               reg = <2 0x02000000 0x10000>;
++                               interrupts = <0 15 4>;
++                       };
++
++                       v2m_clk24mhz: clk24mhz {
++                               compatible = "fixed-clock";
++                               #clock-cells = <0>;
++                               clock-frequency = <24000000>;
++                               clock-output-names = "v2m:clk24mhz";
++                       };
++
++                       v2m_refclk1mhz: refclk1mhz {
++                               compatible = "fixed-clock";
++                               #clock-cells = <0>;
++                               clock-frequency = <1000000>;
++                               clock-output-names = "v2m:refclk1mhz";
++                       };
++
++                       v2m_refclk32khz: refclk32khz {
++                               compatible = "fixed-clock";
++                               #clock-cells = <0>;
++                               clock-frequency = <32768>;
++                               clock-output-names = "v2m:refclk32khz";
++                       };
++
++                       iofpga@3,00000000 {
++                               compatible = "simple-bus";
++                               #address-cells = <1>;
++                               #size-cells = <1>;
++                               ranges = <0 3 0 0x200000>;
++
++                               v2m_sysreg: sysreg@10000 {
++                                       compatible = "arm,vexpress-sysreg";
++                                       reg = <0x010000 0x1000>;
++                                       gpio-controller;
++                                       #gpio-cells = <2>;
++                               };
++
++                               v2m_sysctl: sysctl@20000 {
++                                       compatible = "arm,sp810", "arm,primecell";
++                                       reg = <0x020000 0x1000>;
++                                       clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>;
++                                       clock-names = "refclk", "timclk", "apb_pclk";
++                                       #clock-cells = <1>;
++                                       clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
++                                       assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
++                                       assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
++                               };
++
++                               aaci@40000 {
++                                       compatible = "arm,pl041", "arm,primecell";
++                                       reg = <0x040000 0x1000>;
++                                       interrupts = <0 11 4>;
++                                       clocks = <&v2m_clk24mhz>;
++                                       clock-names = "apb_pclk";
++                               };
++
++                               mmci@50000 {
++                                       compatible = "arm,pl180", "arm,primecell";
++                                       reg = <0x050000 0x1000>;
++                                       interrupts = <0 9 4 0 10 4>;
++                                       cd-gpios = <&v2m_sysreg 0 0>;
++                                       wp-gpios = <&v2m_sysreg 1 0>;
++                                       max-frequency = <12000000>;
++                                       vmmc-supply = <&v2m_fixed_3v3>;
++                                       clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
++                                       clock-names = "mclk", "apb_pclk";
++                               };
++
++                               kmi@60000 {
++                                       compatible = "arm,pl050", "arm,primecell";
++                                       reg = <0x060000 0x1000>;
++                                       interrupts = <0 12 4>;
++                                       clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
++                                       clock-names = "KMIREFCLK", "apb_pclk";
++                               };
++
++                               kmi@70000 {
++                                       compatible = "arm,pl050", "arm,primecell";
++                                       reg = <0x070000 0x1000>;
++                                       interrupts = <0 13 4>;
++                                       clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
++                                       clock-names = "KMIREFCLK", "apb_pclk";
++                               };
++
++                               v2m_serial0: uart@90000 {
++                                       compatible = "arm,pl011", "arm,primecell";
++                                       reg = <0x090000 0x1000>;
++                                       interrupts = <0 5 4>;
++                                       clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
++                                       clock-names = "uartclk", "apb_pclk";
++                               };
++
++                               v2m_serial1: uart@a0000 {
++                                       compatible = "arm,pl011", "arm,primecell";
++                                       reg = <0x0a0000 0x1000>;
++                                       interrupts = <0 6 4>;
++                                       clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
++                                       clock-names = "uartclk", "apb_pclk";
++                               };
++
++                               v2m_serial2: uart@b0000 {
++                                       compatible = "arm,pl011", "arm,primecell";
++                                       reg = <0x0b0000 0x1000>;
++                                       interrupts = <0 7 4>;
++                                       clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
++                                       clock-names = "uartclk", "apb_pclk";
++                               };
++
++                               v2m_serial3: uart@c0000 {
++                                       compatible = "arm,pl011", "arm,primecell";
++                                       reg = <0x0c0000 0x1000>;
++                                       interrupts = <0 8 4>;
++                                       clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
++                                       clock-names = "uartclk", "apb_pclk";
++                               };
++
++                               wdt@f0000 {
++                                       compatible = "arm,sp805", "arm,primecell";
++                                       reg = <0x0f0000 0x1000>;
++                                       interrupts = <0 0 4>;
++                                       clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>;
++                                       clock-names = "wdogclk", "apb_pclk";
++                               };
++
++                               v2m_timer01: timer@110000 {
++                                       compatible = "arm,sp804", "arm,primecell";
++                                       reg = <0x110000 0x1000>;
++                                       interrupts = <0 2 4>;
++                                       clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>;
++                                       clock-names = "timclken1", "timclken2", "apb_pclk";
++                               };
++
++                               v2m_timer23: timer@120000 {
++                                       compatible = "arm,sp804", "arm,primecell";
++                                       reg = <0x120000 0x1000>;
++                                       interrupts = <0 3 4>;
++                                       clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>;
++                                       clock-names = "timclken1", "timclken2", "apb_pclk";
++                               };
++
++                               rtc@170000 {
++                                       compatible = "arm,pl031", "arm,primecell";
++                                       reg = <0x170000 0x1000>;
++                                       interrupts = <0 4 4>;
++                                       clocks = <&v2m_clk24mhz>;
++                                       clock-names = "apb_pclk";
++                               };
++
++                               clcd@1f0000 {
++                                       compatible = "arm,pl111", "arm,primecell";
++                                       reg = <0x1f0000 0x1000>;
++                                       interrupt-names = "combined";
++                                       interrupts = <0 14 4>;
++                                       clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>;
++                                       clock-names = "clcdclk", "apb_pclk";
++                                       arm,pl11x,framebuffer = <0x18000000 0x00180000>;
++                                       memory-region = <&v2m_video_ram>;
++                                       max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */
++
++                                       port {
++                                               v2m_clcd_pads: endpoint {
++                                                       remote-endpoint = <&v2m_clcd_panel>;
++                                                       arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
++                                               };
++                                       };
++
++                                       panel {
++                                               compatible = "panel-dpi";
++
++                                               port {
++                                                       v2m_clcd_panel: endpoint {
++                                                               remote-endpoint = <&v2m_clcd_pads>;
++                                                       };
++                                               };
++
++                                               panel-timing {
++                                                       clock-frequency = <63500127>;
++                                                       hactive = <1024>;
++                                                       hback-porch = <152>;
++                                                       hfront-porch = <48>;
++                                                       hsync-len = <104>;
++                                                       vactive = <768>;
++                                                       vback-porch = <23>;
++                                                       vfront-porch = <3>;
++                                                       vsync-len = <4>;
++                                               };
++                                       };
++                               };
++
++                               virtio-block@130000 {
++                                       compatible = "virtio,mmio";
++                                       reg = <0x130000 0x200>;
++                                       interrupts = <0 42 4>;
++                               };
++                       };
++
++                       v2m_fixed_3v3: v2m-3v3 {
++                               compatible = "regulator-fixed";
++                               regulator-name = "3V3";
++                               regulator-min-microvolt = <3300000>;
++                               regulator-max-microvolt = <3300000>;
++                               regulator-always-on;
++                       };
++
++                       mcc {
++                               compatible = "arm,vexpress,config-bus";
++                               arm,vexpress,config-bridge = <&v2m_sysreg>;
++
++                               v2m_oscclk1: oscclk1 {
++                                       /* CLCD clock */
++                                       compatible = "arm,vexpress-osc";
++                                       arm,vexpress-sysreg,func = <1 1>;
++                                       freq-range = <23750000 63500000>;
++                                       #clock-cells = <0>;
++                                       clock-output-names = "v2m:oscclk1";
++                               };
++
++                               reset {
++                                       compatible = "arm,vexpress-reset";
++                                       arm,vexpress-sysreg,func = <5 0>;
++                               };
++
++                               muxfpga {
++                                       compatible = "arm,vexpress-muxfpga";
++                                       arm,vexpress-sysreg,func = <7 0>;
++                               };
++
++                               shutdown {
++                                       compatible = "arm,vexpress-shutdown";
++                                       arm,vexpress-sysreg,func = <8 0>;
++                               };
++
++                               reboot {
++                                       compatible = "arm,vexpress-reboot";
++                                       arm,vexpress-sysreg,func = <9 0>;
++                               };
++
++                               dvimode {
++                                       compatible = "arm,vexpress-dvimode";
++                                       arm,vexpress-sysreg,func = <11 0>;
++                               };
++                       };
++               };
++       };
++};

meta-arm-bsp/recipes-kernel/linux/files/gem5-dts.patch

@@ -0,0 +1,757 @@
+Add DTS files which are not yet upstream.
+
+Upstream-Status: Pending
+Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
+
+diff --git a/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_1cpu.dts b/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_1cpu.dts
+new file mode 100644
+index 000000000000..0e59fdf89054
+--- /dev/null
++++ b/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_1cpu.dts
+@@ -0,0 +1,95 @@
++/*
++ * Copyright (c) 2015-2016 ARM Limited
++ * All rights reserved
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are
++ * met: redistributions of source code must retain the above copyright
++ * notice, this list of conditions and the following disclaimer;
++ * redistributions in binary form must reproduce the above copyright
++ * notice, this list of conditions and the following disclaimer in the
++ * documentation and/or other materials provided with the distribution;
++ * neither the name of the copyright holders nor the names of its
++ * contributors may be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
++ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
++ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
++ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ * Authors: Andreas Sandberg
++ */
++
++/dts-v1/;
++
++/memreserve/ 0x80000000 0x00010000;
++
++/include/ "vexpress_gem5_v2.dtsi"
++
++/ {
++	model = "V2P-AARCH64";
++	compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
++
++	memory@80000000 {
++		device_type = "memory";
++		reg = <0 0x80000000 0x4 0x00000000>;
++	};
++
++	cpus {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++        cpu@0 {
++            device_type = "cpu";
++            compatible = "gem5,armv8", "arm,armv8";
++            reg = < 0 >;
++            enable-method = "spin-table";
++            cpu-release-addr = <0 0x8000fff8>;
++        };
++
++	};
++
++	virt-encoder {
++		compatible = "drm,virtual-encoder";
++		port {
++			dp0_virt_input: endpoint@0 {
++				remote-endpoint = <&dp0_output>;
++			};
++		};
++
++		display-timings {
++			native-mode = <&timing0>;
++
++			timing0: timing_1080p60 {
++				/* 1920x1080-60 */
++				clock-frequency = <148500000>;
++				hactive = <1920>;
++				vactive = <1080>;
++				hfront-porch = <148>;
++				hback-porch = <88>;
++				hsync-len = <44>;
++				vfront-porch = <36>;
++				vback-porch = <4>;
++				vsync-len = <5>;
++			};
++		};
++	};
++};
++
++&dp0 {
++	status = "ok";
++
++	port {
++		dp0_output: endpoint@0 {
++			remote-endpoint = <&dp0_virt_input>;
++		};
++	};
++};
+diff --git a/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_2cpu.dts b/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_2cpu.dts
+new file mode 100644
+index 000000000000..441d3df2a16f
+--- /dev/null
++++ b/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_2cpu.dts
+@@ -0,0 +1,103 @@
++/*
++ * Copyright (c) 2015-2016 ARM Limited
++ * All rights reserved
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are
++ * met: redistributions of source code must retain the above copyright
++ * notice, this list of conditions and the following disclaimer;
++ * redistributions in binary form must reproduce the above copyright
++ * notice, this list of conditions and the following disclaimer in the
++ * documentation and/or other materials provided with the distribution;
++ * neither the name of the copyright holders nor the names of its
++ * contributors may be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
++ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
++ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
++ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ * Authors: Andreas Sandberg
++ */
++
++/dts-v1/;
++
++/memreserve/ 0x80000000 0x00010000;
++
++/include/ "vexpress_gem5_v2.dtsi"
++
++/ {
++	model = "V2P-AARCH64";
++	compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
++
++	memory@80000000 {
++		device_type = "memory";
++		reg = <0 0x80000000 0x4 0x00000000>;
++	};
++
++	cpus {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++        cpu@0 {
++            device_type = "cpu";
++            compatible = "gem5,armv8", "arm,armv8";
++            reg = < 0 >;
++            enable-method = "spin-table";
++            cpu-release-addr = <0 0x8000fff8>;
++        };
++
++        cpu@1 {
++            device_type = "cpu";
++            compatible = "gem5,armv8", "arm,armv8";
++            reg = < 1 >;
++            enable-method = "spin-table";
++            cpu-release-addr = <0 0x8000fff8>;
++        };
++
++	};
++
++	virt-encoder {
++		compatible = "drm,virtual-encoder";
++		port {
++			dp0_virt_input: endpoint@0 {
++				remote-endpoint = <&dp0_output>;
++			};
++		};
++
++		display-timings {
++			native-mode = <&timing0>;
++
++			timing0: timing_1080p60 {
++				/* 1920x1080-60 */
++				clock-frequency = <148500000>;
++				hactive = <1920>;
++				vactive = <1080>;
++				hfront-porch = <148>;
++				hback-porch = <88>;
++				hsync-len = <44>;
++				vfront-porch = <36>;
++				vback-porch = <4>;
++				vsync-len = <5>;
++			};
++		};
++	};
++};
++
++&dp0 {
++	status = "ok";
++
++	port {
++		dp0_output: endpoint@0 {
++			remote-endpoint = <&dp0_virt_input>;
++		};
++	};
++};
+diff --git a/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_4cpu.dts b/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_4cpu.dts
+new file mode 100644
+index 000000000000..2d0311a5f893
+--- /dev/null
++++ b/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_4cpu.dts
+@@ -0,0 +1,119 @@
++/*
++ * Copyright (c) 2015-2016 ARM Limited
++ * All rights reserved
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are
++ * met: redistributions of source code must retain the above copyright
++ * notice, this list of conditions and the following disclaimer;
++ * redistributions in binary form must reproduce the above copyright
++ * notice, this list of conditions and the following disclaimer in the
++ * documentation and/or other materials provided with the distribution;
++ * neither the name of the copyright holders nor the names of its
++ * contributors may be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
++ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
++ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
++ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ * Authors: Andreas Sandberg
++ */
++
++/dts-v1/;
++
++/memreserve/ 0x80000000 0x00010000;
++
++/include/ "vexpress_gem5_v2.dtsi"
++
++/ {
++	model = "V2P-AARCH64";
++	compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
++
++	memory@80000000 {
++		device_type = "memory";
++		reg = <0 0x80000000 0x4 0x00000000>;
++	};
++
++	cpus {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++        cpu@0 {
++            device_type = "cpu";
++            compatible = "gem5,armv8", "arm,armv8";
++            reg = < 0 >;
++            enable-method = "spin-table";
++            cpu-release-addr = <0 0x8000fff8>;
++        };
++
++        cpu@1 {
++            device_type = "cpu";
++            compatible = "gem5,armv8", "arm,armv8";
++            reg = < 1 >;
++            enable-method = "spin-table";
++            cpu-release-addr = <0 0x8000fff8>;
++        };
++
++        cpu@2 {
++            device_type = "cpu";
++            compatible = "gem5,armv8", "arm,armv8";
++            reg = < 2 >;
++            enable-method = "spin-table";
++            cpu-release-addr = <0 0x8000fff8>;
++        };
++
++        cpu@3 {
++            device_type = "cpu";
++            compatible = "gem5,armv8", "arm,armv8";
++            reg = < 3 >;
++            enable-method = "spin-table";
++            cpu-release-addr = <0 0x8000fff8>;
++        };
++
++	};
++
++	virt-encoder {
++		compatible = "drm,virtual-encoder";
++		port {
++			dp0_virt_input: endpoint@0 {
++				remote-endpoint = <&dp0_output>;
++			};
++		};
++
++		display-timings {
++			native-mode = <&timing0>;
++
++			timing0: timing_1080p60 {
++				/* 1920x1080-60 */
++				clock-frequency = <148500000>;
++				hactive = <1920>;
++				vactive = <1080>;
++				hfront-porch = <148>;
++				hback-porch = <88>;
++				hsync-len = <44>;
++				vfront-porch = <36>;
++				vback-porch = <4>;
++				vsync-len = <5>;
++			};
++		};
++	};
++};
++
++&dp0 {
++	status = "ok";
++
++	port {
++		dp0_output: endpoint@0 {
++			remote-endpoint = <&dp0_virt_input>;
++		};
++	};
++};
+diff --git a/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_8cpu.dts b/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_8cpu.dts
+new file mode 100644
+index 000000000000..ba94d0746958
+--- /dev/null
++++ b/arch/arm64/boot/dts/gem5-arm64/armv8_gem5_v2_8cpu.dts
+@@ -0,0 +1,151 @@
++/*
++ * Copyright (c) 2015-2016 ARM Limited
++ * All rights reserved
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are
++ * met: redistributions of source code must retain the above copyright
++ * notice, this list of conditions and the following disclaimer;
++ * redistributions in binary form must reproduce the above copyright
++ * notice, this list of conditions and the following disclaimer in the
++ * documentation and/or other materials provided with the distribution;
++ * neither the name of the copyright holders nor the names of its
++ * contributors may be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
++ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
++ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
++ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ * Authors: Andreas Sandberg
++ */
++
++/dts-v1/;
++
++/memreserve/ 0x80000000 0x00010000;
++
++/include/ "vexpress_gem5_v2.dtsi"
++
++/ {
++	model = "V2P-AARCH64";
++	compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
++
++	memory@80000000 {
++		device_type = "memory";
++		reg = <0 0x80000000 0x4 0x00000000>;
++	};
++
++	cpus {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++        cpu@0 {
++            device_type = "cpu";
++            compatible = "gem5,armv8", "arm,armv8";
++            reg = < 0 >;
++            enable-method = "spin-table";
++            cpu-release-addr = <0 0x8000fff8>;
++        };
++
++        cpu@1 {
++            device_type = "cpu";
++            compatible = "gem5,armv8", "arm,armv8";
++            reg = < 1 >;
++            enable-method = "spin-table";
++            cpu-release-addr = <0 0x8000fff8>;
++        };
++
++        cpu@2 {
++            device_type = "cpu";
++            compatible = "gem5,armv8", "arm,armv8";
++            reg = < 2 >;
++            enable-method = "spin-table";
++            cpu-release-addr = <0 0x8000fff8>;
++        };
++
++        cpu@3 {
++            device_type = "cpu";
++            compatible = "gem5,armv8", "arm,armv8";
++            reg = < 3 >;
++            enable-method = "spin-table";
++            cpu-release-addr = <0 0x8000fff8>;
++        };
++
++        cpu@4 {
++            device_type = "cpu";
++            compatible = "gem5,armv8", "arm,armv8";
++            reg = < 4 >;
++            enable-method = "spin-table";
++            cpu-release-addr = <0 0x8000fff8>;
++        };
++
++        cpu@5 {
++            device_type = "cpu";
++            compatible = "gem5,armv8", "arm,armv8";
++            reg = < 5 >;
++            enable-method = "spin-table";
++            cpu-release-addr = <0 0x8000fff8>;
++        };
++
++        cpu@6 {
++            device_type = "cpu";
++            compatible = "gem5,armv8", "arm,armv8";
++            reg = < 6 >;
++            enable-method = "spin-table";
++            cpu-release-addr = <0 0x8000fff8>;
++        };
++
++        cpu@7 {
++            device_type = "cpu";
++            compatible = "gem5,armv8", "arm,armv8";
++            reg = < 7 >;
++            enable-method = "spin-table";
++            cpu-release-addr = <0 0x8000fff8>;
++        };
++
++	};
++
++	virt-encoder {
++		compatible = "drm,virtual-encoder";
++		port {
++			dp0_virt_input: endpoint@0 {
++				remote-endpoint = <&dp0_output>;
++			};
++		};
++
++		display-timings {
++			native-mode = <&timing0>;
++
++			timing0: timing_1080p60 {
++				/* 1920x1080-60 */
++				clock-frequency = <148500000>;
++				hactive = <1920>;
++				vactive = <1080>;
++				hfront-porch = <148>;
++				hback-porch = <88>;
++				hsync-len = <44>;
++				vfront-porch = <36>;
++				vback-porch = <4>;
++				vsync-len = <5>;
++			};
++		};
++	};
++};
++
++&dp0 {
++	status = "ok";
++
++	port {
++		dp0_output: endpoint@0 {
++			remote-endpoint = <&dp0_virt_input>;
++		};
++	};
++};
+diff --git a/arch/arm64/boot/dts/gem5-arm64/vexpress_gem5_v2.dtsi b/arch/arm64/boot/dts/gem5-arm64/vexpress_gem5_v2.dtsi
+new file mode 100644
+index 000000000000..e53e6e84b301
+--- /dev/null
++++ b/arch/arm64/boot/dts/gem5-arm64/vexpress_gem5_v2.dtsi
+@@ -0,0 +1,46 @@
++/*
++ * Copyright (c) 2015-2018 ARM Limited
++ * All rights reserved
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are
++ * met: redistributions of source code must retain the above copyright
++ * notice, this list of conditions and the following disclaimer;
++ * redistributions in binary form must reproduce the above copyright
++ * notice, this list of conditions and the following disclaimer in the
++ * documentation and/or other materials provided with the distribution;
++ * neither the name of the copyright holders nor the names of its
++ * contributors may be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
++ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
++ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
++ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ * Authors: Andreas Sandberg
++ */
++
++/include/ "vexpress_gem5_v2_base.dtsi"
++
++/ {
++	/* The display processor needs custom configuration to setup its
++	 * output ports. Disable it by default in the platform until the
++	 * DT bindings have stabilize.
++	 */
++	dp0: hdlcd@2b000000 {
++		compatible = "arm,hdlcd";
++		reg = <0x0 0x2b000000 0x0 0x1000>;
++		interrupts = <0 63 4>;
++		clocks = <&osc_pxl>;
++		clock-names = "pxlclk";
++		status = "disabled";
++	};
++};
+diff --git a/arch/arm64/boot/dts/gem5-arm64/vexpress_gem5_v2_base.dtsi b/arch/arm64/boot/dts/gem5-arm64/vexpress_gem5_v2_base.dtsi
+new file mode 100644
+index 000000000000..eba0db2526df
+--- /dev/null
++++ b/arch/arm64/boot/dts/gem5-arm64/vexpress_gem5_v2_base.dtsi
+@@ -0,0 +1,202 @@
++/*
++ * Copyright (c) 2015-2017, 2019 ARM Limited
++ * All rights reserved
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions are
++ * met: redistributions of source code must retain the above copyright
++ * notice, this list of conditions and the following disclaimer;
++ * redistributions in binary form must reproduce the above copyright
++ * notice, this list of conditions and the following disclaimer in the
++ * documentation and/or other materials provided with the distribution;
++ * neither the name of the copyright holders nor the names of its
++ * contributors may be used to endorse or promote products derived from
++ * this software without specific prior written permission.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
++ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
++ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
++ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ * Authors: Andreas Sandberg
++ */
++
++/ {
++	arm,hbi = <0x0>;
++	arm,vexpress,site = <0xf>;
++	interrupt-parent = <&gic>;
++	#address-cells = <2>;
++	#size-cells = <2>;
++
++	gic: interrupt-controller@2c000000 {
++		compatible = "arm,gic-v3";
++		#interrupt-cells = <0x3>;
++		#address-cells = <0x2>;
++		ranges;
++		interrupt-controller;
++		redistributor-stride = <0x0 0x40000>; // 256kB stride
++		reg = <0x0 0x2c000000 0x0 0x10000
++		       0x0 0x2c010000 0x0 0x2000000 // room for 128 redistributors using 128K each (256K strided...)
++		       0x0 0x0 0x0 0x0>;
++		interrupts = <1 9 0xf04>;
++		#size-cells = <0x2>;
++		linux,phandle = <0x1>;
++		phandle = <0x1>;
++
++		gic-its@2e010000 {
++			compatible = "arm,gic-v3-its";
++			msi-controller;
++			#msi-cells = <1>;
++			reg = <0x0 0x2e010000 0 0x20000>;
++		};
++	};
++
++	timer {
++		compatible = "arm,cortex-a15-timer",
++			     "arm,armv7-timer";
++		interrupts = <1 13 0xf08>,
++		             <1 14 0xf08>,
++			     <1 11 0xf08>,
++		             <1 10 0xf08>;
++		clocks = <&osc_sys>;
++		clock-names="apb_pclk";
++	};
++
++	pci {
++		compatible = "pci-host-ecam-generic";
++		device_type = "pci";
++		#address-cells = <0x3>;
++		#size-cells = <0x2>;
++		#interrupt-cells = <0x1>;
++
++		reg = <0x0 0x30000000 0x0 0x10000000>;
++
++		ranges = <0x01000000 0x0 0x00000000  0x0 0x2f000000  0x0 0x00010000>,
++		         <0x02000000 0x0 0x40000000  0x0 0x40000000  0x0 0x40000000>;
++
++	/*
++	  child unit address, #cells = #address-cells
++	  child interrupt specifier, #cells = #interrupt-cells (INTA = 1, INTB = 2, INTC = 3 and INTD = 4)
++	  interrupt-parent, phandle
++	  parent unit address, #cells = #address-cells@gic
++	  parent interrupt specifier, #cells = #interrupt-cells@gic
++	*/
++	interrupt-map = <0x0    0x0 0x0  0x1  &gic  0x0 0x0  0x0 0x44 0x1
++		         0x800  0x0 0x0  0x1  &gic  0x0 0x0  0x0 0x45 0x1
++		         0x1000 0x0 0x0  0x1  &gic  0x0 0x0  0x0 0x46 0x1
++		         0x1800 0x0 0x0  0x1  &gic  0x0 0x0  0x0 0x47 0x1>;
++
++	interrupt-map-mask = <0x001800 0x0 0x0 0x0>;
++	dma-coherent;
++	};
++
++	kmi@1c060000 {
++		compatible = "arm,pl050", "arm,primecell";
++		reg = <0x0 0x1c060000 0x0 0x1000>;
++		interrupts = <0 12 4>;
++		clocks = <&v2m_clk24mhz>, <&osc_smb>;
++		clock-names = "KMIREFCLK", "apb_pclk";
++	};
++
++	kmi@1c070000 {
++		compatible = "arm,pl050", "arm,primecell";
++		reg = <0x0 0x1c070000 0x0 0x1000>;
++		interrupts = <0 13 4>;
++		clocks = <&v2m_clk24mhz>, <&osc_smb>;
++		clock-names = "KMIREFCLK", "apb_pclk";
++	};
++
++	uart0: uart@1c090000 {
++		compatible = "arm,pl011", "arm,primecell";
++		reg = <0x0 0x1c090000 0x0 0x1000>;
++		interrupts = <0 5 4>;
++		clocks = <&osc_peripheral>, <&osc_smb>;
++		clock-names = "uartclk", "apb_pclk";
++	};
++
++	rtc@1c170000 {
++		compatible = "arm,pl031", "arm,primecell";
++		reg = <0x0 0x1c170000 0x0 0x1000>;
++		interrupts = <0 4 4>;
++		clocks = <&osc_smb>;
++		clock-names = "apb_pclk";
++	};
++
++	v2m_clk24mhz: clk24mhz {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-frequency = <24000000>;
++		clock-output-names = "v2m:clk24mhz";
++	};
++
++
++	v2m_sysreg: sysreg@1c010000 {
++		compatible = "arm,vexpress-sysreg";
++		reg = <0 0x1c010000 0x0 0x1000>;
++		gpio-controller;
++		#gpio-cells = <2>;
++	};
++
++	vio@1c130000 {
++		compatible = "virtio,mmio";
++		reg = <0 0x1c130000 0x0 0x1000>;
++		interrupts = <0 42 4>;
++	};
++
++	vio@1c140000 {
++		compatible = "virtio,mmio";
++		reg = <0 0x1c140000 0x0 0x1000>;
++		interrupts = <0 43 4>;
++	};
++
++	dcc {
++		compatible = "arm,vexpress,config-bus";
++		arm,vexpress,config-bridge = <&v2m_sysreg>;
++
++		osc_pxl: osc@5 {
++			compatible = "arm,vexpress-osc";
++			arm,vexpress-sysreg,func = <1 5>;
++			freq-range = <23750000 1000000000>;
++			#clock-cells = <0>;
++			clock-output-names = "oscclk5";
++		};
++
++		osc_smb: osc@6 {
++			compatible = "arm,vexpress-osc";
++			arm,vexpress-sysreg,func = <1 6>;
++			freq-range = <20000000 50000000>;
++			#clock-cells = <0>;
++			clock-output-names = "oscclk6";
++		};
++
++		osc_sys: osc@7 {
++			compatible = "arm,vexpress-osc";
++			arm,vexpress-sysreg,func = <1 7>;
++			freq-range = <20000000 60000000>;
++			#clock-cells = <0>;
++			clock-output-names = "oscclk7";
++		};
++	};
++
++
++	mcc {
++		compatible = "arm,vexpress,config-bus";
++		arm,vexpress,config-bridge = <&v2m_sysreg>;
++		arm,vexpress,site = <0>;
++
++		osc_peripheral: osc@2 {
++			compatible = "arm,vexpress-osc";
++			arm,vexpress-sysreg,func = <1 2>;
++			freq-range = <24000000 24000000>;
++			#clock-cells = <0>;
++			clock-output-names = "v2m:oscclk2";
++		};
++	};
++};

meta-arm-bsp/recipes-kernel/linux/files/tc0/defconfig

@@ -0,0 +1,906 @@
+CONFIG_POSIX_MQUEUE=y
+CONFIG_AUDIT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
+CONFIG_IRQ_TIME_ACCOUNTING=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_PSI=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_NUMA_BALANCING=y
+CONFIG_MEMCG=y
+CONFIG_MEMCG_SWAP=y
+CONFIG_BLK_CGROUP=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_CGROUP_PIDS=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_HUGETLB=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_CGROUP_PERF=y
+CONFIG_CGROUP_BPF=y
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_SCHED_TUNE=y
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_FHANDLE is not set
+CONFIG_KALLSYMS_ALL=y
+CONFIG_BPF_SYSCALL=y
+CONFIG_BPF_JIT_ALWAYS_ON=y
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_ARCH_ALPINE=y
+CONFIG_ARCH_BCM2835=y
+CONFIG_ARCH_BCM_IPROC=y
+CONFIG_ARCH_BERLIN=y
+CONFIG_ARCH_BRCMSTB=y
+CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_K3=y
+CONFIG_ARCH_LAYERSCAPE=y
+CONFIG_ARCH_LG1K=y
+CONFIG_ARCH_HISI=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_ARCH_MESON=y
+CONFIG_ARCH_MVEBU=y
+CONFIG_ARCH_QCOM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ARCH_SEATTLE=y
+CONFIG_ARCH_SYNQUACER=y
+CONFIG_ARCH_RENESAS=y
+CONFIG_ARCH_R8A7795=y
+CONFIG_ARCH_R8A7796=y
+CONFIG_ARCH_R8A77965=y
+CONFIG_ARCH_R8A77970=y
+CONFIG_ARCH_R8A77980=y
+CONFIG_ARCH_R8A77990=y
+CONFIG_ARCH_R8A77995=y
+CONFIG_ARCH_STRATIX10=y
+CONFIG_ARCH_TEGRA=y
+CONFIG_ARCH_SPRD=y
+CONFIG_ARCH_THUNDER=y
+CONFIG_ARCH_THUNDER2=y
+CONFIG_ARCH_UNIPHIER=y
+CONFIG_ARCH_VEXPRESS=y
+CONFIG_ARCH_XGENE=y
+CONFIG_ARCH_ZX=y
+CONFIG_ARCH_ZYNQMP=y
+CONFIG_PCI=y
+CONFIG_PCI_IOV=y
+CONFIG_HOTPLUG_PCI=y
+CONFIG_HOTPLUG_PCI_ACPI=y
+CONFIG_PCI_AARDVARK=y
+CONFIG_PCI_TEGRA=y
+CONFIG_PCIE_RCAR=y
+CONFIG_PCI_HOST_GENERIC=y
+CONFIG_PCI_XGENE=y
+CONFIG_PCI_HOST_THUNDER_PEM=y
+CONFIG_PCI_HOST_THUNDER_ECAM=y
+CONFIG_PCIE_ROCKCHIP_HOST=m
+CONFIG_PCI_LAYERSCAPE=y
+CONFIG_PCI_HISI=y
+CONFIG_PCIE_QCOM=y
+CONFIG_PCIE_ARMADA_8K=y
+CONFIG_PCIE_KIRIN=y
+CONFIG_PCIE_HISI_STB=y
+CONFIG_ARM64_VA_BITS_48=y
+CONFIG_SCHED_MC=y
+CONFIG_NUMA=y
+CONFIG_SECCOMP=y
+CONFIG_KEXEC=y
+CONFIG_CRASH_DUMP=y
+CONFIG_XEN=y
+CONFIG_ARM64_SW_TTBR0_PAN=y
+CONFIG_RANDOMIZE_BASE=y
+CONFIG_COMPAT=y
+CONFIG_HIBERNATION=y
+CONFIG_PM_DEBUG=y
+CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
+CONFIG_ENERGY_MODEL=y
+CONFIG_ARM_CPUIDLE=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPUFREQ_DT=y
+CONFIG_ACPI_CPPC_CPUFREQ=m
+CONFIG_ARM_ARMADA_37XX_CPUFREQ=y
+CONFIG_ARM_BIG_LITTLE_CPUFREQ=y
+CONFIG_ARM_SCPI_CPUFREQ=y
+CONFIG_ARM_TEGRA186_CPUFREQ=y
+CONFIG_ARM_SCPI_PROTOCOL=y
+CONFIG_RASPBERRYPI_FIRMWARE=y
+CONFIG_EFI_CAPSULE_LOADER=y
+CONFIG_ACPI=y
+CONFIG_ACPI_APEI=y
+CONFIG_ACPI_APEI_GHES=y
+CONFIG_ACPI_APEI_MEMORY_FAILURE=y
+CONFIG_ACPI_APEI_EINJ=y
+CONFIG_VIRTUALIZATION=y
+CONFIG_KVM=y
+CONFIG_ARM64_CRYPTO=y
+CONFIG_CRYPTO_SHA1_ARM64_CE=y
+CONFIG_CRYPTO_SHA2_ARM64_CE=y
+CONFIG_CRYPTO_SHA512_ARM64_CE=m
+CONFIG_CRYPTO_SHA3_ARM64=m
+CONFIG_CRYPTO_SM3_ARM64_CE=m
+CONFIG_CRYPTO_GHASH_ARM64_CE=y
+CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m
+CONFIG_CRYPTO_CRC32_ARM64_CE=m
+CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
+CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
+CONFIG_CRYPTO_CHACHA20_NEON=m
+CONFIG_CRYPTO_AES_ARM64_BS=m
+CONFIG_KPROBES=y
+CONFIG_JUMP_LABEL=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_MEMORY_FAILURE=y
+CONFIG_TRANSPARENT_HUGEPAGE=y
+CONFIG_CMA=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
+CONFIG_XFRM_INTERFACE=y
+CONFIG_XFRM_STATISTICS=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_NET_IPGRE_DEMUX=y
+CONFIG_NET_IPVTI=y
+CONFIG_INET_ESP=y
+CONFIG_INET_UDP_DIAG=y
+CONFIG_INET_DIAG_DESTROY=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_ROUTE_INFO=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+CONFIG_IPV6_MIP6=y
+CONFIG_IPV6_VTI=y
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_NETFILTER=y
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_CONNTRACK_SECMARK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CONNTRACK_AMANDA=y
+CONFIG_NF_CONNTRACK_FTP=y
+CONFIG_NF_CONNTRACK_H323=y
+CONFIG_NF_CONNTRACK_IRC=y
+CONFIG_NF_CONNTRACK_NETBIOS_NS=y
+CONFIG_NF_CONNTRACK_PPTP=y
+CONFIG_NF_CONNTRACK_SANE=y
+CONFIG_NF_CONNTRACK_TFTP=y
+CONFIG_NF_CT_NETLINK=y
+CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
+CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
+CONFIG_NETFILTER_XT_TARGET_CT=y
+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
+CONFIG_NETFILTER_XT_TARGET_LOG=m
+CONFIG_NETFILTER_XT_TARGET_MARK=y
+CONFIG_NETFILTER_XT_TARGET_NFLOG=y
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+CONFIG_NETFILTER_XT_TARGET_TPROXY=y
+CONFIG_NETFILTER_XT_TARGET_TRACE=y
+CONFIG_NETFILTER_XT_TARGET_SECMARK=y
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
+CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
+CONFIG_NETFILTER_XT_MATCH_BPF=y
+CONFIG_NETFILTER_XT_MATCH_COMMENT=y
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_HELPER=y
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
+CONFIG_NETFILTER_XT_MATCH_LENGTH=y
+CONFIG_NETFILTER_XT_MATCH_LIMIT=y
+CONFIG_NETFILTER_XT_MATCH_MAC=y
+CONFIG_NETFILTER_XT_MATCH_MARK=y
+CONFIG_NETFILTER_XT_MATCH_OWNER=y
+CONFIG_NETFILTER_XT_MATCH_POLICY=y
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
+CONFIG_NETFILTER_XT_MATCH_SOCKET=y
+CONFIG_NETFILTER_XT_MATCH_STATE=y
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
+CONFIG_NETFILTER_XT_MATCH_STRING=y
+CONFIG_NETFILTER_XT_MATCH_TIME=y
+CONFIG_NETFILTER_XT_MATCH_U32=y
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_MATCH_ECN=y
+CONFIG_IP_NF_MATCH_TTL=y
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_IP_NF_NAT=y
+CONFIG_IP_NF_TARGET_MASQUERADE=y
+CONFIG_IP_NF_TARGET_NETMAP=y
+CONFIG_IP_NF_TARGET_REDIRECT=y
+CONFIG_IP_NF_MANGLE=y
+CONFIG_IP_NF_RAW=y
+CONFIG_IP_NF_SECURITY=y
+CONFIG_IP_NF_ARPTABLES=y
+CONFIG_IP_NF_ARPFILTER=y
+CONFIG_IP_NF_ARP_MANGLE=y
+CONFIG_IP6_NF_IPTABLES=y
+CONFIG_IP6_NF_MATCH_RPFILTER=y
+CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_TARGET_REJECT=y
+CONFIG_IP6_NF_MANGLE=y
+CONFIG_IP6_NF_RAW=y
+CONFIG_L2TP=y
+CONFIG_BRIDGE=m
+CONFIG_BRIDGE_VLAN_FILTERING=y
+CONFIG_VLAN_8021Q=m
+CONFIG_VLAN_8021Q_GVRP=y
+CONFIG_VLAN_8021Q_MVRP=y
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_HTB=y
+CONFIG_NET_SCH_NETEM=y
+CONFIG_NET_SCH_INGRESS=y
+CONFIG_NET_CLS_U32=y
+CONFIG_NET_CLS_BPF=y
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_U32=y
+CONFIG_NET_CLS_ACT=y
+CONFIG_BPF_JIT=y
+CONFIG_BT=m
+CONFIG_BT_HIDP=m
+# CONFIG_BT_HS is not set
+# CONFIG_BT_LE is not set
+CONFIG_BT_LEDS=y
+# CONFIG_BT_DEBUGFS is not set
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_LL=y
+CONFIG_BT_HCIUART_BCM=y
+CONFIG_CFG80211=m
+CONFIG_MAC80211=m
+CONFIG_MAC80211_LEDS=y
+CONFIG_RFKILL=m
+CONFIG_NET_9P=y
+CONFIG_NET_9P_VIRTIO=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_DMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=32
+CONFIG_HISILICON_LPC=y
+CONFIG_SIMPLE_PM_BUS=y
+CONFIG_MTD=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_DENALI_DT=y
+CONFIG_MTD_NAND_MARVELL=y
+CONFIG_MTD_NAND_QCOM=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_VIRTIO_BLK=y
+CONFIG_BLK_DEV_NVME=m
+CONFIG_SRAM=y
+CONFIG_UID_SYS_STATS=y
+CONFIG_EEPROM_AT25=m
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_SAS_ATA=y
+CONFIG_SCSI_HISI_SAS=y
+CONFIG_SCSI_HISI_SAS_PCI=y
+CONFIG_SCSI_UFSHCD=m
+CONFIG_SCSI_UFSHCD_PLATFORM=m
+CONFIG_SCSI_UFS_QCOM=m
+CONFIG_SCSI_UFS_HISI=m
+CONFIG_ATA=y
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_AHCI_CEVA=y
+CONFIG_AHCI_MVEBU=y
+CONFIG_AHCI_XGENE=y
+CONFIG_AHCI_QORIQ=y
+CONFIG_SATA_SIL24=y
+CONFIG_SATA_RCAR=y
+CONFIG_PATA_PLATFORM=y
+CONFIG_PATA_OF_PLATFORM=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_DM=y
+CONFIG_DM_CRYPT=y
+CONFIG_DM_SNAPSHOT=y
+CONFIG_DM_UEVENT=y
+CONFIG_DM_VERITY=y
+CONFIG_DM_VERITY_FEC=y
+CONFIG_DM_BOW=y
+CONFIG_NETDEVICES=y
+CONFIG_MACVLAN=m
+CONFIG_MACVTAP=m
+CONFIG_TUN=y
+CONFIG_VETH=m
+CONFIG_VIRTIO_NET=y
+CONFIG_AMD_XGBE=y
+CONFIG_NET_XGENE=y
+CONFIG_ATL1C=m
+CONFIG_MACB=y
+CONFIG_THUNDER_NIC_PF=y
+CONFIG_HIX5HD2_GMAC=y
+CONFIG_HNS_DSAF=y
+CONFIG_HNS_ENET=y
+CONFIG_E1000E=y
+CONFIG_IGB=y
+CONFIG_IGBVF=y
+CONFIG_MVNETA=y
+CONFIG_MVPP2=y
+CONFIG_SKY2=y
+CONFIG_QCOM_EMAC=m
+CONFIG_RAVB=y
+CONFIG_SMC91X=y
+CONFIG_SMSC911X=y
+CONFIG_SNI_AVE=y
+CONFIG_SNI_NETSEC=y
+CONFIG_STMMAC_ETH=m
+CONFIG_MDIO_BUS_MUX_MMIOREG=y
+CONFIG_AT803X_PHY=m
+CONFIG_MARVELL_PHY=m
+CONFIG_MARVELL_10G_PHY=m
+CONFIG_MESON_GXL_PHY=m
+CONFIG_MICREL_PHY=y
+CONFIG_REALTEK_PHY=m
+CONFIG_ROCKCHIP_PHY=y
+CONFIG_PPP=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPP_MPPE=y
+CONFIG_PPTP=y
+CONFIG_PPPOL2TP=y
+CONFIG_USB_PEGASUS=m
+CONFIG_USB_RTL8150=m
+CONFIG_USB_RTL8152=y
+CONFIG_USB_LAN78XX=m
+CONFIG_USB_USBNET=y
+CONFIG_USB_NET_DM9601=m
+CONFIG_USB_NET_SR9800=m
+CONFIG_USB_NET_SMSC75XX=m
+CONFIG_USB_NET_SMSC95XX=m
+CONFIG_USB_NET_PLUSB=m
+CONFIG_USB_NET_MCS7830=m
+CONFIG_ATH10K=m
+CONFIG_ATH10K_PCI=m
+CONFIG_BRCMFMAC=m
+CONFIG_MWIFIEX=m
+CONFIG_MWIFIEX_PCIE=m
+CONFIG_WL18XX=m
+CONFIG_WLCORE_SDIO=m
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_ADC=m
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_CROS_EC=y
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_JOYSTICK_XPAD=y
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
+CONFIG_INPUT_TABLET=y
+CONFIG_TABLET_USB_ACECAD=y
+CONFIG_TABLET_USB_AIPTEK=y
+CONFIG_TABLET_USB_GTCO=y
+CONFIG_TABLET_USB_HANWANG=y
+CONFIG_TABLET_USB_KBTAB=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ATMEL_MXT=m
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_PM8941_PWRKEY=y
+CONFIG_INPUT_UINPUT=y
+CONFIG_INPUT_HISI_POWERKEY=y
+# CONFIG_SERIO_SERPORT is not set
+CONFIG_SERIO_AMBAKMI=y
+# CONFIG_VT is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVMEM is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_8250_BCM2835AUX=y
+CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_8250_MT6577=y
+CONFIG_SERIAL_8250_UNIPHIER=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_MESON=y
+CONFIG_SERIAL_MESON_CONSOLE=y
+CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_CONSOLE=y
+CONFIG_SERIAL_TEGRA=y
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_MSM=y
+CONFIG_SERIAL_MSM_CONSOLE=y
+CONFIG_SERIAL_XILINX_PS_UART=y
+CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
+CONFIG_SERIAL_MVEBU_UART=y
+CONFIG_SERIAL_DEV_BUS=y
+CONFIG_VIRTIO_CONSOLE=y
+CONFIG_TCG_TPM=y
+CONFIG_TCG_TIS_I2C_INFINEON=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_I2C_BCM2835=m
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_I2C_IMX=y
+CONFIG_I2C_MESON=y
+CONFIG_I2C_MV64XXX=y
+CONFIG_I2C_PXA=y
+CONFIG_I2C_QUP=y
+CONFIG_I2C_RK3X=y
+CONFIG_I2C_SH_MOBILE=y
+CONFIG_I2C_TEGRA=y
+CONFIG_I2C_UNIPHIER_F=y
+CONFIG_I2C_VERSATILE=y
+CONFIG_I2C_RCAR=y
+CONFIG_I2C_CROS_EC_TUNNEL=y
+CONFIG_SPI=y
+CONFIG_SPI_ARMADA_3700=y
+CONFIG_SPI_BCM2835=m
+CONFIG_SPI_BCM2835AUX=m
+CONFIG_SPI_MESON_SPICC=m
+CONFIG_SPI_MESON_SPIFC=m
+CONFIG_SPI_ORION=y
+CONFIG_SPI_PL022=y
+CONFIG_SPI_ROCKCHIP=y
+CONFIG_SPI_QUP=y
+CONFIG_SPI_S3C64XX=y
+CONFIG_SPI_SPIDEV=m
+CONFIG_SPMI=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_PINCTRL_MAX77620=y
+CONFIG_PINCTRL_IPQ8074=y
+CONFIG_PINCTRL_MSM8916=y
+CONFIG_PINCTRL_MSM8994=y
+CONFIG_PINCTRL_MSM8996=y
+CONFIG_PINCTRL_QDF2XXX=y
+CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
+CONFIG_PINCTRL_MT7622=y
+CONFIG_GPIO_DWAPB=y
+CONFIG_GPIO_MB86S7X=y
+CONFIG_GPIO_PL061=y
+CONFIG_GPIO_RCAR=y
+CONFIG_GPIO_UNIPHIER=y
+CONFIG_GPIO_XGENE=y
+CONFIG_GPIO_XGENE_SB=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_GPIO_PCA953X_IRQ=y
+CONFIG_GPIO_MAX77620=y
+CONFIG_POWER_AVS=y
+CONFIG_ROCKCHIP_IODOMAIN=y
+CONFIG_POWER_RESET_MSM=y
+CONFIG_POWER_RESET_XGENE=y
+CONFIG_POWER_RESET_SYSCON=y
+CONFIG_SYSCON_REBOOT_MODE=y
+CONFIG_BATTERY_SBS=m
+CONFIG_BATTERY_BQ27XXX=y
+CONFIG_SENSORS_ARM_SCPI=y
+CONFIG_SENSORS_LM90=m
+CONFIG_SENSORS_RASPBERRYPI_HWMON=m
+CONFIG_SENSORS_INA2XX=m
+CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
+CONFIG_CPU_THERMAL=y
+CONFIG_THERMAL_EMULATION=y
+CONFIG_ROCKCHIP_THERMAL=m
+CONFIG_RCAR_GEN3_THERMAL=y
+CONFIG_ARMADA_THERMAL=y
+CONFIG_BRCMSTB_THERMAL=m
+CONFIG_EXYNOS_THERMAL=y
+CONFIG_TEGRA_BPMP_THERMAL=m
+CONFIG_QCOM_TSENS=y
+CONFIG_UNIPHIER_THERMAL=y
+CONFIG_WATCHDOG=y
+CONFIG_ARM_SP805_WATCHDOG=y
+CONFIG_S3C2410_WATCHDOG=y
+CONFIG_MESON_GXBB_WATCHDOG=m
+CONFIG_MESON_WATCHDOG=m
+CONFIG_RENESAS_WDT=y
+CONFIG_UNIPHIER_WATCHDOG=y
+CONFIG_BCM2835_WDT=y
+CONFIG_MFD_BD9571MWV=y
+CONFIG_MFD_AXP20X_RSB=y
+CONFIG_MFD_CROS_EC=y
+CONFIG_MFD_CROS_EC_CHARDEV=m
+CONFIG_MFD_EXYNOS_LPASS=m
+CONFIG_MFD_HI6421_PMIC=y
+CONFIG_MFD_HI655X_PMIC=y
+CONFIG_MFD_MAX77620=y
+CONFIG_MFD_SPMI_PMIC=y
+CONFIG_MFD_RK808=y
+CONFIG_MFD_SEC_CORE=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_AXP20X=y
+CONFIG_REGULATOR_BD9571MWV=y
+CONFIG_REGULATOR_FAN53555=y
+CONFIG_REGULATOR_GPIO=y
+CONFIG_REGULATOR_HI6421V530=y
+CONFIG_REGULATOR_HI655X=y
+CONFIG_REGULATOR_MAX77620=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_QCOM_SMD_RPM=y
+CONFIG_REGULATOR_QCOM_SPMI=y
+CONFIG_REGULATOR_RK808=y
+CONFIG_REGULATOR_S2MPS11=y
+CONFIG_REGULATOR_VCTRL=m
+CONFIG_RC_CORE=m
+CONFIG_RC_DECODERS=y
+CONFIG_RC_DEVICES=y
+CONFIG_IR_MESON=m
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_ANALOG_TV_SUPPORT=y
+CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
+# CONFIG_DVB_NET is not set
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+CONFIG_VIDEO_SAMSUNG_S5P_JPEG=m
+CONFIG_VIDEO_SAMSUNG_S5P_MFC=m
+CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m
+CONFIG_VIDEO_RENESAS_FCP=m
+CONFIG_VIDEO_RENESAS_VSP1=m
+CONFIG_DRM=y
+CONFIG_DRM_LOAD_EDID_FIRMWARE=y
+CONFIG_DRM_I2C_NXP_TDA998X=y
+CONFIG_DRM_HDLCD=y
+CONFIG_DRM_NOUVEAU=m
+CONFIG_DRM_VIRT_ENCODER=y
+CONFIG_DRM_EXYNOS=m
+CONFIG_DRM_EXYNOS5433_DECON=y
+CONFIG_DRM_EXYNOS7_DECON=y
+CONFIG_DRM_EXYNOS_DSI=y
+# CONFIG_DRM_EXYNOS_DP is not set
+CONFIG_DRM_EXYNOS_HDMI=y
+CONFIG_DRM_EXYNOS_MIC=y
+CONFIG_DRM_ROCKCHIP=m
+CONFIG_ROCKCHIP_ANALOGIX_DP=y
+CONFIG_ROCKCHIP_CDN_DP=y
+CONFIG_ROCKCHIP_DW_HDMI=y
+CONFIG_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_ROCKCHIP_INNO_HDMI=y
+CONFIG_DRM_RCAR_DU=m
+CONFIG_DRM_RCAR_LVDS=m
+CONFIG_DRM_TEGRA=m
+CONFIG_DRM_PANEL_SIMPLE=m
+CONFIG_DRM_I2C_ADV7511=m
+CONFIG_DRM_VC4=m
+CONFIG_DRM_HISI_HIBMC=m
+CONFIG_DRM_HISI_KIRIN=m
+CONFIG_DRM_MESON=m
+CONFIG_FB_ARMCLCD=y
+CONFIG_BACKLIGHT_GENERIC=m
+CONFIG_BACKLIGHT_PWM=m
+CONFIG_BACKLIGHT_LP855X=m
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_SOC=y
+CONFIG_SND_BCM2835_SOC_I2S=m
+CONFIG_SND_SOC_ROCKCHIP=m
+CONFIG_SND_SOC_ROCKCHIP_SPDIF=m
+CONFIG_SND_SOC_ROCKCHIP_RT5645=m
+CONFIG_SND_SOC_RK3399_GRU_SOUND=m
+CONFIG_SND_SOC_SAMSUNG=y
+CONFIG_SND_SOC_RCAR=m
+CONFIG_SND_SOC_AK4613=m
+CONFIG_SND_SIMPLE_CARD=m
+CONFIG_SND_AUDIO_GRAPH_CARD=m
+CONFIG_HIDRAW=y
+CONFIG_UHID=y
+CONFIG_HID_A4TECH=y
+CONFIG_HID_ACRUX=y
+CONFIG_HID_ACRUX_FF=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_PRODIKEYS=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_DRAGONRISE=y
+CONFIG_DRAGONRISE_FF=y
+CONFIG_HID_EMS_FF=y
+CONFIG_HID_ELECOM=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_HOLTEK=y
+CONFIG_HID_KEYTOUCH=y
+CONFIG_HID_KYE=y
+CONFIG_HID_UCLOGIC=y
+CONFIG_HID_WALTOP=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_TWINHAN=y
+CONFIG_HID_KENSINGTON=y
+CONFIG_HID_LCPOWER=y
+CONFIG_HID_LOGITECH=y
+CONFIG_HID_LOGITECH_DJ=y
+CONFIG_LOGITECH_FF=y
+CONFIG_LOGIRUMBLEPAD2_FF=y
+CONFIG_LOGIG940_FF=y
+CONFIG_HID_MAGICMOUSE=y
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+CONFIG_HID_MULTITOUCH=y
+CONFIG_HID_NTRIG=y
+CONFIG_HID_ORTEK=y
+CONFIG_HID_PANTHERLORD=y
+CONFIG_PANTHERLORD_FF=y
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_PICOLCD=y
+CONFIG_HID_PRIMAX=y
+CONFIG_HID_ROCCAT=y
+CONFIG_HID_SAITEK=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SPEEDLINK=y
+CONFIG_HID_SUNPLUS=y
+CONFIG_HID_GREENASIA=y
+CONFIG_GREENASIA_FF=y
+CONFIG_HID_SMARTJOYPLUS=y
+CONFIG_SMARTJOYPLUS_FF=y
+CONFIG_HID_TIVO=y
+CONFIG_HID_TOPSEED=y
+CONFIG_HID_THRUSTMASTER=y
+CONFIG_HID_WACOM=y
+CONFIG_HID_WIIMOTE=y
+CONFIG_HID_ZEROPLUS=y
+CONFIG_HID_ZYDACRON=y
+CONFIG_USB_HIDDEV=y
+CONFIG_I2C_HID=m
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_OTG=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_TEGRA=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_EXYNOS=y
+CONFIG_USB_EHCI_HCD_PLATFORM=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_EXYNOS=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y
+CONFIG_USB_RENESAS_USBHS=m
+CONFIG_USB_STORAGE=y
+CONFIG_USB_MUSB_HDRC=y
+CONFIG_USB_MUSB_SUNXI=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_ISP1760=y
+CONFIG_USB_HSIC_USB3503=y
+CONFIG_NOP_USB_XCEIV=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_RENESAS_USBHS_UDC=m
+CONFIG_USB_RENESAS_USB3=m
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_UEVENT=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_ACC=y
+CONFIG_USB_CONFIGFS_F_AUDIO_SRC=y
+CONFIG_USB_CONFIGFS_F_MIDI=y
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK_MINORS=32
+CONFIG_MMC_ARMMMCI=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ACPI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_ARASAN=y
+CONFIG_MMC_SDHCI_OF_ESDHC=y
+CONFIG_MMC_SDHCI_CADENCE=y
+CONFIG_MMC_SDHCI_TEGRA=y
+CONFIG_MMC_SDHCI_F_SDH30=y
+CONFIG_MMC_MESON_GX=y
+CONFIG_MMC_SDHCI_MSM=y
+CONFIG_MMC_SPI=y
+CONFIG_MMC_SDHI=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_EXYNOS=y
+CONFIG_MMC_DW_HI3798CV200=y
+CONFIG_MMC_DW_K3=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SUNXI=y
+CONFIG_MMC_BCM2835=y
+CONFIG_MMC_SDHCI_XENON=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_PWM=y
+CONFIG_LEDS_SYSCON=y
+CONFIG_LEDS_TRIGGER_DISK=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_LEDS_TRIGGER_PANIC=y
+CONFIG_EDAC=y
+CONFIG_EDAC_GHES=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_MAX77686=y
+CONFIG_RTC_DRV_RK808=m
+CONFIG_RTC_DRV_S5M=y
+CONFIG_RTC_DRV_DS3232=y
+CONFIG_RTC_DRV_EFI=y
+CONFIG_RTC_DRV_CROS_EC=y
+CONFIG_RTC_DRV_S3C=y
+CONFIG_RTC_DRV_PL031=y
+CONFIG_RTC_DRV_SUN6I=y
+CONFIG_RTC_DRV_ARMADA38X=y
+CONFIG_RTC_DRV_TEGRA=y
+CONFIG_RTC_DRV_XGENE=y
+CONFIG_DMADEVICES=y
+CONFIG_DMA_BCM2835=m
+CONFIG_K3_DMA=y
+CONFIG_MV_XOR_V2=y
+CONFIG_PL330_DMA=y
+CONFIG_TEGRA20_APB_DMA=y
+CONFIG_QCOM_BAM_DMA=y
+CONFIG_QCOM_HIDMA_MGMT=y
+CONFIG_QCOM_HIDMA=y
+CONFIG_RCAR_DMAC=y
+CONFIG_RENESAS_USB_DMAC=m
+CONFIG_VFIO=y
+CONFIG_VFIO_PCI=y
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_BALLOON=y
+CONFIG_VIRTIO_MMIO=y
+CONFIG_XEN_GNTDEV=y
+CONFIG_XEN_GRANT_DEV_ALLOC=y
+CONFIG_STAGING=y
+CONFIG_ASHMEM=y
+CONFIG_ION=y
+CONFIG_CROS_EC_I2C=y
+CONFIG_CROS_EC_SPI=y
+CONFIG_COMMON_CLK_RK808=y
+CONFIG_COMMON_CLK_SCPI=y
+CONFIG_COMMON_CLK_CS2000_CP=y
+CONFIG_COMMON_CLK_S2MPS11=y
+CONFIG_CLK_QORIQ=y
+CONFIG_COMMON_CLK_PWM=y
+CONFIG_COMMON_CLK_QCOM=y
+CONFIG_QCOM_CLK_SMD_RPM=y
+CONFIG_IPQ_GCC_8074=y
+CONFIG_MSM_GCC_8916=y
+CONFIG_MSM_GCC_8994=y
+CONFIG_MSM_MMCC_8996=y
+CONFIG_HWSPINLOCK=y
+CONFIG_HWSPINLOCK_QCOM=y
+CONFIG_ARM_MHU=y
+CONFIG_PLATFORM_MHU=y
+CONFIG_BCM2835_MBOX=y
+CONFIG_QCOM_APCS_IPC=y
+CONFIG_ROCKCHIP_IOMMU=y
+CONFIG_TEGRA_IOMMU_SMMU=y
+CONFIG_ARM_SMMU=y
+CONFIG_ARM_SMMU_V3=y
+CONFIG_QCOM_IOMMU=y
+CONFIG_RPMSG_QCOM_GLINK_RPM=y
+CONFIG_RPMSG_QCOM_SMD=y
+CONFIG_RASPBERRYPI_POWER=y
+CONFIG_QCOM_SMEM=y
+CONFIG_QCOM_SMD_RPM=y
+CONFIG_QCOM_SMP2P=y
+CONFIG_QCOM_SMSM=y
+CONFIG_ROCKCHIP_PM_DOMAINS=y
+CONFIG_ARCH_TEGRA_132_SOC=y
+CONFIG_ARCH_TEGRA_210_SOC=y
+CONFIG_ARCH_TEGRA_186_SOC=y
+CONFIG_ARCH_TEGRA_194_SOC=y
+CONFIG_ARCH_K3_AM6_SOC=y
+CONFIG_SOC_TI=y
+CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
+CONFIG_EXTCON_USB_GPIO=y
+CONFIG_EXTCON_USBC_CROS_EC=y
+CONFIG_MEMORY=y
+CONFIG_IIO=y
+CONFIG_EXYNOS_ADC=y
+CONFIG_ROCKCHIP_SARADC=m
+CONFIG_IIO_CROS_EC_SENSORS_CORE=m
+CONFIG_IIO_CROS_EC_SENSORS=m
+CONFIG_IIO_CROS_EC_LIGHT_PROX=m
+CONFIG_IIO_CROS_EC_BARO=m
+CONFIG_PWM=y
+CONFIG_PWM_BCM2835=m
+CONFIG_PWM_CROS_EC=m
+CONFIG_PWM_MESON=m
+CONFIG_PWM_RCAR=m
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_PWM_SAMSUNG=y
+CONFIG_PWM_TEGRA=m
+CONFIG_PHY_XGENE=y
+CONFIG_PHY_SUN4I_USB=y
+CONFIG_PHY_HI6220_USB=y
+CONFIG_PHY_HISTB_COMBPHY=y
+CONFIG_PHY_HISI_INNO_USB2=y
+CONFIG_PHY_MVEBU_CP110_COMPHY=y
+CONFIG_PHY_QCOM_QMP=m
+CONFIG_PHY_QCOM_USB_HS=y
+CONFIG_PHY_RCAR_GEN3_USB2=y
+CONFIG_PHY_RCAR_GEN3_USB3=m
+CONFIG_PHY_ROCKCHIP_EMMC=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_PCIE=m
+CONFIG_PHY_ROCKCHIP_TYPEC=y
+CONFIG_PHY_TEGRA_XUSB=y
+CONFIG_HISI_PMU=y
+CONFIG_QCOM_L2_PMU=y
+CONFIG_QCOM_L3_PMU=y
+CONFIG_ANDROID=y
+CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_QCOM_QFPROM=y
+CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_UNIPHIER_EFUSE=y
+CONFIG_MESON_EFUSE=m
+CONFIG_TEE=y
+CONFIG_OPTEE=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_EXT4_ENCRYPTION=y
+CONFIG_BTRFS_FS=m
+CONFIG_BTRFS_FS_POSIX_ACL=y
+CONFIG_F2FS_FS=y
+CONFIG_F2FS_FS_SECURITY=y
+CONFIG_F2FS_FS_ENCRYPTION=y
+CONFIG_FANOTIFY=y
+CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
+CONFIG_QUOTA=y
+CONFIG_QFMT_V2=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=y
+CONFIG_CUSE=m
+CONFIG_OVERLAY_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_HUGETLBFS=y
+CONFIG_EFIVAR_FS=y
+CONFIG_SDCARD_FS=y
+CONFIG_SQUASHFS=y
+CONFIG_PSTORE_CONSOLE=y
+CONFIG_PSTORE_RAM=y
+CONFIG_9P_FS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
+CONFIG_SECURITY=y
+CONFIG_SECURITY_NETWORK=y
+CONFIG_HARDENED_USERCOPY=y
+CONFIG_SECURITY_SELINUX=y
+CONFIG_CRYPTO_GCM=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_ANSI_CPRNG=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_INFO=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_PANIC_TIMEOUT=5
+CONFIG_SCHEDSTATS=y
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_ENABLE_DEFAULT_TRACERS=y
+CONFIG_MEMTEST=y

meta-arm-bsp/recipes-kernel/linux/linux-arm-platforms.inc

@@ -8,7 +8,18 @@
 FILESEXTRAPATHS_prepend := "${THISDIR}:${THISDIR}/files:"
 
 # Arm platforms kmeta
-SRC_URI += "file://arm-platforms-kmeta;type=kmeta;name=arm-platforms-kmeta;destsuffix=arm-platforms-kmeta"
+SRC_URI_KMETA = "file://arm-platforms-kmeta;type=kmeta;name=arm-platforms-kmeta;destsuffix=arm-platforms-kmeta"
+SRC_URI_append_foundation-armv8 = " ${SRC_URI_KMETA}"
+SRC_URI_append_fvp-base = " ${SRC_URI_KMETA}"
+SRC_URI_append_juno = " ${SRC_URI_KMETA}"
+SRC_URI_append_gem5-arm64 = " ${SRC_URI_KMETA}"
+SRCREV_arm-platforms-kmeta = "6147e82375aa9df8f2a162d42ea6406c79c854c5"
+
+#
+# Cortex-A5 DesignStart KMACHINE
+#
+COMPATIBLE_MACHINE_a5ds = "a5ds"
+KMACHINE_a5ds = "a5ds"
 
 #
 # FVP FOUNDATION KMACHINE
@@ -21,12 +32,7 @@ KMACHINE_foundation-armv8 = "fvp"
 #
 COMPATIBLE_MACHINE_fvp-base = "fvp-base"
 KMACHINE_fvp-base = "fvp"
-SRC_URI_append_fvp-base = " file://dts/arm;subdir=add-files"
-
-do_patch_append_fvp-base() {
-    tar -C ${WORKDIR}/add-files/dts -cf - arm | \
-        tar -C arch/arm64/boot/dts -xf -
-}
+SRC_URI_append_fvp-base = " file://fvp-base-dts.patch"
 
 #
 # Juno KMACHINE
@@ -39,9 +45,4 @@ KMACHINE_juno = "juno"
 #
 COMPATIBLE_MACHINE_gem5-arm64 = "gem5-arm64"
 KMACHINE_gem5-arm64 = "gem5-arm64"
-SRC_URI_append_gem5-arm64 = " file://dts/gem5-arm64;subdir=add-files"
-
-do_patch_append_gem5-arm64() {
-    tar -C ${WORKDIR}/add-files/dts -cf - gem5-arm64 | \
-        tar -C arch/arm64/boot/dts -xf -
-}
+SRC_URI_append_gem5-arm64 = " file://gem5-dts.patch"

meta-arm-bsp/recipes-kernel/linux/linux-arm64-ack-4.19/tc0/0001-drm-Add-component-aware-simple-encoder.patch

@@ -0,0 +1,368 @@
+From 6fd66138c44107786879d0adebe78ca94cf6292f Mon Sep 17 00:00:00 2001
+From: Liviu Dudau <Liviu.Dudau@arm.com>
+Date: Wed, 1 Apr 2020 12:10:14 +0100
+Subject: [PATCH 1/2] drm: Add component-aware simple encoder
+
+This is a simple DRM encoder that gets its connector timings information
+from a OF subnode in the device tree and exposes that as a "discovered"
+panel. It can be used together with component-based DRM drivers in an
+emulated environment where no real encoder or connector hardware exists
+and the display output is configured outside the kernel.
+
+Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
+[Backported to gem5's 4.3 kernel]
+Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
+[Ported to gem5's 4.9 kernel. Added dep. on VIDEOMODE_HELPERS.]
+Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
+[Ported to gem5's 4.14 kernel.]
+Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
+Upstream-Status: Backport
+Signed-off-by: Teo Couprie Diaz <teo.coupriediaz@arm.com>
+---
+ drivers/gpu/drm/Kconfig               |  10 ++
+ drivers/gpu/drm/Makefile              |   3 +
+ drivers/gpu/drm/drm_virtual_encoder.c | 297 ++++++++++++++++++++++++++++++++++
+ 3 files changed, 310 insertions(+)
+ create mode 100644 drivers/gpu/drm/drm_virtual_encoder.c
+
+diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
+index e44e567..6e95357 100644
+--- a/drivers/gpu/drm/Kconfig
++++ b/drivers/gpu/drm/Kconfig
+@@ -255,6 +255,16 @@ config DRM_VKMS
+ 
+ 	  If M is selected the module will be called vkms.
+ 
++config DRM_VIRT_ENCODER
++	tristate "Virtual OF-based encoder"
++	depends on DRM && OF
++	select VIDEOMODE_HELPERS
++	help
++	  Choose this option to get a virtual encoder and its associated
++	  connector that will use the device tree to read the display
++	  timings information. If M is selected the module will be called
++	  drm_vencoder.
++
+ source "drivers/gpu/drm/exynos/Kconfig"
+ 
+ source "drivers/gpu/drm/rockchip/Kconfig"
+diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
+index a6771ce..733ad62 100644
+--- a/drivers/gpu/drm/Makefile
++++ b/drivers/gpu/drm/Makefile
+@@ -46,6 +46,9 @@ drm_kms_helper-$(CONFIG_DRM_DP_CEC) += drm_dp_cec.o
+ obj-$(CONFIG_DRM_KMS_HELPER) += drm_kms_helper.o
+ obj-$(CONFIG_DRM_DEBUG_SELFTEST) += selftests/
+ 
++drm_vencoder-y := drm_virtual_encoder.o
++obj-$(CONFIG_DRM_VIRT_ENCODER) += drm_vencoder.o
++
+ obj-$(CONFIG_DRM)	+= drm.o
+ obj-$(CONFIG_DRM_MIPI_DSI) += drm_mipi_dsi.o
+ obj-$(CONFIG_DRM_PANEL_ORIENTATION_QUIRKS) += drm_panel_orientation_quirks.o
+diff --git a/drivers/gpu/drm/drm_virtual_encoder.c b/drivers/gpu/drm/drm_virtual_encoder.c
+new file mode 100644
+index 00000000..2e2c51d
+--- /dev/null
++++ b/drivers/gpu/drm/drm_virtual_encoder.c
+@@ -0,0 +1,297 @@
++/*
++ * Copyright (C) 2016 ARM Limited
++ * Author: Liviu Dudau <Liviu.Dudau@arm.com>
++ *
++ * Dummy encoder and connector that use the OF to "discover" the attached
++ * display timings. Can be used in situations where the encoder and connector's
++ * functionality are emulated and no setup steps are needed, or to describe
++ * attached panels for which no driver exists but can be used without
++ * additional hardware setup.
++ *
++ * The encoder also uses the component framework so that it can be a quick
++ * replacement for existing drivers when testing in an emulated environment.
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file COPYING in the main directory of this archive
++ * for more details.
++ *
++ */
++
++#include <drm/drmP.h>
++#include <drm/drm_crtc.h>
++#include <drm/drm_atomic_helper.h>
++#include <drm/drm_crtc_helper.h>
++#include <drm/drm_of.h>
++#include <linux/component.h>
++#include <video/display_timing.h>
++#include <video/of_display_timing.h>
++#include <video/videomode.h>
++
++struct drm_virt_priv {
++	struct drm_connector connector;
++	struct drm_encoder encoder;
++	struct display_timings *timings;
++};
++
++#define connector_to_drm_virt_priv(x) \
++	container_of(x, struct drm_virt_priv, connector)
++
++#define encoder_to_drm_virt_priv(x) \
++	container_of(x, struct drm_virt_priv, encoder)
++
++static void drm_virtcon_destroy(struct drm_connector *connector)
++{
++	struct drm_virt_priv *conn = connector_to_drm_virt_priv(connector);
++
++	drm_connector_cleanup(connector);
++	display_timings_release(conn->timings);
++}
++
++static enum drm_connector_status
++drm_virtcon_detect(struct drm_connector *connector, bool force)
++{
++	return connector_status_connected;
++}
++
++static const struct drm_connector_funcs drm_virtcon_funcs = {
++	.reset = drm_atomic_helper_connector_reset,
++	.detect	= drm_virtcon_detect,
++	.fill_modes = drm_helper_probe_single_connector_modes,
++	.destroy = drm_virtcon_destroy,
++	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
++	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
++};
++
++static int drm_virtcon_get_modes(struct drm_connector *connector)
++{
++	struct drm_virt_priv *conn = connector_to_drm_virt_priv(connector);
++	struct display_timings *timings = conn->timings;
++	int i;
++
++	for (i = 0; i < timings->num_timings; i++) {
++		struct drm_display_mode *mode = drm_mode_create(connector->dev);
++		struct videomode vm;
++
++		if (videomode_from_timings(timings, &vm, i))
++			break;
++
++		drm_display_mode_from_videomode(&vm, mode);
++		mode->type = DRM_MODE_TYPE_DRIVER;
++		if (timings->native_mode == i)
++			mode->type = DRM_MODE_TYPE_PREFERRED;
++
++		drm_mode_set_name(mode);
++		drm_mode_probed_add(connector, mode);
++	}
++
++	return i;
++}
++
++static int drm_virtcon_mode_valid(struct drm_connector *connector,
++				   struct drm_display_mode *mode)
++{
++	return MODE_OK;
++}
++
++struct drm_encoder *drm_virtcon_best_encoder(struct drm_connector *connector)
++{
++	struct drm_virt_priv *priv = connector_to_drm_virt_priv(connector);
++
++	return &priv->encoder;
++}
++
++struct drm_encoder *
++drm_virtcon_atomic_best_encoder(struct drm_connector *connector,
++				 struct drm_connector_state *connector_state)
++{
++	struct drm_virt_priv *priv = connector_to_drm_virt_priv(connector);
++
++	return &priv->encoder;
++}
++
++static const struct drm_connector_helper_funcs drm_virtcon_helper_funcs = {
++	.get_modes = drm_virtcon_get_modes,
++	.mode_valid = drm_virtcon_mode_valid,
++	.best_encoder = drm_virtcon_best_encoder,
++	.atomic_best_encoder = drm_virtcon_atomic_best_encoder,
++};
++
++static void drm_vencoder_destroy(struct drm_encoder *encoder)
++{
++	drm_encoder_cleanup(encoder);
++}
++
++static const struct drm_encoder_funcs drm_vencoder_funcs = {
++	.destroy = drm_vencoder_destroy,
++};
++
++static void drm_vencoder_dpms(struct drm_encoder *encoder, int mode)
++{
++	/* nothing needed */
++}
++
++static bool drm_vencoder_mode_fixup(struct drm_encoder *encoder,
++				    const struct drm_display_mode *mode,
++				    struct drm_display_mode *adjusted_mode)
++{
++	/* nothing needed */
++	return true;
++}
++
++static void drm_vencoder_prepare(struct drm_encoder *encoder)
++{
++	drm_vencoder_dpms(encoder, DRM_MODE_DPMS_OFF);
++}
++
++static void drm_vencoder_commit(struct drm_encoder *encoder)
++{
++	drm_vencoder_dpms(encoder, DRM_MODE_DPMS_ON);
++}
++
++static void drm_vencoder_mode_set(struct drm_encoder *encoder,
++				  struct drm_display_mode *mode,
++				  struct drm_display_mode *adjusted_mode)
++{
++	/* nothing needed */
++}
++
++static const struct drm_encoder_helper_funcs drm_vencoder_helper_funcs = {
++	.dpms		= drm_vencoder_dpms,
++	.mode_fixup	= drm_vencoder_mode_fixup,
++	.prepare	= drm_vencoder_prepare,
++	.commit		= drm_vencoder_commit,
++	.mode_set	= drm_vencoder_mode_set,
++};
++
++static int drm_vencoder_bind(struct device *dev, struct device *master,
++			     void *data)
++{
++	struct drm_encoder *encoder;
++	struct drm_virt_priv *con;
++	struct drm_connector *connector;
++	struct drm_device *drm = data;
++	u32 crtcs = 0;
++	int ret;
++
++	con = devm_kzalloc(dev, sizeof(*con), GFP_KERNEL);
++	if (!con)
++		return -ENOMEM;
++
++	dev_set_drvdata(dev, con);
++	connector = &con->connector;
++	encoder = &con->encoder;
++
++	if (dev->of_node) {
++		struct drm_bridge *bridge;
++		crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
++		bridge = of_drm_find_bridge(dev->of_node);
++		if (bridge) {
++			ret = drm_bridge_attach(encoder, bridge, NULL);
++			if (ret) {
++				DRM_ERROR("Failed to initialize bridge\n");
++				return ret;
++			}
++		}
++		con->timings = of_get_display_timings(dev->of_node);
++		if (!con->timings) {
++			dev_err(dev, "failed to get display panel timings\n");
++			return ENXIO;
++		}
++	}
++
++	/* If no CRTCs were found, fall back to the old encoder's behaviour */
++	if (crtcs == 0) {
++		dev_warn(dev, "Falling back to first CRTC\n");
++		crtcs = 1 << 0;
++	}
++
++	encoder->possible_crtcs = crtcs ? crtcs : 1;
++	encoder->possible_clones = 0;
++
++	ret = drm_encoder_init(drm, encoder, &drm_vencoder_funcs,
++			       DRM_MODE_ENCODER_VIRTUAL, NULL);
++	if (ret)
++		goto encoder_init_err;
++
++	drm_encoder_helper_add(encoder, &drm_vencoder_helper_funcs);
++
++	/* bogus values, pretend we're a 24" screen for DPI calculations */
++	connector->display_info.width_mm = 519;
++	connector->display_info.height_mm = 324;
++	connector->interlace_allowed = false;
++	connector->doublescan_allowed = false;
++	connector->polled = 0;
++
++	ret = drm_connector_init(drm, connector, &drm_virtcon_funcs,
++				 DRM_MODE_CONNECTOR_VIRTUAL);
++	if (ret)
++		goto connector_init_err;
++
++	drm_connector_helper_add(connector, &drm_virtcon_helper_funcs);
++
++	drm_connector_register(connector);
++
++	ret = drm_connector_attach_encoder(connector, encoder);
++	if (ret)
++		goto attach_err;
++
++	return ret;
++
++attach_err:
++	drm_connector_unregister(connector);
++	drm_connector_cleanup(connector);
++connector_init_err:
++	drm_encoder_cleanup(encoder);
++encoder_init_err:
++	display_timings_release(con->timings);
++
++	return ret;
++};
++
++static void drm_vencoder_unbind(struct device *dev, struct device *master,
++				void *data)
++{
++	struct drm_virt_priv *con = dev_get_drvdata(dev);
++
++	drm_connector_unregister(&con->connector);
++	drm_connector_cleanup(&con->connector);
++	drm_encoder_cleanup(&con->encoder);
++	display_timings_release(con->timings);
++}
++
++static const struct component_ops drm_vencoder_ops = {
++	.bind = drm_vencoder_bind,
++	.unbind = drm_vencoder_unbind,
++};
++
++static int drm_vencoder_probe(struct platform_device *pdev)
++{
++	return component_add(&pdev->dev, &drm_vencoder_ops);
++}
++
++static int drm_vencoder_remove(struct platform_device *pdev)
++{
++	component_del(&pdev->dev, &drm_vencoder_ops);
++	return 0;
++}
++
++static const struct of_device_id drm_vencoder_of_match[] = {
++	{ .compatible = "drm,virtual-encoder", },
++	{},
++};
++MODULE_DEVICE_TABLE(of, drm_vencoder_of_match);
++
++static struct platform_driver drm_vencoder_driver = {
++	.probe = drm_vencoder_probe,
++	.remove = drm_vencoder_remove,
++	.driver = {
++		.name = "drm_vencoder",
++		.of_match_table = drm_vencoder_of_match,
++	},
++};
++
++module_platform_driver(drm_vencoder_driver);
++
++MODULE_AUTHOR("Liviu Dudau");
++MODULE_DESCRIPTION("Virtual DRM Encoder");
++MODULE_LICENSE("GPL v2");
+-- 
+2.7.4
+

meta-arm-bsp/recipes-kernel/linux/linux-arm64-ack-4.19/tc0/0002-swap-red-and-blue-colors-in-HDLCD-driver.patch

@@ -0,0 +1,43 @@
+From 064807d22a0a2865a930d4cc48b61f917f4bf15f Mon Sep 17 00:00:00 2001
+From: Anders Dellien <anders.dellien@arm.com>
+Date: Fri, 17 Apr 2020 16:06:03 +0100
+Subject: [PATCH 2/2] swap red and blue colors in HDLCD driver
+
+The HDLCD drivers is configured to use BGR888 but Android needs
+RGB888 - so we need to swap the red and blue components.
+
+Change-Id: Ib47ddff9280a53757925f6c1b1f373089d038025
+Signed-off-by: Anders Dellien<anders.dellien@arm.com>
+Upstream-Status: Inappropriate [Color swap needed for TC0 only]
+Signed-off-by: Teo Couprie Diaz <teo.coupriediaz@arm.com>
+---
+ drivers/gpu/drm/arm/hdlcd_crtc.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/arm/hdlcd_crtc.c b/drivers/gpu/drm/arm/hdlcd_crtc.c
+index e69d996..a46ba4f 100644
+--- a/drivers/gpu/drm/arm/hdlcd_crtc.c
++++ b/drivers/gpu/drm/arm/hdlcd_crtc.c
+@@ -110,15 +110,15 @@ static int hdlcd_set_pxl_fmt(struct drm_crtc *crtc)
+ 	 * pixel is outside the visible frame area or when there is a
+ 	 * buffer underrun.
+ 	 */
+-	hdlcd_write(hdlcd, HDLCD_REG_RED_SELECT, format->red.offset |
++	hdlcd_write(hdlcd, HDLCD_REG_RED_SELECT, format->blue.offset |
+ #ifdef CONFIG_DRM_HDLCD_SHOW_UNDERRUN
+ 		    0x00ff0000 |	/* show underruns in red */
+ #endif
+-		    ((format->red.length & 0xf) << 8));
++		    ((format->blue.length & 0xf) << 8));
+ 	hdlcd_write(hdlcd, HDLCD_REG_GREEN_SELECT, format->green.offset |
+ 		    ((format->green.length & 0xf) << 8));
+-	hdlcd_write(hdlcd, HDLCD_REG_BLUE_SELECT, format->blue.offset |
+-		    ((format->blue.length & 0xf) << 8));
++	hdlcd_write(hdlcd, HDLCD_REG_BLUE_SELECT, format->red.offset |
++		    ((format->red.length & 0xf) << 8));
+ 
+ 	return 0;
+ }
+-- 
+2.7.4
+

meta-arm-bsp/recipes-kernel/linux/linux-arm64-ack-tc0.inc

@@ -0,0 +1,15 @@
+#
+# TC0 MACHINE specific configurations
+#
+
+FILESEXTRAPATHS_prepend := "${THISDIR}/linux-arm64-ack-4.19:${THISDIR}/files:"
+
+SRC_URI_append = " \
+    file://defconfig \
+    file://0001-drm-Add-component-aware-simple-encoder.patch \
+    file://0002-swap-red-and-blue-colors-in-HDLCD-driver.patch \
+    "
+
+KCONFIG_MODE = "--alldefconfig"
+
+COMPATIBLE_MACHINE = "tc0"

meta-arm-bsp/recipes-kernel/linux/linux-arm64-ack_4.19.bbappend

@@ -0,0 +1,6 @@
+# Machine specific configurations
+
+MACHINE_ACK_REQUIRE ?= ""
+MACHINE_ACK_REQUIRE_tc0 = "linux-arm64-ack-tc0.inc"
+
+require ${MACHINE_ACK_REQUIRE}

meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm_4.19.bbappend

@@ -1,3 +1,3 @@
 # Add support for Arm Platforms (boards or simulators)
 
-require linux-yocto-arm-platforms.inc
+require linux-arm-platforms.inc

meta-arm-bsp/recipes-kernel/linux/linux-linaro-arm_5.4.bb

@@ -11,10 +11,11 @@ COMPATIBLE_MACHINE ?= "invalid"
 # KBRANCH is set to n1sdp by default as there is no master branch on the repository
 KBRANCH = "n1sdp"
 
-SRC_URI = "git://git.linaro.org/landing-teams/working/arm/kernel-release.git;branch=${KBRANCH}; \
+SRC_URI = "git://git.linaro.org/landing-teams/working/arm/kernel-release.git;nobranch=1 \
            file://0001-menuconfig-mconf-cfg-Allow-specification-of-ncurses-location.patch \
           "
 LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814"
 
-SRCREV = "${AUTOREV}"
+# Refer to commit TAG N1SDP-2020.03.26 since it will not get force pushed
+SRCREV = "137cccb0843e63b031acf67d1ca4f6447b8c417c"
 LINUX_VERSION ?= "${PV}"

meta-arm-bsp/recipes-kernel/linux/linux-upstream-arm-platforms.inc

@@ -1,24 +0,0 @@
-DESCRIPTION = "Linux Kernel based on upstream tree"
-SECTION = "kernel"
-LICENSE = "GPLv2"
-SRCREV_FORMAT = "kernel"
-
-require recipes-kernel/linux/linux-yocto.inc
-
-KERNEL_VERSION_SANITY_SKIP = "1"
-
-S = "${WORKDIR}/git"
-
-# Override do_kernel_configme to avoid kernel being assembled into a linux-yocto
-# style kernel
-# https://www.yoctoproject.org/docs/latest/ref-manual/ref-manual.html#ref-tasks-kernel_configme
-do_kernel_configme[noexec] = "1"
-
-# Make sure no branch is defined since here we track a specific version
-KBRANCH = ""
-
-LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814"
-
-SRC_URI = "\
-        git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux;protocol=https;nobranch=1 \
-        "

meta-arm-bsp/recipes-kernel/linux/linux-upstream-arm_5.3.bb

@@ -1,8 +0,0 @@
-# Add support for Upstream Kernel for Arm Platforms (boards or simulators)
-
-SUMMARY = "Linux Kernel Upstream, supported by Arm/Linaro"
-
-require recipes-kernel/linux/linux-upstream-arm-platforms.inc
-
-SRCREV = "v${PV}"
-LINUX_VERSION ?= "${PV}"

meta-arm-bsp/recipes-kernel/linux/linux-yocto_5.3.bb

@@ -0,0 +1,15 @@
+KBRANCH = "v5.3/base"
+
+require recipes-kernel/linux/linux-yocto.inc
+
+SRCREV_machine = "d4f3318ed8fab6316cb7a269b8f42306632a3876"
+SRCREV_meta = "8d0ed83a864cc91eef4d2abbc90f13d4ecd1c213"
+
+SRC_URI = "git://git.yoctoproject.org/linux-yocto.git;name=machine;branch=${KBRANCH}; \
+           git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-5.4;destsuffix=${KMETA}"
+
+LINUX_VERSION = "5.3.18"
+LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814"
+
+PV = "${LINUX_VERSION}+git${SRCPV}"
+KMETA = "kernel-meta"

meta-arm-bsp/recipes-kernel/linux/linux-yocto_5.4.bbappend

@@ -1,3 +1,3 @@
 # Add support for Arm Platforms (boards or simulators)
 
-require linux-yocto-arm-platforms.inc
+require linux-arm-platforms.inc

meta-arm-toolchain/conf/distro/include/external-arm-toolchain-versions.inc

@@ -117,6 +117,15 @@ def eat_get_gdb_version(d):
         first_line = stdout.splitlines()[0]
         return first_line.split()[-1]
 
+def eat_get_bfd_version(d):
+    try:
+        stdout, stderr = eat_run(d, 'as', '--version')
+    except bb.process.CmdError:
+        return 'UNKNOWN'
+    else:
+        first_line = stdout.splitlines()[0]
+        return first_line.split()[-1]
+
 python external_arm_toolchain_version_handler () {
     if not isinstance(e, bb.event.ConfigParsed):
         return
@@ -129,5 +138,20 @@ python external_arm_toolchain_version_handler () {
     d.setVar('EAT_VER_LIBC', eat_get_libc_version(ld))
     d.setVar('EAT_VER_KERNEL', eat_get_kernel_version(ld))
     d.setVar('EAT_VER_GDB', eat_get_gdb_version(ld))
+    d.setVar('EAT_VER_BFD', eat_get_bfd_version(ld))
+
+    lc_libc = "LGPL-2.1"
+    lc_gcc = "GPL-3.0"
+    lc_rle = "GPL-3.0-with-GCC-exception"
+    lc_gdb = "GPL-3.0"
+    lc_bfd = "GPL-3.0"
+
+    d.setVar('EAT_LIBC_LICENSE', lc_libc)
+    d.setVar('EAT_GCC_LICENSE', lc_gcc)
+    d.setVar('EAT_RLE_LICENSE', lc_rle)
+    d.setVar('EAT_GDB_LICENSE', lc_gdb)
+    d.setVar('EAT_BFD_LICENSE', lc_bfd)
+
+    d.setVar('EAT_LICENSE', "%s & %s & %s & %s & %s" % (lc_libc, lc_gcc, lc_rle, lc_gdb, lc_bfd))
 }
 addhandler external_arm_toolchain_version_handler

meta-arm-toolchain/conf/distro/include/tcmode-external-arm.inc

@@ -45,6 +45,10 @@ PREFERRED_PROVIDER_glibc-mtrace = "external-arm-toolchain"
 PREFERRED_PROVIDER_libc-mtrace = "external-arm-toolchain"
 PREFERRED_PROVIDER_virtual/linux-libc-headers = "external-arm-toolchain"
 
+PREFERRED_PROVIDER_gcc-cross-canadian-${TRANSLATED_TARGET_ARCH} ?= "external-arm-sdk-toolchain-${TRANSLATED_TARGET_ARCH}"
+PREFERRED_PROVIDER_binutils-cross-canadian-${TRANSLATED_TARGET_ARCH} ?= "external-arm-sdk-toolchain-${TRANSLATED_TARGET_ARCH}"
+PREFERRED_PROVIDER_gdb-cross-canadian-${TRANSLATED_TARGET_ARCH} ?= "external-arm-sdk-toolchain-${TRANSLATED_TARGET_ARCH}"
+
 TOOLCHAIN_OPTIONS = " --sysroot=${STAGING_DIR_HOST}"
 
 DISTRO_FEATURES_LIBC = "ipv4 ipv6 libc-backtrace libc-big-macros libc-bsd libc-cxx-tests libc-catgets libc-crypt \
@@ -58,6 +62,7 @@ DISTRO_FEATURES_LIBC = "ipv4 ipv6 libc-backtrace libc-big-macros libc-bsd libc-c
 ENABLE_BINARY_LOCALE_GENERATION = "0"
 GLIBC_INTERNAL_USE_BINARY_LOCALE = "precompiled"
 LIBCOVERRIDE = ":libc-glibc"
+LIBC_DEPENDENCIES_remove = "glibc-gconv-cp1252 glibc-gconv-ibm850 glibc-gconv-iso8859-1 glibc-gconv-iso8859-15 glibc-localedata-i18n"
 
 ERROR_QA[type] ?= "list"
 python toolchain_metadata_setup () {

meta-arm-toolchain/conf/layer.conf

@@ -8,8 +8,14 @@ BBFILE_COLLECTIONS += "arm-toolchain"
 BBFILE_PATTERN_arm-toolchain := "^${LAYERDIR}/"
 BBFILE_PRIORITY_arm-toolchain = "30"
 
+# Additional license directories.
+LICENSE_PATH += "${LAYERDIR}/custom-licenses"
+
 LAYERDEPENDS_arm-toolchain = "core"
 LAYERSERIES_COMPAT_arm-toolchain = "zeus dunfell"
 
 # do not error out on bbappends for missing recipes
 BB_DANGLINGAPPENDS_WARNONLY = "true"
+
+# These variables are used for armcompiler license
+BB_HASHBASE_WHITELIST_append = " ARM_TOOL_VARIANT ARMLMD_LICENSE_FILE LM_LICENSE_FILE"

meta-arm-toolchain/custom-licenses/Armcompiler-License-agreement

@@ -0,0 +1,165 @@
+END USER LICENSE AGREEMENT FOR ARM SOFTWARE DEVELOPMENT TOOLS
+
+This end user license agreement ("License") is a legal agreement between you (a single individual), or the company or organisation (a single legal entity) that you represent and have the legal authority to bind, and Arm relating to use of the Arm Tools. Arm is only willing to license the Arm Tools on condition that you accept all of the terms of this License. By clicking "I Agree" or by installing or otherwise using the Arm Tools and/or any Update thereto (as permitted by this License) you indicate that you agree to be bound by all of the terms and conditions of this License. If you do not agree to the terms of this License, Arm will NOT license the Arm Tools to you, you may not install or use the Arm Tools or any part thereof, and you shall promptly return the Arm Tools to Arm or to your supplier (if not Arm) and ask for a refund of the license fee paid (if any).
+
+NOTE - YOUR ATTENTION IS DRAWN TO THE FOLLOWING:
+
+(A) The terms and conditions set out in this License shall apply to the supply by Arm of Arm Tools for both commercial and non-commercial use. If you are in receipt of a Non-Commercial Use License for the Arm Tools (each capitalised term as defined below), or the Arm Tools or any component thereof are identified or classified as such, or you are receiving a license for the Arm Tools free of charge, then notwithstanding any of the other terms and conditions of this License, your use of the Arm Tools shall be limited by the restrictions of use set out in clause 2.2 of this License.
+
+(B) PLEASE NOTE any terms and conditions of use set out in the order documentation provided to you by Arm and the Software Information File(s) (as defined below) applicable to the Arm Tools provided to you with (or included within) either (i) the Arm Tools, and/or (ii) any Updates to the Arm Tools, which limit, extend or otherwise vary the permitted uses and restrictions applicable to the Arm Tools ("Special Conditions"). The Special Conditions form part of and are incorporated into this License. In the event of any conflict or inconsistency between the provisions set out in the main body of this License and any of the Special Conditions, the provisions set out in the Special Conditions shall prevail (in the order in which they are listed in this paragraph).
+
+(C) This License (and any documents incorporated by reference herein) is the sole and exclusive agreement between you and Arm for the Arm Tools, and (except as agreed in writing to the contrary) no other document, including (but not limited to) your purchase order or any other document supplied by you, will form part of this License.
+
+DEFINITIONS
+For the purposes of this License the following words and expressions shall have the following meanings:
+"Arm" means Arm Limited whose registered office is situated at 110 Fulbourn Road, Cambridge CB1 9NJ, England and/or any member of Arm's group of companies.
+"Arm Documentation" means any printed, electronic or online documentation relating to Arm Software licensed to you by Arm under this License.
+"Arm Software" means any and all software, firmware and data licensed to you by Arm under this License.
+"Arm Tools" means any and all Arm Software and/or Arm Documentation owned or licensed by Arm, and any Updates to the Arm Software and/or Arm Documentation.
+"Arm Tools Performance Data" means any results, benchmarking data or other information relating to or connected with your use or testing of the Arm Tools which are indicative of their performance, efficacy, reliability or quality.
+"Fees" means any fee(s) payable by you for the provision by Arm to you of the Arm Tools and associated support and maintenance services, and any other fees payable by you in accordance with this License that are agreed by the parties from time to time.
+"License Key" means an electronic license key issued to you by Arm which enables you to use and run one or more Licensed Seat of an Arm Tool or a component thereof in accordance with the terms of this License.
+"Licensed Seats" means any and all Seats of the Arm Tools (including, if applicable, Updates) that you are licensed to run and use concurrently under the terms of this License, in the types and quantities specified in the order documentation provided to you by Arm, as well as any additional or replacement Seats of the Arm Tools that Arm agrees to provide to you from time to time during the License Term.
+"License Term" means the term set out in the order documentation provided to you by Arm during which you shall be entitled to access and use the Arm Tools.
+"Non-Commercial Use License" means an evaluation, preview, beta, pre-release, pilot, academic, educational or community use only license.
+"Permitted Users" means your employees, workers, consultants, professional advisors, bona fide sub-contractors and service providers that use the Arm Tools in connection with the provision of work carried out for your benefit, and/or, other members of your organisation or third party users who use the Arm Tools with your express written permission on computers (physical or virtual) owned or controlled by you.
+"Redistributables" means the example code, library files, configuration files, header files, and any other Arm Tools or components thereof owned by Arm (or licensed by Arm and provided to you under Arm's terms and conditions) which you are permitted to include within Your Software and redistribute or sub-license within Your Software to third parties, the details of which (if applicable) are set out in a file or folder (the "Redistributables File") typically named 'redistributables' located within an Arm Tool (or components thereof).
+"Seat" means a written or electronic authorisation to run a software component subject to the terms and restrictions specified in that authorisation.
+"Software Information File(s)" means Third Party Licenses Files, Redistributables Files, and/or Supplementary Terms Files (as the context requires).
+"Special Conditions" is as defined above in Recital (B) of this License.
+"Specified Project" means a single design and development activity undertaken by you or your Permitted Users relating to Your Software or Your Hardware, the details of which will be set out in the order documentation provided to you by Arm.
+"Supplementary Terms File" means a software file or folder typically named 'supplementary_terms' located within an Arm Tool (or components thereof) which (if applicable) details any component-specific extensions, limitations or other variations to the terms of this License.
+"Territory" means, if applicable, the geographical area detailed in the order documentation provided to you by Arm to which your use of the Arm Tools or any part thereof is restricted.
+"Third Party Licenses File" means a software file or folder typically named 'third_party_licenses' located within an Arm Tool (or components thereof) which (if applicable) details any third party material included in the relevant Arm Tool which is not licensed under the terms of this License, and a reference to the applicable third party license terms and conditions.
+"Update" means an update, patch, hotfix, bug fix, support release, modification or limited functional enhancement (as applicable) to an Arm Tool or component thereof, including but not limited to error corrections to any program or associated documentation developed by or for Arm comprised in the Arm Tools, which (i) Arm makes generally available to the market, and (ii) does not, in Arm's opinion, constitute an Upgrade or a new product.
+"Upgrade" means a new release of an existing Arm Tool which Arm makes generally available to the market and which usually contains major functional improvements.
+"Your Hardware" means hardware manufactured or developed by you or on your behalf, or hardware owned or licensed by you, which is supported by the Arm Tools.
+"Your Reports" means any written reports or other information relating to the behavior or performance of Your Software or Your Hardware, in html, binary, text or any other format (excluding for the avoidance of doubt, Arm Tools Performance Data), generated by you from or using the Arm Tools and any modifications thereto.
+"Your Software" means any software owned or licensed by you (including, but not limited to, applications, libraries and Arm API compliant plug-ins, but excluding Arm Software) which is supported by (or developed by you using) the Arm Tools.
+
+1. LICENSE GRANT
+1.1 Subject to your compliance with the terms and conditions of this License, and payment by you of the Fees (if any), Arm hereby grants to you and your Permitted Users during the License Term a non-exclusive, non-transferable license to receive and use the Arm Tools, certain components thereof, or optional functionality, in the Territory only on the Licensed Seats or for a Specified Project (as applicable) for the permitted uses set out in this clause 1 and subject to the restrictions set out in clause 2 (as limited, extended or otherwise varied by any terms, including product-specific permitted uses and restrictions, set out in the Special Conditions). Except as expressly permitted by this License, you and your Permitted Users shall NOT copy, modify, sub-license, redistribute or otherwise use any component of the Arm Tools.
+
+1.2 PERMITTED USE OF THE ARM TOOLS: Except as otherwise provided in this License, use of the Arm Tools (or components thereof) is permitted for the purpose of:
+(a) building, developing, testing, debugging, analysing and optimising Your Software or Your Hardware;
+(b) generation of Your Reports, and use of Your Reports to develop, test, debug, analyse and optimise Your Software or Your Hardware; and
+(c) only as expressly provided in the relevant Redistributables File: (i) incorporating, compiling and/or linking the files listed in that Redistributables File into Your Software, provided that Your Software contains substantial additional functionality; and (ii) subject to clause 2.1 below, reproducing and redistributing the files (and permitting your customers and/or your authorised distributors to reproduce and redistribute the files), only in object code form (unless otherwise specified in the relevant Redistributables Files), and only as part of Your Software. You agree that, except as expressly provided to the contrary in the relevant Redistributables File, you may only copy the Arm Tools (or any component thereof) to the extent that such copying is incidental to the permitted uses set out in this clause 1.2, including installation, backup and execution.
+
+2. YOUR OBLIGATIONS AND RESTRICTIONS ON USE
+2.1 OBLIGATIONS RELATING TO REDISTRIBUTION: Any redistribution as permitted by this License is subject to any restrictions set out in the applicable Special Conditions, and your compliance with the following:
+(a) in cases where you are expressly permitted under this License (including for the avoidance of doubt by inclusion of agreed wording in the order documentation provided to you by Arm) to sub-license or redistribute any component of the Arm Tools to your customers, authorised distributors or other third parties, you are responsible for ensuring that such customers, authorised distributors and third parties accept, and are contractually bound (by agreement with you or directly with Arm) to comply with, the terms and conditions of this License;
+(b) Any use by you of Arm's or any of its licensors' names, logos or trademarks to publicise or market any of Your Software containing (or developed or generated using) Arm Tools is subject to you obtaining express written permission from Arm;
+(c) You warrant that you shall not make any representations or warranties on behalf of Arm in respect of any of the Arm Tools or in respect of any other software, reports or documentation developed or generated by you in accordance with the license grants set out in this License;
+(d) You must reproduce or preserve (as applicable) any copyright notices which are included in or with any Arm Tools or components thereof; and
+(e) Except as otherwise agreed by Arm (including for the avoidance of doubt by inclusion of the relevant permission in a Supplementary Terms File), you may not disclose or otherwise distribute any Arm Tools Performance Data. For the avoidance of doubt, nothing in this sub-clause 2.1 (e) shall prevent you from disclosing or otherwise distributing Your Reports.
+
+2.2 NON-COMMERCIAL USE AND FREE OF CHARGE LICENSES: If you are in receipt of a Non-Commercial Use License for the Arm Tools, or the Arm Tools or any component thereof are identified or classified as such, and/or you are receiving the Arm Tools free of charge, then notwithstanding any of the other terms and conditions of this License, your use (which includes use by your Permitted Users) of the Arm Tools is limited as follows:
+(a) if you are receiving the Arm Tools free of charge:
+(i) no support or maintenance shall be provided to you in respect of the Arm Tools;
+(ii) the warranty set out in clause 7.1 of this License does not apply to you or your use of the Arm Tools, and Arm gives no other warranty whatsoever in relation to (and accepts no liability in connection with) the Arm Tools or your use (as permitted by this License) of them;
+(iii) Arm may immediately terminate this License at any time for any reason by giving written notice to you;
+(iv) except as otherwise expressly agreed in writing by Arm, you shall grant to Arm in full the license set out in clause 3.2 of this License; and/or
+(b) if you are receiving a Non-Commercial Use License or version (as applicable) of the Arm Tools:
+(i) you and your Permitted Users may use the Arm Tools for internal use only; and
+(ii) you are not permitted to distribute or sub-license (A) any part of the Arm Tools, or (B) Your Software, Your Hardware, or Your Reports developed under this License using the Arm Tools. The Arm Tools shall be used only by you and your Permitted Users, and you shall not (except as otherwise authorised in writing by Arm) allow any other third party whatsoever to use the Arm Tools.
+For the avoidance of doubt, if you are receiving a Non-Commercial Use License and the license is provided to you free of charge, the restrictions in both sub-clauses (a) and (b) above will apply to your use of the Arm Tools.
+
+2.3 LICENSE TYPES: Depending on the type of license you have agreed to purchase from Arm under this License (the details of which are set out in the order documentation provided to you by Arm), your use of the Arm Tools shall be limited to:
+(a) use of each Licensed Seat (i) by one individual named Permitted User only on a specified item of computer hardware ('named-user license'), OR (ii) by one individual Permitted User at a time only on a specified item of computer hardware ('node-locked license'), OR (iii) by one individual Permitted User at a time on specified items of computer hardware ('floating license'). In respect of 'node-locked licenses', each Licensed Seat may only be used for one 'process' at any one time. For the purpose of this sub-clause 2.3 (a), each 'process' is the execution of an instance of an Arm Tool; or
+(b) use for a Specified Project.
+
+2.4 PERMITTED USERS: You hereby agree to be responsible for the acts and omissions of any and all Permitted Users, and shall ensure that such Permitted Users (i) are contractually obliged to comply with the terms of this License, including those relating to confidentiality; and (ii) do not supply the Arm Tools or any components thereof to any third party whatsoever. Except as expressly provided in this License or as agreed in writing by Arm on a case by case basis, you shall not sub-license, redistribute, lease, rent or otherwise allow any third party to use the Arm Tools or License Keys.
+
+2.5 REVERSE ENGINEERING: Your use of the Arm Tools shall specifically exclude the reverse engineering, decompiling, disassembly, translation, adaptation, arrangement or other alteration of any part of the Arm Tools (except to the extent that applicable law overrides this provision or any part hereof).
+
+2.6 COPYRIGHT AND RESERVATION OF RIGHTS: The Arm Tools are owned by Arm and/or its licensors and are protected by copyright and other intellectual property rights, laws and international treaties. The Arm Tools are licensed not sold. Except as expressly provided by this License, you acquire no rights to the Arm Tools or any element thereof, or to any other Arm products or services. You shall not remove from the Arm Tools any copyright notice or other notice and shall ensure that any such notice is reproduced in any permitted reproduction of the whole or any part of the Arm Tools.
+
+2.7 TECHNICAL RESTRICTIONS IN THE ARM TOOLS: You must comply with any technical restrictions in the Arm Tools and License Keys, including any restrictions that restrict use to certain components of the Arm Tools or use only for certain purposes. You shall not work around any such technical restrictions.
+
+2.8 ARM DOCUMENTATION: You may use the Arm Documentation (if any) internally only in conjunction with your use of the Arm Software to which it relates.
+
+3. LICENSE OF FEEDBACK TO ARM
+3.1 You may at your discretion deliver any suggestions, comments, feedback, ideas, or know-how (whether in oral or written form) to Arm relating to or connected with your use of the Arm Tools ("Feedback"). Notwithstanding the foregoing, you shall not knowingly give to Arm any Feedback that you are aware (or should reasonably be aware) is subject to any patent, copyright or other intellectual property claim or right of any third party.
+
+3.2 Except as expressly notified by you to Arm (in writing which may include email) to the contrary, you hereby grant to Arm under your and your affiliates (as applicable) intellectual property, a perpetual, irrevocable, royalty free, non-exclusive, worldwide license to: (i) use, copy, modify, and create derivative works of the Feedback; (ii) sell, supply or otherwise distribute the whole or any part of the Feedback (and derivative works thereof) as part of any Arm owned or licensed product(s) without obligation or restriction of any kind; and (iii) sub-license to third parties the foregoing rights, including the right to sub-license to further third parties. No right is granted by you to Arm to sub-license your and your affiliates (as applicable) intellectual property except to the extent that it is provided to Arm as Feedback and is embodied in any Arm owned or licensed product(s). For the avoidance of doubt, if, during the License Term, you provide notice to Arm revoking the license granted under this clause 3.2, you acknowledge and agree that such revocation shall not apply to Feedback delivered to Arm prior to the date of receipt of the revocation notice, and that (notwithstanding the foregoing) Arm shall continue to be permitted to use Feedback received after the date of receipt of the revocation notice for internal purposes.
+
+3.3 Except as expressly licensed to Arm in clause 3.2, you retain all right, title and interest in and to the Feedback provided by you under this License.
+
+4. DATA COLLECTION AND PRIVACY
+4.1 The Arm Software may include features that enable it to transmit certain computer information over the internet to Arm's and/or its service providers' computer systems, for example your computer's internet protocol address, computer hardware and operating system details, or the serial numbers of the Arm Tools you have licensed. This information will not be shared with any third parties, and shall be used by Arm only for the purpose of Arm protecting its legitimate interests, which may include Arm verifying your right to use the Arm Tools and monitoring your compliance with the permitted uses and restrictions set out in this License.
+
+4.2 Arm may also collect anonymous data, which, for the avoidance of doubt, cannot be used to identify individual users of the Arm Tools. This information may be used by Arm to help us understand and analyse what components or features in the Arm Tools our end users are using in order to (i) maintain and improve the quality of the Arm Tools and the end user experience, (ii) inform end users of relevant new and improved products and services, and (iii) assist end users to maximise the performance of, or solve user experience issues with, the Arm Tools.
+
+4.3 Information collected by the Arm Software will only be used for the aforementioned purposes. Please refer to the Arm Privacy Policy https://www.arm.com/company/policies/privacy for further information on how Arm collects, uses and safeguards personal data (including but not limited to personal data collected for the protection of Arm's legitimate interests and your rights to object to its collection).
+
+5. SUPPORT AND MAINTENANCE
+5.1 Provision of reasonable support and maintenance is subject to payment by you of all applicable Fees.
+
+5.2 Any support provided by Arm in accordance with the above clause 5.1 shall (i) be provided by telephone, email or such other format as is designated by Arm, (ii) be prioritised at Arm's discretion, and (iii) not be used as a substitute for training or as additional resource for your projects.
+
+5.3 Maintenance will generally be provided in the form of Updates to the Arm Tools. Arm shall be under no obligation to provide such maintenance in respect of any modifications made by you (where permitted) to the Arm Tools. Updates do not constitute additional Licensed Seats and may only be used by you if you have an active Licensed Seat to run and use such Updates. Updates will generally be provided to you as soon as reasonably practicable following the date of general public release of the Update by Arm.
+
+5.4 In cases where the Arm Tools were provided to you free of charge, you are not entitled to any support or maintenance for the Arm Tools from Arm, but Arm may, in its sole discretion, provide support to you. If you obtained the Arm Tools from an Arm authorised distributor, reseller or other third party, support and maintenance may be provided by either Arm or the third party as per the terms of your contract for supply. Arm shall not be responsible for any delay or failure in connection with any third party supplier providing support or maintenance that it is obligated to provide to you. Please refer to the 'Support' area of https://www.arm.com for details of Arm's support services, relevant contact details, and (if applicable) details of other authorised support channels.
+
+5.5 Arm's obligations under this clause 5 are limited to the provision of support and maintenance to you, and Arm is under no obligation to provide any support and maintenance to any third parties. You agree to provide all front line support services to all third parties to whom you distribute any Arm Tools, Your Reports, Your Software or Your Hardware, pursuant to and in accordance with the terms of this License.
+
+5.6 This License does not grant you any entitlement to receive (i) Upgrades, (ii) Arm products other than those specified in your product documentation, or (iii) any new products developed or introduced by Arm from time to time, nor to receive any support or maintenance in respect of the same.
+
+6. CONFIDENTIALITY
+6.1 You acknowledge that the Arm Tools, License Keys, Arm Tools Performance Data, and any and all other software, documentation or other information licensed to you by Arm, or provided to you during discussions about or in connection with the Arm Tools (including this License and information provided during the provision by Arm of any support), contain trade secrets and confidential information of Arm ("Confidential Information").
+
+6.2 You agree to maintain all such Confidential Information in confidence and apply security measures (such measures to be no less stringent than the measures which you apply (or should reasonably apply) to protect your own like information, but not less than a reasonable degree of care) to prevent their unauthorised disclosure and use.
+
+6.3 Subject to any restrictions imposed by applicable law, the period of confidentiality shall be five (5) years from the date of disclosure of the Confidential Information. You agree that you shall not use any such information other than in your normal use of the Arm Tools as permitted by this License.
+
+7. LIMITED WARRANTIES
+7.1 Subject to the restrictions in clause 2, for the period of ninety (90) days from the date of receipt by you of the Arm Tools, Arm warrants to you that (i) the media on which any Arm Software is provided shall be free from defects in materials and workmanship under normal use; and (ii) the Arm Software will perform substantially in accordance with the accompanying Arm Documentation (if any). Arm's total liability and your exclusive remedy for breach of these warranties shall be limited to Arm, at Arm's option (a) replacing the defective Arm Software; or (b) using reasonable efforts to correct material, documented, reproducible defects in the Arm Software and delivering such corrected Arm Software to you; or (c) if you licensed the Arm Software directly from Arm, refunding the price paid by you to Arm for that Arm Software. Any replacement Arm Software will be warranted for the remainder of the original warranty period or thirty (30) days from the date of replacement, whichever is longer.
+
+7.2 The Arm Software described in any Arm Documentation is subject to continuous development and improvement. All particulars of the Arm Software and its use as described in the Arm Documentation are given by Arm in good faith. Consequently, the information contained in the Arm Documentation is subject to change without notice and is not warranted to be error free. If you discover any errors in the Arm Documentation please report them to Arm in writing. Any Arm Documentation provided to you that relates to specific industry quality and functional safety standard compliance may assist you in applying to a competent auditor for certification of Your Software or Your Hardware, but you acknowledge and agree that on its own such Arm Documentation may not provide sufficient evidence of, or be compatible with, the required safety compliance standards.
+
+7.3 Except as provided in clause 7.1 above, you agree that the Arm Tools are licensed "as is", and that Arm expressly disclaims all representations, warranties, conditions or other terms, express or implied or statutory, including without limitation the implied warranties of non-infringement, satisfactory quality, and fitness for a particular purpose. You acknowledge that it is your responsibility to satisfy yourself that the Arm Tools are fit for the intended purpose and satisfy your requirements, including compatibility with Your Hardware, and you expressly assume all liabilities and risks relating to (i) any use of an Arm Tool which is inconsistent with its design or any guidance provided to you in the applicable Arm Documentation, and/or (ii) any use of an Arm Tool with Your Software or Your Hardware where such software or hardware (as applicable) is not supported by or compatible with the relevant Arm Tool.
+
+7.4 You expressly assume all liabilities and risks relating to your use or operation of Your Software and Your Hardware designed or modified using the Arm Tools, including without limitation, Your software or Your Hardware designed or intended for safety-critical applications. Should Your Software or Your Hardware prove defective, you assume the entire cost of all necessary servicing, repair or correction.
+
+8. LIMITATION OF LIABILITY
+8.1 To the maximum extent permitted by applicable law, in no event shall Arm be liable for any indirect, special, incidental or consequential damages (including loss of profits) arising out of the use of, or inability to use, the Arm Tools, whether based on a claim under contract, tort or otherwise, even if Arm was advised of the possibility of such damages.
+
+8.2 Arm does not seek to limit or exclude liability for death or personal injury arising from Arm's negligence or Arm's fraud. Arm acknowledges that certain jurisdictions do not permit the exclusion or limitation of liability for consequential or incidental damages, and in such cases the above limitation relating to liability for consequential damages may not apply to you.
+
+8.3 Notwithstanding anything to the contrary contained in this License, the maximum liability of Arm to you in aggregate (in contract, tort or otherwise) in relation to or in connection with the subject matter of this License shall not exceed the greater of (i) the total sums paid by you to Arm (if any) for this License, and (ii) $10.00 USD. The existence of more than one claim will not enlarge or extend the limit.
+
+9. THIRD PARTY MATERIAL
+9.1 The Arm Tools may contain material owned or developed by third parties, including but not limited to open source software, freeware and commercial software ("Third Party Material"). Any Third Party Material is subject to the terms and conditions of the applicable Third Party Material license(s) and is not covered under the terms of this License. Details relating to such Third Party Material shall either be presented to you at the time of installation or shall be detailed in the Third Party Licenses File(s). Your use of such Third Party Material is subject to your compliance with the applicable Third Party Material license(s).
+
+9.2 Arm hereby disclaims any and all warranties express or implied from any third parties regarding, or otherwise connected with, any Third Party Material included in the Arm Tools and any Third Party Material from which the Arm Tools are derived, and/or your use of any or all of the Third Party Material in connection with Your Software or Your Hardware, including (without limitation) any warranties of satisfactory quality or fitness for a particular purpose.
+
+9.3 No Third Party Material licensors shall have any liability for any direct, indirect, incidental, special, exemplary, or consequential damages (including without limitation lost profits) howsoever caused and whether made under contract, tort or otherwise arising in any way out of your use or distribution of the Third Party Material or the exercise of any rights granted under either or both this License and the legal terms applicable to any Third Party Material, even if advised in advance of the possibility of such damages.
+
+10. GOVERNMENT REQUIREMENTS
+10.1 To the extent that you are an agency, contractor or instrumentality of the U.S. Government, you and we agree that:
+(a) the Arm Tools are commercial computer software and commercial computer software documentation, and that your rights therein are as specified in this License, per FAR 12.212 and DFARS 227.7202-3, as applicable, or in the case of NASA, subject to NSF 1852.22786. Arm acknowledges that, whilst commercial computer software or commercial computer software documentation shall be acquired under licenses customarily provided to the public, such licenses must be consistent with U.S. Federal law and otherwise satisfy the U.S. Government's needs ("U.S. Government Requirements"); and
+(b) you may assign your rights under this License to the relevant US Government Federal Department or the successor contractor designated by the US Government Federal Department upon termination of your related prime contract with that US Government Federal Department. If you exercise your rights under this clause 10.1(b), you acknowledge and agree that you shall remain liable to Arm in respect of all your obligations under this License.
+
+10.2 If there is any material inconsistency between (i) either a U.S. Government Requirement or a requirement of another government with which Arm is mandated by statute to comply and (ii) any provision of this License, the terms of the relevant government requirement shall prevail and the provision in question shall be deemed varied or deleted (as applicable) as required by the terms of the relevant government requirement. For the avoidance of doubt, in such circumstances, all other terms, conditions and provisions of this License will continue to be valid to the fullest extent permitted by law in accordance with the below clause 12.3.
+
+11. TERM AND TERMINATION
+11.1 Subject to clauses 11.2 and 11.3 below, this License shall remain in force until terminated by you, by Arm or (in the case of a time limited license) by expiry.
+
+11.2 In the event of a party breaching of any of the terms and conditions of this License, which if capable of remedy, has not been remedied by that party within thirty (30) days of the date of breach, without prejudice to any of its other rights under this License, the non-breaching party may terminate this License immediately upon giving written notice to the breaching party. Upon termination of this License by you or by Arm, or upon expiry, you shall (and shall ensure that your Permitted Users shall) immediately (i) stop using the Arm Tools (or any element thereof) and any Confidential Information and, (ii) destroy all copies of the same in your possession or control, together with all Arm Documentation and related materials.
+
+11.3 Notwithstanding the foregoing, except where Arm has terminated this License for your breach, your rights (if applicable) to distribute any of Your Software or Your Hardware developed using the Arm Tools prior to termination or expiry of this License shall (subject to your continued compliance with the terms and conditions of this License) survive such termination or expiry.
+
+12. GENERAL
+12.1 This License is governed by English Law. Notwithstanding the foregoing, to the extent that you are an agency, contractor or instrumentality of the U.S. Government, disputes arising under or relating to this License shall be decided under the U.S. federal law of government contracting, including without limitation the Contract Disputes Act. Nothing in this License shall prevent you from enforcing your intellectual property rights or seeking injunctive or other equitable relief in any court of competent jurisdiction. The parties hereby disclaim application of the United Nations Convention on Contracts for the International Sale of Goods and the Uniform Computer Information Transactions Act.
+
+12.2 Except where Arm agrees otherwise in (i) a written contract signed by you and Arm, or (ii) a written contract provided by Arm and accepted by you, this is the only agreement between you and Arm relating to the Arm Tools and it may only be modified by written agreement between you and Arm. No terms and conditions contained in any purchase order or other document issued by you, or any advertising or other representation by you or any third party shall add to, supersede or in any way vary the terms and conditions of this License. This License (and any documents expressly incorporated into it by reference herein) represents the entire agreement between you and Arm in relation to its subject matter.
+
+12.3 If any clause or sentence in this License is held by a court of law to be illegal or unenforceable, the remaining provisions of this License shall not be affected. Any failure by Arm to enforce any of the provisions of this License, unless waived in writing, shall not constitute a waiver of Arm's rights to enforce such provision or any other provision of this License in the future.
+
+12.4 Subject to clause 10.1(b), neither this License or any rights granted to you under it may be assigned, sub-licensed or otherwise transferred by you to any third party without the prior written consent of Arm. An assignment shall be deemed to include, without limitation (i) any transaction or series of transactions whereby a third party acquires, directly or indirectly, the power to control the management and policies of you, whether through the acquisition of voting securities, by contract or otherwise; and (ii) the sale of more than fifty percent (50%) of your assets whether in a single transaction or series of transactions. Notwithstanding the foregoing, Arm may, in its discretion acting reasonably, separately agree to authorise the re-host of a Licensed Seat (for which additional charges may apply).
+
+12.5 Subject to any applicable legal restrictions, including but not limited to those relating to the security of classified information, at Arm's request, (i) you agree to check your computers for installations of the Arm Tools, copies of License Keys, contents of any license server log files, individual or concurrent usage of Seats, and any other information requested by Arm relating to Arm Tools installation, usage and License Key management, and, to provide this information to Arm; and (ii) you agree that Arm may instruct appropriately qualified independent auditors to perform such checks by prior appointment during your normal business hours on reasonable notice. In respect of any audit, Arm shall bear the auditors' costs for that audit unless it reveals unlicensed usage, in which case you shall promptly reimburse Arm for all reasonable costs and expenses, including professional fees, relating to such audit. Any information which is disclosed to Arm or such auditors during checking or audit shall be treated as your confidential information and shall only be used by Arm for compliance and enforcement purposes.
+
+12.6 The Arm Tools provided under this License are subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. You agree to comply fully with all laws and regulations of the United States and other countries ("Export Laws") to ensure that the Arm Tools are not (i) exported, directly or indirectly, in violation of Export Laws, either to any countries that are subject to U.S. export restrictions or to any end user who has been prohibited from participating in the U.S export transactions by any federal agency of the U.S. government; or (ii) intended to be used for any purpose prohibited by Export Laws, including, without limitation, nuclear, chemical, or biological weapons proliferation.
+
+Arm Document Reference LES-PRE-21260, Version 12.2, Effective Date 12 February 2019

meta-arm-toolchain/custom-licenses/Armcompiler-Redistributables

@@ -0,0 +1,36 @@
+===============================================================================
+This file lists the portions of this release of 'Arm Compiler 6' that you are
+permitted to redistribute and any terms and conditions applicable to such
+redistribution. Refer to the End User License Agreement that accompanies this
+release of 'Arm Compiler 6' for terms and conditions relating to permitted
+redistribution and 'Redistributables'. Any modification or redistribution of
+files covered by open-source licenses, whether listed here or not, is subject
+to the terms of the applicable open-source license.
+===============================================================================
+
+1) Target Libraries(libraries and helper libraries): Redistribution permitted
+only in object code form, compiled and linked by Arm Compiler in to Software
+Applications developed by you or your permitted users, provided that Software
+Applications contain substantial additional functionality. If you choose to
+redistribute the whole or any part of Target Libraries, you agree: (a) to
+ensure that they are licensed for use only as part of Software Applications
+and only for execution on microprocessors manufactured or simulated under
+licence from Arm; (b) not to use Arm's or any of its licensors names, logos or
+trademarks to market Software Applications; (c) to include valid copyright
+notices on Software Applications, and preserve any copyright notices which are
+included with, or in, the Target Libraries; and (d) to ensure that any further
+redistribution is limited to redistribution by either or both your customers
+and your authorised distributors as part of Software Applications and that
+your customers and your authorised distributors comply with these terms.
+
+Details of the Target Libraries and their location in your installation:
+a) Libraries: C libraries; ABI libraries; Standard C++ libraries; C++ runtime
+support libraries; Maths libraries; Software floating-point libraries; VFP
+support found in your installation in armlib and libcxx subdirectories at
+<install_dir>\lib
+
+b) Helper libraries: ARM Compiler 6 helper libraries found in your
+installation at <install_dir>\lib\armlib\h_*
+
+---------------------------------------------------------------------
+END OF FILE: redistributables.txt

meta-arm-toolchain/custom-licenses/Armcompiler-Supplementary-terms

@@ -0,0 +1,10 @@
+===============================================================================
+This file contains details of any applicable specific extensions, limitations
+or other variations to the terms of the End User License Agreement that
+accompanies this release of 'Arm Compiler 6'.
+===============================================================================
+
+There are no 'Supplementary Terms' applicable to this release of
+'Arm Compiler 6'.
+---------------------------------------------------------------------
+END OF FILE: supplementary_terms.txt

meta-arm-toolchain/recipes-devtools/external-arm-toolchain/arm-binary-toolchain.inc

@@ -0,0 +1,22 @@
+FILES_${PN} = "${datadir} ${bindir}"
+
+BINNAME = "${@d.getVar("BPN").strip("gcc-")}"
+
+do_install() {
+    install -d ${D}${datadir}/${BINNAME}/
+    cp -r ${S}/. ${D}${datadir}/
+
+    install -d ${D}${bindir}
+    # Symlink all executables into bindir
+    for f in ${D}${datadir}/bin/${BINNAME}-*; do
+        lnr $f ${D}${bindir}/$(basename $f)
+    done
+}
+
+INSANE_SKIP_${PN} = "already-stripped libdir staticdev file-rdeps arch dev-so"
+
+INHIBIT_SYSROOT_STRIP = "1"
+INHIBIT_PACKAGE_STRIP = "1"
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+
+BBCLASSEXTEND = "native nativesdk"

meta-arm-toolchain/recipes-devtools/external-arm-toolchain/armcompiler_6.13.bb

@@ -0,0 +1,48 @@
+# SPDX-License-Identifier: MIT
+#
+# Copyright (c) 2020 Arm Limited
+#
+
+require arm-binary-toolchain.inc
+
+SUMMARY = "Baremetal Armcompiler for Cortex-A, Cortex-R and Cortex-M processors"
+HOMEPAGE = "https://developer.arm.com/tools-and-software/embedded/arm-compiler/downloads/version-6"
+
+# Certain features of armcompiler requires a license. For more information, please refer to the armcompiler user guide:
+# https://developer.arm.com/tools-and-software/software-development-tools/license-management/resources/product-and-toolkit-configuration
+# Usually set and export of these variables are required:
+# ARM_TOOL_VARIANT, ARMLMD_LICENSE_FILE, LM_LICENSE_FILE
+
+LICENSE = "Armcompiler-License-agreement & Armcompiler-Redistributables & \
+           Armcompiler-Supplementary-terms & Armcompiler-Third-party-licenses"
+LICENSE_FLAGS = "armcompiler"
+
+LIC_FILES_CHKSUM = "file://license_terms/license_agreement.txt;md5=40cd57dbb1f9d111fb6923945849d51c \
+                    file://license_terms/redistributables.txt;md5=e510e47f7f5be1356ea6218f5b1f6c55 \
+                    file://license_terms/supplementary_terms.txt;md5=17a2efdbd320ceda48a3521747e02dd9 \
+                    file://license_terms/third_party_licenses.txt;md5=6273fa29eb26c0093e1a7deaef7bafec "
+
+PROVIDES = "virtual/armcompiler"
+
+ARMCLANG_VERSION = "DS500-BN-00026-r5p0-15rel0"
+
+COMPATIBLE_HOST = "x86_64.*-linux"
+
+SRC_URI = "https://developer.arm.com/-/media/Files/downloads/compiler/${ARMCLANG_VERSION}.tgz;subdir=${ARMCLANG_VERSION}"
+
+SRC_URI[md5sum] = "fbed6edf5eb211c45df7b8548a10535a"
+SRC_URI[sha256sum] = "de3947525d9846a09cca52cfa84eb880e73f04398b778e4e599366d4c2416596"
+
+S = "${WORKDIR}/${ARMCLANG_VERSION}"
+
+do_install() {
+    install -d ${D}${datadir}/armclang/
+    # Commercial license flag set, so recipe will only install when explicitly agreed to it already
+    ${S}/install_x86_64.sh --i-agree-to-the-contained-eula -d ${D}${datadir}/armclang/ --no-interactive
+
+    install -d ${D}${bindir}
+    # Symlink all executables into bindir
+    for f in ${D}${datadir}/armclang/bin/*; do
+        lnr $f ${D}${bindir}/$(basename $f)
+    done
+}

meta-arm-toolchain/recipes-devtools/external-arm-toolchain/external-arm-sdk-toolchain.bb

@@ -0,0 +1,144 @@
+inherit cross-canadian
+
+PN = "external-arm-sdk-toolchain-${TARGET_ARCH}"
+BPN = "external-arm-sdk-toolchain"
+PV = "${EAT_VER_MAIN}"
+
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+INHIBIT_PACKAGE_STRIP = "1"
+INHIBIT_SYSROOT_STRIP = "1"
+INHIBIT_DEFAULT_DEPS = "1"
+EXCLUDE_FROM_SHLIBS = "1"
+
+EAT_LICENSE ??= ""
+
+LICENSE = "${EAT_LICENSE}"
+LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302"
+
+# Skip packaging QA checks for prebuilt binaries
+INSANE_SKIP_gcc-cross-canadian-${TRANSLATED_TARGET_ARCH} = "dev-so staticdev file-rdeps libdir"
+INSANE_SKIP_gdb-cross-canadian-${TRANSLATED_TARGET_ARCH} = "dev-so file-rdeps"
+INSANE_SKIP_binutils-cross-canadian-${TRANSLATED_TARGET_ARCH} = "dev-so file-rdeps"
+
+# Skip file dependencies in RPM for prebuilt binaries
+SKIP_FILEDEPS = "1"
+
+PROVIDES = "\
+	gcc-cross-canadian-${TRANSLATED_TARGET_ARCH} \
+	gdb-cross-canadian-${TRANSLATED_TARGET_ARCH} \
+	binutils-cross-canadian-${TRANSLATED_TARGET_ARCH} \
+"
+
+PACKAGES = "\
+	gcc-cross-canadian-${TRANSLATED_TARGET_ARCH} \
+	gdb-cross-canadian-${TRANSLATED_TARGET_ARCH} \
+	binutils-cross-canadian-${TRANSLATED_TARGET_ARCH} \
+"
+
+# Adjust defaults in line with external toolchain
+bindir = "${exec_prefix}/bin"
+libdir = "${exec_prefix}/lib"
+libexecdir = "${exec_prefix}/libexec"
+datadir = "${exec_prefix}/share"
+gcclibdir = "${libdir}/gcc"
+
+FILES_gcc-cross-canadian-${TRANSLATED_TARGET_ARCH} = "\
+	${prefix}/${EAT_TARGET_SYS}/lib/libstdc++.* \
+	${prefix}/${EAT_TARGET_SYS}/lib/libgcc_s.* \
+	${prefix}/${EAT_TARGET_SYS}/lib/libsupc++.* \
+	${prefix}/${EAT_TARGET_SYS}/include \
+	${gcclibdir}/${EAT_TARGET_SYS}/${EAT_VER_GCC}/* \
+	${bindir}/${TARGET_PREFIX}gcov \
+	${bindir}/${TARGET_PREFIX}gcc* \
+	${bindir}/${TARGET_PREFIX}g++ \
+	${bindir}/${TARGET_PREFIX}cpp \
+	${libexecdir}/* \
+"
+
+FILES_gdb-cross-canadian-${TRANSLATED_TARGET_ARCH} = "\
+	${bindir}/${TARGET_PREFIX}gdb* \
+	${datadir}/gdb/* \
+"
+
+FILES_binutils-cross-canadian-${TRANSLATED_TARGET_ARCH} = "\
+	${prefix}/${EAT_TARGET_SYS}/bin/ld* \
+	${prefix}/${EAT_TARGET_SYS}/bin/objcopy \
+	${prefix}/${EAT_TARGET_SYS}/bin/strip \
+	${prefix}/${EAT_TARGET_SYS}/bin/nm \
+	${prefix}/${EAT_TARGET_SYS}/bin/ranlib \
+	${prefix}/${EAT_TARGET_SYS}/bin/as \
+	${prefix}/${EAT_TARGET_SYS}/bin/ar \
+	${prefix}/${EAT_TARGET_SYS}/bin/objdump \
+	${prefix}/${EAT_TARGET_SYS}/lib/ldscripts/* \
+	${bindir}/${TARGET_PREFIX}ld* \
+	${bindir}/${TARGET_PREFIX}addr2line \
+	${bindir}/${TARGET_PREFIX}objcopy \
+	${bindir}/${TARGET_PREFIX}readelf \
+	${bindir}/${TARGET_PREFIX}strip \
+	${bindir}/${TARGET_PREFIX}nm \
+	${bindir}/${TARGET_PREFIX}ranlib \
+	${bindir}/${TARGET_PREFIX}gprof \
+	${bindir}/${TARGET_PREFIX}as \
+	${bindir}/${TARGET_PREFIX}c++filt \
+	${bindir}/${TARGET_PREFIX}ar \
+	${bindir}/${TARGET_PREFIX}strings \
+	${bindir}/${TARGET_PREFIX}objdump \
+	${bindir}/${TARGET_PREFIX}size \
+"
+
+DESCRIPTION_gcc-cross-canadian-${TRANSLATED_TARGET_ARCH} = "The GNU cc and gcc C compilers"
+DESCRIPTION_gdb-cross-canadian-${TRANSLATED_TARGET_ARCH} = "gdb - GNU debugger"
+DESCRIPTION_binutils-cross-canadian-${TRANSLATED_TARGET_ARCH} = "A GNU collection of binary utilities"
+
+LICENSE_gcc-cross-canadian-${TRANSLATED_TARGET_ARCH} = "${EAT_GCC_LICENSE}"
+LICENSE_gdb-cross-canadian-${TRANSLATED_TARGET_ARCH} = "${EAT_GDB_LICENSE}"
+LICENSE_binutils-cross-canadian-${TRANSLATED_TARGET_ARCH} = "${EAT_BFD_LICENSE}"
+
+PKGV_gcc-cross-canadian-${TRANSLATED_TARGET_ARCH} = "${EAT_VER_GCC}"
+PKGV_gdb-cross-canadian-${TRANSLATED_TARGET_ARCH} = "${EAT_VER_GDB}"
+PKGV_binutils-cross-canadian-${TRANSLATED_TARGET_ARCH} = "${EAT_VER_BFD}"
+
+do_install() {
+	install -d ${D}${prefix}/${EAT_TARGET_SYS}/bin
+	install -d ${D}${prefix}/${EAT_TARGET_SYS}/lib
+	install -d ${D}${prefix}/${EAT_TARGET_SYS}/include
+	install -d ${D}${bindir}
+	install -d ${D}${libdir}
+	install -d ${D}${prefix}/${EAT_TARGET_SYS}/lib/ldscripts
+	install -d ${D}${libexecdir}
+	install -d ${D}${datadir}/gdb
+	install -d ${D}${gcclibdir}/${EAT_TARGET_SYS}/${EAT_VER_GCC}/include
+
+	CP_ARGS="-Prf --preserve=mode,timestamps --no-preserve=ownership"
+
+	# gcc
+	for i in libstdc++.* libgcc_s.* libsupc++.*; do
+		cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/${EAT_TARGET_SYS}/${EAT_LIBDIR}/$i ${D}${prefix}/${EAT_TARGET_SYS}/lib
+	done
+	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/${EAT_TARGET_SYS}/include/* ${D}${prefix}/${EAT_TARGET_SYS}/include
+	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/lib/gcc/${EAT_TARGET_SYS}/${EAT_VER_GCC}/* ${D}${gcclibdir}/${EAT_TARGET_SYS}/${EAT_VER_GCC}
+	for i in gcov gcc* g++ cpp; do
+		cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/bin/${TARGET_PREFIX}$i ${D}${bindir}
+	done
+	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/libexec/* ${D}${libexecdir}
+
+	# gdb
+	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/bin/${TARGET_PREFIX}gdb* ${D}${bindir}
+	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/share/gdb/* ${D}${datadir}/gdb/
+
+	# binutils
+	for i in ld* objcopy strip nm ranlib as ar objdump; do
+		cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/${EAT_TARGET_SYS}/bin/$i ${D}${prefix}/${EAT_TARGET_SYS}/bin
+	done
+	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/${EAT_TARGET_SYS}/lib/ldscripts/* ${D}${prefix}/${EAT_TARGET_SYS}/lib/ldscripts
+	for i in ld* addr2line objcopy readelf strip nm ranlib gprof as c++filt ar strings objdump size; do
+		cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/bin/${TARGET_PREFIX}$i ${D}${bindir}
+	done
+}
+
+python () {
+    if not d.getVar("EAT_VER_MAIN", False):
+        raise bb.parse.SkipPackage("External ARM toolchain not configured (EAT_VER_MAIN not set).")
+    if d.getVar('TCLIBC', True) != "glibc":
+        raise bb.parse.SkipPackage("incompatible with %s" % d.getVar('TCLIBC', True))
+}

meta-arm-toolchain/recipes-devtools/external-arm-toolchain/external-arm-toolchain.bb

@@ -1,9 +1,9 @@
 require recipes-core/glibc/glibc-package.inc
 
+require license.inc
+
 INHIBIT_DEFAULT_DEPS = "1"
 
-# License applies to this recipe code, not the toolchain itself
-LICENSE = "MIT"
 LIC_FILES_CHKSUM = "\
 	file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302 \
 	file://${COREBASE}/meta/COPYING.MIT;md5=3da9cfbcb788c80a0384361b4de20420 \
@@ -54,7 +54,6 @@ PROVIDES += "\
 PV = "${EAT_VER_MAIN}"
 
 BINV = "${EAT_VER_GCC}"
-TARGET_SYS = "${EAT_TARGET_SYS}"
 
 SRC_URI = "file://SUPPORTED"
 
@@ -75,8 +74,8 @@ do_install() {
 	install -d ${D}${datadir}
 	install -d ${D}${includedir}
 	install -d ${D}/include
-	install -d ${D}${libdir}/${EAT_TARGET_SYS}/${EAT_VER_GCC}
-	install -d ${D}${libdir}/gcc/${EAT_TARGET_SYS}/${EAT_VER_GCC}
+	install -d ${D}${libdir}/${TARGET_SYS}/${EAT_VER_GCC}
+	install -d ${D}${libdir}/gcc/${TARGET_SYS}/${EAT_VER_GCC}
 
 	CP_ARGS="-Prf --preserve=mode,timestamps --no-preserve=ownership"
 	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/${EAT_TARGET_SYS}/${EAT_LIBDIR}/*  ${D}${base_libdir}
@@ -105,6 +104,9 @@ do_install() {
 	fi
 
 	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/${EAT_TARGET_SYS}/include/* ${D}${includedir}
+	if [ -d ${D}${includedir}/c++/${EAT_VER_GCC}/${EAT_TARGET_SYS} ]; then
+		mv ${D}${includedir}/c++/${EAT_VER_GCC}/${EAT_TARGET_SYS} ${D}${includedir}/c++/${EAT_VER_GCC}/${TARGET_SYS}
+	fi
 	ln -sf ../usr/include/c++ ${D}/include/c++
 
 	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/${EAT_TARGET_SYS}/libc/usr/bin/* ${D}${bindir}
@@ -116,11 +118,11 @@ do_install() {
 	sed -i -e 's#/bin/bash#/bin/sh#' ${D}${bindir}/tzselect
 	sed -i -e 's#/bin/bash#/bin/sh#' ${D}${bindir}/ldd
 
-	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/lib/gcc/${EAT_TARGET_SYS}/${EAT_VER_GCC}/crt*.o ${D}${libdir}/${EAT_TARGET_SYS}/${EAT_VER_GCC}/
-
-	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/lib/gcc/${EAT_TARGET_SYS}/${EAT_VER_GCC}/libgcov* ${D}${libdir}/gcc/${EAT_TARGET_SYS}/${EAT_VER_GCC}/
-	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/lib/gcc/${EAT_TARGET_SYS}/${EAT_VER_GCC}/include ${D}${libdir}/gcc/${EAT_TARGET_SYS}/${EAT_VER_GCC}/
-	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/lib/gcc/${EAT_TARGET_SYS}/${EAT_VER_GCC}/finclude ${D}${libdir}/gcc/${EAT_TARGET_SYS}/${EAT_VER_GCC}/
+	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/lib/gcc/${EAT_TARGET_SYS}/${EAT_VER_GCC}/crt*.o ${D}${libdir}/${TARGET_SYS}/${EAT_VER_GCC}/
+	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/lib/gcc/${EAT_TARGET_SYS}/${EAT_VER_GCC}/libgcc* ${D}${libdir}/${TARGET_SYS}/${EAT_VER_GCC}/
+	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/lib/gcc/${EAT_TARGET_SYS}/${EAT_VER_GCC}/libgcov* ${D}${libdir}/gcc/${TARGET_SYS}/${EAT_VER_GCC}/
+	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/lib/gcc/${EAT_TARGET_SYS}/${EAT_VER_GCC}/include ${D}${libdir}/gcc/${TARGET_SYS}/${EAT_VER_GCC}/
+	cp ${CP_ARGS} ${EXTERNAL_TOOLCHAIN}/lib/gcc/${EAT_TARGET_SYS}/${EAT_VER_GCC}/finclude ${D}${libdir}/gcc/${TARGET_SYS}/${EAT_VER_GCC}/
 
 	# fix up the copied symlinks (they are still pointing to the multiarch directory)
 	linker_name="${@bb.utils.contains("TUNE_FEATURES", "aarch64", "ld-linux-aarch64.so.1", bb.utils.contains("TUNE_FEATURES", "callconvention-hard", "ld-linux-armhf.so.3", "ld-linux.so.3",d), d)}"
@@ -305,11 +307,25 @@ PACKAGES =+ "\
 	linux-libc-headers-dev \
 "
 
+# Re-order PACKAGES list in order to shift ${PN}-dev towards the end as
+# it is meant to pick up remaining dev libraries and headers that aren't
+# picked up by other packages. And since some static libraries needs to
+# be packaged in ${PN}-dev, so we need to keep ${PN}-staticdev later in
+# order.
+
+PACKAGES := "${@oe.utils.str_filter_out('${PN}-dev', '${PACKAGES}', d)}"
+PACKAGES := "${@oe.utils.str_filter_out('${PN}-staticdev', '${PACKAGES}', d)}"
+PACKAGES += "\
+	${PN}-dev \
+	${PN}-staticdev \
+"
+
 INSANE_SKIP_${PN}-dbg = "staticdev"
 INSANE_SKIP_${PN}-utils += "ldflags"
 INSANE_SKIP_libstdc++ += "ldflags"
 INSANE_SKIP_libgfortran += "ldflags"
 INSANE_SKIP_libgcc += "ldflags dev-deps"
+INSANE_SKIP_libgcc-dev += "staticdev"
 INSANE_SKIP_libgfortran += "ldflags dev-deps"
 INSANE_SKIP_libstdc++ += "ldflags dev-deps"
 INSANE_SKIP_libatomic += "ldflags"
@@ -654,13 +670,9 @@ SUMMARY_libitm-staticdev = "GNU transactional memory support library - static de
 
 EAT_VER_MAIN ??= ""
 
-
 python () {
     if not d.getVar("EAT_VER_MAIN", False):
         raise bb.parse.SkipPackage("External ARM toolchain not configured (EAT_VER_MAIN not set).")
-    import re
-    notglibc = (re.match('.*uclibc$', d.getVar('TARGET_OS', True)) != None) or (re.match('.*musl$', d.getVar('TARGET_OS', True)) != None)
-    if notglibc:
-        raise bb.parse.SkipPackage("incompatible with target %s" %
-                                   d.getVar('TARGET_OS', True))
+    if d.getVar('TCLIBC', True) != "glibc":
+        raise bb.parse.SkipPackage("incompatible with %s" % d.getVar('TCLIBC', True))
 }

meta-arm-toolchain/recipes-devtools/external-arm-toolchain/gcc-aarch64-none-elf_9.2-2019.12.bb

@@ -0,0 +1,21 @@
+# Copyright (C) 2020 Texas Instruments Inc.
+# Released under the MIT license (see COPYING.MIT for the terms)
+
+require arm-binary-toolchain.inc
+
+COMPATIBLE_HOST = "(x86_64|aarch64).*-linux"
+
+SUMMARY = "Baremetal GCC for Aarch64 processors"
+LICENSE = "GPL-3.0-with-GCC-exception & GPLv3"
+
+LIC_FILES_CHKSUM = "${@d.getVar(d.expand("LIC_FILES_CHKSUM_${HOST_ARCH}"))}"
+LIC_FILES_CHKSUM_aarch64 = "file://share/doc/gcc/Copying.html;md5=1b548d9c341b3b5c82bc88551964aa60"
+LIC_FILES_CHKSUM_x86-64 = "file://share/doc/gcc/Copying.html;md5=c1df856e21b17e58b0adbe29cacf4bd4"
+
+PROVIDES = "virtual/aarch64-none-elf-gcc"
+
+SRC_URI = "https://developer.arm.com/-/media/Files/downloads/gnu-a/${PV}/binrel/gcc-arm-${PV}-${HOST_ARCH}-${BINNAME}.tar.xz;name=gnu-a-${HOST_ARCH}"
+SRC_URI[gnu-a-x86_64.sha256sum] = "36d2cbe7c2984f2c20f562ac2f3ba524c59151adfa8ee10f1326c88de337b6d1"
+SRC_URI[gnu-a-aarch64.sha256sum] = "041ca53bdd434b1a48f32161e957da1b84543c373d1881e2fd84a1579f87f243"
+
+S = "${WORKDIR}/gcc-arm-${PV}-${HOST_ARCH}-${BINNAME}"