96 Commits

Author SHA1 Message Date
Colin Finck
d0044639fe Import Rust 1.58.1 recipes from openembedded-core, remove Rust 1.51.0. 2022-02-09 09:44:48 +01:00
Ralf Anton Beier
448047c7e4 Upgrade to 1.54.0 (#359)
The rust patches for riscv64 have been upstreamed
and are not needed anymore.

The riscv64 patches for libstd-rs need to be
applied to libc-0.2.93 to work. Some slight
modifications are necessary.

Signed-off-by: Ralf Anton Beier <ralf_beier@me.com>
2021-08-09 14:10:00 -04:00
Martin 'JaMa' Jansa
bf6705fb7f Convert to new override syntax (#357)
* Convert to new override syntax

This is the result of automated script (0.9.0) conversion:

oe-core/scripts/contrib/convert-overrides.py .

converting the metadata to use ":" as the override character instead of "_".

Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>

* Manually fix the conversion

Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>

* layer.conf: Update layer compatibility with only dunfell and newer.

Add honister to mark the layers as compatible with honister now that it uses
the new override syntax.

Drop zeus and older which are missing a support for newer override syntax which
was backported only to 1.46 branch (used by dunfell) and newer, e.g.:
https://git.openembedded.org/bitbake/commit/?h=1.46&id=c5418eae56cc50dbae7951c055434a0c456c53a4

Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>

* CI: use YOCTO_BRANCH instead of yocto-${YOCTO_VERSION} for poky checkout

* using latest revision in branch is often better than sticking to
  some point releases

Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>

* CI: switch to hardknott branch

* gatesgarth is already EOL, better to use something supported

Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
2021-08-05 17:37:51 -04:00
Anatol Belski
ab86e0a068 nativesdk: Add some tools in a separate recipe (#345)
* nativesdk: Add some tools in a separate recipe

This brings ATM:
- clippy
- rustfmt

Another approach might be to include these into the existing rust recipe,
but as we can't really use PACKAGECONFIG here it might just overload it.
This way, the tools will be built in parallel and still can be excluded
from the packgae group, if desired.

Signed-off-by: Anatol Belski <anbelski@linux.microsoft.com>
2021-06-05 13:42:18 -04:00
Anatol Belski
439dea8664 nativesdk: Implement cross canadian support
This addition closes #236 requesting the SDK support. The implementation
consists on a yet minimum set of worky functionality;

- Includes rustc, rustdoc and cargo.
- Includes libstd and accompanying lib archives for host and for target.
- Integrates with the standard environment setup script.
- Integrates configurations automatically build for target.

The supported build host is still AMD64 only.

Note that there's no need on introducing crosssdk package as the
official snapshot package serves same way as a non SDK build.

Possible future directions:

- Offline build:
	- Support pre-cached set of crates that can be vendored.
	- Support pre-filled cargo registry.
- Support further tools like cargo-fmt, cargo-clippy, GDB support and so
on.

Signed-off-by: Anatol Belski <anbelski@linux.microsoft.com>
2021-03-30 15:11:59 +00:00
Johan Anderholm
cb5a599f02 rust.inc: Build the profiler runtime
Needed when compiling with options such as "-C profile-generate" or
"-Z instrument-coverage", e.g. when generating coverage reports or doing
profile guided optimization.
2021-03-16 14:15:32 +01:00
Khem Raj
3f3aa9a6bb Merge pull request #318 from YoeDistro/kraj/riscv-musl
add riscv musl support
2021-03-01 08:42:09 -08:00
Cody Schafer
f31b044c53 Merge pull request #317 from YoeDistro/kraj/ppc64le
rust: Enable ppc64le target
2021-02-28 13:36:22 -05:00
Colin Finck
6f399bbd90 Merge pull request #319 from ColinFinck/fix/llvm-cpu
Revamp llvm_cpu to select the closest CPU for optimization.
2021-02-26 14:07:40 +01:00
Colin Finck
81f9357b58 Remove mips/mipsel translation to mips32, which is the same as "generic" 2021-02-24 12:13:18 +01:00
Colin Finck
f8b9103477 Remove checks for Rust versions we don't build anymore. 2021-02-23 17:54:26 +01:00
Colin Finck
83ad3d415f Revamp llvm_cpu to select the closest CPU for optimization. 2021-02-23 16:32:55 +01:00
Khem Raj
38a017d9de rust: Enable ppc64le target
this helps building the compiler, work is still needed for libstd-rs and
other pieces

Signed-off-by: Khem Raj <raj.khem@gmail.com>
2021-02-20 13:04:07 -08:00
Khem Raj
c1e1921e03 rust/cargo/libstd-rs: Add riscv/musl support
Signed-off-by: Khem Raj <raj.khem@gmail.com>
2021-02-17 21:56:19 -08:00
Johan Anderholm
920328c8d8 rust-native shouldn't depend on TARGET variables
Similar to 3b783652cc, this makes sure
rust-native does not depend on target variables. This allow one
rust-native to be shared between machines of different architectures
again.

For the record, the following guide was used to find out why
do_rust_gen_targets differed between different machines.
https://wiki.yoctoproject.org/wiki/TipsAndTricks/Understanding_what_changed_(diffsigs_etc)
2021-02-16 19:49:46 +01:00
Alex Kiernan
53c9aabda3 rust: Drop v8.1a tune for aarch64
Building for "+v8.1a"  breaks on (at least) Cortex A53 (Armv8-A) on
startup with `Illegal instruction`.

Fixes: 26609f46d9 ("rust.inc: use 'v8.1a' feature when building for aarch64 instead of 'v8'")
2021-02-09 03:13:25 +00:00
Martin Jansa
26609f46d9 rust.inc: use 'v8.1a' feature when building for aarch64 instead of 'v8'
* get rid of annoying
  '+v8' is not a recognized feature for this target (ignoring feature)
  messages in aarch64 builds, they are shown in the log very often:

  $ grep -c 'is not a recognized feature for this target (ignoring feature)' cargo/1.49.0-r0/temp/log.do_compile.76960
  3824

  and sometimes the formatting looks strange as well e.g.:
  | ''+v8' is not a recognized feature for this target (ignoring feature)
  | +v8' is not a recognized feature for this target (ignoring feature)
  | '+v8' is not a recognized feature for this target (ignoring feature)
  | '+v8' is not a recognized feature for this target (ignoring feature)
  | '+v8' is not a recognized feature for this target (ignoring feature)
  | ''+v8+v8' is not a recognized feature for this target' is not a recognized feature for this target (ignoring feature)
  |  (ignoring feature)
  | '+v8' is not a recognized feature for this target (ignoring feature)
  | '+v8' is not a recognized feature for this target (ignoring feature)
  | '+v8' is not a recognized feature for this target (ignoring feature)
  | '+v8' is not a recognized feature for this target (ignoring feature)
  | ''''''+v8+v8+v8+v8+v8' is not a recognized feature for this target' is not a recognized feature for this target' is not a recognized feature for this target' is not a recognized feature for this target' is not a recognized feature for this target+v8 (ignoring feature)
  |  (ignoring feature)
  |  (ignoring feature)
  |  (ignoring feature)
  |  (ignoring feature)
  | ' is not a recognized feature for this target (ignoring feature)
  | '+v8' is not a recognized feature for this target (ignoring feature)
  | '+v8' is not a recognized feature for this target (ignoring feature)
  | ''+v8+v8' is not a recognized feature for this target' is not a recognized feature for this target (ignoring feature)
  |  (ignoring feature)

* not sure when it was changed (if 'v8' ever was valid feature for aarch64)
  but with 1.49.0 rustc (from gentoo) I see following cpu and feature options
  for arm and aarch64 (and v8 is listed only for arm, for aarch64 only v8.[123456]a)

  # rustc --target=arm-unknown-linux-gnueabihf --print target-cpus
  Available CPUs for this target:
    arm1020e
    arm1020t
    arm1022e
    arm10e
    arm10tdmi
    arm1136j-s
    arm1136jf-s
    arm1156t2-s
    arm1156t2f-s
    arm1176j-s
    arm1176jz-s
    arm1176jzf-s
    arm710t
    arm720t
    arm7tdmi
    arm7tdmi-s
    arm8
    arm810
    arm9
    arm920
    arm920t
    arm922t
    arm926ej-s
    arm940t
    arm946e-s
    arm966e-s
    arm968e-s
    arm9e
    arm9tdmi
    cortex-a12
    cortex-a15
    cortex-a17
    cortex-a32
    cortex-a35
    cortex-a5
    cortex-a53
    cortex-a55
    cortex-a57
    cortex-a7
    cortex-a72
    cortex-a73
    cortex-a75
    cortex-a76
    cortex-a76ae
    cortex-a77
    cortex-a78
    cortex-a8
    cortex-a9
    cortex-m0
    cortex-m0plus
    cortex-m1
    cortex-m23
    cortex-m3
    cortex-m33
    cortex-m35p
    cortex-m4
    cortex-m55
    cortex-m7
    cortex-r4
    cortex-r4f
    cortex-r5
    cortex-r52
    cortex-r7
    cortex-r8
    cortex-x1
    cyclone
    ep9312
    exynos-m3
    exynos-m4
    exynos-m5
    generic
    iwmmxt
    krait
    kryo
    mpcore
    mpcorenovfp
    neoverse-n1
    sc000
    sc300
    strongarm
    strongarm110
    strongarm1100
    strongarm1110
    swift
    xscale

  # rustc --target=aarch64-unknown-linux-gnu --print target-cpus
  Available CPUs for this target:
    a64fx
    apple-a10
    apple-a11
    apple-a12
    apple-a13
    apple-a7
    apple-a8
    apple-a9
    apple-latest
    apple-s4
    apple-s5
    carmel
    cortex-a34
    cortex-a35
    cortex-a53
    cortex-a55
    cortex-a57
    cortex-a65
    cortex-a65ae
    cortex-a72
    cortex-a73
    cortex-a75
    cortex-a76
    cortex-a76ae
    cortex-a77
    cortex-a78
    cortex-x1
    cyclone
    exynos-m3
    exynos-m4
    exynos-m5
    falkor
    generic
    kryo
    neoverse-e1
    neoverse-n1
    saphira
    thunderx
    thunderx2t99
    thunderx3t110
    thunderxt81
    thunderxt83
    thunderxt88
    tsv110

  # rustc --target=arm-unknown-linux-gnueabihf --print target-features
  Available features for this target:
    32bit                    - Prefer 32-bit Thumb instrs.
    8msecext                 - Enable support for ARMv8-M Security Extensions.
    a12                      - Cortex-A12 ARM processors.
    a15                      - Cortex-A15 ARM processors.
    a17                      - Cortex-A17 ARM processors.
    a32                      - Cortex-A32 ARM processors.
    a35                      - Cortex-A35 ARM processors.
    a5                       - Cortex-A5 ARM processors.
    a53                      - Cortex-A53 ARM processors.
    a55                      - Cortex-A55 ARM processors.
    a57                      - Cortex-A57 ARM processors.
    a7                       - Cortex-A7 ARM processors.
    a72                      - Cortex-A72 ARM processors.
    a73                      - Cortex-A73 ARM processors.
    a75                      - Cortex-A75 ARM processors.
    a76                      - Cortex-A76 ARM processors.
    a77                      - Cortex-A77 ARM processors.
    a8                       - Cortex-A8 ARM processors.
    a9                       - Cortex-A9 ARM processors.
    aclass                   - Is application profile ('A' series).
    acquire-release          - Has v8 acquire/release (lda/ldaex  etc) instructions.
    aes                      - Enable AES support.
    armv2                    - ARMv2 architecture.
    armv2a                   - ARMv2a architecture.
    armv3                    - ARMv3 architecture.
    armv3m                   - ARMv3m architecture.
    armv4                    - ARMv4 architecture.
    armv4t                   - ARMv4t architecture.
    armv5t                   - ARMv5t architecture.
    armv5te                  - ARMv5te architecture.
    armv5tej                 - ARMv5tej architecture.
    armv6                    - ARMv6 architecture.
    armv6-m                  - ARMv6m architecture.
    armv6j                   - ARMv7a architecture.
    armv6k                   - ARMv6k architecture.
    armv6kz                  - ARMv6kz architecture.
    armv6s-m                 - ARMv6sm architecture.
    armv6t2                  - ARMv6t2 architecture.
    armv7-a                  - ARMv7a architecture.
    armv7-m                  - ARMv7m architecture.
    armv7-r                  - ARMv7r architecture.
    armv7e-m                 - ARMv7em architecture.
    armv7k                   - ARMv7a architecture.
    armv7s                   - ARMv7a architecture.
    armv7ve                  - ARMv7ve architecture.
    armv8-a                  - ARMv8a architecture.
    armv8-m.base             - ARMv8mBaseline architecture.
    armv8-m.main             - ARMv8mMainline architecture.
    armv8-r                  - ARMv8r architecture.
    armv8.1-a                - ARMv81a architecture.
    armv8.1-m.main           - ARMv81mMainline architecture.
    armv8.2-a                - ARMv82a architecture.
    armv8.3-a                - ARMv83a architecture.
    armv8.4-a                - ARMv84a architecture.
    armv8.5-a                - ARMv85a architecture.
    armv8.6-a                - ARMv86a architecture.
    avoid-movs-shop          - Avoid movs instructions with shifter operand.
    avoid-partial-cpsr       - Avoid CPSR partial update for OOO execution.
    bf16                     - Enable support for BFloat16 instructions.
    cde                      - Support CDE instructions.
    cdecp0                   - Coprocessor 0 ISA is CDEv1.
    cdecp1                   - Coprocessor 1 ISA is CDEv1.
    cdecp2                   - Coprocessor 2 ISA is CDEv1.
    cdecp3                   - Coprocessor 3 ISA is CDEv1.
    cdecp4                   - Coprocessor 4 ISA is CDEv1.
    cdecp5                   - Coprocessor 5 ISA is CDEv1.
    cdecp6                   - Coprocessor 6 ISA is CDEv1.
    cdecp7                   - Coprocessor 7 ISA is CDEv1.
    cheap-predicable-cpsr    - Disable +1 predication cost for instructions updating CPSR.
    cortex-a78               - Cortex-A78 ARM processors.
    cortex-x1                - Cortex-X1 ARM processors.
    crc                      - Enable support for CRC instructions.
    crypto                   - Enable support for Cryptography extensions.
    d32                      - Extend FP to 32 double registers.
    db                       - Has data barrier (dmb/dsb) instructions.
    dfb                      - Has full data barrier (dfb) instruction.
    disable-postra-scheduler - Don't schedule again after register allocation.
    dont-widen-vmovs         - Don't widen VMOVS to VMOVD.
    dotprod                  - Enable support for dot product instructions.
    dsp                      - Supports DSP instructions in ARM and/or Thumb2.
    execute-only             - Enable the generation of execute only code..
    expand-fp-mlx            - Expand VFP/NEON MLA/MLS instructions.
    exynos                   - Samsung Exynos processors.
    fp-armv8                 - Enable ARMv8 FP.
    fp-armv8d16              - Enable ARMv8 FP with only 16 d-registers.
    fp-armv8d16sp            - Enable ARMv8 FP with only 16 d-registers and no double precision.
    fp-armv8sp               - Enable ARMv8 FP with no double precision.
    fp16                     - Enable half-precision floating point.
    fp16fml                  - Enable full half-precision floating point fml instructions.
    fp64                     - Floating point unit supports double precision.
    fpao                     - Enable fast computation of positive address offsets.
    fpregs                   - Enable FP registers.
    fpregs16                 - Enable 16-bit FP registers.
    fpregs64                 - Enable 64-bit FP registers.
    fullfp16                 - Enable full half-precision floating point.
    fuse-aes                 - CPU fuses AES crypto operations.
    fuse-literals            - CPU fuses literal generation operations.
    hwdiv                    - Enable divide instructions in Thumb.
    hwdiv-arm                - Enable divide instructions in ARM mode.
    i8mm                     - Enable Matrix Multiply Int8 Extension.
    iwmmxt                   - ARMv5te architecture.
    iwmmxt2                  - ARMv5te architecture.
    krait                    - Qualcomm Krait processors.
    kryo                     - Qualcomm Kryo processors.
    lob                      - Enable Low Overhead Branch extensions.
    long-calls               - Generate calls via indirect call instructions.
    loop-align               - Prefer 32-bit alignment for loops.
    m3                       - Cortex-M3 ARM processors.
    mclass                   - Is microcontroller profile ('M' series).
    mp                       - Supports Multiprocessing extension.
    muxed-units              - Has muxed AGU and NEON/FPU.
    mve                      - Support M-Class Vector Extension with integer ops.
    mve.fp                   - Support M-Class Vector Extension with integer and floating ops.
    mve1beat                 - Model MVE instructions as a 1 beat per tick architecture.
    mve2beat                 - Model MVE instructions as a 2 beats per tick architecture.
    mve4beat                 - Model MVE instructions as a 4 beats per tick architecture.
    nacl-trap                - NaCl trap.
    neon                     - Enable NEON instructions.
    neon-fpmovs              - Convert VMOVSR, VMOVRS, VMOVS to NEON.
    neonfp                   - Use NEON for single precision FP.
    no-branch-predictor      - Has no branch predictor.
    no-movt                  - Don't use movt/movw pairs for 32-bit imms.
    no-neg-immediates        - Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding..
    noarm                    - Does not support ARM mode execution.
    nonpipelined-vfp         - VFP instructions are not pipelined.
    perfmon                  - Enable support for Performance Monitor extensions.
    prefer-ishst             - Prefer ISHST barriers.
    prefer-vmovsr            - Prefer VMOVSR.
    prof-unpr                - Is profitable to unpredicate.
    r4                       - Cortex-R4 ARM processors.
    r5                       - Cortex-R5 ARM processors.
    r52                      - Cortex-R52 ARM processors.
    r7                       - Cortex-R7 ARM processors.
    ras                      - Enable Reliability, Availability and Serviceability extensions.
    rclass                   - Is realtime profile ('R' series).
    read-tp-hard             - Reading thread pointer from register.
    reserve-r9               - Reserve R9, making it unavailable as GPR.
    ret-addr-stack           - Has return address stack.
    sb                       - Enable v8.5a Speculation Barrier.
    sha2                     - Enable SHA1 and SHA256 support.
    slow-fp-brcc             - FP compare + branch is slow.
    slow-load-D-subreg       - Loading into D subregs is slow.
    slow-odd-reg             - VLDM/VSTM starting with an odd register is slow.
    slow-vdup32              - Has slow VDUP32 - prefer VMOV.
    slow-vgetlni32           - Has slow VGETLNi32 - prefer VMOV.
    slowfpvfmx               - Disable VFP / NEON FMA instructions.
    slowfpvmlx               - Disable VFP / NEON MAC instructions.
    soft-float               - Use software floating point features..
    splat-vfp-neon           - Splat register from VFP to NEON.
    strict-align             - Disallow all unaligned memory access.
    swift                    - Swift ARM processors.
    thumb-mode               - Thumb mode.
    thumb2                   - Enable Thumb2 instructions.
    trustzone                - Enable support for TrustZone security extensions.
    use-misched              - Use the MachineScheduler.
    v4t                      - Support ARM v4T instructions.
    v5t                      - Support ARM v5T instructions.
    v5te                     - Support ARM v5TE, v5TEj, and v5TExp instructions.
    v6                       - Support ARM v6 instructions.
    v6k                      - Support ARM v6k instructions.
    v6m                      - Support ARM v6M instructions.
    v6t2                     - Support ARM v6t2 instructions.
    v7                       - Support ARM v7 instructions.
    v7clrex                  - Has v7 clrex instruction.
    v8                       - Support ARM v8 instructions.
    v8.1a                    - Support ARM v8.1a instructions.
    v8.1m.main               - Support ARM v8-1M Mainline instructions.
    v8.2a                    - Support ARM v8.2a instructions.
    v8.3a                    - Support ARM v8.3a instructions.
    v8.4a                    - Support ARM v8.4a instructions.
    v8.5a                    - Support ARM v8.5a instructions.
    v8.6a                    - Support ARM v8.6a instructions.
    v8m                      - Support ARM v8M Baseline instructions.
    v8m.main                 - Support ARM v8M Mainline instructions.
    vfp2                     - Enable VFP2 instructions.
    vfp2sp                   - Enable VFP2 instructions with no double precision.
    vfp3                     - Enable VFP3 instructions.
    vfp3d16                  - Enable VFP3 instructions with only 16 d-registers.
    vfp3d16sp                - Enable VFP3 instructions with only 16 d-registers and no double precision.
    vfp3sp                   - Enable VFP3 instructions with no double precision.
    vfp4                     - Enable VFP4 instructions.
    vfp4d16                  - Enable VFP4 instructions with only 16 d-registers.
    vfp4d16sp                - Enable VFP4 instructions with only 16 d-registers and no double precision.
    vfp4sp                   - Enable VFP4 instructions with no double precision.
    virtualization           - Supports Virtualization extension.
    vldn-align               - Check for VLDn unaligned access.
    vmlx-forwarding          - Has multiplier accumulator forwarding.
    vmlx-hazards             - Has VMLx hazards.
    wide-stride-vfp          - Use a wide stride when allocating VFP registers.
    xscale                   - ARMv5te architecture.
    zcz                      - Has zero-cycle zeroing instructions.

  Rust-specific features:
    crt-static               - Enables libraries with C Run-time Libraries(CRT) to be statically linked.

  Use +feature to enable a feature, or -feature to disable it.
  For example, rustc -C -target-cpu=mycpu -C target-feature=+feature1,-feature2

  # rustc --target=aarch64-unknown-linux-gnu --print target-features
  Available features for this target:
    a35                                - Cortex-A35 ARM processors.
    a53                                - Cortex-A53 ARM processors.
    a55                                - Cortex-A55 ARM processors.
    a57                                - Cortex-A57 ARM processors.
    a64fx                              - Fujitsu A64FX processors.
    a65                                - Cortex-A65 ARM processors.
    a72                                - Cortex-A72 ARM processors.
    a73                                - Cortex-A73 ARM processors.
    a75                                - Cortex-A75 ARM processors.
    a76                                - Cortex-A76 ARM processors.
    a77                                - Cortex-A77 ARM processors.
    aes                                - Enable AES support.
    aggressive-fma                     - Enable Aggressive FMA for floating-point..
    alternate-sextload-cvt-f32-pattern - Use alternative pattern for sextload convert to f32.
    altnzcv                            - Enable alternative NZCV format for floating point comparisons.
    am                                 - Enable v8.4-A Activity Monitors extension.
    amvs                               - Enable v8.6-A Activity Monitors Virtualization support.
    apple-a10                          - Apple A10.
    apple-a11                          - Apple A11.
    apple-a12                          - Apple A12.
    apple-a13                          - Apple A13.
    apple-a7                           - Apple A7 (the CPU formerly known as Cyclone).
    arith-bcc-fusion                   - CPU fuses arithmetic+bcc operations.
    arith-cbz-fusion                   - CPU fuses arithmetic + cbz/cbnz operations.
    balance-fp-ops                     - balance mix of odd and even D-registers for fp multiply(-accumulate) ops.
    bf16                               - Enable BFloat16 Extension.
    bti                                - Enable Branch Target Identification.
    call-saved-x10                     - Make X10 callee saved..
    call-saved-x11                     - Make X11 callee saved..
    call-saved-x12                     - Make X12 callee saved..
    call-saved-x13                     - Make X13 callee saved..
    call-saved-x14                     - Make X14 callee saved..
    call-saved-x15                     - Make X15 callee saved..
    call-saved-x18                     - Make X18 callee saved..
    call-saved-x8                      - Make X8 callee saved..
    call-saved-x9                      - Make X9 callee saved..
    carmel                             - Nvidia Carmel processors.
    ccdp                               - Enable v8.5 Cache Clean to Point of Deep Persistence.
    ccidx                              - Enable v8.3-A Extend of the CCSIDR number of sets.
    ccpp                               - Enable v8.2 data Cache Clean to Point of Persistence.
    complxnum                          - Enable v8.3-A Floating-point complex number support.
    cortex-a78                         - Cortex-A78 ARM processors.
    cortex-x1                          - Cortex-X1 ARM processors.
    crc                                - Enable ARMv8 CRC-32 checksum instructions.
    crypto                             - Enable cryptographic instructions.
    custom-cheap-as-move               - Use custom handling of cheap instructions.
    disable-latency-sched-heuristic    - Disable latency scheduling heuristic.
    dit                                - Enable v8.4-A Data Independent Timing instructions.
    dotprod                            - Enable dot product support.
    ecv                                - Enable enhanced counter virtualization extension.
    ete                                - Enable Embedded Trace Extension.
    exynos-cheap-as-move               - Use Exynos specific handling of cheap instructions.
    exynosm3                           - Samsung Exynos-M3 processors.
    exynosm4                           - Samsung Exynos-M4 processors.
    f32mm                              - Enable Matrix Multiply FP32 Extension.
    f64mm                              - Enable Matrix Multiply FP64 Extension.
    falkor                             - Qualcomm Falkor processors.
    fgt                                - Enable fine grained virtualization traps extension.
    fmi                                - Enable v8.4-A Flag Manipulation Instructions.
    force-32bit-jump-tables            - Force jump table entries to be 32-bits wide except at MinSize.
    fp-armv8                           - Enable ARMv8 FP.
    fp16fml                            - Enable FP16 FML instructions.
    fptoint                            - Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int.
    fullfp16                           - Full FP16.
    fuse-address                       - CPU fuses address generation and memory operations.
    fuse-aes                           - CPU fuses AES crypto operations.
    fuse-arith-logic                   - CPU fuses arithmetic and logic operations.
    fuse-crypto-eor                    - CPU fuses AES/PMULL and EOR operations.
    fuse-csel                          - CPU fuses conditional select operations.
    fuse-literals                      - CPU fuses literal generation operations.
    harden-sls-blr                     - Harden against straight line speculation across BLR instructions.
    harden-sls-retbr                   - Harden against straight line speculation across RET and BR instructions.
    i8mm                               - Enable Matrix Multiply Int8 Extension.
    jsconv                             - Enable v8.3-A JavaScript FP conversion instructions.
    kryo                               - Qualcomm Kryo processors.
    lor                                - Enables ARM v8.1 Limited Ordering Regions extension.
    lse                                - Enable ARMv8.1 Large System Extension (LSE) atomic instructions.
    lsl-fast                           - CPU has a fastpath logical shift of up to 3 places.
    mpam                               - Enable v8.4-A Memory system Partitioning and Monitoring extension.
    mte                                - Enable Memory Tagging Extension.
    neon                               - Enable Advanced SIMD instructions.
    neoversee1                         - Neoverse E1 ARM processors.
    neoversen1                         - Neoverse N1 ARM processors.
    no-neg-immediates                  - Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding..
    nv                                 - Enable v8.4-A Nested Virtualization Enchancement.
    pa                                 - Enable v8.3-A Pointer Authentication extension.
    pan                                - Enables ARM v8.1 Privileged Access-Never extension.
    pan-rwv                            - Enable v8.2 PAN s1e1R and s1e1W Variants.
    perfmon                            - Enable ARMv8 PMUv3 Performance Monitors extension.
    pmu                                - Enable v8.4-A PMU extension.
    predictable-select-expensive       - Prefer likely predicted branches over selects.
    predres                            - Enable v8.5a execution and data prediction invalidation instructions.
    rand                               - Enable Random Number generation instructions.
    ras                                - Enable ARMv8 Reliability, Availability and Serviceability Extensions.
    rasv8_4                            - Enable v8.4-A Reliability, Availability and Serviceability extension.
    rcpc                               - Enable support for RCPC extension.
    rcpc-immo                          - Enable v8.4-A RCPC instructions with Immediate Offsets.
    rdm                                - Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions.
    reserve-x1                         - Reserve X1, making it unavailable as a GPR.
    reserve-x10                        - Reserve X10, making it unavailable as a GPR.
    reserve-x11                        - Reserve X11, making it unavailable as a GPR.
    reserve-x12                        - Reserve X12, making it unavailable as a GPR.
    reserve-x13                        - Reserve X13, making it unavailable as a GPR.
    reserve-x14                        - Reserve X14, making it unavailable as a GPR.
    reserve-x15                        - Reserve X15, making it unavailable as a GPR.
    reserve-x18                        - Reserve X18, making it unavailable as a GPR.
    reserve-x2                         - Reserve X2, making it unavailable as a GPR.
    reserve-x20                        - Reserve X20, making it unavailable as a GPR.
    reserve-x21                        - Reserve X21, making it unavailable as a GPR.
    reserve-x22                        - Reserve X22, making it unavailable as a GPR.
    reserve-x23                        - Reserve X23, making it unavailable as a GPR.
    reserve-x24                        - Reserve X24, making it unavailable as a GPR.
    reserve-x25                        - Reserve X25, making it unavailable as a GPR.
    reserve-x26                        - Reserve X26, making it unavailable as a GPR.
    reserve-x27                        - Reserve X27, making it unavailable as a GPR.
    reserve-x28                        - Reserve X28, making it unavailable as a GPR.
    reserve-x3                         - Reserve X3, making it unavailable as a GPR.
    reserve-x30                        - Reserve X30, making it unavailable as a GPR.
    reserve-x4                         - Reserve X4, making it unavailable as a GPR.
    reserve-x5                         - Reserve X5, making it unavailable as a GPR.
    reserve-x6                         - Reserve X6, making it unavailable as a GPR.
    reserve-x7                         - Reserve X7, making it unavailable as a GPR.
    reserve-x9                         - Reserve X9, making it unavailable as a GPR.
    saphira                            - Qualcomm Saphira processors.
    sb                                 - Enable v8.5 Speculation Barrier.
    sel2                               - Enable v8.4-A Secure Exception Level 2 extension.
    sha2                               - Enable SHA1 and SHA256 support.
    sha3                               - Enable SHA512 and SHA3 support.
    slow-misaligned-128store           - Misaligned 128 bit stores are slow.
    slow-paired-128                    - Paired 128 bit loads and stores are slow.
    slow-strqro-store                  - STR of Q register with register offset is slow.
    sm4                                - Enable SM3 and SM4 support.
    spe                                - Enable Statistical Profiling extension.
    specrestrict                       - Enable architectural speculation restriction.
    ssbs                               - Enable Speculative Store Bypass Safe bit.
    strict-align                       - Disallow all unaligned memory access.
    sve                                - Enable Scalable Vector Extension (SVE) instructions.
    sve2                               - Enable Scalable Vector Extension 2 (SVE2) instructions.
    sve2-aes                           - Enable AES SVE2 instructions.
    sve2-bitperm                       - Enable bit permutation SVE2 instructions.
    sve2-sha3                          - Enable SHA3 SVE2 instructions.
    sve2-sm4                           - Enable SM4 SVE2 instructions.
    tagged-globals                     - Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits.
    thunderx                           - Cavium ThunderX processors.
    thunderx2t99                       - Cavium ThunderX2 processors.
    thunderx3t110                      - Marvell ThunderX3 processors.
    thunderxt81                        - Cavium ThunderX processors.
    thunderxt83                        - Cavium ThunderX processors.
    thunderxt88                        - Cavium ThunderX processors.
    tlb-rmi                            - Enable v8.4-A TLB Range and Maintenance Instructions.
    tme                                - Enable Transactional Memory Extension.
    tpidr-el1                          - Permit use of TPIDR_EL1 for the TLS base.
    tpidr-el2                          - Permit use of TPIDR_EL2 for the TLS base.
    tpidr-el3                          - Permit use of TPIDR_EL3 for the TLS base.
    tracev8.4                          - Enable v8.4-A Trace extension.
    trbe                               - Enable Trace Buffer Extension.
    tsv110                             - HiSilicon TS-V110 processors.
    uaops                              - Enable v8.2 UAO PState.
    use-aa                             - Use alias analysis during codegen.
    use-experimental-zeroing-pseudos   - Hint to the compiler that the MOVPRFX instruction is merged with destructive operations.
    use-postra-scheduler               - Schedule again after register allocation.
    use-reciprocal-square-root         - Use the reciprocal square root approximation.
    v8.1a                              - Support ARM v8.1a instructions.
    v8.2a                              - Support ARM v8.2a instructions.
    v8.3a                              - Support ARM v8.3a instructions.
    v8.4a                              - Support ARM v8.4a instructions.
    v8.5a                              - Support ARM v8.5a instructions.
    v8.6a                              - Support ARM v8.6a instructions.
    vh                                 - Enables ARM v8.1 Virtual Host extension.
    zcm                                - Has zero-cycle register moves.
    zcz                                - Has zero-cycle zeroing instructions.
    zcz-fp                             - Has zero-cycle zeroing instructions for FP registers.
    zcz-fp-workaround                  - The zero-cycle floating-point zeroing instruction has a bug.
    zcz-gp                             - Has zero-cycle zeroing instructions for generic registers.

  Rust-specific features:
    crt-static                         - Enables libraries with C Run-time Libraries(CRT) to be statically linked.

  Use +feature to enable a feature, or -feature to disable it.
  For example, rustc -C -target-cpu=mycpu -C target-feature=+feature1,-feature2

Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
2021-02-08 17:04:11 +01:00
Cody Schafer
2c34da11f0 Merge pull request #293 from danc86/add-rust-1.49
add rust 1.49.0
2021-02-08 10:10:26 -05:00
Martin Jansa
b163a89399 rust-source, rust-snapshot: simplify as well
* move common stuff from rust-source to rust.inc and from rust-snapshot to rust-target.inc

* 1.34.2 checksums were changed because unified SRC_URI is using tar.xz
  for this version as well (instead of tar.gz used before here)

Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
2021-02-08 01:09:52 +01:00
Dan Callaghan
0ee328aa26 add rust 1.49.0
Now it seems `./x.py install` is the only way to assemble a fully
working stage 2 cross-built compiler. See rust-lang/rust#81702.
2021-02-08 08:04:30 +10:00
Martin Jansa
1d64f9075a rust: move LIC_FILES_CHKSUM from rust-source-*.inc to rust.inc where LICENSE is set
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
2021-02-07 19:18:00 +01:00
Khem Raj
e2979482dc rust: Add riscv32/riscv64 support
Set the cpu, features, and abi correctly

Signed-off-by: Khem Raj <raj.khem@gmail.com>
2021-01-12 00:31:16 -08:00
Khem Raj
a59ddd90d2 rust: Correct the data layout for riscv32
This now matches with llvm target backend in llvm 11

Signed-off-by: Khem Raj <raj.khem@gmail.com>
2021-01-09 12:53:13 -08:00
Johan Anderholm
cb4f8294d4 Use proper llvm-target for armv7
arm-unknown-linux-gnueabihf was incorrectly used as llvm-target instead
of armv7-unknown-linux-gnueabihf when building for some Cortex A SoCs.
This may cause segfaults in non trivial rust applications on ARMv7
when e.g. +a7 is passed to LLVM. It seems to differ between different
versions of the compiler and LLVM versions.
2021-01-08 10:37:34 +01:00
Steven Walter
b7f9c1d0d7 Add rust 1.46.0 2020-08-31 14:47:11 -04:00
Martin Jansa
647b976da2 rust: use PARALLEL_MAKE instead of BB_NUMBER_THREADS
* BB_NUMBER_THREADS is number of bitbake tasks running in
  parallel, not parallelization inside individual tasks
* use oe.utils.parallel_make_argument to make sure it
  works even when people add e.g. "-l 10" in PARALLEL_MAKE
* with the recent improvements for rust-native build time, I wanted
  to rerun some build time tests from
  https://github.com/shr-project/test-oe-build-time
  here are the results on AMD Threadripper 3970x with 128GB ram:

  BB is BB_NUMBER_THREADS
  PM is PARALLEL_MAKE

  TIME   BB        PM   Description
  20:50   *         *   zeus based build with 1.37 rust (BB/PM has no impact)
  14:50   8  32,48,64   dunfell, 1.43 as in d2ff87ca55 (PM has no impact, because bootstrap uses BB)
   9:50   8  32,48,64   dunfell, 1.43 with this patch applied, it doesn't get faster after some threashold of PM
  13:32   8        64   dunfell, 1.43 with this patch applied and "rust.inc: cut build time in half" (afcb58e5b9) reverted
  13:30   8        64   dunfell, 1.43 with "rust.inc: cut build time in half" (afcb58e5b9) as well as "rust.inc: run bootstrap.py in parallel" (40a6bd8a8d) reverted to see if 1.43 builds faster without any meta-rust improvements compared to 1.37
  94:47   1        64   dunfell, 1.43 as in d2ff87ca55 (either something went wrong or explicit "-j 1" disables some parallelism done by default already
  13:40   *         *   zeus based build with 1.39 rust (BB/PM has no impact)
  10:50   8        64   zeus based build with 1.39 rust as proposed in jansa/new-zeus-branch
  80:51   8         1   zeus based build with 1.39 rust as proposed in jansa/new-zeus-branch with "-j 1" PARALLEL_MAKE

Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
2020-05-28 18:36:04 +02:00
Tyler Hall
8d3f79f217 rust.inc: whitelist BB_NUMBER_THREADS in do_compile
d55cce6b8b6b510bf4905f19b949f7995af57a4d added a use of
BB_NUMBER_THREADS which is not whitelisted in Poky. This caused machines
with a different number of CPUs to have different sstate for
rust-native.
2020-05-18 19:10:04 -04:00
Steven Walter
afcb58e5b9 rust.inc: cut build time in half
Don't tar everything up just to untar it again.  This literally takes
longer than actually building the rust compiler
2020-05-11 22:18:35 -04:00
Steven Walter
40a6bd8a8d rust.inc: run bootstrap.py in parallel
Allow bootstrap.py to use as many cores as bitbake normally uses
2020-05-11 22:18:35 -04:00
Steven Walter
c023edd985 rust.inc: make max-atomic-width an integer
As a string this was actually being ignored.  It mostly didn't matter
because max-atomic-width falls back to target-pointer-size, and they are
usually the same.  However, at least on i586, 64-bit atomics are
supported with a 32-bit pointer size.
2020-05-11 22:18:35 -04:00
Steven Walter
3b783652cc rust-native shouldn't depend on TARGET variables
The whole point of rust-native is that it should be common for all
targets.  If we reference TARGET variables during the build of
rust-native, then bitbake will build a different version for different
TARGETS.
2020-05-11 16:26:48 -04:00
Alistair Francis
72aa4ef3ab rust: Use Python3 native for build
Use Python3 as the native Python instead of Python2.

Signed-off-by: Alistair Francis <alistair@alistair23.me>
2019-12-26 18:46:53 -08:00
Zubair Lutfullah Kakakhel
186ec59085 rust: Improve TUNE_FEATURE parsing
Since ac83d22eb5

The armvX arch definition is not present in TUNE_FEATURES but is now in
MACHINEOVERRIDES. Improve parsing so that MACHINEOVERRIDES is also checked.

Fixes #240

Tested on raspberrypi3 with balenaOS which uses rust.

Signed-off-by: Zubair Lutfullah Kakakhel <zubair@balena.io>
2019-11-12 10:39:41 +00:00
Alistair Francis
150b1591d6 rust-cross: Add riscv32 data layout information
This was generated with:
    clang --target=riscv32  -emit-llvm -S -x c /dev/null -o aaa |  cat aaa | grep "target datalayout"

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2019-08-23 15:57:29 -07:00
Johan Anderholm
b3d1b589ee Update to rust version 1.32.0 2019-02-14 15:29:17 +00:00
Dan Dedrick
e7c10de555 rust: don't configure thumb if not in TUNE_FEATURES
ARM_INSTRUCTION_SET, and therefore ARM_THUMB_OPT also, expect to only be
used in conjunction with the thumb TUNE_FEATURES. So thumb-mode should only
be added if thumb is in TUNE_FEATURES and ARM_THUMB_OPT is thumb.

The commit https://git.yoctoproject.org/cgit/cgit.cgi/poky/commit/meta/conf/machine/include/arm/arch-armv7a.inc?id=3e7d26e31a724009e69788460737e07163a14051
caused armv7a.inc to set ARM_INSTRUCTION_SET to thumb and the commit
message explicitly states that the change should have no effect unless
TUNE_FEATURES also includes thumb. This change to rust will allow that
assumption to continue to be true.
2019-01-14 15:58:54 -05:00
Johan Anderholm
496b75fa1f Update to rust version 1.31.1
Also make use of the sources vendored in the rustc package instead of
letting bitbake download the sources.
2019-01-03 17:31:46 +01:00
Khem Raj
bf01840f5b rust-cross: Add riscv64 data layout information
clang --target=riscv64  -emit-llvm -S -x c /dev/null -o aaa |  cat aaa | grep "target datalayout"

Signed-off-by: Khem Raj <raj.khem@gmail.com>
2018-12-26 14:52:22 -08:00
Khem Raj
1b00814593 rust-cross: Add mips64 data layout llvm specifications
Signed-off-by: Khem Raj <raj.khem@gmail.com>
2018-12-26 14:52:22 -08:00
Khem Raj
68d6bce609 rust-cross: Add ppc support
This ensures that rust-cross can be compiled for ppc arch

Signed-off-by: Khem Raj <raj.khem@gmail.com>
2018-12-26 14:52:18 -08:00
Khem Raj
446d28d6e1 rust: Use llvm-rust-native and env variables to configure llvm-config
Signed-off-by: Khem Raj <raj.khem@gmail.com>
2018-11-09 22:53:49 -08:00
Johan Anderholm
8e6c6271fc Handle env and llvm-target for musl
Further changes needed for musl to work.
env needs to be set to "musl" for unwinding work properly.
Also the llvm target should end with "-musl" and not "-gnu".
2018-07-06 19:34:33 +02:00
Johan Anderholm
6066f1d2df Corrected target-c-int-width
The correct value for x86_64 and aarch64 is 32
2018-07-06 19:34:33 +02:00
Johan Anderholm
6a0d148968 Make it possible to build with TCLIBC="musl" (musl as libc) 2018-07-06 19:34:33 +02:00
Johan Anderholm
e1fa6d39ce Don't install rust-llvm system-wide
Put rust-llvm into a directory of it's own. This avoids conflicts
between the official llvm and rusts temporary one. It solves
interoperability issues with meta-clang.

Use /usr/lib/llvm-rust/ as prefix because that matches what llvm does
themselves on debian and ubuntu.
2018-07-06 19:30:36 +02:00
Adam Schwalm
0639277e4c Add 1.24.0 for rocko 2018-02-27 16:19:12 -06:00
Tyler Hall
52ea673a8f rust: allow configuring panic-strategy
This defaults to "unwind" if not set, so this alone has no effect.

Signed-off-by: Tyler Hall <tylerwhall@gmail.com>
2018-01-23 17:54:15 -05:00
Johan Anderholm
f02df59eea Add support for the mips32 architecture
Support for mips32 big (mips) and little endian (mipsel) for mips32
and mips32r2 cpus. The big endian target can be verified with the
qemumips machine.
2017-12-01 19:36:15 +01:00
Johan Anderholm
141177fbf9 rust: specify target-c-int-width
The "target_c_int_width field is added to librustc_back since rust
1.22.0 because not all rust targets (e.g. msp430-none-elf, avr)
have 32-bit int types any more.
2017-11-27 15:48:54 -06:00
Johan Anderholm
37813c4dff rust: Don't specify allocator for >= 1.20.0
System allocator is the default in rust.
2017-09-30 11:23:29 +02:00