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Author SHA1 Message Date
Denys Dmytriyenko
bdae918d90 optee-os: restore libgcc-sysroot patch with newer version
The patch was dropped with 3.17 update:

https://git.yoctoproject.org/meta-ti/commit/?h=dunfell&id=f8182afdcfe427865707077d353359827f1ff6bf

But the patch is still needed for internal OE-built toolchain to pass
sysroot, otherwise libgcc.a cannot be found:

| aarch64-oe-linux-ld.bfd: cannot find libgcc.a: No such file or directory

The older version from meta-arm/dunfell no longer applies, so copy a newer
version of the patch locally.

Signed-off-by: Denys Dmytriyenko <denys@konsulko.com>
Signed-off-by: Ryan Eatmon <reatmon@ti.com>
2024-01-22 14:34:08 -06:00
LCPD Automation Script
86bafdd779 ti-linux-fw: CI/CD Auto-Merger: cicd.dunfell.202304260757
Updated the value(s) for:
  K3_IMAGE_GEN_SRCREV
  TI_LINUX_FW_SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-04-26 07:58:01 -05:00
LCPD Automation Script
443dfaf5ef linux-ti-staging: CI/CD Auto-Merger: cicd.dunfell.202304122200
Updated the value(s) for:
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-04-12 22:00:38 -05:00
LCPD Automation Script
cc835e743e linux-ti-staging-rt: CI/CD Auto-Merger: cicd.dunfell.202304122200
Updated the value(s) for:
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-04-12 22:00:38 -05:00
LCPD Automation Script
a5df298100 u-boot-ti-staging: CI/CD Auto-Merger: cicd.dunfell.202304021800
Updated the value(s) for:
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-04-02 18:00:50 -05:00
Aniket Limaye
cf4ac1f741 ti-rtos-firmware: j784s4: main-r5f0_0-fw should point to ethfw binary
main-r5f0_0-fw was pointing to pdk-ipc binary, while it should be
pointing to ethfw one for j784s4-evm, j784s4-hs-evm

Signed-off-by: Aniket Limaye <a-limaye@ti.com>
Signed-off-by: Ryan Eatmon <reatmon@ti.com>
2023-03-31 17:15:02 -05:00
LCPD Automation Script
cecbf35e84 k3conf: CI/CD Auto-Merger: cicd.dunfell.202303310400
Updated the value(s) for:
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-03-31 04:00:33 -05:00
LCPD Automation Script
0792e88485 u-boot-ti-staging: CI/CD Auto-Merger: cicd.dunfell.202303310400
Updated the value(s) for:
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-03-31 04:00:33 -05:00
LCPD Automation Script
9f6913307a ti-linux-fw: CI/CD Auto-Merger: cicd.dunfell.202303310400
Updated the value(s) for:
  TI_LINUX_FW_SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-03-31 04:00:33 -05:00
LCPD Automation Script
27ff52dd41 ti-k3-secdev: CI/CD Auto-Merger: cicd.dunfell.202303021800
Updated the value(s) for:
  GIT_SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-03-02 18:00:25 -06:00
LCPD Automation Script
e7fe9b9d92 linux-ti-staging-rt: CI/CD Auto-Merger: cicd.dunfell.202303021800
Updated the value(s) for:
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-03-02 18:00:25 -06:00
LCPD Automation Script
63f0b90fb2 u-boot-ti-staging: CI/CD Auto-Merger: cicd.dunfell.202303021800
Updated the value(s) for:
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-03-02 18:00:25 -06:00
LCPD Automation Script
cb6c0975e7 ti-linux-fw: CI/CD Auto-Merger: cicd.dunfell.202303021800
Updated the value(s) for:
  K3_IMAGE_GEN_SRCREV
  TI_LINUX_FW_SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-03-02 18:00:25 -06:00
Siddharth Vadapalli
19e607a197 conf: machine: am62axx: Add overlay for second CPSW3G Port
The SK-Ethernet-DC01 Add-On Ethernet Card for AM62A-SK board supports
RGMII mode.

Add overlay to enable the second CPSW3G port in RGMII-RXID mode with the
Add-On Ethernet Card.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Ryan Eatmon <reatmon@ti.com>
2023-02-28 11:09:19 -06:00
Vaishnav Achath
5e045d8bba conf: machine: j784s4-evm: Add MCSPI loopback overlay for J784S4
Add the MCSPI loopback overlay file for J784S4 EVM which helps
users to enable MCU-MAIN MCSPI loopback applications, even though
the overlay is named j7200-mcspi-loopback.dtbo, same can be used
for testing on other J7 platforms as well.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Ryan Eatmon <reatmon@ti.com>
2023-02-27 10:17:16 -06:00
Vaishnav Achath
05d12a32ed conf: machine: j721s2-evm: Add MCSPI loopback overlay for J721S2
Add the MCSPI loopback overlay file for J721S2 EVM which helps
users to enable MCU-MAIN MCSPI loopback applications, even though
the overlay is named j7200-mcspi-loopback.dtbo, same can be used
for testing on other J7 platforms as well.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Ryan Eatmon <reatmon@ti.com>
2023-02-27 10:17:16 -06:00
Vaishnav Achath
1fb574f061 conf: machine: j7-evm: Add MCSPI loopback overlay for J721E
Add the MCSPI loopback overlay file for J721E EVM which helps
users to enable MCU-MAIN MCSPI loopback applications, even though
the overlay is named j7200-mcspi-loopback.dtbo, same can be used
for testing on other J7 platforms as well.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Ryan Eatmon <reatmon@ti.com>
2023-02-27 10:17:16 -06:00
Bhavya Kapoor
bad1d112b7 conf: machine: j784s4-evm: Add uarts overlay for J784S4
Add device tree overlay for extending support for mcu_uart0 as well as
wkup_uart0 for boards with J784S4 SoC. This overlay will mainly be used
for the purpose of testing uart instances.

Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Signed-off-by: Ryan Eatmon <reatmon@ti.com>
2023-02-27 10:17:16 -06:00
Bhavya Kapoor
6de102676b conf: machine: j721s2-evm: Add uarts overlay for J721S2
Add device tree overlay for extending support for mcu_uart0 as well as
wkup_uart0 for boards with J721S2 SoC. This overlay will mainly be used
for the purpose of testing uart instances.

Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Signed-off-by: Ryan Eatmon <reatmon@ti.com>
2023-02-27 10:17:16 -06:00
Bhavya Kapoor
e8703215d7 conf: machine: j7-evm: Add uarts overlay for J721E
Add device tree overlay for extending support for mcu_uart0 as well as
wkup_uart0 for boards with J721E SoC. This overlay will mainly be used
for the purpose of testing uart instances.

Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Signed-off-by: Ryan Eatmon <reatmon@ti.com>
2023-02-27 10:17:16 -06:00
Bhavya Kapoor
526a0f0a04 conf: machine: j7200-evm: Add uarts overlay for J7200
Add device tree overlay for extending support for mcu_uart0 as well as
wkup_uart0 for boards with J7200 SoC. This overlay will mainly be used
for the purpose of testing uart instances.

Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Signed-off-by: Ryan Eatmon <reatmon@ti.com>
2023-02-27 10:17:16 -06:00
Ryan Eatmon
39e7dad122 Revert "ti-k3-secdev: CI/CD Auto-Merger: cicd.dunfell.202302231358"
This reverts commit 7f773f3b5b.

An error in our CICD script picked an invalid hash.  Rollback to the
previous SRCREV.
2023-02-24 11:36:16 -06:00
LCPD Automation Script
45bdaf7da0 linux-ti-staging-rt: RC Auto-Merger: 08.06.00.007
Updated the value(s) for:
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-02-23 17:38:09 -06:00
LCPD Automation Script
7f773f3b5b ti-k3-secdev: CI/CD Auto-Merger: cicd.dunfell.202302231358
Updated the value(s) for:
  GIT_SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-02-23 13:59:06 -06:00
LCPD Automation Script
a1ed6b88ee linux-ti-staging: CI/CD Auto-Merger: cicd.dunfell.202302231358
Updated the value(s) for:
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-02-23 13:59:06 -06:00
LCPD Automation Script
b47e873e6e linux-ti-staging-rt: CI/CD Auto-Merger: cicd.dunfell.202302231358
Updated the value(s) for:
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-02-23 13:59:06 -06:00
LCPD Automation Script
24972447d7 u-boot-ti-staging: CI/CD Auto-Merger: cicd.dunfell.202302231358
Updated the value(s) for:
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-02-23 13:59:06 -06:00
LCPD Automation Script
76f4bf2e8e ti-linux-fw: CI/CD Auto-Merger: cicd.dunfell.202302231358
Updated the value(s) for:
  TI_LINUX_FW_SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-02-23 13:59:06 -06:00
LCPD Automation Script
3c0f682eb7 linux-ti-staging: CI/CD Auto-Merger: cicd.dunfell.202302230340
Updated the value(s) for:
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-02-23 03:40:22 -06:00
LCPD Automation Script
91a8682c32 linux-ti-staging-rt: CI/CD Auto-Merger: cicd.dunfell.202302230340
Updated the value(s) for:
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-02-23 03:40:22 -06:00
LCPD Automation Script
dbe929ce64 u-boot-ti-staging: CI/CD Auto-Merger: cicd.dunfell.202302230340
Updated the value(s) for:
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-02-23 03:40:22 -06:00
LCPD Automation Script
fd74f0cf2e ti-linux-fw: CI/CD Auto-Merger: cicd.dunfell.202302230340
Updated the value(s) for:
  TI_LINUX_FW_SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-02-23 03:40:22 -06:00
Manorit Chawdhry
bf8c55cf0d optee: fix the sha for 3.20 tag
The SHA for optee_os had been of 3.20-rc1 tag instead of 3.20 tag which
had been marked stable. Change the tag to 3.20.

Fixes: 280e7b4b3a ("optee: update optee components to 3.20 tag")

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Signed-off-by: Ryan Eatmon <reatmon@ti.com>
2023-02-22 07:49:39 -06:00
LCPD Automation Script
f438d6a688 linux-ti-staging-rt: CI/CD Auto-Merger: cicd.dunfell.202302220400
Updated the value(s) for:
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-02-22 04:00:12 -06:00
LCPD Automation Script
2b8869bac6 linux-ti-staging: CI/CD Auto-Merger: cicd.dunfell.202302211800
Updated the value(s) for:
  PV
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-02-21 18:01:19 -06:00
LCPD Automation Script
b7085f60b6 linux-ti-staging-rt: CI/CD Auto-Merger: cicd.dunfell.202302211800
Updated the value(s) for:
  PV
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-02-21 18:01:19 -06:00
LCPD Automation Script
6c6706afe7 u-boot-ti-staging: CI/CD Auto-Merger: cicd.dunfell.202302211800
Updated the value(s) for:
  SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-02-21 18:01:19 -06:00
LCPD Automation Script
8ff139daba ti-linux-fw: CI/CD Auto-Merger: cicd.dunfell.202302211800
Updated the value(s) for:
  TI_LINUX_FW_SRCREV

Signed-off-by: LCPD Automation Script <lcpdbld@list.ti.com>
2023-02-21 18:01:19 -06:00
14 changed files with 59 additions and 13 deletions

View File

@@ -12,6 +12,7 @@ KERNEL_DEVICETREE = " \
ti/k3-am62a7-fpdlink-ov2312-0-3.dtbo \
ti/k3-am62a7-fpdlink-sk-fusion.dtbo \
ti/k3-am62a7-sk-csi2-imx219.dtbo \
ti/k3-am62a7-sk-ethernet-dc01.dtbo \
ti/k3-j721e-fpdlink-imx390-cm-0-0.dtbo \
ti/k3-j721e-fpdlink-imx390-cm-0-1.dtbo \
ti/k3-j721e-fpdlink-imx390-cm-0-2.dtbo \

View File

@@ -38,6 +38,8 @@ KERNEL_DEVICETREE = " \
ti/k3-j721e-fpdlink-sk-fusion.dtbo \
ti/k3-j721e-sk-csi2-ov5640.dtbo \
ti/k3-j721e-sk-rpi-cam-imx219.dtbo \
ti/k3-j721e-common-proc-board-uarts.dtbo \
ti/k3-j7200-mcspi-loopback.dtbo \
"
UBOOT_MACHINE = "j721e_evm_a72_config"

View File

@@ -10,6 +10,7 @@ SERIAL_CONSOLES_CHECK = "${SERIAL_CONSOLES}"
KERNEL_DEVICETREE = " \
ti/k3-j7200-common-proc-board.dtb \
ti/k3-j7200-mcspi-loopback.dtbo \
ti/k3-j7200-common-proc-board-uarts.dtbo \
"
UBOOT_MACHINE = "j7200_evm_a72_config"

View File

@@ -39,6 +39,8 @@ KERNEL_DEVICETREE = " \
ti/k3-j721s2-cpb-csi2-ov5640.dtbo \
ti/k3-j721s2-fpdlink-cpb-fusion.dtbo \
ti/k3-j721s2-gesi-exp-board.dtbo \
ti/k3-j721s2-common-proc-board-uarts.dtbo \
ti/k3-j7200-mcspi-loopback.dtbo \
"
UBOOT_MACHINE = "j721s2_evm_a72_defconfig"

View File

@@ -38,6 +38,8 @@ KERNEL_DEVICETREE = " \
ti/k3-j784s4-evm.dtb \
ti/k3-j784s4-evm-csi2-ov5640.dtbo \
ti/k3-j784s4-fpdlink-fusion.dtbo \
ti/k3-j784s4-evm-uarts.dtbo \
ti/k3-j7200-mcspi-loopback.dtbo \
"
UBOOT_MACHINE = "j784s4_evm_a72_defconfig"

View File

@@ -20,12 +20,12 @@ IMG_DEC_FW_VERSION = "1.0"
CNM_WAVE521_FW_VERSION = "1.0.00"
TIFS_LPM_STUB_FW_VERSION = "08.03.02"
TI_LINUX_FW_SRCREV ?= "340194800a581baf976360386dfc7b5acab8d948"
TI_LINUX_FW_SRCREV ?= "760434de173d1957823042b3c2daf0f45e1191cd"
SRCREV = "${TI_LINUX_FW_SRCREV}"
BRANCH ?= "ti-linux-firmware"
K3_IMAGE_GEN_SRCREV ?= "ffae8800a5c81c149835ed1aa5e2fbbe65a49c0d"
K3_IMAGE_GEN_SRCREV ?= "184ab513e6acb161c5f77a593ef976f3a4d93cda"
SRCREV_imggen = "${K3_IMAGE_GEN_SRCREV}"
SRCREV_FORMAT = "imggen"

View File

@@ -6,4 +6,4 @@ PR = "r33"
BRANCH = "ti-u-boot-2021.01"
SRCREV = "62a9e513448d700cbc3d775f497f94ba63851c8e"
SRCREV = "3a5205e9803809f18edc59a40fd9df470f98a00f"

View File

@@ -8,7 +8,7 @@ PV = "0.2+git${SRCPV}"
COMPATIBLE_MACHINE = "k3"
BRANCH ?= "master"
SRCREV = "982f5c2f02f732b5829861218812904cd776773d"
SRCREV = "1dd468d551fd786c410e88dadc1114505d057ebe"
SRC_URI = "git://git.ti.com/git/k3conf/k3conf.git;protocol=https;branch=${BRANCH}"

View File

@@ -6,5 +6,5 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}-5.10:"
BRANCH = "ti-rt-linux-5.10.y"
SRCREV = "02a1d48fd7af03f93bdf4ca06415618caa11bec2"
PV = "5.10.162+git${SRCPV}"
SRCREV = "e6bb059e69c106b73bfe2a10e729dbe5a5820916"
PV = "5.10.168+git${SRCPV}"

View File

@@ -25,8 +25,8 @@ S = "${WORKDIR}/git"
BRANCH = "ti-linux-5.10.y"
SRCREV = "76b3e88d569210a51399e8d8c8babd995af29d11"
PV = "5.10.162+git${SRCPV}"
SRCREV = "991c5ce91e43cb620f534dc9fe7b0ad21f4f4388"
PV = "5.10.168+git${SRCPV}"
# Append to the MACHINE_KERNEL_PR so that a new SRCREV will cause a rebuild
MACHINE_KERNEL_PR_append = "b"

View File

@@ -0,0 +1,34 @@
From 0bab935695ebcf0c533b49896ab18ff33d4a47d1 Mon Sep 17 00:00:00 2001
From: Ross Burton <ross.burton@arm.com>
Date: Tue, 26 May 2020 14:38:02 -0500
Subject: [PATCH] allow setting sysroot for libgcc lookup
Explicitly pass the new variable LIBGCC_LOCATE_CFLAGS variable when searching
for the compiler libraries as there's no easy way to reliably pass --sysroot
otherwise.
Upstream-Status: Pending [https://github.com/OP-TEE/optee_os/issues/4188]
Signed-off-by: Ross Burton <ross.burton@arm.com>
---
mk/gcc.mk | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/mk/gcc.mk b/mk/gcc.mk
index adc77a24..81bfa78a 100644
--- a/mk/gcc.mk
+++ b/mk/gcc.mk
@@ -13,11 +13,11 @@ nostdinc$(sm) := -nostdinc -isystem $(shell $(CC$(sm)) \
-print-file-name=include 2> /dev/null)
# Get location of libgcc from gcc
-libgcc$(sm) := $(shell $(CC$(sm)) $(CFLAGS$(arch-bits-$(sm))) \
+libgcc$(sm) := $(shell $(CC$(sm)) $(LIBGCC_LOCATE_CFLAGS) $(CFLAGS$(arch-bits-$(sm))) \
-print-libgcc-file-name 2> /dev/null)
-libstdc++$(sm) := $(shell $(CXX$(sm)) $(CXXFLAGS$(arch-bits-$(sm))) $(comp-cxxflags$(sm)) \
+libstdc++$(sm) := $(shell $(CXX$(sm)) $(LIBGCC_LOCATE_CFLAGS) $(CXXFLAGS$(arch-bits-$(sm))) $(comp-cxxflags$(sm)) \
-print-file-name=libstdc++.a 2> /dev/null)
-libgcc_eh$(sm) := $(shell $(CXX$(sm)) $(CXXFLAGS$(arch-bits-$(sm))) $(comp-cxxflags$(sm)) \
+libgcc_eh$(sm) := $(shell $(CXX$(sm)) $(LIBGCC_LOCATE_CFLAGS) $(CXXFLAGS$(arch-bits-$(sm))) $(comp-cxxflags$(sm)) \
-print-file-name=libgcc_eh.a 2> /dev/null)
# Define these to something to discover accidental use

View File

@@ -1,6 +1,10 @@
FILESEXTRAPATHS_prepend_ti-soc := "${THISDIR}/${PN}:"
PV_ti-soc = "3.20.0+git${SRCPV}"
SRCREV_ti-soc = "3bc3809afe372ca7e8216fc5d7a64e965bb4ad70"
SRC_URI_ti-soc = "git://github.com/OP-TEE/optee_os.git;protocol=https"
SRCREV_ti-soc = "8e74d47616a20eaa23ca692f4bbbf917a236ed94"
SRC_URI_ti-soc = "git://github.com/OP-TEE/optee_os.git;protocol=https \
file://0006-allow-setting-sysroot-for-libgcc-lookup.patch \
"
DEPENDS_append_ti-soc = " python3-cryptography-native"

View File

@@ -14,7 +14,7 @@ COMPATIBLE_MACHINE_class-nativesdk = "(.*)"
GIT_URI = "git://git.ti.com/git/security-development-tools/core-secdev-k3.git"
GIT_PROTOCOL = "https"
GIT_BRANCH = "master"
GIT_SRCREV = "eb2c4d734487e5095b94cef3fd7213ee71d9e016"
GIT_SRCREV = "bba9cabaeee96f7f287385188ff289b46769a4bf"
SRC_URI = "${GIT_URI};protocol=${GIT_PROTOCOL};branch=${GIT_BRANCH}"
SRCREV = "${GIT_SRCREV}"

View File

@@ -802,7 +802,7 @@ ALTERNATIVE_TARGET[j721s2-c71_1-fw-sec] = "${base_libdir}/firmware/pdk-ipc/ipc_e
ALTERNATIVE_TARGET[j784s4-mcu-r5f0_0-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_testb_mcu1_0_release_strip.xer5f"
ALTERNATIVE_TARGET[j784s4-mcu-r5f0_1-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_test_mcu1_1_release_strip.xer5f"
ALTERNATIVE_TARGET[j784s4-main-r5f0_0-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_test_mcu2_0_release_strip.xer5f"
ALTERNATIVE_TARGET[j784s4-main-r5f0_0-fw] = "${base_libdir}/firmware/ethfw/app_remoteswitchcfg_server_strip.xer5f"
ALTERNATIVE_TARGET[j784s4-main-r5f0_1-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_test_mcu2_1_release_strip.xer5f"
ALTERNATIVE_TARGET[j784s4-main-r5f1_0-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_test_mcu3_0_release_strip.xer5f"
ALTERNATIVE_TARGET[j784s4-main-r5f1_1-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_test_mcu3_1_release_strip.xer5f"
@@ -813,7 +813,7 @@ ALTERNATIVE_TARGET[j784s4-c71_1-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_
ALTERNATIVE_TARGET[j784s4-c71_2-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_test_c7x_3_release_strip.xe71"
ALTERNATIVE_TARGET[j784s4-c71_3-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_test_c7x_4_release_strip.xe71"
ALTERNATIVE_TARGET[j784s4-main-r5f0_0-fw-sec] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_test_mcu2_0_release_strip.xer5f.signed"
ALTERNATIVE_TARGET[j784s4-main-r5f0_0-fw-sec] = "${base_libdir}/firmware/ethfw/app_remoteswitchcfg_server_strip.xer5f.signed"
ALTERNATIVE_TARGET[j784s4-main-r5f0_1-fw-sec] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_test_mcu2_1_release_strip.xer5f.signed"
ALTERNATIVE_TARGET[j784s4-main-r5f1_0-fw-sec] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_test_mcu3_0_release_strip.xer5f.signed"
ALTERNATIVE_TARGET[j784s4-main-r5f1_1-fw-sec] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_test_mcu3_1_release_strip.xer5f.signed"