u-boot_2012.04.01: Add latest u-boot recipe for am37x-evm

Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
Signed-off-by: Denys Dmytriyenko <denys@ti.com>

conf/layer.conf

@@ -6,4 +6,4 @@ BBFILES += "${LAYERDIR}/recipes*/*/*.bb ${LAYERDIR}/recipes*/*/*.bbappend"
 
 BBFILE_COLLECTIONS += "meta-ti"
 BBFILE_PATTERN_meta-ti := "^${LAYERDIR}/"
-BBFILE_PRIORITY_meta-ti = "10"
+BBFILE_PRIORITY_meta-ti = "6"

conf/machine/am180x-evm.conf

@@ -9,6 +9,8 @@ UBOOT_MACHINE = "da850evm_config"
 UBOOT_ENTRYPOINT = "0xc0008000"
 UBOOT_LOADADDRESS = "0xc0008000"
 
+IMAGE_FSTYPES += "tar.gz ubi"
+
 MACHINE_FEATURES = "kernel26 serial ethernet"
 
 SERIAL_CONSOLE = "115200 ttyS2"

conf/machine/am335x-evm.conf

@@ -1,7 +1,6 @@
 #@TYPE: Machine
 #@NAME: AM335x EVM
 #@DESCRIPTION: Machine configuration for the TI AM335x EVM
-TARGET_ARCH = "arm"
 
 PREFERRED_PROVIDER_virtual/xserver = "xserver-xorg"
 XSERVER = "xserver-xorg \
@@ -12,7 +11,7 @@ GUI_MACHINE_CLASS = "smallscreen"
 
 require conf/machine/include/ti33x.inc
 
-IMAGE_FSTYPES += "ubi tar.bz2"
+IMAGE_FSTYPES += "ubi tar.gz"
 
 SERIAL_CONSOLE = "115200 ttyO0"
 

conf/machine/am3517-evm.conf

@@ -16,10 +16,10 @@ require conf/machine/include/omap3.inc
 
 # Ship all kernel modules
 
-IMAGE_FSTYPES += "ubi tar.bz2"
+IMAGE_FSTYPES += "ubi tar.gz"
 EXTRA_IMAGECMD_jffs2 = "-lnp -e 0x20000 -s 2048"
 
-SERIAL_CONSOLE = "115200 ttyS2"
+SERIAL_CONSOLE = "115200 ttyO2"
 USE_VT = "2"
 
 PREFERRED_PROVIDER_virtual/kernel = "linux-omap-psp"

conf/machine/am37x-evm.conf

@@ -16,10 +16,10 @@ require conf/machine/include/omap3.inc
 
 # Ship all kernel modules
 
-IMAGE_FSTYPES += "jffs2 tar.bz2"
+IMAGE_FSTYPES += "ubi tar.gz"
 EXTRA_IMAGECMD_jffs2 = "-lnp -e 0x20000 -s 2048"
 
-SERIAL_CONSOLE = "115200 ttyS0"
+SERIAL_CONSOLE = "115200 ttyO0"
 
 PREFERRED_PROVIDER_virtual/kernel = "linux-omap-psp"
 

conf/machine/am387x-evm.conf

@@ -3,3 +3,5 @@
 #@DESCRIPTION: Machine configuration for the AM389x evm
 
 require conf/machine/include/ti814x.inc
+
+IMAGE_FSTYPES += "ubi tar.gz"

conf/machine/am389x-evm.conf

@@ -3,3 +3,5 @@
 #@DESCRIPTION: Machine configuration for the am389x evm
 
 require conf/machine/include/ti816x.inc
+
+IMAGE_FSTYPES += "ubi tar.gz"

conf/machine/beagleboard.conf

@@ -19,7 +19,7 @@ EXTRA_IMAGEDEPENDS = "u-boot"
 
 PREFERRED_PROVIDER_virtual/kernel = "linux-mainline"
 
-IMAGE_FSTYPES += "tar.bz2 ubi"
+IMAGE_FSTYPES += "tar.gz ubi"
 EXTRA_IMAGECMD_jffs2 = "-lnp "
 
 # Guesswork
@@ -48,4 +48,5 @@ UBINIZE_ARGS = "-m 2048 -p 128KiB -s 512"
 MACHINE_FEATURES = "kernel26 screen apm usbgadget usbhost vfat alsa"
 
 # For a modularized kernel we want to drag in networking, sound, rtc etc."
-MACHINE_EXTRA_RRECOMMENDS = "kernel-module-smsc95xx kernel-module-snd-soc-twl4030 kernel-module-rtc-twl"
+MACHINE_EXTRA_RRECOMMENDS = "kernel-module-smsc95xx kernel-module-snd-soc-twl4030 kernel-module-rtc-twl \
+  kernel-module-snd-soc-omap kernel-module-snd-soc-omap-mcbsp kernel-module-snd-soc-omap3beagle"

conf/machine/include/davinci.inc

@@ -1,7 +1,7 @@
 require conf/machine/include/tune-arm926ejs.inc
 
 # Increase this everytime you change something in the kernel
-MACHINE_KERNEL_PR = "r51"
+MACHINE_KERNEL_PR = "r52"
 
 
 KERNEL_IMAGETYPE = "uImage"

conf/machine/include/keystone.inc

@@ -0,0 +1,16 @@
+SOC_FAMILY = "keystone"
+require conf/machine/include/soc-family.inc
+
+require conf/machine/include/tune-cortexa15.inc
+PREFERRED_PROVIDER_virtual/kernel = "linux-keystone"
+
+# Increase this everytime you change something in the kernel
+MACHINE_KERNEL_PR = "r5"
+
+KERNEL_IMAGETYPE = "uImage"
+
+UBOOT_ENTRYPOINT = "0x80008000"
+UBOOT_LOADADDRESS = "0x80008000"
+
+EXTRA_IMAGEDEPENDS += "u-boot"
+EXTRA_IMAGEDEPENDS += "boot-monitor"

conf/machine/include/omap3.inc

@@ -4,7 +4,7 @@ require conf/machine/include/soc-family.inc
 require conf/machine/include/tune-cortexa8.inc
 PREFERRED_PROVIDER_virtual/kernel = "linux-omap"
 # Increase this everytime you change something in the kernel
-MACHINE_KERNEL_PR = "r121"
+MACHINE_KERNEL_PR = "r123"
 
 KERNEL_IMAGETYPE = "uImage"
 
@@ -12,4 +12,3 @@ UBOOT_ENTRYPOINT = "0x80008000"
 UBOOT_LOADADDRESS = "0x80008000"
 
 EXTRA_IMAGEDEPENDS += "u-boot x-load"
-

conf/machine/include/ti33x.inc

@@ -4,7 +4,7 @@ require conf/machine/include/soc-family.inc
 require conf/machine/include/tune-cortexa8.inc
 PREFERRED_PROVIDER_virtual/kernel = "linux-ti33x-psp"
 # Increase this everytime you change something in the kernel
-MACHINE_KERNEL_PR = "r12"
+MACHINE_KERNEL_PR = "r17"
 
 KERNEL_IMAGETYPE = "uImage"
 

conf/machine/include/tune-cortexa15.inc

@@ -0,0 +1,24 @@
+DEFAULTTUNE ?= "cortexa15-neon"
+
+require conf/machine/include/arm/arch-armv7a.inc
+
+TUNEVALID[cortexa15] = "Enable Cortex-A15 specific processor optimizations"
+TUNE_CCARGS += "${@bb.utils.contains("TUNE_FEATURES", "cortexa15", "-mtune=cortex-a15", "", d)}"
+
+# Little Endian base configs
+AVAILTUNES += "cortexa15 cortexa15t cortexa15-neon"
+TUNE_FEATURES_tune-cortexa15 = "${TUNE_FEATURES_tune-armv7a} cortexa15"
+TUNE_FEATURES_tune-cortexa15t = "${TUNE_FEATURES_tune-armv7at} cortexa15"
+TUNE_FEATURES_tune-cortexa15-neon = "${TUNE_FEATURES_tune-armv7a-neon} cortexa15"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15 = "${PACKAGE_EXTRA_ARCHS_tune-armv7a}"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15t = "${PACKAGE_EXTRA_ARCHS_tune-armv7at}"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7a-neon}"
+
+# VFP Tunes
+AVAILTUNES += "cortexa15hf cortexa15thf cortexa15hf-neon"
+TUNE_FEATURES_tune-cortexa15hf ?= "${TUNE_FEATURES_tune-armv7ahf} cortexa15"
+TUNE_FEATURES_tune-cortexa15thf ?= "${TUNE_FEATURES_tune-armv7athf} cortexa15"
+TUNE_FEATURES_tune-cortexa15hf-neon ?= "${TUNE_FEATURES_tune-armv7ahf-neon} cortexa15"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf}"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf}"
+PACKAGE_EXTRA_ARCHS_tune-cortexa15hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon}"

conf/machine/include/tune-cortexa7.inc

@@ -0,0 +1,24 @@
+DEFAULTTUNE ?= "cortexa7-neon"
+
+require conf/machine/include/arm/arch-armv7a.inc
+
+TUNEVALID[cortexa7] = "Enable Cortex-A7 specific processor optimizations"
+TUNE_CCARGS += "${@bb.utils.contains("TUNE_FEATURES", "cortexa7", "-mtune=cortex-a7", "", d)}"
+
+# Little Endian base configs
+AVAILTUNES += "cortexa7 cortexa7t cortexa7-neon"
+TUNE_FEATURES_tune-cortexa7 = "${TUNE_FEATURES_tune-armv7a} cortexa7"
+TUNE_FEATURES_tune-cortexa7t = "${TUNE_FEATURES_tune-armv7at} cortexa7"
+TUNE_FEATURES_tune-cortexa7-neon = "${TUNE_FEATURES_tune-armv7a-neon} cortexa7"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7 = "${PACKAGE_EXTRA_ARCHS_tune-armv7a}"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7t = "${PACKAGE_EXTRA_ARCHS_tune-armv7at}"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7a-neon}"
+
+# VFP Tunes
+AVAILTUNES += "cortexa7hf cortexa7thf cortexa7hf-neon"
+TUNE_FEATURES_tune-cortexa7hf ?= "${TUNE_FEATURES_tune-armv7ahf} cortexa7"
+TUNE_FEATURES_tune-cortexa7thf ?= "${TUNE_FEATURES_tune-armv7athf} cortexa7"
+TUNE_FEATURES_tune-cortexa7hf-neon ?= "${TUNE_FEATURES_tune-armv7ahf-neon} cortexa7"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf}"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf}"
+PACKAGE_EXTRA_ARCHS_tune-cortexa7hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon}"

conf/machine/keystone-evm.conf

@@ -0,0 +1,25 @@
+#@TYPE: Machine
+#@NAME: Keystone 2 machine
+#@DESCRIPTION: Machine configuration for the TI Keystone 2
+
+PREFERRED_PROVIDER_virtual/xserver = "xserver-xorg"
+XSERVER = "xserver-xorg \
+           xf86-input-evdev \
+           xf86-video-fbdev"
+
+GUI_MACHINE_CLASS = "bigscreen"
+
+require conf/machine/include/keystone.inc
+#EXTRA_IMAGEDEPENDS = "u-boot"
+
+PREFERRED_PROVIDER_virtual/kernel = "linux-keystone"
+
+IMAGE_FSTYPES += "tar.bz2 cpio"
+
+SERIAL_CONSOLE = "115200 ttyS0"
+
+SYSVINIT_ENABLED_GETTYS = ""
+
+UBOOT_MACHINE = "tci6638_evm_config"
+
+MACHINE_FEATURES = "kernel26 screen apm usbgadget usbhost vfat alsa"

conf/machine/omap3-touchbook.conf

@@ -1,7 +1,6 @@
 #@TYPE: Machine
 #@NAME: Always Innovating touchbook
 #@DESCRIPTION: Machine configuration for the http://www.alwaysinnovating.com/touchbook/
-TARGET_ARCH = "arm"
 
 PREFERRED_PROVIDER_virtual/xserver = "xserver-xorg"
 XSERVER = "xserver-xorg \
@@ -43,7 +42,5 @@ MKUBIFS_ARGS = "-m 2048 -e 129024 -c 1996"
 # UBI: sub-page size:              512
 UBINIZE_ARGS = "-m 2048 -p 128KiB -s 512"
 
-
-
 # and sdio
 MACHINE_FEATURES = "kernel26 screen apm usbgadget usbhost vfat alsa touchscreen"

conf/machine/omap3evm.conf

@@ -1,7 +1,6 @@
 #@TYPE: Machine
 #@NAME: OMAP3 EVM
 #@DESCRIPTION: Machine configuration for the TI OMAP3 EVM
-TARGET_ARCH = "arm"
 
 PREFERRED_PROVIDER_virtual/xserver = "xserver-xorg"
 XSERVER = "xserver-xorg \
@@ -49,4 +48,3 @@ MKUBIFS_ARGS = "-m 2048 -e 129024 -c 1996"
 # UBI: physical eraseblock size:   131072 bytes (128 KiB)
 # UBI: sub-page size:              512
 UBINIZE_ARGS = "-m 2048 -p 128KiB -s 512"
-

extras/COPYING.MIT

@@ -1,17 +0,0 @@
-Permission is hereby granted, free of charge, to any person obtaining a copy 
-of this software and associated documentation files (the "Software"), to deal 
-in the Software without restriction, including without limitation the rights 
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 
-copies of the Software, and to permit persons to whom the Software is 
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in 
-all copies or substantial portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
-FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
-AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
-LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 
-OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 
-THE SOFTWARE.

extras/README

@@ -1,17 +0,0 @@
-An "extras" (AKA best-effort) layer for meta-ti
-
-This layer depends on:
-
-URI: git://git.openembedded.org/openembedded-core
-layers: meta
-branch: master
-
-URI: git://git.yoctoproject.org/meta-ti
-layers: meta
-branch: master
-
-
-Send pull requests, patches, comments or questions to meta-ti@yoctoproject.org
-
-Maintainers: Denys Dmytriyenko <denys@ti.com>
-             Koen Kooi <koen@dominion.thruhere.net>

extras/conf/layer.conf

@@ -1,9 +0,0 @@
-# We have a conf and classes directory, append to BBPATH
-BBPATH .= ":${LAYERDIR}"
-
-# We have a recipes directory, add to BBFILES
-BBFILES += "${LAYERDIR}/recipes*/*/*.bb ${LAYERDIR}/recipes*/*/*.bbappend"
-
-BBFILE_COLLECTIONS += "meta-ti-extras"
-BBFILE_PATTERN_meta-ti := "^${LAYERDIR}/"
-BBFILE_PRIORITY_meta-ti = "10"

recipes-bsp/boot-monitor/boot-monitor_git.bb

@@ -0,0 +1,39 @@
+DESCRIPTION = "Boot Monitor - TI ARM Boot monitor code"
+EXTRA_OEMAKE = "CROSS_COMPILE=${TARGET_PREFIX}"
+
+LICENSE = "BSD"
+
+BOOT_MONITOR_BINARY ?= "skern.bin"
+BOOT_MONITOR_IMAGE  ?= "skern-${MACHINE}.bin"
+BOOT_MONITOR_MAKE_TARGET  ?= "all"
+
+LIC_FILES_CHKSUM = "file://COPYING;md5=25fe219a6febf6e5bb45beda1b2eb315"
+
+COMPATIBLE_MACHINE = "keystone-evm"
+
+SRC_URI = "git://arago-project.org/git/projects/boot-monitor.git;protocol=git;branch=${BRANCH}"
+
+PV = "1.0"
+PR = "r1+gitr${SRCPV}"
+
+BRANCH = "master"
+
+S = "${WORKDIR}/git"
+
+SRCREV = "DEV.MCSDK-03.00.00.07"
+
+do_compile () {
+	unset LDFLAGS
+	unset CFLAGS
+	unset CPPFLAGS
+	oe_runmake ${BOOT_MONITOR_MAKE_TARGET}
+}
+
+inherit deploy
+
+addtask deploy before do_build after do_compile
+
+do_deploy () {
+	install -d ${DEPLOYDIR}
+	install ${S}/${BOOT_MONITOR_BINARY} ${DEPLOYDIR}/${BOOT_MONITOR_IMAGE}
+}

recipes-bsp/powervr-drivers/omap3-sgx-modules_1.6.16.3977.bb

@@ -11,17 +11,17 @@ BINFILE := "Graphics_SDK_setuplinux_${SGXPV}.bin"
 
 inherit module
 
-MACHINE_KERNEL_PR_append = "a"
+MACHINE_KERNEL_PR_append = "b"
 PR = "${MACHINE_KERNEL_PR}"
 
-SRC_URI = "http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/gfxsdk/${SGXPV}/exports/Graphics_SDK_setuplinux_${SGXPV}.bin \
+SRC_URI = "http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/gfxsdk/${SGXPV}/exports/${BINFILE} \
            file://Compile-fixes-for-38-kernel.patch \
            file://kernel-30.patch \
           "
 SRC_URI[md5sum] = "ff8c1f2b8e4cb42f4ced6a613b081ada"
 SRC_URI[sha256sum] = "cdb0bd3964e107733d632aa8224e0537b05c1ffac34befc036423458c8d75255"
-
-S = "${WORKDIR}/Graphics_SDK_${SGXPV}/GFX_Linux_KM"
+TI_BIN_UNPK_WDEXT="/Graphics_SDK_${SGXPV}"
+S = "${WORKDIR}${TI_BIN_UNPK_WDEXT}/GFX_Linux_KM"
 
 PVRBUILD = "release"
 export KERNELDIR = "${STAGING_KERNEL_DIR}"

recipes-bsp/pru/ti-pru-sw-edma-driver_1.00.00.bb

@@ -0,0 +1,32 @@
+DESCRIPTION = "Builds eDMA module used by eDMA libraries for PRU sw example applications"
+HOMEPAGE = "https://gforge.ti.com/gf/project/pru_sw/"
+LICENSE = "GPLv2"
+LIC_FILES_CHKSUM = "file://edmautils.c;beginline=1;endline=23;md5=312e9cb8a37a044c617c98a9e980ad1b"
+
+COMPATIBLE_MACHINE = "omapl138"
+
+INHIBIT_PACKAGE_STRIP = "1"
+
+MACHINE_KERNEL_PR_append = "a+svnr${SRCPV}"
+PR = "${MACHINE_KERNEL_PR}"
+
+SRC_URI = "svn://gforge.ti.com/svn/pru_sw/;module=trunk;protocol=https;user=anonymous;pswd=''"
+
+SRCREV = "33"
+
+S = "${WORKDIR}/trunk/peripheral_lib/edma_driver/module"
+
+inherit module
+
+EXTRA_OEMAKE += "KERNEL_DIR='${STAGING_KERNEL_DIR}'"
+
+do_compile_prepend () {
+        export CCTOOL_PREFIX="${TOOLCHAIN_PATH}/bin/${TARGET_PREFIX}"
+}
+
+do_install () {
+        install -d ${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers/pru
+        install -m 0755 ${S}/edmautils.ko ${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers/pru/
+}
+
+FILES_${PN} = "/lib/modules/${KERNEL_VERSION}/kernel/drivers/pru/edmautils.ko"

recipes-bsp/ti-ocf-crypto-module/ti-ocf-crypto-module_1.0.bb

@@ -0,0 +1,36 @@
+DESCRIPTION = "Builds Crypto module used by OCF-Linux driver in OpenSSL example applications"
+HOMEPAGE = "https://gforge.ti.com/gf/project/arm_crypto/"
+LICENSE = "BSD & GPLv2"
+LIC_FILES_CHKSUM = "file://Makefile;beginline=1;endline=16;md5=acc0590f80e72fd64ad5c16cad8f4f76 \
+                    file://ocf_omap3_crypto.c;beginline=436;endline=438;md5=a52cad5c37c3aa3f27c6391552967304"
+
+COMPATIBLE_MACHINE = "am37x-evm|am3517-evm"
+
+DEPENDS += "virtual/kernel"
+
+SRC_URI = "svn://gforge.ti.com/svn/arm_crypto/;module=trunk;protocol=https;user=anonymous;pswd=''"
+
+#gforge source revision
+SRCREV = "17"
+
+INHIBIT_PACKAGE_STRIP = "1"
+
+S = "${WORKDIR}/trunk"
+
+inherit module
+
+MACHINE_KERNEL_PR_append = "a+svnr${SRCPV}"
+PR = "${MACHINE_KERNEL_PR}"
+
+EXTRA_OEMAKE += "KERNEL_DIR=${STAGING_KERNEL_DIR}"
+
+do_compile_prepend () {
+    sed -i "s/arm-none-linux-gnueabi-/${TARGET_PREFIX}/g" ${S}/Makefile
+}
+
+do_install () {
+        install -d ${D}/lib/modules/${KERNEL_VERSION}/crypto/ocf/
+        install -m 0755 ${S}/ocf_omap3_cryptok.ko ${D}/lib/modules/${KERNEL_VERSION}/crypto/ocf/
+}
+
+FILES_${PN} = "/lib/modules/${KERNEL_VERSION}/crypto/ocf/ocf_omap3_cryptok.ko"

recipes-bsp/u-boot/u-boot-2010.12-psp03.21.00.04.sdk/am180x-evm/0001-da850evm-change-default-memory-to-not-limit-at-32MB.patch

@@ -0,0 +1,34 @@
+From df5c87c4e1be1670475eba1187301a2f7a7aca30 Mon Sep 17 00:00:00 2001
+From: Chase Maupin <Chase.Maupin@ti.com>
+Date: Wed, 22 Jun 2011 12:12:09 -0500
+Subject: [PATCH] da850evm: change default memory to not limit at 32MB
+
+* Change the default mem= option passed to the Linux kernel to
+  not limit the memory to 32MB.
+* This change is used by AM devices that do not need to reserve
+  space for the DSP image.  By removing the mem= option we get
+  access to all of the memory on the system.
+* Limiting the memory to 32MB causes out-of-memory errors
+  when running large applications such as web browsers
+
+Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
+---
+ include/configs/da850evm.h |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
+index 4a1e0af..55badc9 100755
+--- a/include/configs/da850evm.h
++++ b/include/configs/da850evm.h
+@@ -184,7 +184,7 @@
+ #define CONFIG_CMDLINE_TAG
+ #define CONFIG_REVISION_TAG
+ #define CONFIG_SETUP_MEMORY_TAGS
+-#define CONFIG_BOOTARGS		"mem=32M console=ttyS2,115200n8 root=/dev/mmcblk0p2 rw rootwait ip=off"
++#define CONFIG_BOOTARGS		"console=ttyS2,115200n8 root=/dev/mmcblk0p2 rw rootwait ip=off"
+ #define CONFIG_BOOTCOMMAND	"if mmc rescan 0; then if fatload mmc 0 0xc0600000 boot.scr; then source 0xc0600000; else fatload mmc 0 0xc0700000 uImage; bootm c0700000; fi; else sf probe 0; sf read 0xc0700000 0x80000 0x220000; bootm 0xc0700000; fi"
+ #define CONFIG_BOOTDELAY	3
+ 
+-- 
+1.7.0.4
+

recipes-bsp/u-boot/u-boot-2012.04.01/0001-ARM-omap3-Set-SPL-stack-size-to-8KB-image-to-54KB.patch

@@ -0,0 +1,172 @@
+From e0820ccc38315d88192c19e98ea9b59d3ec7d4c8 Mon Sep 17 00:00:00 2001
+From: Tom Rini <trini@ti.com>
+Date: Tue, 8 May 2012 07:29:31 +0000
+Subject: [PATCH] ARM: omap3: Set SPL stack size to 8KB, image to 54KB.
+
+With older toolchains it is possible to not fit entirely into the 45KB
+that we had assigned to SPL.  Adjust to allow for 8KB of stack (which
+should be more than required) and 54KB of text/data.
+
+Cc: Vaibhav Hiremath <hvaibhav@ti.com>
+Cc: Nagendra T S <nagendra@mistralsolutions.com>
+Cc: Thomas Weber <weber@corscience.de>
+Cc: Ilya Yanok <yanok@emcraft.com>
+Cc: Steve Sakoman <sakoman@gmail.com>
+Cc: Stefano Babic <sbabic@denx.de>
+Signed-off-by: Tom Rini <trini@ti.com>
+Acked-by: Stefano Babic <sbabic@denx.de>
+Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
+---
+ doc/SPL/README.omap3               |    4 ++--
+ include/configs/am3517_crane.h     |    2 +-
+ include/configs/am3517_evm.h       |    2 +-
+ include/configs/devkit8000.h       |    2 +-
+ include/configs/mcx.h              |    2 +-
+ include/configs/omap3_beagle.h     |    2 +-
+ include/configs/omap3_evm_common.h |    2 +-
+ include/configs/omap3_overo.h      |    2 +-
+ include/configs/tam3517-common.h   |    2 +-
+ include/configs/tricorder.h        |    2 +-
+ 10 files changed, 11 insertions(+), 11 deletions(-)
+
+diff --git a/doc/SPL/README.omap3 b/doc/SPL/README.omap3
+index cc5d5c0..a543e65 100644
+--- a/doc/SPL/README.omap3
++++ b/doc/SPL/README.omap3
+@@ -34,14 +34,14 @@ DDR1: 0x80000000 - 0xBFFFFFFF
+ 
+ Option 1 (SPL only):
+ 0x40200800 - 0x4020BBFF: Area for SPL text, data and rodata
+-0x4020BC00 - 0x4020FFFC: Area for the SPL stack.
++0x4020E000 - 0x4020FFFC: Area for the SPL stack.
+ 0x80000000 - 0x8007FFFF: Area for the SPL BSS.
+ 0x80100000: CONFIG_SYS_TEXT_BASE of U-Boot
+ 0x80208000 - 0x80307FFF: malloc() pool available to SPL.
+ 
+ Option 2 (SPL or X-Loader):
+ 0x40200800 - 0x4020BBFF: Area for SPL text, data and rodata
+-0x4020BC00 - 0x4020FFFC: Area for the SPL stack.
++0x4020E000 - 0x4020FFFC: Area for the SPL stack.
+ 0x80008000: CONFIG_SYS_TEXT_BASE of U-Boot
+ 0x87000000 - 0x8707FFFF: Area for the SPL BSS.
+ 0x87080000 - 0x870FFFFF: malloc() pool available to SPL.
+diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
+index 71321f3..1233985 100644
+--- a/include/configs/am3517_crane.h
++++ b/include/configs/am3517_crane.h
+@@ -325,7 +325,7 @@
+ #define CONFIG_SPL
+ #define CONFIG_SPL_NAND_SIMPLE
+ #define CONFIG_SPL_TEXT_BASE		0x40200800
+-#define CONFIG_SPL_MAX_SIZE		(45 * 1024)
++#define CONFIG_SPL_MAX_SIZE		(54 * 1024)	/* 8 KB for stack */
+ #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
+ 
+ #define CONFIG_SPL_BSS_START_ADDR	0x80000000
+diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
+index bbd19de..ff8d1b0 100644
+--- a/include/configs/am3517_evm.h
++++ b/include/configs/am3517_evm.h
+@@ -324,7 +324,7 @@
+ #define CONFIG_SPL
+ #define CONFIG_SPL_NAND_SIMPLE
+ #define CONFIG_SPL_TEXT_BASE		0x40200800
+-#define CONFIG_SPL_MAX_SIZE		(45 * 1024)
++#define CONFIG_SPL_MAX_SIZE		(54 * 1024)	/* 8 KB for stack */
+ #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
+ 
+ #define CONFIG_SPL_BSS_START_ADDR	0x80000000
+diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
+index eb7c376..248a5b2 100644
+--- a/include/configs/devkit8000.h
++++ b/include/configs/devkit8000.h
+@@ -324,7 +324,7 @@
+ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
+ 
+ #define CONFIG_SPL_TEXT_BASE		0x40200000 /*CONFIG_SYS_SRAM_START*/
+-#define CONFIG_SPL_MAX_SIZE		0xB400  /* 45 K */
++#define CONFIG_SPL_MAX_SIZE		(54 * 1024)	/* 8 KB for stack */
+ #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
+ 
+ #define CONFIG_SPL_BSS_START_ADDR       0x80000500 /* leave space for bootargs*/
+diff --git a/include/configs/mcx.h b/include/configs/mcx.h
+index e190e3e..f6a83a8 100644
+--- a/include/configs/mcx.h
++++ b/include/configs/mcx.h
+@@ -325,7 +325,7 @@
+ #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
+ 
+ #define CONFIG_SPL_TEXT_BASE		0x40200000 /*CONFIG_SYS_SRAM_START*/
+-#define CONFIG_SPL_MAX_SIZE		(45 << 10)
++#define CONFIG_SPL_MAX_SIZE		(54 * 1024)	/* 8 KB for stack */
+ #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
+ 
+ /* move malloc and bss high to prevent clashing with the main image */
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index ddeb414..6bdc2c3 100644
+--- a/include/configs/omap3_beagle.h
++++ b/include/configs/omap3_beagle.h
+@@ -399,7 +399,7 @@
+ #define CONFIG_SPL
+ #define CONFIG_SPL_NAND_SIMPLE
+ #define CONFIG_SPL_TEXT_BASE		0x40200800
+-#define CONFIG_SPL_MAX_SIZE		(45 * 1024)
++#define CONFIG_SPL_MAX_SIZE		(54 * 1024)	/* 8 KB for stack */
+ #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
+ 
+ #define CONFIG_SPL_BSS_START_ADDR	0x80000000
+diff --git a/include/configs/omap3_evm_common.h b/include/configs/omap3_evm_common.h
+index 4910dda..47ebbef 100644
+--- a/include/configs/omap3_evm_common.h
++++ b/include/configs/omap3_evm_common.h
+@@ -282,7 +282,7 @@
+ /* Defines for SPL */
+ #define CONFIG_SPL
+ #define CONFIG_SPL_TEXT_BASE		0x40200800
+-#define CONFIG_SPL_MAX_SIZE		(45 * 1024)	/* 45 KB */
++#define CONFIG_SPL_MAX_SIZE		(54 * 1024)	/* 8 KB for stack */
+ #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
+ 
+ #define CONFIG_SPL_BSS_START_ADDR	0x80000000
+diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
+index 64adc74..b0d144f 100644
+--- a/include/configs/omap3_overo.h
++++ b/include/configs/omap3_overo.h
+@@ -303,7 +303,7 @@
+ #define CONFIG_SPL
+ #define CONFIG_SPL_NAND_SIMPLE
+ #define CONFIG_SPL_TEXT_BASE		0x40200800
+-#define CONFIG_SPL_MAX_SIZE		(45 * 1024)
++#define CONFIG_SPL_MAX_SIZE		(54 * 1024)	/* 8 KB for stack */
+ #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
+ 
+ /* move malloc and bss high to prevent clashing with the main image */
+diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
+index 37eb87b..3fc2c44 100644
+--- a/include/configs/tam3517-common.h
++++ b/include/configs/tam3517-common.h
+@@ -257,7 +257,7 @@
+ #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
+ 
+ #define CONFIG_SPL_TEXT_BASE		0x40200000 /*CONFIG_SYS_SRAM_START*/
+-#define CONFIG_SPL_MAX_SIZE		(45 << 10)	/* 45 K */
++#define CONFIG_SPL_MAX_SIZE		(54 * 1024)	/* 8 KB for stack */
+ #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
+ 
+ #define CONFIG_SYS_SPL_MALLOC_START	0x8f000000
+diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
+index 801a24f..ab911aa 100644
+--- a/include/configs/tricorder.h
++++ b/include/configs/tricorder.h
+@@ -293,7 +293,7 @@
+ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
+ 
+ #define CONFIG_SPL_TEXT_BASE		0x40200000 /*CONFIG_SYS_SRAM_START*/
+-#define CONFIG_SPL_MAX_SIZE		0xB400  /* 45 K */
++#define CONFIG_SPL_MAX_SIZE		(54 * 1024)	/* 8 KB for stack */
+ #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
+ 
+ #define CONFIG_SPL_BSS_START_ADDR	0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
+-- 
+1.7.0.4
+

recipes-bsp/u-boot/u-boot-2012.04.01/0001-OMAP3-Beagle-Set-BOOTDELAY-to-3.patch

@@ -0,0 +1,31 @@
+From 55161fca67023d6be30bdea495cc0fdbae316a64 Mon Sep 17 00:00:00 2001
+From: Tom Rini <trini@ti.com>
+Date: Wed, 9 Nov 2011 11:48:21 -0700
+Subject: [PATCH 1/4] OMAP3 Beagle: Set BOOTDELAY to 3
+
+This is TI Sitara SDK specific (unified user experience, 3s delay).
+
+Upstream-Status: Pending
+    * This will be submitted upstream by Tom Rini
+
+Signed-off-by: Tom Rini <trini@ti.com>
+---
+ include/configs/omap3_beagle.h |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index 58a29b8..ba73aa6 100644
+--- a/include/configs/omap3_beagle.h
++++ b/include/configs/omap3_beagle.h
+@@ -213,7 +213,7 @@
+ 							/* partition */
+ 
+ /* Environment information */
+-#define CONFIG_BOOTDELAY		2
++#define CONFIG_BOOTDELAY		3
+ 
+ #define CONFIG_EXTRA_ENV_SETTINGS \
+ 	"loadaddr=0x80200000\0" \
+-- 
+1.7.0.4
+

recipes-bsp/u-boot/u-boot-2012.04.01/0001-omap3_beagle-add-usbethaddr-setting-to-enable-networ.patch

@@ -0,0 +1,40 @@
+From c56786770eb0ccb95204cb72b961c44c65ff343b Mon Sep 17 00:00:00 2001
+From: Chase Maupin <Chase.Maupin@ti.com>
+Date: Thu, 17 May 2012 09:51:50 -0500
+Subject: [PATCH] omap3_beagle: add usbethaddr setting to enable networking
+
+* In order for the SMSC USB ethernet device to work the
+  usbethaddr setting must be set when the "usb start" command
+  is executed and the network device is discovered.
+* Currently set this for de:ad:be:ef until we can start
+  generating random or semi-random MAC addresses.
+* Based on work by Steve Kipisz and Joel Fernandez
+
+Upstream-Status: Not Upstreamable
+    * We cannot upstream this hard coded MAC address setting.
+    * User's should look at the following web page for information on
+      how to generate a MAC address, but this patch enables the out
+      of box experience for the SDK.
+        http://www.denx.de/wiki/view/DULG/WhereCanIGetAValidMACAddress
+
+
+Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
+---
+ include/configs/omap3_beagle.h |    1 +
+ 1 files changed, 1 insertions(+), 0 deletions(-)
+
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index ddeb414..58a29b8 100644
+--- a/include/configs/omap3_beagle.h
++++ b/include/configs/omap3_beagle.h
+@@ -219,6 +219,7 @@
+ 	"loadaddr=0x80200000\0" \
+ 	"rdaddr=0x81000000\0" \
+ 	"usbtty=cdc_acm\0" \
++	"usbethaddr=de:ad:be:ef\0" \
+ 	"bootfile=uImage.beagle\0" \
+ 	"console=ttyO2,115200n8\0" \
+ 	"mpurate=auto\0" \
+-- 
+1.7.0.4
+

recipes-bsp/u-boot/u-boot-2012.04.01/0001-omap3_evm-Added-function-calls-to-set-volts-speed-on.patch

@@ -0,0 +1,146 @@
+From eff8924b57d21eadfe749e500617340b1a730c17 Mon Sep 17 00:00:00 2001
+From: Schuyler Patton <spatton@ti.com>
+Date: Thu, 30 Jun 2011 13:39:25 -0500
+Subject: [PATCH 1/3] omap3_evm: Added function calls to set volts, speed on OMAP36xx parts
+
+* evm.c
+
+*  Added setup calls to set voltage and speed
+
+*  Added calls in misc_init_r to twl4030_power_mpu_init and set_mpu_clock
+   functions. These set VDD1 to 1.35v and mpu clock to 1GHz respectively.
+   There is a check performed to make sure that this is only called on
+   omap36xx class parts.
+
+* twl4030.c
+
+* Added twl4030_power_mpu_init function to set VDD1 to 1.35 Volts
+
+* This is done to allow omap36xx parts to run at 1GHz.
+
+* clock.c
+
+* Added set_mpu_clk function to allow u-boot to set the clock
+  rate.
+
+* sys_proto.h
+
+* Added the function prototype set_mpu_clock
+
+* twl4030.h
+
+* Added twl4030_power_mpu_init function prototype
+
+Upstream-Status: Pending
+
+Signed-off-by: Schuyler Patton <spatton@ti.com>
+---
+ arch/arm/cpu/armv7/omap3/clock.c            |   15 +++++++++++++++
+ arch/arm/include/asm/arch-omap3/sys_proto.h |    2 ++
+ board/ti/evm/evm.c                          |    5 +++++
+ drivers/power/twl4030.c                     |   12 ++++++++++++
+ include/twl4030.h                           |    3 +++
+ 5 files changed, 37 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/cpu/armv7/omap3/clock.c b/arch/arm/cpu/armv7/omap3/clock.c
+index 567817e..46a28a3 100644
+--- a/arch/arm/cpu/armv7/omap3/clock.c
++++ b/arch/arm/cpu/armv7/omap3/clock.c
+@@ -35,6 +35,21 @@
+ #include <command.h>
+ 
+ /******************************************************************************
++ * Setting the Clock speed 
++ *
++ *****************************************************************************/
++void set_mpu_clk(int speed)
++{
++	struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
++
++
++	/* Set M */
++	sr32(&prcm_base->clksel1_pll_mpu, 8, 11, speed);
++	/* lock mode */
++	sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOCK);
++}
++
++/******************************************************************************
+  * get_sys_clk_speed() - determine reference oscillator speed
+  *                       based on known 32kHz clock and gptimer.
+  *****************************************************************************/
+diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h
+index 2a89e56..9db13d7 100644
+--- a/arch/arm/include/asm/arch-omap3/sys_proto.h
++++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
+@@ -36,6 +36,8 @@ void prcm_init(void);
+ void per_clocks_enable(void);
+ void ehci_clocks_enable(void);
+ 
++void set_mpu_clk(int speed);
++
+ void memif_init(void);
+ void sdrc_init(void);
+ void do_sdrc_init(u32, u32);
+diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c
+index 8497aee..91eb93d 100644
+--- a/board/ti/evm/evm.c
++++ b/board/ti/evm/evm.c
+@@ -39,6 +39,7 @@
+ #include <asm/mach-types.h>
+ #include <linux/mtd/nand.h>
+ #include "evm.h"
++#include <twl4030.h>
+ 
+ #define OMAP3EVM_GPIO_ETH_RST_GEN1		64
+ #define OMAP3EVM_GPIO_ETH_RST_GEN2		7
+@@ -177,6 +178,10 @@ int misc_init_r(void)
+ #endif
+ 	dieid_num_r();
+ 
++        if (get_cpu_family() == CPU_OMAP36XX) {
++   		twl4030_power_mpu_init();
++	        set_mpu_clk(500);
++	}
+ 	return 0;
+ }
+ 
+diff --git a/drivers/power/twl4030.c b/drivers/power/twl4030.c
+index 36b2144..670b4cb 100644
+--- a/drivers/power/twl4030.c
++++ b/drivers/power/twl4030.c
+@@ -105,6 +105,18 @@ void twl4030_power_init(void)
+ 				TWL4030_PM_RECEIVER_DEV_GRP_P1);
+ }
+ 
++#define VDD1_VSEL_135	0x3C
++
++void twl4030_power_mpu_init(void)
++{
++        unsigned char byte;
++
++        /* 1.4 Volts */
++        byte = VDD1_VSEL_135;
++        twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte,
++                             TWL4030_PM_RECEIVER_VDD1_VSEL);
++}
++
+ void twl4030_power_mmc_init(void)
+ {
+ 	/* Set VMMC1 to 3.15 Volts */
+diff --git a/include/twl4030.h b/include/twl4030.h
+index 9cd32ab..91d36b8 100644
+--- a/include/twl4030.h
++++ b/include/twl4030.h
+@@ -510,6 +510,9 @@ static inline int twl4030_i2c_read_u8(u8 chip_no, u8 *val, u8 reg)
+  * Power
+  */
+ 
++/*For setting VDD1  */
++void twl4030_power_mpu_init(void);
++
+ /* For hardware resetting */
+ void twl4030_power_reset_init(void);
+ /* For setting device group and voltage */
+-- 
+1.7.0.4
+

recipes-bsp/u-boot/u-boot-2012.04.01/0002-am335x-am3517evm-beagleboard-am37x-Add-CONFIG_CMD_AS.patch

@@ -0,0 +1,73 @@
+From 883551659d9b15dfb1ed7ad8ae4b34bfd1fa0fd9 Mon Sep 17 00:00:00 2001
+From: Tom Rini <trini@ti.com>
+Date: Wed, 16 Nov 2011 14:50:49 -0700
+Subject: [PATCH 2/4] am335x/am3517evm/beagleboard/am37x: Add CONFIG_CMD_ASKENV
+
+This is TI Sitara SDK specific (unified user experience, askenv command).
+
+Upstream-Status: Pending
+    * This will be submitted upstream by Tom Rini
+
+Signed-off-by: Tom Rini <trini@ti.com>
+---
+ include/configs/am335x_evm.h   |    2 ++
+ include/configs/am3517_evm.h   |    2 ++
+ include/configs/omap3_beagle.h |    2 ++
+ include/configs/omap3_evm.h    |    2 ++
+ 4 files changed, 8 insertions(+), 0 deletions(-)
+
+diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
+index d0fbc88..5cd7d6d 100644
+--- a/include/configs/am335x_evm.h
++++ b/include/configs/am335x_evm.h
+@@ -26,6 +26,8 @@
+ #include <asm/arch/cpu.h>
+ #include <asm/arch/hardware.h>
+ 
++#define CONFIG_CMD_ASKENV
++
+ #define CONFIG_ENV_SIZE			0x400
+ #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (8 * 1024))
+ #define CONFIG_SYS_PROMPT		"U-Boot# "
+diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
+index b5f75d1..2b3fce7 100644
+--- a/include/configs/am3517_evm.h
++++ b/include/configs/am3517_evm.h
+@@ -137,6 +137,8 @@
+ /* commands to include */
+ #include <config_cmd_default.h>
+ 
++#define CONFIG_CMD_ASKENV
++
+ #define CONFIG_CMD_EXT2		/* EXT2 Support			*/
+ #define CONFIG_CMD_FAT		/* FAT support			*/
+ #define CONFIG_CMD_JFFS2	/* JFFS2 Support		*/
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index ba73aa6..b270598 100644
+--- a/include/configs/omap3_beagle.h
++++ b/include/configs/omap3_beagle.h
+@@ -146,6 +146,8 @@
+ /* commands to include */
+ #include <config_cmd_default.h>
+ 
++#define CONFIG_CMD_ASKENV
++
+ #define CONFIG_CMD_CACHE
+ #define CONFIG_CMD_EXT2		/* EXT2 Support			*/
+ #define CONFIG_CMD_FAT		/* FAT support			*/
+diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
+index 1fcb7af..215d67d 100644
+--- a/include/configs/omap3_evm.h
++++ b/include/configs/omap3_evm.h
+@@ -42,6 +42,8 @@
+  */
+ #include <config_cmd_default.h>
+ 
++#define CONFIG_CMD_ASKENV
++
+ #define CONFIG_CMD_EXT2
+ #define CONFIG_CMD_FAT
+ #define CONFIG_CMD_JFFS2
+-- 
+1.7.0.4
+

recipes-bsp/u-boot/u-boot-2012.04.01/0002-omap3evm-Make-the-board-start-at-800MHz.patch

@@ -0,0 +1,36 @@
+From a0f4f7b85d004db36a24cc05e9c34f137186270b Mon Sep 17 00:00:00 2001
+From: Chase Maupin <Chase.Maupin@ti.com>
+Date: Wed, 23 May 2012 09:25:06 -0500
+Subject: [PATCH 2/3] omap3evm: Make the board start at 800MHz
+
+* It is safe to start the the 3630 silicon at 800MHz for all
+  revisions.  Go ahead and bump the speed to 800MHz during boot
+  instead of using the default 500MHz speed.
+* This patch was based on work by Tom Rini <trini@ti.com> at
+  http://arago-project.org/git/projects/?p=u-boot-am33x.git;a=commit;h=ad130035df754931f2939902e453cc3736412f5f
+
+Upstream-Status: Pending
+    * Will be submitted upstream since it is safe for all silicon
+      revisions to boot at 800MHz according to HW team.
+
+Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
+---
+ board/ti/evm/evm.c |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c
+index 91eb93d..0d0b4a2 100644
+--- a/board/ti/evm/evm.c
++++ b/board/ti/evm/evm.c
+@@ -180,7 +180,7 @@ int misc_init_r(void)
+ 
+         if (get_cpu_family() == CPU_OMAP36XX) {
+    		twl4030_power_mpu_init();
+-	        set_mpu_clk(500);
++	        set_mpu_clk(800);
+ 	}
+ 	return 0;
+ }
+-- 
+1.7.0.4
+

recipes-bsp/u-boot/u-boot-2012.04.01/0003-beagleboard-Load-uImage-from-VFAT-by-default.patch

@@ -0,0 +1,34 @@
+From f2a15cd9e96648e05cb39159ba74cbfbfc8ff999 Mon Sep 17 00:00:00 2001
+From: Tom Rini <trini@ti.com>
+Date: Thu, 17 Nov 2011 08:41:42 -0700
+Subject: [PATCH 3/4] beagleboard: Load uImage from VFAT by default.
+
+This is TI Sitara SDK specific (unified user experience, load uImage
+from vfat).
+
+Upstream-Status: Not Appropriate
+    * This patch is to make the u-boot for beagleboard consistent
+      with other versions used in the AMSDK and doesn't make
+      sense up stream.
+
+Signed-off-by: Tom Rini <trini@ti.com>
+---
+ include/configs/omap3_beagle.h |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index b270598..ea62580 100644
+--- a/include/configs/omap3_beagle.h
++++ b/include/configs/omap3_beagle.h
+@@ -305,7 +305,7 @@
+ 			"echo Running uenvcmd ...;" \
+ 			"run uenvcmd;" \
+ 		"fi;" \
+-		"if run loaduimage; then " \
++		"if run loaduimagefat; then " \
+ 			"run mmcboot;" \
+ 		"fi;" \
+ 	"fi;" \
+-- 
+1.7.0.4
+

recipes-bsp/u-boot/u-boot-2012.04.01/0003-beagleboard-Make-xM-rev-C-go-to-800MHz.patch

@@ -0,0 +1,34 @@
+From 372d110126f37f9f8b7d4bbedd3f02cf80e587de Mon Sep 17 00:00:00 2001
+From: Tom Rini <trini@ti.com>
+Date: Wed, 30 Nov 2011 16:16:21 -0700
+Subject: [PATCH 3/3] beagleboard: Make xM rev C go to 800MHz
+
+* This is the highest frequency supported on xM without BIAS
+  drivers.
+
+Upstream-Status: Pending
+    * Will be submitted upstream since it is safe for all silicon
+      revisions to boot at 800MHz according to HW team.
+
+Signed-off-by: Tom Rini <trini@ti.com>
+---
+ board/ti/beagle/beagle.c |    3 +++
+ 1 files changed, 3 insertions(+), 0 deletions(-)
+
+diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
+index e26b387..69a7b4e 100644
+--- a/board/ti/beagle/beagle.c
++++ b/board/ti/beagle/beagle.c
+@@ -346,6 +346,9 @@ int misc_init_r(void)
+ 					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
+ 					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
+ 					TWL4030_PM_RECEIVER_DEV_GRP_P1);
++		/* 800MHz support */
++		twl4030_power_mpu_init();
++		set_mpu_clk(800);
+ 		break;
+ 	default:
+ 		printf("Beagle unknown 0x%02x\n", get_board_revision());
+-- 
+1.7.0.4
+

recipes-bsp/u-boot/u-boot-2012.04.01/0004-beagleboard-Load-uImage-to-the-default-kernel-linux-.patch

@@ -0,0 +1,57 @@
+From 715afb049d2675106e26c5225e7e321374c32f85 Mon Sep 17 00:00:00 2001
+From: Tom Rini <trini@ti.com>
+Date: Thu, 17 Nov 2011 16:54:01 -0700
+Subject: [PATCH 4/4] beagleboard: Load uImage to the default kernel linux address
+
+This is TI Sitara SDK specific (unified user experience, load uImage
+to an 'XIP' location).
+
+Upstream-Status: Pending
+    * This functionality is being discussed upstream and there
+      is not a concensus yet.
+
+Signed-off-by: Tom Rini <trini@ti.com>
+---
+ include/configs/omap3_beagle.h |   13 +++++++------
+ 1 files changed, 7 insertions(+), 6 deletions(-)
+
+diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
+index ea62580..00b2abe 100644
+--- a/include/configs/omap3_beagle.h
++++ b/include/configs/omap3_beagle.h
+@@ -219,6 +219,7 @@
+ 
+ #define CONFIG_EXTRA_ENV_SETTINGS \
+ 	"loadaddr=0x80200000\0" \
++	"kloadaddr=0x80007fc0\0" \
+ 	"rdaddr=0x81000000\0" \
+ 	"usbtty=cdc_acm\0" \
+ 	"usbethaddr=de:ad:be:ef\0" \
+@@ -272,18 +273,18 @@
+ 		"root=${ramroot} " \
+ 		"rootfstype=${ramrootfstype}\0" \
+ 	"loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
+-	"loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
+-	"loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} /boot/uImage\0" \
++	"loaduimagefat=fatload mmc ${mmcdev} ${kloadaddr} uImage\0" \
++	"loaduimage=ext2load mmc ${mmcdev}:2 ${kloadaddr} /boot/uImage\0" \
+ 	"mmcboot=echo Booting from mmc ...; " \
+ 		"run mmcargs; " \
+-		"bootm ${loadaddr}\0" \
++		"bootm ${kloadaddr}\0" \
+ 	"nandboot=echo Booting from nand ...; " \
+ 		"run nandargs; " \
+-		"nand read ${loadaddr} 280000 400000; " \
+-		"bootm ${loadaddr}\0" \
++		"nand read ${kloadaddr} 280000 400000; " \
++		"bootm ${kloadaddr}\0" \
+ 	"ramboot=echo Booting from ramdisk ...; " \
+ 		"run ramargs; " \
+-		"bootm ${loadaddr}\0" \
++		"bootm ${kloadaddr}\0" \
+ 	"userbutton=if gpio input 173; then run userbutton_xm; " \
+ 		"else run userbutton_nonxm; fi;\0" \
+ 	"userbutton_xm=gpio input 4;\0" \
+-- 
+1.7.0.4
+

recipes-bsp/u-boot/u-boot/2011.09git/0001-am335x_evm-add-option-to-boot-kernel-from-boot-in-ex.patch

@@ -0,0 +1,26 @@
+From 65ba75f46ec4c9749996ec290fa1c5e4e6264ce3 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Tue, 1 Nov 2011 12:21:07 +0100
+Subject: [PATCH 01/10] am335x_evm: add option to boot kernel from /boot in
+ ext2/3 filesystem
+
+Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
+---
+ include/configs/am335x_evm.h |    1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
+index 44a8500..83ccb5a 100755
+--- a/include/configs/am335x_evm.h
++++ b/include/configs/am335x_evm.h
+@@ -75,6 +75,7 @@
+ 	"importbootenv=echo Importing environment from mmc ...; " \
+ 		"env import -t $loadaddr $filesize\0" \
+ 	"mmc_load_uimage=fatload mmc ${mmc_dev} ${kloadaddr} ${bootfile}\0" \
++	"mmc_load_uimage_ext2=ext2load ${mmc_dev} ${kloadaddr} /boot/${bootfile}\0" \
+ 	"optargs=\0" \
+ 	"bootargs_defaults=setenv bootargs " \
+ 		"console=${console} " \
+-- 
+1.7.10
+

recipes-bsp/u-boot/u-boot/2011.09git/0001-am335x_evm-only-do-in-kernel-dhcp-when-using-NFS-use.patch

@@ -1,35 +0,0 @@
-From 557a773eb245f3f2508e40d6d8a6c593738fd46f Mon Sep 17 00:00:00 2001
-From: Koen Kooi <koen@dominion.thruhere.net>
-Date: Tue, 1 Nov 2011 12:19:54 +0100
-Subject: [PATCH 1/4] am335x_evm: only do in-kernel dhcp when using NFS, userspace will do dhcp otherwise
-
-Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
----
- include/configs/am335x_evm.h |    4 ++--
- 1 files changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
-index 41a3316..93b3161 100755
---- a/include/configs/am335x_evm.h
-+++ b/include/configs/am335x_evm.h
-@@ -69,7 +69,7 @@
- 	"nfsopts=nolock\0" \
- 	"static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
- 			"::off\0" \
--	"ip_method=dhcp\0" \
-+	"ip_method=none\0" \
- 	"bootenv=uEnv.txt\0" \
- 	"loadbootenv=fatload mmc ${mmc_dev} ${loadaddr} ${bootenv}\0" \
- 	"importbootenv=echo Importing environment from mmc ...; " \
-@@ -99,7 +99,7 @@
- 		"setenv bootargs ${bootargs} " \
- 		"root=/dev/nfs " \
- 		"nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
--		"ip=${ip_method}\0" \
-+		"ip=dhcp\0" \
- 	"mmc_boot=run mmc_args; " \
- 		"run mmc_load_uimage; " \
- 		"bootm ${loadaddr}\0" \
--- 
-1.7.2.5
-

recipes-bsp/u-boot/u-boot/2011.09git/0001-ddr_defs-change-DDR-timings-for-15x15-EVM.patch

@@ -1,30 +0,0 @@
-From 7a3b3b04b1aed6a649d99396f914ec042968f924 Mon Sep 17 00:00:00 2001
-From: Chase Maupin <Chase.Maupin@ti.com>
-Date: Thu, 9 Feb 2012 13:09:27 -0600
-Subject: [PATCH] ddr_defs: change DDR timings for 15x15 EVM
-
-* For cold silicon the DDR timings need to be relaxed in order for
-  the device to boot with DDR at 266MHz
-* Fix proposed by James Doublesin
-
-Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
----
- arch/arm/include/asm/arch-ti81xx/ddr_defs.h |    2 +-
- 1 files changed, 1 insertions(+), 1 deletions(-)
-
-diff --git a/arch/arm/include/asm/arch-ti81xx/ddr_defs.h b/arch/arm/include/asm/arch-ti81xx/ddr_defs.h
-index 6c4b422..0b7ffe7 100644
---- a/arch/arm/include/asm/arch-ti81xx/ddr_defs.h
-+++ b/arch/arm/include/asm/arch-ti81xx/ddr_defs.h
-@@ -338,7 +338,7 @@
- #define DDR2_RD_DQS		0x40
- #define DDR2_PHY_FIFO_WE	0x56
- #else
--#define EMIF_READ_LATENCY	0x04
-+#define EMIF_READ_LATENCY	0x05
- #define EMIF_TIM1		0x0666B3D6
- #define EMIF_TIM2		0x143731DA
- #define	EMIF_TIM3		0x00000347
--- 
-1.7.0.4
-

recipes-bsp/u-boot/u-boot/2011.09git/0002-am335x_evm-boot-kernel-from-boot-in-ext2-3-filesyste.patch

@@ -1,27 +0,0 @@
-From 206baf5d1d8eb19312c0c8216e6722a63548573d Mon Sep 17 00:00:00 2001
-From: Koen Kooi <koen@dominion.thruhere.net>
-Date: Tue, 1 Nov 2011 12:21:07 +0100
-Subject: [PATCH 2/4] am335x_evm: add option to boot kernel from /boot in ext2/3 filesystem
-
-Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
----
- include/configs/am335x_evm.h |    3 ++-
- 1 files changed, 2 insertions(+), 1 deletions(-)
-
-diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
-index 93b3161..9bbfe3b 100755
---- a/include/configs/am335x_evm.h
-+++ b/include/configs/am335x_evm.h
-@@ -74,7 +74,8 @@
- 	"loadbootenv=fatload mmc ${mmc_dev} ${loadaddr} ${bootenv}\0" \
- 	"importbootenv=echo Importing environment from mmc ...; " \
- 		"env import -t $loadaddr $filesize\0" \
--	"mmc_load_uimage=fatload mmc ${mmc_dev} ${loadaddr} ${bootfile}\0" \
-+	"mmc_load_uimage=fatload mmc ${mmc_dev} ${loadaddr} ${bootfile}\0" \
-+	"mmc_load_uimage_ext2=ext2load ${mmc_dev} ${loadaddr} /boot/${bootfile}\0" \
- 	"optargs=\0" \
- 	"bootargs_defaults=setenv bootargs " \
- 		"console=${console} " \
--- 
-1.7.2.5
-

recipes-bsp/u-boot/u-boot/2011.09git/0002-am335x_evm-set-bootdelay-to-1.patch

@@ -1,26 +1,26 @@
-From bf513a05bc37f6d32e14c1e46d090773d1664c99 Mon Sep 17 00:00:00 2001
+From cb92653d26476880602a20b62da03a35d36d622e Mon Sep 17 00:00:00 2001
 From: Koen Kooi <koen@dominion.thruhere.net>
 Date: Tue, 1 Nov 2011 12:21:38 +0100
-Subject: [PATCH 3/4] am335x_evm: set bootdelay to 1
+Subject: [PATCH 02/10] am335x_evm: set bootdelay to 1
 
 Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
 ---
  include/configs/am335x_evm.h |    2 +-
- 1 files changed, 1 insertions(+), 1 deletions(-)
+ 1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
-index 9bbfe3b..6143dc3 100755
+index 83ccb5a..2558775 100755
 --- a/include/configs/am335x_evm.h
 +++ b/include/configs/am335x_evm.h
-@@ -38,7 +38,7 @@
- #define CONFIG_INITRD_TAG		/* Required for ramdisk support */
+@@ -127,7 +127,7 @@
  
+ #ifndef CONFIG_RESTORE_FLASH
  /* set to negative value for no autoboot */
 -#define CONFIG_BOOTDELAY		3
 +#define CONFIG_BOOTDELAY		1
  
- #define CONFIG_MMC
- #define CONFIG_NAND
+ #define CONFIG_BOOTCOMMAND \
+ 	"if mmc rescan; then " \
 -- 
-1.7.2.5
+1.7.10
 

recipes-bsp/u-boot/u-boot/2011.09git/0003-am335x-evm-make-MMC-rootfs-RO-on-boot-so-fsck-works.patch

@@ -1,15 +1,15 @@
-From 63e5b3b4271917e0a3c5a4903a76fdfb30118d3c Mon Sep 17 00:00:00 2001
+From ca9a3452249bfda3d9a8096794b4fbfbf212d72f Mon Sep 17 00:00:00 2001
 From: Koen Kooi <koen@dominion.thruhere.net>
 Date: Tue, 1 Nov 2011 12:22:30 +0100
-Subject: [PATCH 4/4] am335x-evm: make MMC rootfs RO on boot so fsck works
+Subject: [PATCH 03/10] am335x-evm: make MMC rootfs RO on boot so fsck works
 
 Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
 ---
  include/configs/am335x_evm.h |    2 +-
- 1 files changed, 1 insertions(+), 1 deletions(-)
+ 1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
-index 6143dc3..56e36da 100755
+index 2558775..1b4fa37 100755
 --- a/include/configs/am335x_evm.h
 +++ b/include/configs/am335x_evm.h
 @@ -50,7 +50,7 @@
@@ -18,9 +18,9 @@ index 6143dc3..56e36da 100755
  	"mmc_dev=0\0" \
 -	"mmc_root=/dev/mmcblk0p2 rw\0" \
 +	"mmc_root=/dev/mmcblk0p2 ro\0" \
- 	"nand_root=/dev/mtdblock7 rw\0" \
+ 	"nand_root=ubi0:rootfs rw ubi.mtd=7,2048\0" \
  	"spi_root=/dev/mtdblock4 rw\0" \
  	"nor_root=/dev/mtdblock3 rw\0" \
 -- 
-1.7.2.5
+1.7.10
 

recipes-bsp/u-boot/u-boot/2011.09git/0004-am335x_evm-switch-to-ext4.patch

@@ -1,26 +1,26 @@
-From d2032a2932911159985451d76c547b4e6d99fb61 Mon Sep 17 00:00:00 2001
+From 97fa23e167d3e4b46c71a5fac1a5e9aa39f0a551 Mon Sep 17 00:00:00 2001
 From: Koen Kooi <koen@dominion.thruhere.net>
 Date: Mon, 7 Nov 2011 21:33:32 +0100
-Subject: [PATCH 7/7] am335x_evm: switch to ext4
+Subject: [PATCH 04/10] am335x_evm: switch to ext4
 
 Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
 ---
  include/configs/am335x_evm.h |    2 +-
- 1 files changed, 1 insertions(+), 1 deletions(-)
+ 1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
-index 8c0fae2..8bf3ff1 100755
+index 1b4fa37..3d37058 100755
 --- a/include/configs/am335x_evm.h
 +++ b/include/configs/am335x_evm.h
 @@ -54,7 +54,7 @@
- 	"nand_root=/dev/mtdblock7 rw\0" \
+ 	"nand_root=ubi0:rootfs rw ubi.mtd=7,2048\0" \
  	"spi_root=/dev/mtdblock4 rw\0" \
  	"nor_root=/dev/mtdblock3 rw\0" \
 -	"mmc_root_fs_type=ext3 rootwait\0" \
 +	"mmc_root_fs_type=ext4 rootwait\0" \
- 	"nand_root_fs_type=jffs2\0" \
+ 	"nand_root_fs_type=ubifs rootwait=1\0" \
  	"spi_root_fs_type=jffs2\0" \
  	"nor_root_fs_type=jffs2\0" \
 -- 
-1.7.2.5
+1.7.10
 

recipes-bsp/u-boot/u-boot/2011.09git/0005-am335x-Change-mmc_load_uimage-to-load-at-a-fixed-add.patch

@@ -1,49 +0,0 @@
-From bd152bec1086a35f426c53c9bb9f0c309e216037 Mon Sep 17 00:00:00 2001
-From: Koen Kooi <koen@dominion.thruhere.net>
-Date: Wed, 2 Nov 2011 19:07:10 +0100
-Subject: [PATCH 5/5] am335x: Change mmc_load_uimage to load at a fixed address
- The kernel normally expects to be run from 0x80008000 so if we
- load from SD card at that-mkimage header we can save a copy of
- the kernel.
-
-Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
----
- include/configs/am335x_evm.h |    8 ++++----
- 1 files changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
-index 56e36da..8c0fae2 100755
---- a/include/configs/am335x_evm.h
-+++ b/include/configs/am335x_evm.h
-@@ -74,8 +74,8 @@
- 	"loadbootenv=fatload mmc ${mmc_dev} ${loadaddr} ${bootenv}\0" \
- 	"importbootenv=echo Importing environment from mmc ...; " \
- 		"env import -t $loadaddr $filesize\0" \
--	"mmc_load_uimage=fatload mmc ${mmc_dev} ${loadaddr} ${bootfile}\0" \
--	"mmc_load_uimage_ext2=ext2load ${mmc_dev} ${loadaddr} /boot/${bootfile}\0" \
-+	"mmc_load_uimage=fatload mmc ${mmc_dev} 0x80007fc0 ${bootfile}\0" \
-+	"mmc_load_uimage_ext2=ext2load ${mmc_dev} 0x80007fc0 /boot/${bootfile}\0" \
- 	"optargs=\0" \
- 	"bootargs_defaults=setenv bootargs " \
- 		"console=${console} " \
-@@ -103,7 +103,7 @@
- 		"ip=dhcp\0" \
- 	"mmc_boot=run mmc_args; " \
- 		"run mmc_load_uimage; " \
--		"bootm ${loadaddr}\0" \
-+		"bootm 0x80007fc0\0" \
- 	"nand_boot=echo Booting from nand ...; " \
- 		"run nand_args; " \
- 		"nand read.i ${loadaddr} ${nand_src_addr} ${nand_img_siz}; " \
-@@ -137,7 +137,7 @@
- 		"fi;" \
- 		"if run mmc_load_uimage; then " \
- 			"run mmc_args;" \
--			"bootm ${loadaddr};" \
-+			"bootm 0x80007fc0;" \
- 		"fi;" \
- 	"fi;" \
- 	"run nand_boot;" \
--- 
-1.7.2.5
-

recipes-bsp/u-boot/u-boot/2011.09git/0005-am335x-evm-enable-i2c2-pinmux-for-beaglebone.patch

@@ -1,18 +1,18 @@
-From 2df6e88944b98466e0b1225a873bfed005cea4e4 Mon Sep 17 00:00:00 2001
+From e2121ca4fd82f8313b764fe7fb24511ef7d10904 Mon Sep 17 00:00:00 2001
 From: Koen Kooi <koen@dominion.thruhere.net>
 Date: Wed, 16 Nov 2011 18:57:12 +0100
-Subject: [PATCH] am335x-evm: enable i2c2 pinmux for beaglebone
+Subject: [PATCH 05/10] am335x-evm: enable i2c2 pinmux for beaglebone
 
 Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
 ---
  board/ti/am335x/mux.c |   18 ++++++++++++++++++
- 1 files changed, 18 insertions(+), 0 deletions(-)
+ 1 file changed, 18 insertions(+)
 
 diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
-index d9956f3..313d5a5 100644
+index 885b33f..70645d4 100644
 --- a/board/ti/am335x/mux.c
 +++ b/board/ti/am335x/mux.c
-@@ -309,6 +309,12 @@ static struct module_pin_mux i2c1_pin_mux[] = {
+@@ -310,6 +310,12 @@ static struct module_pin_mux i2c1_pin_mux[] = {
  	{-1},
  };
  
@@ -25,7 +25,7 @@ index d9956f3..313d5a5 100644
  #ifndef CONFIG_NO_ETH
  static struct module_pin_mux rgmii1_pin_mux[] = {
  	{OFFSET(mii1_txen), MODE(2)},			/* RGMII1_TCTL */
-@@ -568,6 +574,7 @@ static struct evm_pin_mux low_cost_evm_pin_mux[] = {
+@@ -598,6 +604,7 @@ static struct evm_pin_mux sk_evm_pin_mux[] = {
  static struct evm_pin_mux beaglebone_pin_mux[] = {
  	{uart0_pin_mux, PROFILE_ALL, DEV_ON_BASEBOARD},
  	{i2c1_pin_mux, PROFILE_ALL & ~PROFILE_2 & ~PROFILE_4, DEV_ON_BASEBOARD},
@@ -33,7 +33,7 @@ index d9956f3..313d5a5 100644
  #ifdef CONFIG_NAND
  	{nand_pin_mux, PROFILE_ALL & ~PROFILE_2 & ~PROFILE_3, DEV_ON_DGHTR_BRD},
  #endif
-@@ -587,6 +594,7 @@ static struct evm_pin_mux beaglebone_pin_mux[] = {
+@@ -617,6 +624,7 @@ static struct evm_pin_mux beaglebone_pin_mux[] = {
  static struct evm_pin_mux beaglebone_old_pin_mux[] = {
  	{uart0_pin_mux, PROFILE_ALL, DEV_ON_BASEBOARD},
  	{i2c1_pin_mux, PROFILE_ALL & ~PROFILE_2 & ~PROFILE_4, DEV_ON_BASEBOARD},
@@ -41,7 +41,7 @@ index d9956f3..313d5a5 100644
  #ifdef CONFIG_NAND
  	{nand_pin_mux, PROFILE_ALL & ~PROFILE_2 & ~PROFILE_3, DEV_ON_DGHTR_BRD},
  #endif
-@@ -682,6 +690,16 @@ void enable_i2c0_pin_mux(void)
+@@ -713,6 +721,16 @@ void enable_i2c0_pin_mux(void)
  	configure_module_pin_mux(i2c0_pin_mux);
  }
  
@@ -59,5 +59,5 @@ index d9956f3..313d5a5 100644
  {
  	configure_module_pin_mux(uart0_pin_mux);
 -- 
-1.7.2.5
+1.7.10
 

recipes-bsp/u-boot/u-boot/2011.09git/0006-am335x-evm-Fix-bone-pmic-shut-down-over-USB-power.patch

@@ -1,82 +0,0 @@
-From 801316091ac7e14cc8fa9b0bd2cdce76bea06991 Mon Sep 17 00:00:00 2001
-From: Joel A Fernandes <joelagnel@ti.com>
-Date: Thu, 3 Nov 2011 22:19:19 -0500
-Subject: [PATCH v2] am335x-evm: Fix bone pmic shut down over USB power
-Cc: trini@ti.com,
-    chase.maupin@ti.com
-
-* Set DCDC2 to 1.2v for all power sources and board revs except for A1
-* Set USB current trip point to 1300mA for all boards and power sources.
-* Only Skip setting of MPU frequency to 720MHz for A1 and USB-powered boards.
-
-Credits to Jason for noticing this. Tested with several reboots over USB on a Rev A2/3.
-
-v2 changes:
-Take care of not upping DCDC2 and LDO voltages for A1.
-For A1- only operation done is to set the USB current limit.
-
-Signed-off-by: Jason Kridner <jdk@ti.com>
-Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
----
-Chase has volunteered to test this out on his A1.
-
- board/ti/am335x/evm.c |   31 ++++++++++++++++---------------
- 1 files changed, 16 insertions(+), 15 deletions(-)
-
-diff --git a/board/ti/am335x/evm.c b/board/ti/am335x/evm.c
-index e95a088..bc1119e 100644
---- a/board/ti/am335x/evm.c
-+++ b/board/ti/am335x/evm.c
-@@ -483,12 +483,20 @@ void spl_board_init(void)
- 		if (tps65217_reg_read(STATUS, &pmic_status_reg))
- 			return;
- 
-+		/* Increase USB current limit to 1300mA */
-+		if (tps65217_reg_write(PROT_LEVEL_NONE, POWER_PATH,
-+				       USB_INPUT_CUR_LIMIT_1300MA,
-+				       USB_INPUT_CUR_LIMIT_MASK))
-+			printf("tps65217_reg_write failure\n");
-+
- 		/* Only perform PMIC configurations if board rev > A1 */
- 		if (!strncmp(header.version, "00A1", 4))
- 			return;
- 
--		if (!(pmic_status_reg & PWR_SRC_AC_BITMASK)) {
--			printf("No AC power, disabling frequency switch\n");
-+		/* Set DCDC2 (MPU) voltage to 1.275V */
-+		if (tps65217_voltage_update(DEFDCDC2,
-+					     DCDC_VOLT_SEL_1275MV)) {
-+			printf("tps65217_voltage_update failure\n");
- 			return;
- 		}
- 
-@@ -501,20 +509,13 @@ void spl_board_init(void)
- 				       LDO_VOLTAGE_OUT_3_3, LDO_MASK))
- 			printf("tps65217_reg_write failure\n");
- 
--		/* Increase USB current limit to 1300mA */
--		if (tps65217_reg_write(PROT_LEVEL_NONE, POWER_PATH,
--				       USB_INPUT_CUR_LIMIT_1300MA,
--				       USB_INPUT_CUR_LIMIT_MASK))
--			printf("tps65217_reg_write failure\n");
--
--		/* Set DCDC2 (MPU) voltage to 1.275V */
--		if (!tps65217_voltage_update(DEFDCDC2,
--					     DCDC_VOLT_SEL_1275MV)) {
--			/* Set MPU Frequency to 720MHz */
--			mpu_pll_config(MPUPLL_M_720);
--		} else {
--			printf("tps65217_voltage_update failure\n");
-+		if (!(pmic_status_reg & PWR_SRC_AC_BITMASK)) {
-+			printf("No AC power, disabling frequency switch\n");
-+			return;
- 		}
-+
-+		/* Set MPU Frequency to 720MHz */
-+		mpu_pll_config(MPUPLL_M_720);
- 	} else {
- 		/* 
- 		 * EVM PMIC code.  PMIC voltage is configuring for frequency
--- 
-1.7.4.1
-

recipes-bsp/u-boot/u-boot/2011.09git/0006-ext2load-increase-read-speed.patch

@@ -1,7 +1,7 @@
-From 486ce56b1203dd71bad310940b321d3ae13cadec Mon Sep 17 00:00:00 2001
-From: u-boot@lakedaemon.net <u-boot@lakedaemon.net>
+From f6894e8bc193d225267e4d58a633354e9937c93d Mon Sep 17 00:00:00 2001
+From: "u-boot@lakedaemon.net" <u-boot@lakedaemon.net>
 Date: Wed, 28 Mar 2012 04:37:11 +0000
-Subject: [PATCH 11/15] ext2load: increase read speed
+Subject: [PATCH 06/10] ext2load: increase read speed
 
 This patch dramatically drops the amount of time u-boot needs to read a
 file from an ext2 partition.  On a typical 2 to 5 MB file (kernels and
@@ -16,7 +16,7 @@ userspace, and then confirmed after ext2load.
 Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
 ---
  fs/ext2/ext2fs.c |   26 ++++++++++++++++++++++++--
- 1 files changed, 24 insertions(+), 2 deletions(-)
+ 1 file changed, 24 insertions(+), 2 deletions(-)
 
 diff --git a/fs/ext2/ext2fs.c b/fs/ext2/ext2fs.c
 index e119e13..8531db5 100644
@@ -70,5 +70,5 @@ index e119e13..8531db5 100644
  	return (len);
  }
 -- 
-1.7.2.5
+1.7.10
 

recipes-bsp/u-boot/u-boot/2011.09git/0007-am335x-evm-fix-ext2load-and-specify-partition-for-bo.patch

@@ -0,0 +1,30 @@
+From 160a0a0145cbe4bca9c0f71286fc8529e57c21c4 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Sun, 1 Apr 2012 22:57:37 +0200
+Subject: [PATCH 07/10] am335x-evm: fix ext2load and specify partition for
+ both fatload and ext2load
+
+Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
+---
+ include/configs/am335x_evm.h |    5 ++---
+ 1 file changed, 2 insertions(+), 3 deletions(-)
+
+diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
+index 3d37058..a81d716 100755
+--- a/include/configs/am335x_evm.h
++++ b/include/configs/am335x_evm.h
+@@ -74,9 +74,8 @@
+ 	"loadbootenv=fatload mmc ${mmc_dev} ${loadaddr} ${bootenv}\0" \
+ 	"importbootenv=echo Importing environment from mmc ...; " \
+ 		"env import -t $loadaddr $filesize\0" \
+-	"mmc_load_uimage=fatload mmc ${mmc_dev} ${kloadaddr} ${bootfile}\0" \
+-	"mmc_load_uimage_ext2=ext2load ${mmc_dev} ${kloadaddr} /boot/${bootfile}\0" \
+-	"optargs=\0" \
++	"mmc_load_uimage=fatload mmc ${mmc_dev}:1 ${kloadaddr} ${bootfile}\0" \
++	"mmc_load_uimage_ext2=ext2load mmc ${mmc_dev}:2 ${kloadaddr} /boot/${bootfile}\0" \
+ 	"bootargs_defaults=setenv bootargs " \
+ 		"console=${console} " \
+ 		"${optargs}\0" \
+-- 
+1.7.10
+

recipes-bsp/u-boot/u-boot/2011.09git/0008-HACK-am335x-evm-turn-d-cache-on-globally-turn-it-off.patch

@@ -1,46 +0,0 @@
-From 31d430d8db335b7c3fea08b6aa8309b90b8f2cb9 Mon Sep 17 00:00:00 2001
-From: Tom Rini <trini@ti.com>
-Date: Tue, 8 Nov 2011 08:07:47 +0100
-Subject: [PATCH 8/8] HACK: am335x evm: turn d-cache on globally, turn it off when doing nfs stuff
-
-Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
----
- board/ti/am335x/evm.c        |   12 ++++++++++++
- include/configs/am335x_evm.h |    1 +
- 2 files changed, 13 insertions(+), 0 deletions(-)
-
-diff --git a/board/ti/am335x/evm.c b/board/ti/am335x/evm.c
-index bc1119e..e64626a 100644
---- a/board/ti/am335x/evm.c
-+++ b/board/ti/am335x/evm.c
-@@ -1041,3 +1041,15 @@ U_BOOT_CMD(
- 
- #endif /* CONFIG_NAND_TI81XX */
- #endif /* CONFIG_SPL_BUILD */
-+
-+/*
-+ * Not all drivers we use (such as ethernet) are dcache safe.  But
-+ * we need cache on to boot quickly enough.
-+ */
-+#ifndef CONFIG_SYS_DCACHE_OFF
-+void enable_caches(void)
-+{
-+	/* Enable D-cache. I-cache is already enabled in start.S */
-+	dcache_enable();
-+}
-+#endif
-diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
-index 8bf3ff1..58fa2f6 100755
---- a/include/configs/am335x_evm.h
-+++ b/include/configs/am335x_evm.h
-@@ -119,6 +119,7 @@
- 		"bootm ${loadaddr}\0" \
- 	"net_boot=echo Booting from network ...; " \
- 		"setenv autoload no; " \
-+		"dcache off; " \
- 		"dhcp; " \
- 		"tftp ${loadaddr} ${bootfile}; " \
- 		"run net_args; " \
--- 
-1.7.2.5
-

recipes-bsp/u-boot/u-boot/2011.09git/0008-am335x-evm-load-uImage-from-boot-instead-of-VFAT.patch

@@ -1,35 +1,35 @@
-From 4c7580268803485ecbc05c3da3e1bbb9f2f431e0 Mon Sep 17 00:00:00 2001
+From b01ee680bab7b40f6dc9b8087630e5c0251c6fcd Mon Sep 17 00:00:00 2001
 From: Koen Kooi <koen@dominion.thruhere.net>
 Date: Sun, 1 Apr 2012 23:10:22 +0200
-Subject: [PATCH 13/15] am335x-evm: load uImage from /boot instead of VFAT
+Subject: [PATCH 08/10] am335x-evm: load uImage from /boot instead of VFAT
 
 Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
 ---
  include/configs/am335x_evm.h |    4 ++--
- 1 files changed, 2 insertions(+), 2 deletions(-)
+ 1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
-index 9a4b407..b2628c5 100755
+index a81d716..e42febe 100755
 --- a/include/configs/am335x_evm.h
 +++ b/include/configs/am335x_evm.h
-@@ -102,7 +102,7 @@
+@@ -101,7 +101,7 @@
  		"nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
  		"ip=dhcp\0" \
  	"mmc_boot=run mmc_args; " \
 -		"run mmc_load_uimage; " \
 +		"run mmc_load_uimage_ext2; " \
- 		"bootm 0x80007fc0\0" \
+ 		"bootm ${kloadaddr}\0" \
  	"nand_boot=echo Booting from nand ...; " \
  		"run nand_args; " \
-@@ -136,7 +136,7 @@
+@@ -139,7 +139,7 @@
  			"echo Running uenvcmd ...;" \
  			"run uenvcmd;" \
  		"fi;" \
 -		"if run mmc_load_uimage; then " \
 +		"if run mmc_load_uimage_ext2; then " \
  			"run mmc_args;" \
- 			"bootm 0x80007fc0;" \
+ 			"bootm ${kloadaddr};" \
  		"fi;" \
 -- 
-1.7.2.5
+1.7.10
 

recipes-bsp/u-boot/u-boot/2011.09git/0009-ext4fs-ls-load-support.patch

@@ -1,7 +1,7 @@
-From 881674a3a8258bfc0f3a130503e2663c2f22817d Mon Sep 17 00:00:00 2001
-From: uma.shankar <uma.shankar@samsung.com>
+From 4e2f3f39a37883bddbe92a71045cb90f489e1d5f Mon Sep 17 00:00:00 2001
+From: "uma.shankar" <uma.shankar@samsung.com>
 Date: Mon, 9 Jan 2012 07:54:50 +0000
-Subject: [PATCH 14/15] ext4fs ls load support
+Subject: [PATCH 09/10] ext4fs ls load support
 
 Signed-off-by: Uma Shankar <uma.shankar@samsung.com>
 Signed-off-by: Manjunatha C Achar <a.manjunatha@samsung.com>
@@ -13,7 +13,7 @@ Signed-off-by: Hakgoo Lee <goodguy.lee@samsung.com>
  common/cmd_ext4.c     |  266 +++++++++++++++
  fs/Makefile           |    1 +
  fs/ext2/dev.c         |    1 +
- fs/ext2/ext2fs.c      |  181 ++---------
+ fs/ext2/ext2fs.c      |  181 ++--------
  fs/ext4/Makefile      |   51 +++
  fs/ext4/dev.c         |  145 ++++++++
  fs/ext4/ext4_common.c |  875 +++++++++++++++++++++++++++++++++++++++++++++++++
@@ -45,7 +45,7 @@ index 99b9278..6a5068d 100644
  LIBS += net/libnet.o
  LIBS += disk/libdisk.o
 diff --git a/common/Makefile b/common/Makefile
-index 54dc558..a1ccfd8 100644
+index 838ae25..b9b5c85 100644
 --- a/common/Makefile
 +++ b/common/Makefile
 @@ -87,6 +87,7 @@ COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += cmd_eeprom.o
@@ -2358,5 +2358,5 @@ index 0000000..5d48021
 +};
 +#endif
 -- 
-1.7.2.5
+1.7.10
 

recipes-bsp/u-boot/u-boot/2011.09git/0010-am335x-switch-to-ext4-mode.patch

@@ -1,44 +1,45 @@
-From 89f08384d5048059ac0a8ab72b6a7a194513dc64 Mon Sep 17 00:00:00 2001
+From 9e1a99476875b1f1e6e34e70d9bf6e77d3ac8fba Mon Sep 17 00:00:00 2001
 From: Koen Kooi <koen@dominion.thruhere.net>
 Date: Wed, 4 Apr 2012 00:06:31 +0200
-Subject: [PATCH 15/15] am335x: switch to ext4 mode
+Subject: [PATCH 10/10] am335x: switch to ext4 mode
 
 Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
 ---
- include/configs/am335x_evm.h |    6 ++++--
- 1 files changed, 4 insertions(+), 2 deletions(-)
+ include/configs/am335x_evm.h |    7 ++++---
+ 1 file changed, 4 insertions(+), 3 deletions(-)
 
 diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
-index b2628c5..18d2cac 100755
+index e42febe..e2be380 100755
 --- a/include/configs/am335x_evm.h
 +++ b/include/configs/am335x_evm.h
-@@ -76,6 +76,7 @@
+@@ -75,7 +75,7 @@
+ 	"importbootenv=echo Importing environment from mmc ...; " \
  		"env import -t $loadaddr $filesize\0" \
- 	"mmc_load_uimage=fatload mmc ${mmc_dev}:1 0x80007fc0 ${bootfile}\0" \
- 	"mmc_load_uimage_ext2=ext2load mmc ${mmc_dev}:2 0x80007fc0 /boot/${bootfile}\0" \
-+	"mmc_load_uimage_ext4=ext4load mmc ${mmc_dev}:2 0x80007fc0 /boot/${bootfile}\0" \
- 	"optargs=\0" \
+ 	"mmc_load_uimage=fatload mmc ${mmc_dev}:1 ${kloadaddr} ${bootfile}\0" \
+-	"mmc_load_uimage_ext2=ext2load mmc ${mmc_dev}:2 ${kloadaddr} /boot/${bootfile}\0" \
++	"mmc_load_uimage_ext4=ext4load mmc ${mmc_dev}:2 ${kloadaddr} /boot/${bootfile}\0" \
  	"bootargs_defaults=setenv bootargs " \
  		"console=${console} " \
-@@ -102,7 +103,7 @@
+ 		"${optargs}\0" \
+@@ -101,7 +101,7 @@
  		"nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
  		"ip=dhcp\0" \
  	"mmc_boot=run mmc_args; " \
 -		"run mmc_load_uimage_ext2; " \
 +		"run mmc_load_uimage_ext4; " \
- 		"bootm 0x80007fc0\0" \
+ 		"bootm ${kloadaddr}\0" \
  	"nand_boot=echo Booting from nand ...; " \
  		"run nand_args; " \
-@@ -136,7 +137,7 @@
+@@ -139,7 +139,7 @@
  			"echo Running uenvcmd ...;" \
  			"run uenvcmd;" \
  		"fi;" \
 -		"if run mmc_load_uimage_ext2; then " \
 +		"if run mmc_load_uimage_ext4; then " \
  			"run mmc_args;" \
- 			"bootm 0x80007fc0;" \
+ 			"bootm ${kloadaddr};" \
  		"fi;" \
-@@ -404,6 +405,7 @@
+@@ -426,6 +426,7 @@
  #define CONFIG_DOS_PARTITION
  #define CONFIG_CMD_FAT
  #define CONFIG_CMD_EXT2
@@ -47,5 +48,5 @@ index b2628c5..18d2cac 100755
  
  /* Unsupported features */
 -- 
-1.7.2.5
+1.7.10
 

recipes-bsp/u-boot/u-boot/2011.09git/0012-am335x-evm-fix-ext2load-and-specify-partition-for-bo.patch

@@ -1,28 +0,0 @@
-From 6233c6274e86dad6bac240cf8703e0a0b3e14e27 Mon Sep 17 00:00:00 2001
-From: Koen Kooi <koen@dominion.thruhere.net>
-Date: Sun, 1 Apr 2012 22:57:37 +0200
-Subject: [PATCH 12/15] am335x-evm: fix ext2load and specify partition for both fatload and ext2load
-
-Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
----
- include/configs/am335x_evm.h |    4 ++--
- 1 files changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
-index 5a7e9a8..9a4b407 100755
---- a/include/configs/am335x_evm.h
-+++ b/include/configs/am335x_evm.h
-@@ -74,8 +74,8 @@
- 	"loadbootenv=fatload mmc ${mmc_dev} ${loadaddr} ${bootenv}\0" \
- 	"importbootenv=echo Importing environment from mmc ...; " \
- 		"env import -t $loadaddr $filesize\0" \
--	"mmc_load_uimage=fatload mmc ${mmc_dev} 0x80007fc0 ${bootfile}\0" \
--	"mmc_load_uimage_ext2=ext2load ${mmc_dev} 0x80007fc0 /boot/${bootfile}\0" \
-+	"mmc_load_uimage=fatload mmc ${mmc_dev}:1 0x80007fc0 ${bootfile}\0" \
-+	"mmc_load_uimage_ext2=ext2load mmc ${mmc_dev}:2 0x80007fc0 /boot/${bootfile}\0" \
- 	"optargs=\0" \
- 	"bootargs_defaults=setenv bootargs " \
- 		"console=${console} " \
--- 
-1.7.2.5
-

recipes-bsp/u-boot/u-boot_2010.12-psp03.21.00.04.sdk.bb

@@ -0,0 +1,29 @@
+# Use the version of u-boot.inc in oe-core not the meta-ti version
+require ${COREBASE}/meta/recipes-bsp/u-boot/u-boot.inc
+
+DESCRIPTION = "u-boot bootloader for DaVinci devices"
+
+LICENSE = "GPLv2+"
+LIC_FILES_CHKSUM = "file://COPYING;md5=4c6cde5df68eff615d36789dc18edd3b"
+
+COMPATIBLE_MACHINE = "am180x-evm"
+
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+
+PR = "r0"
+
+SRC_URI = "git://arago-project.org/git/projects/u-boot-davinci.git;protocol=git;branch=${BRANCH}"
+
+# For the am180x we want to enable all the memory on the EVM, but for other
+# devices that use the DSP we do not want this change because that memory
+# is used for the DSP
+SRC_URI_append_am180x-evm = " file://0001-da850evm-change-default-memory-to-not-limit-at-32MB.patch"
+
+BRANCH = "03.21.00.03"
+
+# Use literal tags in SRCREV, when available, instead of commit IDs
+SRCREV = "v2010.12_DAVINCIPSP_03.21.00.04"
+
+S = "${WORKDIR}/git"
+
+UBOOT_SUFFIX = "bin"

recipes-bsp/u-boot/u-boot_2011.09-psp04.06.00.08.bb

@@ -0,0 +1,29 @@
+# Use the version of u-boot.inc in oe-core not the meta-ti version
+require ${COREBASE}/meta/recipes-bsp/u-boot/u-boot.inc
+
+DESCRIPTION = "u-boot bootloader for ARM MPU devices"
+LICENSE = "GPLv2+"
+LIC_FILES_CHKSUM = "file://COPYING;md5=1707d6db1d42237583f50183a5651ecb"
+
+COMPATIBLE_MACHINE = "ti33x|omap3"
+
+DEFAULT_PREFERENCE = "-1"
+
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+
+PR = "r0+gitr${SRCPV}"
+
+SRC_URI = "git://arago-project.org/git/projects/u-boot-am33x.git;protocol=git;branch=${BRANCH}"
+
+BRANCH = "AM335XPSP_04.06.00.08"
+
+# Lock to the commit corresponding to TAG:
+# v2011.09_AM335xPSP_04.06.00.08
+SRCREV = "1e4626f0d5f3bb04ec974e76a5d9029875269d31"
+
+S = "${WORKDIR}/git"
+
+UBOOT_SUFFIX = "img"
+
+# Set the name of the SPL that will built so that it is also packaged with u-boot.
+SPL_BINARY = "MLO"

recipes-bsp/u-boot/u-boot_2011.10rc.bb

@@ -6,32 +6,28 @@ COMPATIBLE_MACHINE = "(ti33x)"
 DEFAULT_PREFERENCE_ti33x = "99"
 
 PV = "2011.09+git"
-PR = "r27"
+PR = "r30"
 
 # SPL build
 UBOOT_BINARY = "u-boot.img"
 UBOOT_IMAGE = "u-boot-${MACHINE}-${PV}-${PR}.img"
 UBOOT_SYMLINK = "u-boot-${MACHINE}.img"
 
-SRC_URI = "git://arago-project.org/git/projects/u-boot-am33x.git;protocol=git;branch=int_am335xpsp_04.06.00.01-v2011.09-for-sdk-05.03.00.00 \
-           file://2011.09git/0001-am335x_evm-only-do-in-kernel-dhcp-when-using-NFS-use.patch \
-           file://2011.09git/0002-am335x_evm-boot-kernel-from-boot-in-ext2-3-filesyste.patch \
-           file://2011.09git/0003-am335x_evm-set-bootdelay-to-1.patch \
-           file://2011.09git/0004-am335x-evm-make-MMC-rootfs-RO-on-boot-so-fsck-works.patch \
-           file://2011.09git/0005-am335x-Change-mmc_load_uimage-to-load-at-a-fixed-add.patch \
-           file://2011.09git/0006-am335x-evm-Fix-bone-pmic-shut-down-over-USB-power.patch \
-           file://2011.09git/0007-am335x_evm-switch-to-ext4.patch \
-           file://2011.09git/0008-HACK-am335x-evm-turn-d-cache-on-globally-turn-it-off.patch \
-           file://2011.09git/0009-am335x-evm-enable-i2c2-pinmux-for-beaglebone.patch \
-           file://2011.09git/0001-ddr_defs-change-DDR-timings-for-15x15-EVM.patch \
-           file://2011.09git/0011-ext2load-increase-read-speed.patch \
-           file://2011.09git/0012-am335x-evm-fix-ext2load-and-specify-partition-for-bo.patch \
-           file://2011.09git/0013-am335x-evm-load-uImage-from-boot-instead-of-VFAT.patch \
-           file://2011.09git/0014-ext4fs-ls-load-support.patch \
-           file://2011.09git/0015-am335x-switch-to-ext4-mode.patch \
+SRC_URI = "git://arago-project.org/git/projects/u-boot-am33x.git;protocol=git;branch=master \
+           file://2011.09git/0001-am335x_evm-add-option-to-boot-kernel-from-boot-in-ex.patch \
+           file://2011.09git/0002-am335x_evm-set-bootdelay-to-1.patch \
+           file://2011.09git/0003-am335x-evm-make-MMC-rootfs-RO-on-boot-so-fsck-works.patch \
+           file://2011.09git/0004-am335x_evm-switch-to-ext4.patch \
+           file://2011.09git/0005-am335x-evm-enable-i2c2-pinmux-for-beaglebone.patch \
+           file://2011.09git/0006-ext2load-increase-read-speed.patch \
+           file://2011.09git/0007-am335x-evm-fix-ext2load-and-specify-partition-for-bo.patch \
+           file://2011.09git/0008-am335x-evm-load-uImage-from-boot-instead-of-VFAT.patch \
+           file://2011.09git/0009-ext4fs-ls-load-support.patch \
+           file://2011.09git/0010-am335x-switch-to-ext4-mode.patch \
+           file://0001-config-Always-use-GNU-ld.patch \
           "
 
-SRCREV = "f63b270e47f62f4d1a05b2001357e215966c6f5a"
+SRCREV = "dc52533ccff00a12761f793d66b39e4f6a4a3bba"
 
 LIC_FILES_CHKSUM = "file://COPYING;md5=1707d6db1d42237583f50183a5651ecb"
 

recipes-bsp/u-boot/u-boot_2012.04.01.bb

@@ -0,0 +1,50 @@
+# Use the version of u-boot.inc in oe-core not the meta-ti version
+require ${COREBASE}/meta/recipes-bsp/u-boot/u-boot.inc
+
+DESCRIPTION = "u-boot bootloader for ARM MPU devices"
+
+LICENSE = "GPLv2+"
+LIC_FILES_CHKSUM = "file://COPYING;md5=1707d6db1d42237583f50183a5651ecb"
+
+DEFAULT_PREFERENCE = "-1"
+
+COMPATIBLE_MACHINE = "am37x-evm|beagleboard"
+
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+
+BRANCH ?= "master"
+
+SRCREV = "v2012.04.01"
+
+S = "${WORKDIR}/git"
+
+SRC_URI = "git://git.denx.de/u-boot.git;protocol=git;branch=${BRANCH}"
+
+# Add patches for the AMSDK
+#  - 0001-omap3-beagle-add-usbethaddr....Not for Upstream
+#  - 0001-OMAP3-Beagle-Set-BOOTDELAY....Pending Upstream
+#  - 0002-am335x-am3517evm-beagleboard....Pending Upstream
+#  - 0003-beagleboard-Load-uImage-from....Not for Upstream
+#  - 0004-beagleboard-Load-uImage-to....Pending Upstream
+#  - 0001-omap3_evm-Added-function....Pending Upstream
+#  - 0002-omap3evm-Make-the-board....Pending Upstream
+#  - 0003-beagleboard-Make-xM-rev....Pending Upstream
+#  - 0001-ARM-omap3-Set-SPL-stack-size-to-8KB-image-to-54KB.patch....Upstreamed
+
+# Add a patch to set a default usbethaddr address to enable the out of box
+# experience.
+SRC_URI += "file://0001-omap3_beagle-add-usbethaddr-setting-to-enable-networ.patch \
+            file://0001-OMAP3-Beagle-Set-BOOTDELAY-to-3.patch \
+            file://0002-am335x-am3517evm-beagleboard-am37x-Add-CONFIG_CMD_AS.patch \
+            file://0003-beagleboard-Load-uImage-from-VFAT-by-default.patch \
+            file://0004-beagleboard-Load-uImage-to-the-default-kernel-linux-.patch \
+            file://0001-omap3_evm-Added-function-calls-to-set-volts-speed-on.patch \
+            file://0002-omap3evm-Make-the-board-start-at-800MHz.patch \
+            file://0003-beagleboard-Make-xM-rev-C-go-to-800MHz.patch \
+            file://0001-ARM-omap3-Set-SPL-stack-size-to-8KB-image-to-54KB.patch \
+            "
+
+UBOOT_SUFFIX = "img"
+
+# Set the name of the SPL that will built so that it is also packaged with u-boot.
+SPL_BINARY = "MLO"

recipes-bsp/u-boot/u-boot_2013.01.bb

@@ -0,0 +1,23 @@
+require ${COREBASE}/meta/recipes-bsp/u-boot/u-boot.inc
+
+DESCRIPTION = "u-boot bootloader for Multi-Core BU devices"
+LICENSE = "GPLv2+"
+LIC_FILES_CHKSUM = "file://COPYING;md5=1707d6db1d42237583f50183a5651ecb"
+
+COMPATIBLE_MACHINE = "keystone"
+
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+
+PR = "r2+gitr${SRCPV}"
+
+SRC_URI = "git://arago-project.org/git/projects/u-boot-keystone.git;protocol=git;branch=${BRANCH}"
+
+BRANCH = "master"
+
+SRCREV = "DEV.MCSDK-03.00.00.07"
+
+EXTRA_OEMAKE = 'CROSS_COMPILE=${TARGET_PREFIX} CC="${TARGET_PREFIX}gcc ${TOOLCHAIN_OPTIONS}"'
+
+S = "${WORKDIR}/git"
+
+UBOOT_SUFFIX = "bin"

recipes-core/netbase/netbase_4.47.bbappend

@@ -1,3 +1 @@
-THISDIR := "${@os.path.dirname(bb.data.getVar('FILE', d, True))}"
-FILESPATH =. "${@base_set_filespath(["${THISDIR}/${PN}"], d)}:"
-
+FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}-${PV}:"

recipes-graphics/libgles/libgles-omap3.inc

@@ -3,15 +3,19 @@ LICENSE = "proprietary-binary"
 # 'TSPA.txt' might not be the best file to md5sum
 LIC_FILES_CHKSUM = "file://TSPA.txt;md5=c0d5d9c1e38b41677144c4e24d6ddee1"
 
-PR = "r31"
+PR = "r35"
 
 COMPATIBLE_MACHINE = "(omap3|ti814x|ti816x|ti33x)"
 
-DEPENDS = "virtual/libx11 libxau libxdmcp libdrm"
+X11DEPENDS = "virtual/libx11 libxau libxdmcp libdrm"
+DEPENDS = "${@base_contains('DISTRO_FEATURES', 'x11', '${X11DEPENDS}', '', d)}"
+
+export SUPPORT_XORG ?= "${@base_contains('DISTRO_FEATURES', 'x11', '1', '0', d)}"
+PVR_INIT ?= "pvrsrvinit"
 
 PROVIDES += "virtual/egl"
 
-SRC_URI = "http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/gfxsdk/${SGXPV}/exports/OMAP35x_Graphics_SDK_setuplinux_${SGXPV}.bin \
+SRC_URI = "http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/gfxsdk/${SGXPV}/exports/${BINFILE} \
 		   file://cputype \
 		   file://rc.pvr \
 		   file://sample.desktop \
@@ -31,11 +35,13 @@ export ES5LOCATION ?= "${S}/gfx_rel_es5.x"
 export ES6LOCATION ?= "${S}/gfx_rel_es6.x"
 export ES8LOCATION ?= "${S}/gfx_rel_es8.x"
 
+LIBGLESWINDOWSYSTEM ?= "libpvrPVR2D_FRONTWSEGL.so.1"
+
 do_configure() {
 	# Attempt to fix up the worst offenders for file permissions
 	for i in $(find ${S} -name "*.h") $(find ${S} -name "*.c") $(find ${S} -name "Make*") ; do
 		chmod 0644 $i
-	done 
+	done
 
 	# Attempt to create proper library softlinks
 	for sofile in $(find ${S} -name "lib*Open*.so") $(find ${S} -name "lib*srv*.so") $(find ${S} -name "lib*gl*.so") $(find ${S} -name "libpvr*.so") $(find ${S} -name "lib*GL*.so"); do
@@ -61,62 +67,87 @@ TARGET_CC_ARCH += " ${TARGET_LINK_HASH_STYLE} -Wl,-rpath-link,${BINLOCATION} -L$
 -L${STAGING_DIR_TARGET}${libdir} -Wl,-rpath-link,${STAGING_DIR_TARGET}${libdir}"
 PARALLEL_MAKE = ""
 
-do_compile() {
-	export X11ROOT="${STAGING_DIR_HOST}/usr"
-	export TOOLCHAIN="${TOOLCHAIN_PATH}"
-	export PLATFORM="LinuxOMAP3"
+PLATFORM ?= "LinuxOMAP3"
 
+do_compile() {
+	export TOOLCHAIN="${TOOLCHAIN_PATH}"
 	export PLAT_CC="${CC}"
 	export PLAT_CPP="${CXX}"
 	export PLAR_AR="${AR}"
 
-	mkdir -p ${S}/demos/raw
-	mkdir -p ${S}/demos/x11
+	if [ ${SUPPORT_XORG} -eq 1 ] ; then
+		export X11ROOT="${STAGING_DIR_HOST}/usr"
+		mkdir -p ${S}/demos/x11
+		mkdir -p ${S}/trainingcourses/x11
+	fi
 
-	# Rebuild demos for both Raw and X11
+	mkdir -p ${S}/demos/raw
+	mkdir -p ${S}/trainingcourses/raw
+
+	# Rebuild demos
 	for X11BUILD in 0 1 ; do
+		# Don't rebuild demos with X11 support for a non X11 distro
+		if [ ${SUPPORT_XORG} -eq 0 -a $X11BUILD -eq 1 ] ; then
+			continue
+		fi
+
 		for demo in ${S}/GFX_Linux_SDK/OGLES/SDKPackage/Demos/* ; do
 			cd $demo/OGLES/Build/LinuxGeneric
-			oe_runmake Common=1 PLATFORM=$PLATFORM X11BUILD=$X11BUILD  
-			rm $demo/OGLES/Build/LinuxOMAP3/Release*/*.o
-			install -m 0755 $demo/OGLES/Build/LinuxOMAP3/ReleaseX11/* ${S}/demos/x11 || true
-			sed -e s:NAME:$(basename $demo): \
-			    -e s:EXEC:${bindir}/SGX/demos/X11/$(basename $demo/OGLES/Build/LinuxOMAP3/ReleaseX11/*): \
-			     ${WORKDIR}/sample.desktop > ${WORKDIR}/$(basename $demo).desktop
-			install -m 0755 $demo/OGLES/Build/LinuxOMAP3/ReleaseRaw/* ${S}/demos/raw || true	
+			oe_runmake Common=1 PLATFORM=${PLATFORM} X11BUILD=$X11BUILD
+			rm $demo/OGLES/Build/${PLATFORM}/Release*/*.o
+
+			if [ $X11BUILD -eq 1 ] ; then
+				install -m 0755 $demo/OGLES/Build/${PLATFORM}/ReleaseX11/* ${S}/demos/x11 || true
+				sed -e s:NAME:$(basename $demo): \
+				    -e s:EXEC:${bindir}/SGX/demos/X11/$(basename $demo/OGLES/Build/${PLATFORM}/ReleaseX11/*): \
+				    ${WORKDIR}/sample.desktop > ${WORKDIR}/$(basename $demo).desktop
+			else
+				install -m 0755 $demo/OGLES/Build/${PLATFORM}/ReleaseRaw/* ${S}/demos/raw || true
+			fi
 		done
+
 		for demo in ${S}/GFX_Linux_SDK/OGLES2/SDKPackage/Demos/* ; do
 			cd $demo/OGLES2/Build/LinuxGeneric
-			oe_runmake Common=1 PLATFORM=$PLATFORM X11BUILD=$X11BUILD  
-			rm -f $demo/OGLES2/Build/LinuxOMAP3/Release*/*.o
-			install -m 0755 $demo/OGLES2/Build/LinuxOMAP3/ReleaseX11/* ${S}/demos/x11 || true
-			sed -e s:NAME:$(basename $demo): \
-			    -e s:EXEC:${bindir}/SGX/demos/X11/$(basename $demo/OGLES2/Build/LinuxOMAP3/ReleaseX11/*): \
-			     ${WORKDIR}/sample.desktop > ${WORKDIR}/$(basename $demo).desktop
-			install -m 0755 $demo/OGLES2/Build/LinuxOMAP3/ReleaseRaw/* ${S}/demos/raw || true	
+			oe_runmake Common=1 PLATFORM=${PLATFORM} X11BUILD=$X11BUILD
+			rm -f $demo/OGLES2/Build/${PLATFORM}/Release*/*.o
+
+			if [ $X11BUILD -eq 1 ] ; then
+				install -m 0755 $demo/OGLES2/Build/${PLATFORM}/ReleaseX11/* ${S}/demos/x11 || true
+				sed -e s:NAME:$(basename $demo): \
+				    -e s:EXEC:${bindir}/SGX/demos/X11/$(basename $demo/OGLES2/Build/${PLATFORM}/ReleaseX11/*): \
+				    ${WORKDIR}/sample.desktop > ${WORKDIR}/$(basename $demo).desktop
+			else
+				install -m 0755 $demo/OGLES2/Build/${PLATFORM}/ReleaseRaw/* ${S}/demos/raw || true
+			fi
 		done
 	done
 
-	mkdir -p ${S}/trainingcourses/raw
-	mkdir -p ${S}/trainingcourses/x11
-
 	find ${S} -name "*_org" -delete
 
-	# Build OGLES2 Trainingcourses for both Raw and X11
+	# Build OGLES2 Trainingcourses
 	for X11BUILD in 0 1 ; do
+		# Don't rebuild training courses with X11 support for a non X11 distro
+		if [ ${SUPPORT_XORG} -eq 0 -a $X11BUILD -eq 1 ] ; then
+			continue
+		fi
+
 		for training in ${S}/GFX_Linux_SDK/OGLES2/SDKPackage/TrainingCourse/* ; do
 			if [ -e $training/OGLES2/Build/LinuxGeneric/Makefile ] ; then
 				cd $training/OGLES2/Build/LinuxGeneric
 			fi
 
-			if [ -e $training/OGLES2/Build/LinuxOMAP3/Makefile ] ; then
-				cd $training/OGLES2/Build/LinuxOMAP3
-			fi			
+			if [ -e $training/OGLES2/Build/${PLATFORM}/Makefile ] ; then
+				cd $training/OGLES2/Build/${PLATFORM}
+			fi
 
-			oe_runmake Common=1 PLATFORM=$PLATFORM X11BUILD=$X11BUILD  
-			rm -f $training/OGLES2/Build/LinuxOMAP3/Release*/*.o
-			install -m 0755 $training/OGLES2/Build/LinuxOMAP3/ReleaseX11/* ${S}/trainingcourses/x11 || true
-			install -m 0755 $training/OGLES2/Build/LinuxOMAP3/ReleaseRaw/* ${S}/trainingcourses/raw || true	
+			oe_runmake Common=1 PLATFORM=${PLATFORM} X11BUILD=$X11BUILD
+			rm -f $training/OGLES2/Build/${PLATFORM}/Release*/*.o
+
+			if [ $X11BUILD -eq 1 ] ; then
+				install -m 0755 $training/OGLES2/Build/${PLATFORM}/ReleaseX11/* ${S}/trainingcourses/x11 || true
+			else
+				install -m 0755 $training/OGLES2/Build/${PLATFORM}/ReleaseRaw/* ${S}/trainingcourses/raw || true
+			fi
 		done
 	done
 
@@ -132,12 +163,13 @@ do_install () {
 
 	install -m 0755 ${BINLOCATION}/*_test ${D}${bindir}/
 	install -m 0755 ${BINLOCATION}/gl* ${D}${bindir}/
-	install -m 0755 ${BINLOCATION}/pvrsrvinit ${D}${bindir}/
+	install -m 0755 ${BINLOCATION}/${PVR_INIT} ${D}${bindir}/
 
-	install -m 0755 ${BINLOCATION}/xgles1test1 ${D}${bindir}/
-
-	install -m 0755 ${BINLOCATION}/freedesktop/kdrive/usr/X11R6_SGX/bin/Xsgx ${D}${bindir}/|| true
-	cp -pPR ${S}/GFX_Linux_SDK/OGLES2/SDKPackage/Builds/OGLES2/LinuxOMAP3/lib/*X11WS* ${D}${libdir} || true
+	if [ ${SUPPORT_XORG} -eq 1 ] ; then
+		install -m 0755 ${BINLOCATION}/xgles1test1 ${D}${bindir}/
+		install -m 0755 ${BINLOCATION}/freedesktop/kdrive/usr/X11R6_SGX/bin/Xsgx ${D}${bindir}/|| true
+		cp -pPR ${S}/GFX_Linux_SDK/OGLES2/SDKPackage/Builds/OGLES2/${PLATFORM}/lib/*X11WS* ${D}${libdir} || true
+	fi
 
 	install -d ${D}${includedir}
 	cp -pPR ${S}/GFX_Linux_KM/include4 ${D}${includedir}/
@@ -145,8 +177,8 @@ do_install () {
 
 	cp -pPR ${S}/GFX_Linux_SDK/OGLES2/SDKPackage/Builds/OGLES2/Include/* ${D}${includedir}/
 	cp -pPR ${S}/GFX_Linux_SDK/OGLES/SDKPackage/Builds/OGLES/Include/* ${D}${includedir}/
-	cp -pPR ${S}/GFX_Linux_SDK/OGLES/SDKPackage/Builds/OGLES/LinuxOMAP3/Include/GLES/* ${D}${includedir}/GLES/ || true
-	cp -pPr ${S}/GFX_Linux_SDK/OGLES2/SDKPackage/Builds/OGLES2/LinuxOMAP3/Include/GLES/* ${D}${includedir}/GLES2/ || true
+	cp -pPR ${S}/GFX_Linux_SDK/OGLES/SDKPackage/Builds/OGLES/${PLATFORM}/Include/GLES/* ${D}${includedir}/GLES/ || true
+	cp -pPr ${S}/GFX_Linux_SDK/OGLES2/SDKPackage/Builds/OGLES2/${PLATFORM}/Include/GLES/* ${D}${includedir}/GLES2/ || true
 	cp -pPr ${S}/GFX_Linux_SDK/OVG/SDKPackage/Builds/OVG/Include/v* ${D}${includedir}/ || true
 	cp -pPr ${S}/GFX_Linux_SDK/OVG/SDKPackage/Builds/OVG/Include/V* ${D}${includedir}/ || true
 	cp -pPr ${S}/include/*.h ${D}${includedir} || true
@@ -157,7 +189,7 @@ do_install () {
 
 	install -d ${D}${sysconfdir}
 	echo "[default]" > ${D}${sysconfdir}/powervr.ini
-	echo "WindowSystem=libpvrPVR2D_FRONTWSEGL.so.1" >> ${D}${sysconfdir}/powervr.ini
+	echo "WindowSystem=${LIBGLESWINDOWSYSTEM}" >> ${D}${sysconfdir}/powervr.ini
 
 	# The ES2.x, ES3.x, ES5.x and ES6.x CPUs have different SGX hardware, so we need to install multiple sets of userspace
 
@@ -173,11 +205,15 @@ do_install () {
 	install -d ${D}${bindir}/ES3.0
 	install -d ${D}${bindir}/ES2.0
 
+	shared_prog="eglinfo pvr2d_test ${PVR_INIT} services_test sgx_blit_test sgx_clipblit_test sgx_flip_test sgx_init_test sgx_render_flip_test"
+	raw_prog="gles1test1 gles2test1 ovg_unit_test"
+	x11_prog="eglinfo_x xgles1test1 xgles2test1 xmultiegltest xovg_unit_test"
+
 	for esrev in 2 3 5 6 8 ; do
 		ESLOCATION=$(eval echo $(echo \$\{ES${esrev}LOCATION\}))
 		if [ -e ${ESLOCATION} ] ; then
 			cp -pPR ${ESLOCATION}/lib*${IMGPV} ${ESLOCATION}/pvr_drv.so ${ESLOCATION}/*.a ${D}${libdir}/ES${esrev}.0/
-			for esprog in eglinfo eglinfo_x gles1test1 gles2test1 ovg_unit_test pvr2d_test pvrsrvinit services_test sgx_blit_test sgx_clipblit_test sgx_flip_test sgx_init_test sgx_render_flip_test xgles1test1 xgles2test1 xmultiegltest xovg_unit_test ; do
+			for esprog in $shared_prog $raw_prog ${@base_contains('DISTRO_FEATURES', 'x11',"$x11_prog","",d)} ; do
 				install -m 0755 ${ESLOCATION}/$esprog ${D}${bindir}/ES${esrev}.0/ || true
 			done
 		fi
@@ -189,16 +225,19 @@ do_install () {
 	cp ${WORKDIR}/*.desktop ${D}${prefix}/share/applications
 	rm ${D}${prefix}/share/applications/sample.desktop
 
-	install -d ${D}${bindir}/SGX/demos/X11/
-	install -d ${D}${bindir}/SGX/demos/Raw/
-	install -m 0755 ${S}/demos/x11/* ${D}${bindir}/SGX/demos/X11/
-	install -m 0755 ${S}/demos/raw/* ${D}${bindir}/SGX/demos/Raw/
+	if [ ${SUPPORT_XORG} -eq 1 ] ; then
+		install -d ${D}${bindir}/SGX/demos/X11/
+		install -m 0755 ${S}/demos/x11/* ${D}${bindir}/SGX/demos/X11/
+		install -d ${D}${bindir}/SGX/trainingcourses/X11
+		install -m 0755 ${S}/trainingcourses/x11/* ${D}${bindir}/SGX/trainingcourses/X11/
+	fi
 
+	install -d ${D}${bindir}/SGX/demos/Raw/
+	install -m 0755 ${S}/demos/raw/* ${D}${bindir}/SGX/demos/Raw/
 	install -d ${D}${bindir}/SGX/trainingcourses/Raw
-	install -d ${D}${bindir}/SGX/trainingcourses/X11
-	install -m 0755 ${S}/trainingcourses/x11/* ${D}${bindir}/SGX/trainingcourses/X11/
 	install -m 0755 ${S}/trainingcourses/raw/* ${D}${bindir}/SGX/trainingcourses/Raw/
 
+
 	# Delete objects and linker scripts hidden between the headers
 	find ${D} -name "*.o" -delete
 	find ${D} -name "*.o.cmd" -delete
@@ -208,15 +247,8 @@ do_install () {
 
 }
 
-PACKAGES =+ "${PN}-rawdemos \
-             ${PN}-x11demos \
-             ${PN}-rawtrainingcourses \
-             ${PN}-x11trainingcourses \
-"
-
-PACKAGES += "xserver-kdrive-powervrsgx \
-             ${PN}-tests "
-
+PACKAGES =+ "${@base_contains('DISTRO_FEATURES', 'x11',"${PN}-x11demos ${PN}-x11trainingcourses xserver-kdrive-powervrsgx" ,"", d)}  \
+             ${PN}-rawdemos ${PN}-rawtrainingcourses ${PN}-tests"
 # Package the base libraries per silicon revision
 PACKAGES =+ "${PN}-es2 ${PN}-es3 ${PN}-es5 ${PN}-es6 ${PN}-es8"
 RRECOMMENDS_${PN} += "${PN}-es2 ${PN}-es3 ${PN}-es5 ${PN}-es6 ${PN}-es8"
@@ -233,7 +265,9 @@ PRIVATE_LIBS_${PN}-es5 = "libGLESv2.so libIMGegl.so libsrv_um.so libOpenVG.so li
 PRIVATE_LIBS_${PN}-es6 = "libGLESv2.so libIMGegl.so libsrv_um.so libOpenVG.so libpvr2d.so libsrv_init.so libEGL.so libsrv_um_dri.so libOpenVGU.so libglslcompiler.so libGLES_CM.so"
 PRIVATE_LIBS_${PN}-es8 = "libGLESv2.so libIMGegl.so libsrv_um.so libOpenVG.so libpvr2d.so libsrv_init.so libEGL.so libsrv_um_dri.so libOpenVGU.so libglslcompiler.so libGLES_CM.so"
 
-PACKAGES =+ "${PN}-blitwsegl ${PN}-flipwsegl ${PN}-frontwsegl ${PN}-linuxfbwsegl ${PN}-x11wsegl ${PN}-driwsegl"
+
+PACKAGES =+ "${PN}-blitwsegl ${PN}-flipwsegl ${PN}-frontwsegl ${PN}-linuxfbwsegl"
+PACKAGES =+ "${@base_contains('DISTRO_FEATURES', 'x11',"${PN}-x11wsegl ${PN}-driwsegl" ,"", d)}"
 FILES_${PN}-blitwsegl = "${libdir}/libpvrPVR2D_BLITWSEGL.so.*"
 FILES_${PN}-flipwsegl = "${libdir}/libpvrPVR2D_FLIPWSEGL.so.*"
 FILES_${PN}-frontwsegl = "${libdir}/libpvrPVR2D_FRONTWSEGL.so.*"
@@ -241,7 +275,10 @@ FILES_${PN}-linuxfbwsegl = "${libdir}/libpvrPVR2D_LINUXFBWSEGL.so.*"
 FILES_${PN}-x11wsegl = "${libdir}/libpvrPVR2D_X11WSEGL.so* ${bindir}/x* ${bindir}/*x"
 FILES_${PN}-driwsegl = "${libdir}/libpvrPVR2D_DRIWSEGL.so* ${libdir}/libsrv_um_dri*"
 
-PACKAGES =+ "${PN}-blitwsegl-es2 ${PN}-blitwsegl-es3 ${PN}-blitwsegl-es5 ${PN}-blitwsegl-es6 ${PN}-blitwsegl-es8 ${PN}-flipwsegl-es2 ${PN}-flipwsegl-es3 ${PN}-flipwsegl-es5 ${PN}-flipwsegl-es6 ${PN}-flipwsegl-es8 ${PN}-frontwsegl-es2 ${PN}-frontwsegl-es3 ${PN}-frontwsegl-es5 ${PN}-frontwsegl-es6 ${PN}-frontwsegl-es8 ${PN}-linuxfbwsegl-es2 ${PN}-linuxfbwsegl-es3 ${PN}-linuxfbwsegl-es5 ${PN}-linuxfbwsegl-es6 ${PN}-linuxfbwsegl-es8 ${PN}-x11wsegl-es2 ${PN}-x11wsegl-es3 ${PN}-x11wsegl-es5 ${PN}-x11wsegl-es6 ${PN}-x11wsegl-es8 ${PN}-driwsegl-es2 ${PN}-driwsegl-es3 ${PN}-driwsegl-es5 ${PN}-driwsegl-es6 ${PN}-driwsegl-es8"
+PACKAGES =+ "${PN}-blitwsegl-es2 ${PN}-blitwsegl-es3 ${PN}-blitwsegl-es5 ${PN}-blitwsegl-es6 ${PN}-blitwsegl-es8 ${PN}-flipwsegl-es2 ${PN}-flipwsegl-es3 ${PN}-flipwsegl-es5 ${PN}-flipwsegl-es6 ${PN}-flipwsegl-es8 ${PN}-frontwsegl-es2 ${PN}-frontwsegl-es3 ${PN}-frontwsegl-es5 ${PN}-frontwsegl-es6 ${PN}-frontwsegl-es8 ${PN}-linuxfbwsegl-es2 ${PN}-linuxfbwsegl-es3 ${PN}-linuxfbwsegl-es5 ${PN}-linuxfbwsegl-es6 ${PN}-linuxfbwsegl-es8"
+
+X11_SEGL = " ${PN}-x11wsegl-es2 ${PN}-x11wsegl-es3 ${PN}-x11wsegl-es5 ${PN}-x11wsegl-es6 ${PN}-x11wsegl-es8 ${PN}-driwsegl-es2 ${PN}-driwsegl-es3 ${PN}-driwsegl-es5 ${PN}-driwsegl-es6 ${PN}-driwsegl-es8 "
+PACKAGES =+ "${@base_contains('DISTRO_FEATURES', 'x11',"${X11_SEGL}" ,"", d)}"
 FILES_${PN}-blitwsegl-es2 = "${libdir}/ES2*/libpvrPVR2D_BLITWSEGL.so.*"
 FILES_${PN}-blitwsegl-es3 = "${libdir}/ES3*/libpvrPVR2D_BLITWSEGL.so.*"
 FILES_${PN}-blitwsegl-es5 = "${libdir}/ES5*/libpvrPVR2D_BLITWSEGL.so.*"
@@ -286,7 +323,7 @@ RRECOMMENDS_${PN}-driwsegl = " ${PN}-driwsegl-es2 ${PN}-driwsegl-es3 ${PN}-driws
 
 CONFFILES_${PN} = "${sysconfdir}/powervr.ini"
 
-FILES_${PN} = "${sysconfdir} ${libdir}/*.so* ${bindir}/pvrsrvinit ${bindir}/cputype ${bindir}/*"
+FILES_${PN} = "${sysconfdir} ${libdir}/*.so* ${bindir}/${PVR_INIT} ${bindir}/cputype ${bindir}/*"
 
 FILES_xserver-kdrive-powervrsgx = "${bindir}/Xsgx"
 FILES_${PN}-tests = "${bindir}/*test*"
@@ -334,8 +371,11 @@ INITSCRIPT_PARAMS = "start 30 5 2 . stop 40 0 1 6 ."
 pkg_postinst_${PN}_append() {
 rm -f $D${sysconfdir}/powervr-esrev
 
-ln -sf /usr/lib/libXdmcp.so.6.0.0 /usr/lib/libXdmcp.so.0 
-ln -sf /usr/lib/libXau.so.6.0.0 /usr/lib/libXau.so.0
+if [ ${SUPPORT_XORG} -eq 1 ] ; then
+	ln -sf /usr/lib/libXdmcp.so.6.0.0 /usr/lib/libXdmcp.so.0
+	ln -sf /usr/lib/libXau.so.6.0.0 /usr/lib/libXau.so.0
+fi
+
 }
 
 pkg_postinst_${PN}-blitwsegl() {

recipes-graphics/libgles/libgles-omap3/rc.pvr

@@ -42,6 +42,13 @@ fbset -vyres $(expr $YRES \* 3)
 sgxprepare () {
 	echo Starting PVR
 	insmod $(busybox find /lib/modules/$(uname -r) -name "pvrsrvkm.ko")
+
+    if [ "$?" != "0" ]
+    then
+        echo "Could not find pvrsrvkm driver"
+        exit 1
+    fi
+
 	modprobe omaplfb
 	modprobe bufferclass_ti
 

recipes-graphics/libgles/libgles-omap3_4.03.00.02.bb

@@ -15,8 +15,9 @@ require libgles-omap3.inc
 SGXPV = "4_03_00_02"
 IMGPV = "1.6.16.3977"
 BINFILE := "Graphics_SDK_setuplinux_${SGXPV}.bin"
+TI_BIN_UNPK_WDEXT := "/Graphics_SDK_${SGXPV}"
 
-SRC_URI = "http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/gfxsdk/${SGXPV}/exports/Graphics_SDK_setuplinux_${SGXPV}.bin \
+SRC_URI = "http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/gfxsdk/${SGXPV}/exports/${BINFILE} \
                    file://cputype \
                    file://rc.pvr \
                    file://sample.desktop \
@@ -26,5 +27,4 @@ SRC_URI = "http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/gf
 SRC_URI[md5sum] = "ff8c1f2b8e4cb42f4ced6a613b081ada"
 SRC_URI[sha256sum] = "cdb0bd3964e107733d632aa8224e0537b05c1ffac34befc036423458c8d75255"
 
-S = "${WORKDIR}"
-
+S = "${WORKDIR}/Graphics_SDK_${SGXPV}"

recipes-graphics/libgles/libgles-omap3_4.05.00.03.bb

@@ -12,8 +12,9 @@ require libgles-omap3.inc
 SGXPV = "4_05_00_03"
 IMGPV = "1.6.16.4117"
 BINFILE := "Graphics_SDK_setuplinux_${SGXPV}.bin"
+TI_BIN_UNPK_WDEXT := "/Graphics_SDK_${SGXPV}"
 
-SRC_URI = "http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/gfxsdk/${SGXPV}/exports/Graphics_SDK_setuplinux_${SGXPV}.bin \
+SRC_URI = "http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/gfxsdk/${SGXPV}/exports/${BINFILE} \
                    file://cputype \
                    file://rc.pvr \
                    file://sample.desktop \
@@ -23,5 +24,4 @@ SRC_URI = "http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/gf
 SRC_URI[md5sum] = "0e651eaa92bb91760f0b40a17697a7dc"
 SRC_URI[sha256sum] = "bfe764a8959556195545d6fff76f63a489642f345c105bbbc309a3f243c2dd0e"
 
-S = "${WORKDIR}"
-
+S = "${WORKDIR}/Graphics_SDK_${SGXPV}"

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0001-am3358-sk-modified-WLAN-enable-and-irq-to-match-boar.patch

@@ -0,0 +1,62 @@
+From 69c82f68876d24e798388fc053c8d6766236ac65 Mon Sep 17 00:00:00 2001
+From: Vita Preskovsky <vitap@ti.com>
+Date: Thu, 28 Jun 2012 14:53:12 +0300
+Subject: [PATCH] am3358-sk: modified WLAN enable and irq to match board revision 1.2
+	* 1. WLAN enable and irq are modified to match board revision 1.2
+	  2. support suspend/resume for SK board
+
+Upstream-Status: Pending
+
+Signed-off-by: Vita Preskovsky <vitap@ti.com>
+---
+ arch/arm/mach-omap2/board-am335xevm.c |   11 +++++++----
+ 1 files changed, 7 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-am335xevm.c b/arch/arm/mach-omap2/board-am335xevm.c
+index 64f7547..6ae4e68 100755
+--- a/arch/arm/mach-omap2/board-am335xevm.c
++++ b/arch/arm/mach-omap2/board-am335xevm.c
+@@ -905,7 +905,7 @@ static struct pinmux_config ecap2_pin_mux[] = {
+
+ #define AM335XEVM_WLAN_PMENA_GPIO	GPIO_TO_PIN(1, 30)
+ #define AM335XEVM_WLAN_IRQ_GPIO		GPIO_TO_PIN(3, 17)
+-#define AM335XEVM_SK_WLAN_IRQ_GPIO      GPIO_TO_PIN(1, 29)
++#define AM335XEVM_SK_WLAN_IRQ_GPIO      GPIO_TO_PIN(0, 31)
+
+ struct wl12xx_platform_data am335xevm_wlan_data = {
+	.irq = OMAP_GPIO_IRQ(AM335XEVM_WLAN_IRQ_GPIO),
+@@ -941,8 +941,8 @@ static struct pinmux_config wl12xx_pin_mux[] = {
+  };
+
+ static struct pinmux_config wl12xx_pin_mux_sk[] = {
+-	{"gpmc_wpn.gpio0_31", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
+-	{"gpmc_csn0.gpio1_29", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
++	{"gpmc_wpn.gpio0_31", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
++	{"gpmc_csn0.gpio1_29", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT_PULLUP},
+	{"mcasp0_ahclkx.gpio3_21", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
+	{NULL, 0},
+ };
+@@ -1618,6 +1618,7 @@ static void mmc1_wl12xx_init(int evm_id, int profile)
+	am335x_mmc[1].name = "wl1271";
+	am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD;
+	am335x_mmc[1].nonremovable = true;
++	am335x_mmc[1].pm_caps = MMC_PM_KEEP_POWER;
+	am335x_mmc[1].gpio_cd = -EINVAL;
+	am335x_mmc[1].gpio_wp = -EINVAL;
+	am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
+@@ -1674,10 +1675,12 @@ static void wl12xx_init(int evm_id, int profile)
+	int ret;
+
+	if (evm_id == EVM_SK) {
+-		am335xevm_wlan_data.wlan_enable_gpio = GPIO_TO_PIN(0, 31);
++		am335xevm_wlan_data.wlan_enable_gpio = GPIO_TO_PIN(1, 29);
+		am335xevm_wlan_data.bt_enable_gpio = GPIO_TO_PIN(3, 21);
+		am335xevm_wlan_data.irq =
+				OMAP_GPIO_IRQ(AM335XEVM_SK_WLAN_IRQ_GPIO);
++		am335xevm_wlan_data.platform_quirks =
++				WL12XX_PLATFORM_QUIRK_EDGE_IRQ;
+		setup_pin_mux(wl12xx_pin_mux_sk);
+	} else {
+		setup_pin_mux(wl12xx_pin_mux);
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0001-am335x-Add-crypto-driver-settings-to-defconfig.patch

@@ -0,0 +1,130 @@
+From 1edc97015f69fac420c32df514e1d1d546041d42 Mon Sep 17 00:00:00 2001
+From: Greg Turner <gregturner@ti.com>
+Date: Fri, 8 Jun 2012 13:54:13 -0500
+Subject: [PATCH] [am335x]: Add crypto driver settings to defconfig
+
+* Add Crypto Driver and configuration to defconfig
+---
+ arch/arm/configs/am335x_evm_defconfig |   39 +++++++++++++++++++++++---------
+ 1 files changed, 28 insertions(+), 11 deletions(-)
+ mode change 100644 => 100755 arch/arm/configs/am335x_evm_defconfig
+
+diff --git a/arch/arm/configs/am335x_evm_defconfig b/arch/arm/configs/am335x_evm_defconfig
+old mode 100644
+new mode 100755
+index de1eaad..0bf7efd
+--- a/arch/arm/configs/am335x_evm_defconfig
++++ b/arch/arm/configs/am335x_evm_defconfig
+@@ -1277,6 +1277,9 @@ CONFIG_SERIAL_OMAP_CONSOLE=y
+ # CONFIG_SERIAL_XILINX_PS_UART is not set
+ # CONFIG_HVC_DCC is not set
+ # CONFIG_IPMI_HANDLER is not set
++CONFIG_HW_RANDOM=y
++# CONFIG_HW_RANDOM_TIMERIOMEM is not set
++CONFIG_HW_RANDOM_OMAP4=y
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_R3964 is not set
+ # CONFIG_RAW_DRIVER is not set
+@@ -2472,36 +2475,38 @@ CONFIG_CRYPTO=y
+ #
+ CONFIG_CRYPTO_ALGAPI=y
+ CONFIG_CRYPTO_ALGAPI2=y
++CONFIG_CRYPTO_AEAD=y
+ CONFIG_CRYPTO_AEAD2=y
+ CONFIG_CRYPTO_BLKCIPHER=y
+ CONFIG_CRYPTO_BLKCIPHER2=y
+ CONFIG_CRYPTO_HASH=y
+ CONFIG_CRYPTO_HASH2=y
++CONFIG_CRYPTO_RNG=y
+ CONFIG_CRYPTO_RNG2=y
+ CONFIG_CRYPTO_PCOMP2=y
+ CONFIG_CRYPTO_MANAGER=y
+ CONFIG_CRYPTO_MANAGER2=y
+ # CONFIG_CRYPTO_USER is not set
+-CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
++# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
+ # CONFIG_CRYPTO_GF128MUL is not set
+ # CONFIG_CRYPTO_NULL is not set
+ CONFIG_CRYPTO_WORKQUEUE=y
+ # CONFIG_CRYPTO_CRYPTD is not set
+ # CONFIG_CRYPTO_AUTHENC is not set
+-# CONFIG_CRYPTO_TEST is not set
++CONFIG_CRYPTO_TEST=m
+
+ #
+ # Authenticated Encryption with Associated Data
+ #
+ # CONFIG_CRYPTO_CCM is not set
+ # CONFIG_CRYPTO_GCM is not set
+-# CONFIG_CRYPTO_SEQIV is not set
++CONFIG_CRYPTO_SEQIV=y
+
+ #
+ # Block modes
+ #
+-# CONFIG_CRYPTO_CBC is not set
+-# CONFIG_CRYPTO_CTR is not set
++CONFIG_CRYPTO_CBC=y
++CONFIG_CRYPTO_CTR=y
+ # CONFIG_CRYPTO_CTS is not set
+ CONFIG_CRYPTO_ECB=y
+ # CONFIG_CRYPTO_LRW is not set
+@@ -2511,7 +2516,7 @@ CONFIG_CRYPTO_ECB=y
+ #
+ # Hash modes
+ #
+-# CONFIG_CRYPTO_HMAC is not set
++CONFIG_CRYPTO_HMAC=y
+ # CONFIG_CRYPTO_XCBC is not set
+ # CONFIG_CRYPTO_VMAC is not set
+
+@@ -2521,14 +2526,14 @@ CONFIG_CRYPTO_ECB=y
+ CONFIG_CRYPTO_CRC32C=y
+ # CONFIG_CRYPTO_GHASH is not set
+ # CONFIG_CRYPTO_MD4 is not set
+-# CONFIG_CRYPTO_MD5 is not set
++CONFIG_CRYPTO_MD5=y
+ CONFIG_CRYPTO_MICHAEL_MIC=y
+ # CONFIG_CRYPTO_RMD128 is not set
+ # CONFIG_CRYPTO_RMD160 is not set
+ # CONFIG_CRYPTO_RMD256 is not set
+ # CONFIG_CRYPTO_RMD320 is not set
+-# CONFIG_CRYPTO_SHA1 is not set
+-# CONFIG_CRYPTO_SHA256 is not set
++CONFIG_CRYPTO_SHA1=y
++CONFIG_CRYPTO_SHA256=y
+ # CONFIG_CRYPTO_SHA512 is not set
+ # CONFIG_CRYPTO_TGR192 is not set
+ # CONFIG_CRYPTO_WP512 is not set
+@@ -2543,7 +2548,7 @@ CONFIG_CRYPTO_ARC4=y
+ # CONFIG_CRYPTO_CAMELLIA is not set
+ # CONFIG_CRYPTO_CAST5 is not set
+ # CONFIG_CRYPTO_CAST6 is not set
+-# CONFIG_CRYPTO_DES is not set
++CONFIG_CRYPTO_DES=y
+ # CONFIG_CRYPTO_FCRYPT is not set
+ # CONFIG_CRYPTO_KHAZAD is not set
+ # CONFIG_CRYPTO_SALSA20 is not set
+@@ -2565,7 +2570,19 @@ CONFIG_CRYPTO_LZO=y
+ # CONFIG_CRYPTO_ANSI_CPRNG is not set
+ # CONFIG_CRYPTO_USER_API_HASH is not set
+ # CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+-# CONFIG_CRYPTO_HW is not set
++CONFIG_CRYPTO_HW=y
++CONFIG_CRYPTO_DEV_OMAP4_AES=y
++CONFIG_CRYPTO_DEV_OMAP4_SHAM=y
++
++#
++# OCF Configuration
++#
++CONFIG_OCF_OCF=y
++# CONFIG_OCF_RANDOMHARVEST is not set
++CONFIG_OCF_CRYPTODEV=y
++CONFIG_OCF_CRYPTOSOFT=y
++# CONFIG_OCF_OCFNULL is not set
++# CONFIG_OCF_BENCH is not set
+ # CONFIG_BINARY_PRINTF is not set
+
+ #
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0001-am335x-Add-pm_runtime-API-to-crypto-driver.patch

@@ -0,0 +1,405 @@
+From 7cb6dbae57e2bb5d237bb88f6eb40971cf8fc3b5 Mon Sep 17 00:00:00 2001
+From: Greg Turner <gregturner@ti.com>
+Date: Wed, 18 Jul 2012 09:15:18 -0500
+Subject: [PATCH] [am335x]: Add pm_runtime API to crypto driver
+
+* Add pm_runtime API to crypto driver AES and SHA
+* Mod devices.c file to add pm_runtime for crypto
+* Mod omap_hwmod_33xx_data.c to add resources structures
+* Crypto module clocks are enabled in probe function
+  and disabled only on remove or other error.
+---
+ arch/arm/mach-omap2/devices.c              |   66 ++++++++++++++++++++++++++++
+ arch/arm/mach-omap2/omap_hwmod_33xx_data.c |   15 ++++++-
+ drivers/crypto/omap4-aes.c                 |   52 +++++++++++----------
+ drivers/crypto/omap4-sham.c                |   45 ++++++++++---------
+ 4 files changed, 131 insertions(+), 47 deletions(-)
+ mode change 100644 => 100755 arch/arm/mach-omap2/devices.c
+ mode change 100644 => 100755 arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+ mode change 100644 => 100755 drivers/crypto/omap4-aes.c
+ mode change 100644 => 100755 drivers/crypto/omap4-sham.c
+
+diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
+old mode 100644
+new mode 100755
+index ebf0d9e..156e363
+--- a/arch/arm/mach-omap2/devices.c
++++ b/arch/arm/mach-omap2/devices.c
+@@ -751,6 +751,7 @@ static struct platform_device sham_device = {
+	.id		= -1,
+ };
+
++#if 0
+ static void omap_init_sham(void)
+ {
+	sham_device.resource = omap4_sham_resources;
+@@ -758,6 +759,38 @@ static void omap_init_sham(void)
+
+	platform_device_register(&sham_device);
+ }
++#endif
++
++int __init omap_init_sham(void)
++{
++	int id = -1;
++	struct platform_device *pdev;
++	struct omap_hwmod *oh;
++	char *oh_name = "sha0";
++	char *name = "omap4-sham";
++
++	oh = omap_hwmod_lookup(oh_name);
++	if (!oh) {
++		pr_err("Could not look up %s\n", oh_name);
++		return -ENODEV;
++	}
++
++	pdev = omap_device_build(name, id, oh, NULL, 0, NULL, 0, 0);
++	//pdev.resource = omap4_sham_resources;
++	//pdev.num_resources = omap4_sham_resources_sz;
++
++	if (IS_ERR(pdev)) {
++		WARN(1, "Can't build omap_device for %s:%s.\n",
++						name, oh->name);
++		return PTR_ERR(pdev);
++	}
++
++	return 0;
++}
++
++
++
++
+
+ #else
+ static inline void omap_init_sham(void) { }
+@@ -853,12 +886,45 @@ static struct platform_device aes_device = {
+	.id		= -1,
+ };
+
++#if 0
+ static void omap_init_aes(void)
+ {
+	aes_device.resource = omap4_aes_resources;
+	aes_device.num_resources = omap4_aes_resources_sz;
+	platform_device_register(&aes_device);
+ }
++#endif
++
++int __init omap_init_aes(void)
++{
++	int id = -1;
++	struct platform_device *pdev;
++	struct omap_hwmod *oh;
++	char *oh_name = "aes0";
++	char *name = "omap4-aes";
++
++	oh = omap_hwmod_lookup(oh_name);
++	if (!oh) {
++		pr_err("Could not look up %s\n", oh_name);
++		return -ENODEV;
++	}
++
++	pdev = omap_device_build(name, id, oh, NULL, 0, NULL, 0, 0);
++	//pdev.resource = omap4_sham_resources;
++	//pdev.num_resources = omap4_sham_resources_sz;
++
++	if (IS_ERR(pdev)) {
++		WARN(1, "Can't build omap_device for %s:%s.\n",
++						name, oh->name);
++		return PTR_ERR(pdev);
++	}
++
++	return 0;
++}
++
++
++
++
+
+ #else
+ static inline void omap_init_aes(void) { }
+diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+old mode 100644
+new mode 100755
+index 995b73f..2f9982c
+--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
++++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+@@ -434,11 +434,18 @@ static struct omap_hwmod_irq_info am33xx_aes0_irqs[] = {
+	{ .irq = -1 }
+ };
+
++static struct omap_hwmod_dma_info am33xx_aes0_dma[] = {
++	{ .dma_req = AM33XX_DMA_AESEIP36T0_DOUT },
++	{ .dma_req = AM33XX_DMA_AESEIP36T0_DIN },
++	{ .dma_req = -1 }
++};
++
+ static struct omap_hwmod am33xx_aes0_hwmod = {
+	.name		= "aes0",
+	.class		= &am33xx_aes_hwmod_class,
+	.clkdm_name	= "l3_clkdm",
+	.mpu_irqs	= am33xx_aes0_irqs,
++	.sdma_reqs	= am33xx_aes0_dma,
+	.main_clk	= "aes0_fck",
+	.prcm		= {
+		.omap4	= {
+@@ -2165,15 +2172,21 @@ static struct omap_hwmod_class am33xx_sha0_hwmod_class = {
+ };
+
+ static struct omap_hwmod_irq_info am33xx_sha0_irqs[] = {
+-	{ .irq = 108 },
++	{ .irq = AM33XX_IRQ_SHAEIP57t0_P },
+	{ .irq = -1 }
+ };
+
++static struct omap_hwmod_dma_info am33xx_sha0_dma[] = {
++	{ .dma_req = AM33XX_DMA_SHAEIP57T0_DIN },
++	{ .dma_req = -1 }
++};
++
+ static struct omap_hwmod am33xx_sha0_hwmod = {
+	.name		= "sha0",
+	.class		= &am33xx_sha0_hwmod_class,
+	.clkdm_name	= "l3_clkdm",
+	.mpu_irqs	= am33xx_sha0_irqs,
++	.sdma_reqs	= am33xx_sha0_dma,
+	.main_clk	= "sha0_fck",
+	.prcm		= {
+		.omap4	= {
+diff --git a/drivers/crypto/omap4-aes.c b/drivers/crypto/omap4-aes.c
+old mode 100644
+new mode 100755
+index f0b3fe2..76f988a
+--- a/drivers/crypto/omap4-aes.c
++++ b/drivers/crypto/omap4-aes.c
+@@ -32,13 +32,14 @@
+ #include <linux/init.h>
+ #include <linux/errno.h>
+ #include <linux/kernel.h>
+-#include <linux/clk.h>
+ #include <linux/platform_device.h>
+ #include <linux/scatterlist.h>
+ #include <linux/dma-mapping.h>
+ #include <linux/io.h>
+ #include <linux/crypto.h>
++#include <linux/pm_runtime.h>
+ #include <linux/interrupt.h>
++#include <linux/delay.h>
+ #include <crypto/scatterwalk.h>
+ #include <crypto/aes.h>
+
+@@ -145,12 +146,6 @@ static void omap4_aes_write_n(struct omap4_aes_dev *dd, u32 offset,
+
+ static int omap4_aes_hw_init(struct omap4_aes_dev *dd)
+ {
+-	/*
+-	 * clocks are enabled when request starts and disabled when finished.
+-	 * It may be long delays between requests.
+-	 * Device might go to off mode to save power.
+-	 */
+-	clk_enable(dd->iclk);
+	omap4_aes_write(dd, AES_REG_SYSCFG, 0);
+
+	if (!(dd->flags & FLAGS_INIT)) {
+@@ -494,7 +489,6 @@ static void omap4_aes_finish_req(struct omap4_aes_dev *dd, int err)
+
+	pr_debug("err: %d\n", err);
+
+-	clk_disable(dd->iclk);
+	dd->flags &= ~FLAGS_BUSY;
+
+	req->base.complete(&req->base, err);
+@@ -801,13 +795,15 @@ static int omap4_aes_probe(struct platform_device *pdev)
+	crypto_init_queue(&dd->queue, AM33X_AES_QUEUE_LENGTH);
+
+	/* Get the base address */
+-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+-	if (!res) {
+-		dev_err(dev, "invalid resource type\n");
+-		err = -ENODEV;
+-		goto err_res;
+-	}
+-	dd->phys_base = res->start;
++	//res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	//if (!res) {
++	//	dev_err(dev, "invalid resource type\n");
++	//	err = -ENODEV;
++	//	goto err_res;
++	//}
++
++	//dd->phys_base = res->start;
++	dd->phys_base = AM33XX_AES0_P_BASE;
+
+	/* Get the DMA */
+	res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
+@@ -823,13 +819,10 @@ static int omap4_aes_probe(struct platform_device *pdev)
+	else
+		dd->dma_in = res->start;
+
+-	/* Initializing the clock */
+-	dd->iclk = clk_get(dev, "aes0_fck");
+-	if (IS_ERR(dd->iclk)) {
+-		dev_err(dev, "clock initialization failed.\n");
+-		err = PTR_ERR(dd->iclk);
+-		goto err_res;
+-	}
++	pm_runtime_enable(dev);
++	udelay(1);
++	pm_runtime_get_sync(dev);
++	udelay(1);
+
+	dd->io_base = ioremap(dd->phys_base, SZ_4K);
+	if (!dd->io_base) {
+@@ -840,7 +833,7 @@ static int omap4_aes_probe(struct platform_device *pdev)
+
+	omap4_aes_hw_init(dd);
+	reg = omap4_aes_read(dd, AES_REG_REV);
+-	clk_disable(dd->iclk);
++
+	dev_info(dev, "AM33X AES hw accel rev: %u.%02u\n",
+		 ((reg & AES_REG_REV_X_MAJOR_MASK) >> 8),
+		 (reg & AES_REG_REV_Y_MINOR_MASK));
+@@ -879,7 +872,12 @@ err_dma:
+	iounmap(dd->io_base);
+
+ err_io:
+-	clk_put(dd->iclk);
++	pm_runtime_put_sync(dev);
++	udelay(1);
++	pm_runtime_disable(dev);
++	udelay(1);
++
++
+ err_res:
+	kfree(dd);
+	dd = NULL;
+@@ -907,7 +905,11 @@ static int omap4_aes_remove(struct platform_device *pdev)
+	tasklet_kill(&dd->queue_task);
+	omap4_aes_dma_cleanup(dd);
+	iounmap(dd->io_base);
+-	clk_put(dd->iclk);
++	pm_runtime_put_sync(&pdev->dev);
++	udelay(1);
++	pm_runtime_disable(&pdev->dev);
++	udelay(1);
++
+	kfree(dd);
+	dd = NULL;
+
+diff --git a/drivers/crypto/omap4-sham.c b/drivers/crypto/omap4-sham.c
+old mode 100644
+new mode 100755
+index 79f6be9..21f1b48
+--- a/drivers/crypto/omap4-sham.c
++++ b/drivers/crypto/omap4-sham.c
+@@ -31,7 +31,6 @@
+ #include <linux/errno.h>
+ #include <linux/interrupt.h>
+ #include <linux/kernel.h>
+-#include <linux/clk.h>
+ #include <linux/irq.h>
+ #include <linux/io.h>
+ #include <linux/platform_device.h>
+@@ -40,6 +39,7 @@
+ #include <linux/delay.h>
+ #include <linux/crypto.h>
+ #include <linux/cryptohash.h>
++#include <linux/pm_runtime.h>
+ #include <crypto/scatterwalk.h>
+ #include <crypto/algapi.h>
+ #include <crypto/sha.h>
+@@ -700,7 +700,6 @@ static void omap4_sham_finish_req(struct ahash_request *req, int err)
+	/* atomic operation is not needed here */
+	dd->dflags &= ~(BIT(FLAGS_BUSY) | BIT(FLAGS_FINAL) | BIT(FLAGS_CPU) |
+			BIT(FLAGS_DMA_READY) | BIT(FLAGS_OUTPUT_READY));
+-	clk_disable(dd->iclk);
+
+	if (req->base.complete)
+		req->base.complete(&req->base, err);
+@@ -743,7 +742,6 @@ static int omap4_sham_handle_queue(struct omap4_sham_dev *dd,
+	dev_dbg(dd->dev, "handling new req, op: %lu, nbytes: %d\n",
+						ctx->op, req->nbytes);
+
+-	clk_enable(dd->iclk);
+	if (!test_bit(FLAGS_INIT, &dd->dflags)) {
+		set_bit(FLAGS_INIT, &dd->dflags);
+		dd->err = 0;
+@@ -1272,13 +1270,15 @@ static int __devinit omap4_sham_probe(struct platform_device *pdev)
+	dd->irq = -1;
+
+	/* Get the base address */
+-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+-	if (!res) {
+-		dev_err(dev, "no MEM resource info\n");
+-		err = -ENODEV;
+-		goto res_err;
+-	}
+-	dd->phys_base = res->start;
++	//res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	//if (!res) {
++	//	dev_err(dev, "no MEM resource info\n");
++	//	err = -ENODEV;
++	//	goto res_err;
++	//}
++
++	//dd->phys_base = res->start;
++	dd->phys_base = AM33XX_SHA1MD5_P_BASE;
+
+	/* Get the DMA */
+	res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
+@@ -1308,13 +1308,10 @@ static int __devinit omap4_sham_probe(struct platform_device *pdev)
+	if (err)
+		goto dma_err;
+
+-	/* Initializing the clock */
+-	dd->iclk = clk_get(dev, "sha0_fck");
+-	if (IS_ERR(dd->iclk)) {
+-		dev_err(dev, "clock initialization failed.\n");
+-		err = PTR_ERR(dd->iclk);
+-		goto clk_err;
+-	}
++	pm_runtime_enable(dev);
++	udelay(1);
++	pm_runtime_get_sync(dev);
++	udelay(1);
+
+	dd->io_base = ioremap(dd->phys_base, SZ_4K);
+	if (!dd->io_base) {
+@@ -1323,9 +1320,7 @@ static int __devinit omap4_sham_probe(struct platform_device *pdev)
+		goto io_err;
+	}
+
+-	clk_enable(dd->iclk);
+	reg = omap4_sham_read(dd, SHA_REG_REV);
+-	clk_disable(dd->iclk);
+
+	dev_info(dev, "AM33X SHA/MD5 hw accel rev: %u.%02u\n",
+		 (reg & SHA_REG_REV_X_MAJOR_MASK) >> 8, reg & SHA_REG_REV_Y_MINOR_MASK);
+@@ -1349,7 +1344,11 @@ err_algs:
+		crypto_unregister_ahash(&algs[j]);
+	iounmap(dd->io_base);
+ io_err:
+-	clk_put(dd->iclk);
++	pm_runtime_put_sync(dev);
++	udelay(1);
++	pm_runtime_disable(dev);
++	udelay(1);
++
+ clk_err:
+	omap4_sham_dma_cleanup(dd);
+ dma_err:
+@@ -1379,7 +1378,11 @@ static int __devexit omap4_sham_remove(struct platform_device *pdev)
+		crypto_unregister_ahash(&algs[i]);
+	tasklet_kill(&dd->done_task);
+	iounmap(dd->io_base);
+-	clk_put(dd->iclk);
++	pm_runtime_put_sync(&pdev->dev);
++	udelay(1);
++	pm_runtime_disable(&pdev->dev);
++	udelay(1);
++
+	omap4_sham_dma_cleanup(dd);
+	if (dd->irq >= 0)
+		free_irq(dd->irq, dd);
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0001-am335x-enable-pullup-on-the-WLAN-enable-pin-fo.patch

@@ -0,0 +1,57 @@
+From f69ffbef6793b7238a8518481735fd53326e0cdf Mon Sep 17 00:00:00 2001
+From: Vita Preskovsky <vitap@ti.com>
+Date: Tue, 24 Jul 2012 20:02:28 +0300
+Subject: [PATCH] am335x: enable pullup on the WLAN enable pin for keeping wlan
+
+  * Enable pullup on the WLAN enable pin for keeping wlan active
+    during suspend in wowlan mode. The fix is relevant only in the case
+    of am335x-SK board.
+
+
+Signed-off-by: Vita Preskovsky <vitap@ti.com>
+---
+ arch/arm/mach-omap2/board-am335xevm.c |   22 ++++++++++++++++++++++
+ 1 files changed, 22 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-am335xevm.c b/arch/arm/mach-omap2/board-am335xevm.c
+index f68710c..f263f84 100644
+--- a/arch/arm/mach-omap2/board-am335xevm.c
++++ b/arch/arm/mach-omap2/board-am335xevm.c
+@@ -1673,13 +1673,35 @@ static void wl12xx_bluetooth_enable(void)
+	gpio_direction_output(am335xevm_wlan_data.bt_enable_gpio, 0);
+ }
+
++#define AM33XX_CTRL_REGADDR(reg)					\
++		AM33XX_L4_WK_IO_ADDRESS(AM33XX_SCM_BASE + (reg))
++
++/* wlan enable pin */
++#define AM33XX_CONTROL_PADCONF_GPMC_CSN0_OFFSET		0x087C
+ static int wl12xx_set_power(struct device *dev, int slot, int on, int vdd)
+ {
++	int pad_mux_value;
++
+	if (on) {
+		gpio_direction_output(am335xevm_wlan_data.wlan_enable_gpio, 1);
++
++		/* Enable pullup on the WLAN enable pin for keeping wlan active during suspend
++		   in wowlan mode */
++		if ( am335x_evm_get_id() == EVM_SK ) {
++			pad_mux_value = readl(AM33XX_CTRL_REGADDR(AM33XX_CONTROL_PADCONF_GPMC_CSN0_OFFSET));
++			pad_mux_value &= (~AM33XX_PULL_DISA);
++			writel(pad_mux_value, AM33XX_CTRL_REGADDR(AM33XX_CONTROL_PADCONF_GPMC_CSN0_OFFSET));
++		}
++
+		mdelay(70);
+	} else {
+		gpio_direction_output(am335xevm_wlan_data.wlan_enable_gpio, 0);
++		/* Disable pullup on the WLAN enable when WLAN is off */
++		if ( am335x_evm_get_id() == EVM_SK ) {
++			pad_mux_value = readl(AM33XX_CTRL_REGADDR(AM33XX_CONTROL_PADCONF_GPMC_CSN0_OFFSET));
++			pad_mux_value |= AM33XX_PULL_DISA;
++			writel(pad_mux_value, AM33XX_CTRL_REGADDR(AM33XX_CONTROL_PADCONF_GPMC_CSN0_OFFSET));
++		}
+	}
+
+	return 0;
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0001-am335x_evm_defconfig-turn-off-MUSB-DMA.patch

@@ -0,0 +1,35 @@
+From 95eca5a896c96d0af7188c97825a3b3ef5313ed3 Mon Sep 17 00:00:00 2001
+From: Chase Maupin <Chase.Maupin@ti.com>
+Date: Thu, 2 Feb 2012 16:38:51 -0600
+Subject: [PATCH] am335x_evm_defconfig: turn off MUSB DMA
+
+* Turn off the MUSB DMA in the am335x_evm_defconfig.  This way
+  we can pull the default defconfig without enabling the
+  faulty USB DMA.
+
+Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
+---
+ arch/arm/configs/am335x_evm_defconfig |    6 +++---
+ 1 files changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/configs/am335x_evm_defconfig b/arch/arm/configs/am335x_evm_defconfig
+index d105c61..121dc7f 100644
+--- a/arch/arm/configs/am335x_evm_defconfig
++++ b/arch/arm/configs/am335x_evm_defconfig
+@@ -1982,11 +1982,11 @@ CONFIG_USB_MUSB_TI81XX_GLUE=y
+ CONFIG_USB_MUSB_TI81XX=y
+ # CONFIG_USB_MUSB_BLACKFIN is not set
+ # CONFIG_USB_MUSB_UX500 is not set
+-CONFIG_USB_TI_CPPI41_DMA_HW=y
+-# CONFIG_MUSB_PIO_ONLY is not set
++# CONFIG_USB_TI_CPPI41_DMA_HW is not set
++CONFIG_MUSB_PIO_ONLY=y
+ # CONFIG_USB_INVENTRA_DMA is not set
+ # CONFIG_USB_TI_CPPI_DMA is not set
+-CONFIG_USB_TI_CPPI41_DMA=y
++# CONFIG_USB_TI_CPPI41_DMA is not set
+ # CONFIG_USB_TUSB_OMAP_DMA is not set
+ # CONFIG_USB_UX500_DMA is not set
+ # CONFIG_USB_RENESAS_USBHS is not set
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0001-am335xevm-using-edge-triggered-interrupts-for-WLAN.patch

@@ -0,0 +1,35 @@
+From be52bac69dfe6a56276b16ccd234970c4f7b1255 Mon Sep 17 00:00:00 2001
+From: Vita Preskovsky <vitap@ti.com>
+Date: Wed, 18 Jul 2012 16:20:36 +0300
+Subject: [PATCH] am335xevm: using edge triggered interrupts for WLAN
+
+  *using edge triggered interrupts instead of default level triggered in
+   all platforms supporting WLAN. This reduces CPU cycles and possibility
+   for missed interrupts.
+
+
+Signed-off-by: Vita Preskovsky <vitap@ti.com>
+---
+ arch/arm/mach-omap2/board-am335xevm.c |    3 +--
+ 1 files changed, 1 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-am335xevm.c b/arch/arm/mach-omap2/board-am335xevm.c
+index 6ae4e68..ac005c8 100644
+--- a/arch/arm/mach-omap2/board-am335xevm.c
++++ b/arch/arm/mach-omap2/board-am335xevm.c
+@@ -1679,12 +1679,11 @@ static void wl12xx_init(int evm_id, int profile)
+		am335xevm_wlan_data.bt_enable_gpio = GPIO_TO_PIN(3, 21);
+		am335xevm_wlan_data.irq =
+				OMAP_GPIO_IRQ(AM335XEVM_SK_WLAN_IRQ_GPIO);
+-		am335xevm_wlan_data.platform_quirks =
+-				WL12XX_PLATFORM_QUIRK_EDGE_IRQ;
+		setup_pin_mux(wl12xx_pin_mux_sk);
+	} else {
+		setup_pin_mux(wl12xx_pin_mux);
+	}
++	am335xevm_wlan_data.platform_quirks = WL12XX_PLATFORM_QUIRK_EDGE_IRQ;
+	wl12xx_bluetooth_enable();
+
+	if (wl12xx_set_platform_data(&am335xevm_wlan_data))
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0001-am33x-Add-memory-addresses-for-crypto-modules.patch

@@ -0,0 +1,41 @@
+From 5f2f17a488aba4319b537aed040ea13607af128b Mon Sep 17 00:00:00 2001
+From: Greg Turner <gregturner@ti.com>
+Date: Thu, 17 May 2012 14:25:40 -0500
+Subject: [PATCH 1/8] am33x: Add memory addresses for crypto modules
+
+* Add base memory addresses to the am33xx.h header file
+
+These addresses are for the HW crypto modules including TRNG, AES, and SHA/MD5
+
+Signed-off-by: Greg Turner <gregturner@ti.com>
+---
+ arch/arm/plat-omap/include/plat/am33xx.h |   11 +++++++++++
+ 1 files changed, 11 insertions(+), 0 deletions(-)
+ mode change 100644 => 100755 arch/arm/plat-omap/include/plat/am33xx.h
+
+diff --git a/arch/arm/plat-omap/include/plat/am33xx.h b/arch/arm/plat-omap/include/plat/am33xx.h
+old mode 100644
+new mode 100755
+index a16e72c..96ab1c3
+--- a/arch/arm/plat-omap/include/plat/am33xx.h
++++ b/arch/arm/plat-omap/include/plat/am33xx.h
+@@ -65,6 +65,17 @@
+
+ #define AM33XX_ELM_BASE		0x48080000
+
++/* Base address for crypto modules */
++#define AM33XX_SHA1MD5_S_BASE	0x53000000
++#define AM33XX_SHA1MD5_P_BASE	0x53100000
++
++#define	AM33XX_AES0_S_BASE	0x53400000
++#define	AM33XX_AES0_P_BASE	0x53500000
++#define	AM33XX_AES1_S_BASE	0x53600000
++#define	AM33XX_AES1_P_BASE	0x53700000
++
++#define	AM33XX_RNG_BASE		0x48310000
++
+ #define AM33XX_ASP0_BASE	0x48038000
+ #define AM33XX_ASP1_BASE	0x4803C000
+
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0001-mach-omap2-pm33xx-Disable-VT-switch.patch

@@ -0,0 +1,71 @@
+From 31ec2850e89414efb30accb9d8b5228257e507b1 Mon Sep 17 00:00:00 2001
+From: Chase Maupin <Chase.Maupin@ti.com>
+Date: Wed, 21 Mar 2012 10:18:03 -0500
+Subject: [PATCH 1/1] mach-omap2: pm33xx: Disable VT switch
+
+* Added a new config option TI_PM_DISABLE_VT_SWITCH which
+  disables the VT console switch which normally occurs during
+  suspend.  This console switch can cause a hange when performed
+  with applications like Matrix running.  The VT switch is
+  considered unnecessary.
+* Modified the am335x_evm_defconfig file to default the
+  TI_PM_DISABLE_VT_SWITCH to "y".
+* Based on a patch for the linux-omap3 kernel by Greg Guyotte
+
+Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
+---
+ arch/arm/configs/am335x_evm_defconfig |    1 +
+ arch/arm/mach-omap2/Kconfig           |    9 +++++++++
+ arch/arm/mach-omap2/pm33xx.c          |    5 +++++
+ 3 files changed, 15 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/configs/am335x_evm_defconfig b/arch/arm/configs/am335x_evm_defconfig
+index 53d1b6a..7a5e7ad 100644
+--- a/arch/arm/configs/am335x_evm_defconfig
++++ b/arch/arm/configs/am335x_evm_defconfig
+@@ -325,6 +325,7 @@ CONFIG_MACH_TI8148EVM=y
+ CONFIG_MACH_AM335XEVM=y
+ CONFIG_MACH_AM335XIAEVM=y
+ # CONFIG_OMAP3_EMU is not set
++CONFIG_TI_PM_DISABLE_VT_SWITCH=y
+ # CONFIG_OMAP3_SDRC_AC_TIMING is not set
+ CONFIG_OMAP3_EDMA=y
+
+diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
+index e44e942..f13e9dc 100644
+--- a/arch/arm/mach-omap2/Kconfig
++++ b/arch/arm/mach-omap2/Kconfig
+@@ -372,6 +372,15 @@ config OMAP3_EMU
+	help
+	  Say Y here to enable debugging hardware of omap3
+
++config TI_PM_DISABLE_VT_SWITCH
++	bool "TI Disable PM Console Switch"
++	depends on ARCH_OMAP3
++	default y
++	help
++	  This option disables the default PM VT switch behavior for TI devices.
++	  Some platforms hang during suspend due to a failed attempt to
++	  perform the VT switch.  The VT switch is unnecessary on many platforms.
++
+ config OMAP3_SDRC_AC_TIMING
+	bool "Enable SDRC AC timing register changes"
+	depends on ARCH_OMAP3
+diff --git a/arch/arm/mach-omap2/pm33xx.c b/arch/arm/mach-omap2/pm33xx.c
+index 70bcb42..019ae46 100644
+--- a/arch/arm/mach-omap2/pm33xx.c
++++ b/arch/arm/mach-omap2/pm33xx.c
+@@ -502,6 +502,11 @@ static int __init am33xx_pm_init(void)
+	pr_info("Power Management for AM33XX family\n");
+
+ #ifdef CONFIG_SUSPEND
++
++#ifdef CONFIG_TI_PM_DISABLE_VT_SWITCH
++	pm_set_vt_switch(0);
++#endif
++
+ /* Read SDRAM_CONFIG register to determine Memory Type */
+	base = am33xx_get_ram_base();
+	reg = readl(base + EMIF4_0_SDRAM_CONFIG);
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0001-musb-update-PIO-mode-help-information-in-Kconfig.patch

@@ -0,0 +1,45 @@
+From 214f6b2fee005dba5e01b3b434f184adf4386a25 Mon Sep 17 00:00:00 2001
+From: Chase Maupin <Chase.Maupin@ti.com>
+Date: Thu, 2 Feb 2012 15:52:10 -0600
+Subject: [PATCH] musb: update PIO mode help information in Kconfig
+
+* Updated the Kconfig help information for the PIO mode for MUSB
+  to make it more clear to the customer when to select this option
+  and which devices currently have issues with this option.
+* This is in accordance with the findings for CPPI4.1 DMA usage
+  for MUSB
+
+Upstream-Status: Submitted
+    * Submitted to the PSP team using the lpr list
+
+Signed-off-by: Matt Porter <mporter@ti.com>
+Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
+---
+ drivers/usb/musb/Kconfig |   12 ++++++++----
+ 1 files changed, 8 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
+index a06335f..3576afe 100644
+--- a/drivers/usb/musb/Kconfig
++++ b/drivers/usb/musb/Kconfig
+@@ -159,10 +159,14 @@ config MUSB_PIO_ONLY
+	  All data is copied between memory and FIFO by the CPU.
+	  DMA controllers are ignored.
+
+-	  Do not choose this unless DMA support for your SOC or board
+-	  is unavailable (or unstable).  When DMA is enabled at compile time,
+-	  you can still disable it at run time using the "use_dma=n" module
+-	  parameter.
++	  Select 'y' here if DMA support for your SOC or board
++	  is unavailable (or unstable). On CPPI 4.1 DMA based
++	  systems (AM335x, AM35x, and AM180x) DMA support is
++	  considered unstable and this option should be enabled
++	  in production systems so that DMA is disabled, unless DMA
++	  has been validated for all use cases. When DMA is enabled at
++	  compile time, you can still disable it at run time using the
++	  "use_dma=n" module parameter.
+
+ endchoice
+
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0001-omap-serial-add-delay-before-suspending.patch

@@ -0,0 +1,42 @@
+From 0f62d1f4d4543a315815b8eb15ea9cdad25d16c8 Mon Sep 17 00:00:00 2001
+From: Eyal Reizer <eyalr@ti.com>
+Date: Wed, 27 Jun 2012 16:08:53 +0300
+Subject: [PATCH] omap-serial: add delay before suspending
+
+In case suspending during Bluetooth traffic, after resume the bluetooth is
+stuck.
+It was identified that suspend is happening before the UART buffer was
+fully drained which caused this hang after resume.
+The folliwng delay is a temporary workaround until the issue is resolved
+properly.
+
+Upstream Status: Pending
+
+Signed-off-by: Eyal Reizer <eyalr@ti.com>
+---
+ drivers/tty/serial/omap-serial.c |   10 ++++++++++
+ 1 files changed, 10 insertions(+), 0 deletions(-)
+
+diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
+index ca24ab3..108ea2b 100755
+--- a/drivers/tty/serial/omap-serial.c
++++ b/drivers/tty/serial/omap-serial.c
+@@ -1166,6 +1166,16 @@ static int serial_omap_suspend(struct device *dev)
+	struct uart_omap_port *up = dev_get_drvdata(dev);
+
+	if (up) {
++                /*
++                  In case suspending during Bluetooth traffic, after resume
++                  the bluetooth is stuck.
++                  It was identified that suspend is happening before the
++                  UART buffer was fully drained which caused this hang after
++                  resume. The following delay is a temporary workaround until
++                  the issue is resolved properly.
++                */
++                msleep(10);
++
+		uart_suspend_port(&serial_omap_reg, &up->port);
+		flush_work_sync(&up->qos_work);
+	}
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0002-am335x-Add-suspend-resume-routines-to-crypto-driver.patch

@@ -0,0 +1,147 @@
+From 0fb328ec0a5ba8a1440336c8dc7a029cfffa4529 Mon Sep 17 00:00:00 2001
+From: Greg Turner <gregturner@ti.com>
+Date: Thu, 19 Jul 2012 15:27:59 -0500
+Subject: [PATCH 2/2] [am335x]: Add suspend resume routines to crypto driver
+
+* Add suspend resume routines to AES crypto driver
+* Add suspend resume routines to SHA crypto driver
+* Cleaned up some build warnings
+---
+ drivers/crypto/omap4-aes.c  |   31 ++++++++++++++++++++++++++++---
+ drivers/crypto/omap4-sham.c |   32 +++++++++++++++++++++++++++-----
+ 2 files changed, 55 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/crypto/omap4-aes.c b/drivers/crypto/omap4-aes.c
+index 76f988a..c7d08df 100755
+--- a/drivers/crypto/omap4-aes.c
++++ b/drivers/crypto/omap4-aes.c
+@@ -878,9 +878,9 @@ err_io:
+	udelay(1);
+
+
+-err_res:
+-	kfree(dd);
+-	dd = NULL;
++//err_res:
++	//kfree(dd);
++	//dd = NULL;
+ err_data:
+	dev_err(dev, "initialization failed.\n");
+	return err;
+@@ -916,12 +916,35 @@ static int omap4_aes_remove(struct platform_device *pdev)
+	return 0;
+ }
+
++static int omap4_aes_suspend(struct device *dev)
++{
++	pr_debug("#### Crypto: Suspend call ####\n");
++
++	return 0;
++}
++
++
++static int omap4_aes_resume(struct device *dev)
++{
++	pr_debug("#### Crypto: resume call ####\n");
++
++	return 0;
++}
++
++static struct dev_pm_ops omap4_aes_dev_pm_ops = {
++	.suspend	= omap4_aes_suspend,
++	.resume		= omap4_aes_resume,
++	.runtime_suspend = omap4_aes_suspend,
++	.runtime_resume = omap4_aes_resume,
++};
++
+ static struct platform_driver omap4_aes_driver = {
+	.probe	= omap4_aes_probe,
+	.remove	= omap4_aes_remove,
+	.driver	= {
+		.name	= "omap4-aes",
+		.owner	= THIS_MODULE,
++		.pm		= &omap4_aes_dev_pm_ops
+	},
+ };
+
+@@ -944,6 +967,8 @@ static void __exit omap4_aes_mod_exit(void)
+	platform_driver_unregister(&omap4_aes_driver);
+ }
+
++
++
+ module_init(omap4_aes_mod_init);
+ module_exit(omap4_aes_mod_exit);
+
+diff --git a/drivers/crypto/omap4-sham.c b/drivers/crypto/omap4-sham.c
+index 21f1b48..2fb71b9 100755
+--- a/drivers/crypto/omap4-sham.c
++++ b/drivers/crypto/omap4-sham.c
+@@ -239,7 +239,7 @@ static void omap4_sham_copy_ready_hash(struct ahash_request *req)
+	struct omap4_sham_reqctx *ctx = ahash_request_ctx(req);
+	u32 *in = (u32 *)ctx->digest;
+	u32 *hash = (u32 *)req->result;
+-	int i, d;
++	int i, d = 0;
+
+	if (!hash)
+		return;
+@@ -1224,8 +1224,6 @@ static void omap4_sham_dma_callback(unsigned int lch, u16 ch_status, void *data)
+
+ static int omap4_sham_dma_init(struct omap4_sham_dev *dd)
+ {
+-	int err;
+-
+	dd->dma_lch = -1;
+
+	dd->dma_lch = edma_alloc_channel(dd->dma, omap4_sham_dma_callback, dd, EVENTQ_2);
+@@ -1349,8 +1347,9 @@ io_err:
+	pm_runtime_disable(dev);
+	udelay(1);
+
+-clk_err:
+-	omap4_sham_dma_cleanup(dd);
++//clk_err:
++//	omap4_sham_dma_cleanup(dd);
++
+ dma_err:
+	if (dd->irq >= 0)
+		free_irq(dd->irq, dd);
+@@ -1392,12 +1391,35 @@ static int __devexit omap4_sham_remove(struct platform_device *pdev)
+	return 0;
+ }
+
++static int omap4_sham_suspend(struct device *dev)
++{
++	pr_debug("#### Crypto: Suspend call ####\n");
++
++	return 0;
++}
++
++
++static int omap4_sham_resume(struct device *dev)
++{
++	pr_debug("#### Crypto: resume call ####\n");
++
++	return 0;
++}
++
++static struct dev_pm_ops omap4_sham_dev_pm_ops = {
++	.suspend	= omap4_sham_suspend,
++	.resume		= omap4_sham_resume,
++	.runtime_suspend = omap4_sham_suspend,
++	.runtime_resume = omap4_sham_resume,
++};
++
+ static struct platform_driver omap4_sham_driver = {
+	.probe	= omap4_sham_probe,
+	.remove	= omap4_sham_remove,
+	.driver	= {
+		.name	= "omap4-sham",
+		.owner	= THIS_MODULE,
++		.pm		= &omap4_sham_dev_pm_ops
+	},
+ };
+
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0002-am33x-Add-crypto-device-and-resource-structures.patch

@@ -0,0 +1,111 @@
+From 8c0f7553e75774849463f90b0135874754650386 Mon Sep 17 00:00:00 2001
+From: Greg Turner <gregturner@ti.com>
+Date: Thu, 17 May 2012 14:45:05 -0500
+Subject: [PATCH 2/8] am33x: Add crypto device and resource structures
+
+* Add platform device and resource structures to devices.c
+* Structures are for the AES and SHA/MD5 crypto modules
+* Used in the OMAP4 crypto driver
+
+Signed-off-by: Greg Turner <gregturner@ti.com>
+---
+ arch/arm/mach-omap2/devices.c |   67 +++++++++++++++++++++++++++++++++++++++++
+ 1 files changed, 67 insertions(+), 0 deletions(-)
+ mode change 100644 => 100755 arch/arm/mach-omap2/devices.c
+
+diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
+old mode 100644
+new mode 100755
+index 9e029da..5c6e3e2
+--- a/arch/arm/mach-omap2/devices.c
++++ b/arch/arm/mach-omap2/devices.c
+@@ -47,6 +47,7 @@
+ #include <plat/omap_hwmod.h>
+ #include <plat/omap_device.h>
+ #include <plat/omap4-keypad.h>
++#include <plat/am33xx.h>
+ #include <plat/config_pwm.h>
+ #include <plat/cpu.h>
+ #include <plat/gpmc.h>
+@@ -702,6 +703,41 @@ static void omap_init_sham(void)
+	}
+	platform_device_register(&sham_device);
+ }
++
++#elif defined(CONFIG_CRYPTO_DEV_OMAP4_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP4_SHAM_MODULE)
++
++static struct resource omap4_sham_resources[] = {
++	{
++		.start	= AM33XX_SHA1MD5_P_BASE,
++		.end	= AM33XX_SHA1MD5_P_BASE + 0x120,
++		.flags	= IORESOURCE_MEM,
++	},
++	{
++		.start	= AM33XX_IRQ_SHAEIP57t0_P,
++		.flags	= IORESOURCE_IRQ,
++	},
++	{
++		.start	= AM33XX_DMA_SHAEIP57T0_DIN,
++		.flags	= IORESOURCE_DMA,
++	}
++};
++
++static int omap4_sham_resources_sz = ARRAY_SIZE(omap4_sham_resources);
++
++
++static struct platform_device sham_device = {
++	.name		= "omap4-sham",
++	.id		= -1,
++};
++
++static void omap_init_sham(void)
++{
++	sham_device.resource = omap4_sham_resources;
++	sham_device.num_resources = omap4_sham_resources_sz;
++
++	platform_device_register(&sham_device);
++}
++
+ #else
+ static inline void omap_init_sham(void) { }
+ #endif
+@@ -772,6 +808,37 @@ static void omap_init_aes(void)
+	platform_device_register(&aes_device);
+ }
+
++#elif defined(CONFIG_CRYPTO_DEV_OMAP4_AES) || defined(CONFIG_CRYPTO_DEV_OMAP4_AES_MODULE)
++
++static struct resource omap4_aes_resources[] = {
++	{
++		.start	= AM33XX_AES0_P_BASE,
++		.end	= AM33XX_AES0_P_BASE + 0x4C,
++		.flags	= IORESOURCE_MEM,
++	},
++	{
++		.start	= AM33XX_DMA_AESEIP36T0_DOUT,
++		.flags	= IORESOURCE_DMA,
++	},
++	{
++		.start	= AM33XX_DMA_AESEIP36T0_DIN,
++		.flags	= IORESOURCE_DMA,
++	}
++};
++static int omap4_aes_resources_sz = ARRAY_SIZE(omap4_aes_resources);
++
++static struct platform_device aes_device = {
++	.name		= "omap4-aes",
++	.id		= -1,
++};
++
++static void omap_init_aes(void)
++{
++	aes_device.resource = omap4_aes_resources;
++	aes_device.num_resources = omap4_aes_resources_sz;
++	platform_device_register(&aes_device);
++}
++
+ #else
+ static inline void omap_init_aes(void) { }
+ #endif
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0002-am33xx-Enable-CONFIG_AM33XX_SMARTREFLEX.patch

@@ -0,0 +1,26 @@
+From e1b7a67fc82991a633f0ed615d69157c98c1c35d Mon Sep 17 00:00:00 2001
+From: Greg Guyotte <gguyotte@ti.com>
+Date: Thu, 7 Jun 2012 18:15:21 -0500
+Subject: [PATCH 2/2] am33xx: Enable CONFIG_AM33XX_SMARTREFLEX
+
+Simply enables the SmartReflex driver in the defconfig file.
+
+Signed-off-by: Greg Guyotte <gguyotte@ti.com>
+---
+ arch/arm/configs/am335x_evm_defconfig |    1 +
+ 1 files changed, 1 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/configs/am335x_evm_defconfig b/arch/arm/configs/am335x_evm_defconfig
+index de1eaad..ce5d1d6 100644
+--- a/arch/arm/configs/am335x_evm_defconfig
++++ b/arch/arm/configs/am335x_evm_defconfig
+@@ -269,6 +269,7 @@ CONFIG_ARCH_OMAP2PLUS=y
+ # OMAP Feature Selections
+ #
+ # CONFIG_OMAP_SMARTREFLEX is not set
++CONFIG_AM33XX_SMARTREFLEX=y
+ CONFIG_OMAP_RESET_CLOCKS=y
+ CONFIG_OMAP_MUX=y
+ CONFIG_OMAP_MUX_DEBUG=y
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0003-am33x-Add-crypto-device-and-resource-structure-for-T.patch

@@ -0,0 +1,60 @@
+From b7477dd40221a91af286bffa110879075a498943 Mon Sep 17 00:00:00 2001
+From: Greg Turner <gregturner@ti.com>
+Date: Thu, 17 May 2012 14:49:39 -0500
+Subject: [PATCH 3/8] am33x: Add crypto device and resource structure for TRNG
+
+* Add platform device and resource structure to devices.c
+* Structures are for the TRNG crypto module
+* Used in the OMAP4 crypto driver
+
+Signed-off-by: Greg Turner <gregturner@ti.com>
+---
+ arch/arm/plat-omap/devices.c |   23 +++++++++++++++++++++++
+ 1 files changed, 23 insertions(+), 0 deletions(-)
+ mode change 100644 => 100755 arch/arm/plat-omap/devices.c
+
+diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
+old mode 100644
+new mode 100755
+index 1971932..52720b4
+--- a/arch/arm/plat-omap/devices.c
++++ b/arch/arm/plat-omap/devices.c
+@@ -26,6 +26,7 @@
+ #include <plat/mmc.h>
+ #include <plat/menelaus.h>
+ #include <plat/omap44xx.h>
++#include <plat/am33xx.h>
+
+ #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
+	defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
+@@ -104,6 +105,28 @@ static void omap_init_rng(void)
+ {
+	(void) platform_device_register(&omap_rng_device);
+ }
++#elif defined(CONFIG_HW_RANDOM_OMAP4) || defined(CONFIG_HW_RANDOM_OMAP4_MODULE)
++
++static struct resource rng_resources[] = {
++	{
++		.start		= AM33XX_RNG_BASE,
++		.end		= AM33XX_RNG_BASE + 0x1FFC,
++		.flags		= IORESOURCE_MEM,
++	},
++};
++
++static struct platform_device omap4_rng_device = {
++	.name		= "omap4_rng",
++	.id		= -1,
++	.num_resources	= ARRAY_SIZE(rng_resources),
++	.resource	= rng_resources,
++};
++
++static void omap_init_rng(void)
++{
++	(void) platform_device_register(&omap4_rng_device);
++}
++
+ #else
+ static inline void omap_init_rng(void) {}
+ #endif
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0004-am33x-Add-crypto-drivers-to-Kconfig-and-Makefiles.patch

@@ -0,0 +1,124 @@
+From e49e6dcff5665cb2f132d9654a060fa43a382810 Mon Sep 17 00:00:00 2001
+From: Greg Turner <gregturner@ti.com>
+Date: Thu, 17 May 2012 14:53:25 -0500
+Subject: [PATCH 4/8] am33x: Add crypto drivers to Kconfig and Makefiles
+
+* Add OMAP4 TRNG driver to hw_random Kconfig and Makefile
+* Add OMAP4 AES and SHA/MD5 driver to crypto Kconfig and Makefile
+* Needed so that drivers can be selected during kernel config
+
+Signed-off-by: Greg Turner <gregturner@ti.com>
+---
+ drivers/char/hw_random/Kconfig  |   13 +++++++++++++
+ drivers/char/hw_random/Makefile |    1 +
+ drivers/crypto/Kconfig          |   22 ++++++++++++++++++++--
+ drivers/crypto/Makefile         |    2 ++
+ 4 files changed, 36 insertions(+), 2 deletions(-)
+ mode change 100644 => 100755 drivers/char/hw_random/Kconfig
+ mode change 100644 => 100755 drivers/char/hw_random/Makefile
+ mode change 100644 => 100755 drivers/crypto/Kconfig
+ mode change 100644 => 100755 drivers/crypto/Makefile
+
+diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
+old mode 100644
+new mode 100755
+index 0689bf6..207e3e7
+--- a/drivers/char/hw_random/Kconfig
++++ b/drivers/char/hw_random/Kconfig
+@@ -139,6 +139,19 @@ config HW_RANDOM_OMAP
+
+	  If unsure, say Y.
+
++config HW_RANDOM_OMAP4
++	tristate "OMAP4 Random Number Generator support"
++	depends on HW_RANDOM && SOC_OMAPAM33XX
++	default HW_RANDOM
++	---help---
++	  This driver provides kernel-side support for the Random Number
++	  Generator hardware found on OMAP4 derived processors.
++
++	  To compile this driver as a module, choose M here: the
++	  module will be called omap4-rng.
++
++	  If unsure, say Y.
++
+ config HW_RANDOM_OCTEON
+	tristate "Octeon Random Number Generator support"
+	depends on HW_RANDOM && CPU_CAVIUM_OCTEON
+diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
+old mode 100644
+new mode 100755
+index b2ff526..fecced0
+--- a/drivers/char/hw_random/Makefile
++++ b/drivers/char/hw_random/Makefile
+@@ -14,6 +14,7 @@ n2-rng-y := n2-drv.o n2-asm.o
+ obj-$(CONFIG_HW_RANDOM_VIA) += via-rng.o
+ obj-$(CONFIG_HW_RANDOM_IXP4XX) += ixp4xx-rng.o
+ obj-$(CONFIG_HW_RANDOM_OMAP) += omap-rng.o
++obj-$(CONFIG_HW_RANDOM_OMAP4) += omap4-rng.o
+ obj-$(CONFIG_HW_RANDOM_PASEMI) += pasemi-rng.o
+ obj-$(CONFIG_HW_RANDOM_VIRTIO) += virtio-rng.o
+ obj-$(CONFIG_HW_RANDOM_TX4939) += tx4939-rng.o
+diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
+old mode 100644
+new mode 100755
+index 6d16b4b..6c1331a
+--- a/drivers/crypto/Kconfig
++++ b/drivers/crypto/Kconfig
+@@ -250,7 +250,7 @@ config CRYPTO_DEV_PPC4XX
+
+ config CRYPTO_DEV_OMAP_SHAM
+	tristate "Support for OMAP SHA1/MD5 hw accelerator"
+-	depends on ARCH_OMAP2 || ARCH_OMAP3
++	depends on (ARCH_OMAP2) || (ARCH_OMAP3) && (!SOC_OMAPAM33XX)
+	select CRYPTO_SHA1
+	select CRYPTO_MD5
+	help
+@@ -259,12 +259,30 @@ config CRYPTO_DEV_OMAP_SHAM
+
+ config CRYPTO_DEV_OMAP_AES
+	tristate "Support for OMAP AES hw engine"
+-	depends on ARCH_OMAP2 || ARCH_OMAP3
++	depends on (ARCH_OMAP2) || (ARCH_OMAP3) && (!SOC_OMAPAM33XX)
+	select CRYPTO_AES
+	help
+	  OMAP processors have AES module accelerator. Select this if you
+	  want to use the OMAP module for AES algorithms.
+
++config CRYPTO_DEV_OMAP4_AES
++	tristate "Support for OMAP4 AES hw engine"
++	depends on SOC_OMAPAM33XX
++	select CRYPTO_AES
++	help
++	  OMAP4 -based processors have AES module accelerators. Select this if you
++	  want to use the OMAP4 module for AES algorithms.
++
++config CRYPTO_DEV_OMAP4_SHAM
++	tristate "Support for OMAP4 SHA/MD5 hw engine"
++	depends on SOC_OMAPAM33XX
++	select CRYPTO_SHA1
++	select CRYPTO_SHA256
++	select CRYPTO_MD5
++	help
++	  OMAP4 -based processors have SHA/MD5 module accelerators. Select this if you
++	  want to use the OMAP4 module for SHA/MD5 algorithms.
++
+ config CRYPTO_DEV_PICOXCELL
+	tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
+	depends on ARCH_PICOXCELL && HAVE_CLK
+diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
+old mode 100644
+new mode 100755
+index 53ea501..5b420a5
+--- a/drivers/crypto/Makefile
++++ b/drivers/crypto/Makefile
+@@ -11,5 +11,7 @@ obj-$(CONFIG_CRYPTO_DEV_IXP4XX) += ixp4xx_crypto.o
+ obj-$(CONFIG_CRYPTO_DEV_PPC4XX) += amcc/
+ obj-$(CONFIG_CRYPTO_DEV_OMAP_SHAM) += omap-sham.o
+ obj-$(CONFIG_CRYPTO_DEV_OMAP_AES) += omap-aes.o
++obj-$(CONFIG_CRYPTO_DEV_OMAP4_AES) += omap4-aes.o
++obj-$(CONFIG_CRYPTO_DEV_OMAP4_SHAM) += omap4-sham.o
+ obj-$(CONFIG_CRYPTO_DEV_PICOXCELL) += picoxcell_crypto.o
+ obj-$(CONFIG_CRYPTO_DEV_S5P) += s5p-sss.o
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0005-am33x-Create-header-file-for-OMAP4-crypto-modules.patch

@@ -0,0 +1,213 @@
+From 2dc9dec7510746b3c3f5420f4f3ab8395cc7b012 Mon Sep 17 00:00:00 2001
+From: Greg Turner <gregturner@ti.com>
+Date: Thu, 17 May 2012 14:59:38 -0500
+Subject: [PATCH 5/8] am33x: Create header file for OMAP4 crypto modules
+
+* This header file defines addresses and macros used to access crypto modules on OMAP4 derivative SOC's like AM335x.
+
+Signed-off-by: Greg Turner <gregturner@ti.com>
+---
+ drivers/crypto/omap4.h |  192 ++++++++++++++++++++++++++++++++++++++++++++++++
+ 1 files changed, 192 insertions(+), 0 deletions(-)
+ create mode 100644 drivers/crypto/omap4.h
+
+diff --git a/drivers/crypto/omap4.h b/drivers/crypto/omap4.h
+new file mode 100644
+index 0000000..d9d6315
+--- /dev/null
++++ b/drivers/crypto/omap4.h
+@@ -0,0 +1,192 @@
++/*
++ * drivers/crypto/omap4.h
++ *
++ * Copyright © 2011 Texas Instruments Incorporated
++ * Author: Greg Turner
++ *
++ * Adapted from Netra/Centaurus crypto driver
++ * Copyright © 2011 Texas Instruments Incorporated
++ * Author: Herman Schuurman
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
++ */
++#ifndef __DRIVERS_CRYPTO_AM33X_H
++#define __DRIVERS_CRYPTO_AM33X_H
++
++/* ==================================================================== */
++/** Crypto subsystem module layout
++ */
++/* ==================================================================== */
++
++#define AM33X_AES_CLKCTRL	(AM33XX_PRCM_BASE + 0x00000094)
++#define AM33X_SHA_CLKCTRL	(AM33XX_PRCM_BASE + 0x000000A0)
++
++#define FLD_MASK(start, end)		(((1 << ((start) - (end) + 1)) - 1) << (end))
++#define FLD_VAL(val, start, end)	(((val) << (end)) & FLD_MASK(start, end))
++
++/* ==================================================================== */
++/** AES module layout
++ */
++/* ==================================================================== */
++
++#define	AES_REG_KEY2(x)			(0x1C - ((x ^ 0x01) * 0x04))
++#define	AES_REG_KEY1(x)			(0x3C - ((x ^ 0x01) * 0x04))
++#define	AES_REG_IV(x)			(0x40 + ((x) * 0x04))
++
++#define	AES_REG_CTRL			0x50
++#define	AES_REG_CTRL_CTX_RDY		(1 << 31)
++#define	AES_REG_CTRL_SAVE_CTX_RDY	(1 << 30)
++#define	AES_REG_CTRL_SAVE_CTX		(1 << 29)
++#define	AES_REG_CTRL_CCM_M_MASK		(7 << 22)
++#define	AES_REG_CTRL_CCM_M_SHFT		22
++#define	AES_REG_CTRL_CCM_L_MASK		(7 << 19)
++#define	AES_REG_CTRL_CCM_L_SHFT		19
++#define	AES_REG_CTRL_CCM		(1 << 18)
++#define	AES_REG_CTRL_GCM		(3 << 16)
++#define	AES_REG_CTRL_CBCMAC		(1 << 15)
++#define	AES_REG_CTRL_F9			(1 << 14)
++#define	AES_REG_CTRL_F8			(1 << 13)
++#define	AES_REG_CTRL_XTS_MASK		(3 << 11)
++#define	 AES_REG_CTRL_XTS_01		(1 << 11)
++#define	 AES_REG_CTRL_XTS_10		(2 << 11)
++#define	 AES_REG_CTRL_XTS_11		(3 << 11)
++#define	AES_REG_CTRL_CFB		(1 << 10)
++#define	AES_REG_CTRL_ICM		(1 << 9)
++#define	AES_REG_CTRL_CTR_WIDTH_MASK	(3 << 7)
++#define	 AES_REG_CTRL_CTR_WIDTH_32	(0 << 7)
++#define	 AES_REG_CTRL_CTR_WIDTH_64	(1 << 7)
++#define	 AES_REG_CTRL_CTR_WIDTH_96	(2 << 7)
++#define	 AES_REG_CTRL_CTR_WIDTH_128	(3 << 7)
++#define	AES_REG_CTRL_CTR		(1 << 6)
++#define	AES_REG_CTRL_CBC		(1 << 5)
++#define	AES_REG_CTRL_KEY_SIZE_MASK	(3 << 3)
++#define	 AES_REG_CTRL_KEY_SIZE_128	(1 << 3)
++#define	 AES_REG_CTRL_KEY_SIZE_192	(2 << 3)
++#define	 AES_REG_CTRL_KEY_SIZE_256	(3 << 3)
++#define	AES_REG_CTRL_DIRECTION		(1 << 2)
++#define	AES_REG_CTRL_INPUT_RDY		(1 << 1)
++#define	AES_REG_CTRL_OUTPUT_RDY		(1 << 0)
++
++#define	AES_REG_LENGTH_N(x)		(0x54 + ((x) * 0x04))
++#define	AES_REG_AUTH_LENGTH		0x5C
++#define	AES_REG_DATA			0x60
++#define	AES_REG_DATA_N(x)		(0x60 + ((x) * 0x04))
++#define	AES_REG_TAG			0x70
++#define	AES_REG_TAG_N(x)		(0x70 + ((x) * 0x04))
++
++#define AES_REG_REV			0x80
++#define	 AES_REG_REV_SCHEME_MASK	(3 << 30)
++#define	 AES_REG_REV_FUNC_MASK		(0xFFF << 16)
++#define	 AES_REG_REV_R_RTL_MASK		(0x1F << 11)
++#define	 AES_REG_REV_X_MAJOR_MASK	(7 << 8)
++#define	 AES_REG_REV_CUSTOM_MASK	(3 << 6)
++#define	 AES_REG_REV_Y_MINOR_MASK	(0x3F << 0)
++
++#define	AES_REG_SYSCFG			0x84
++#define	AES_REG_SYSCFG_K3		(1 << 12)
++#define	AES_REG_SYSCFG_KEY_ENC		(1 << 11)
++#define	AES_REG_SYSCFG_KEK_MODE		(1 << 10)
++#define	AES_REG_SYSCFG_MAP_CTX_OUT	(1 << 9)
++#define	AES_REG_SYSCFG_DREQ_MASK	(15 << 5)
++#define	 AES_REG_SYSCFG_DREQ_CTX_OUT_EN	(1 << 8)
++#define	 AES_REG_SYSCFG_DREQ_CTX_IN_EN	(1 << 7)
++#define	 AES_REG_SYSCFG_DREQ_DATA_OUT_EN (1 << 6)
++#define	 AES_REG_SYSCFG_DREQ_DATA_IN_EN	(1 << 5)
++#define	AES_REG_SYSCFG_DIRECTBUSEN	(1 << 4)
++#define	AES_REG_SYSCFG_SIDLE_MASK	(3 << 2)
++#define	 AES_REG_SYSCFG_SIDLE_FORCEIDLE	(0 << 2)
++#define	 AES_REG_SYSCFG_SIDLE_NOIDLE	(1 << 2)
++#define	 AES_REG_SYSCFG_SIDLE_SMARTIDLE	(2 << 2)
++#define	AES_REG_SYSCFG_SOFTRESET	(1 << 1)
++#define	AES_REG_SYSCFG_AUTOIDLE		(1 << 0)
++
++#define	AES_REG_SYSSTATUS		0x88
++#define	AES_REG_SYSSTATUS_RESETDONE	(1 << 0)
++
++#define	AES_REG_IRQSTATUS		0x8C
++#define	AES_REG_IRQSTATUS_CTX_OUT	(1 << 3)
++#define	AES_REG_IRQSTATUS_DATA_OUT	(1 << 2)
++#define	AES_REG_IRQSTATUS_DATA_IN	(1 << 1)
++#define	AES_REG_IRQSTATUS_CTX_IN	(1 << 0)
++
++#define	AES_REG_IRQENA			0x90
++#define	AES_REG_IRQENA_CTX_OUT		(1 << 3)
++#define	AES_REG_IRQENA_DATA_OUT		(1 << 2)
++#define	AES_REG_IRQENA_DATA_IN		(1 << 1)
++#define	AES_REG_IRQENA_CTX_IN		(1 << 0)
++
++/* ==================================================================== */
++/** SHA / MD5 module layout.
++ */
++/* ==================================================================== */
++
++#define	SHA_REG_ODIGEST			0x00
++#define	SHA_REG_ODIGEST_N(x)		(0x00 + ((x) * 0x04))
++#define	SHA_REG_IDIGEST			0x20
++#define	SHA_REG_IDIGEST_N(x)		(0x20 + ((x) * 0x04))
++
++#define SHA_REG_DIGEST_COUNT		0x40
++#define SHA_REG_MODE			0x44
++#define SHA_REG_MODE_HMAC_OUTER_HASH	(1 << 7)
++#define SHA_REG_MODE_HMAC_KEY_PROC	(1 << 5)
++#define SHA_REG_MODE_CLOSE_HASH		(1 << 4)
++#define SHA_REG_MODE_ALGO_CONSTANT	(1 << 3)
++#define SHA_REG_MODE_ALGO_MASK		(3 << 1)
++#define  SHA_REG_MODE_ALGO_MD5_128	(0 << 1)
++#define  SHA_REG_MODE_ALGO_SHA1_160	(1 << 1)
++#define  SHA_REG_MODE_ALGO_SHA2_224	(2 << 1)
++#define  SHA_REG_MODE_ALGO_SHA2_256	(3 << 1)
++
++#define SHA_REG_LENGTH			0x48
++
++#define	SHA_REG_DATA			0x80
++#define	SHA_REG_DATA_N(x)		(0x80 + ((x) * 0x04))
++
++#define SHA_REG_REV			0x100
++#define	 SHA_REG_REV_SCHEME_MASK	(3 << 30)
++#define	 SHA_REG_REV_FUNC_MASK		(0xFFF << 16)
++#define	 SHA_REG_REV_R_RTL_MASK		(0x1F << 11)
++#define	 SHA_REG_REV_X_MAJOR_MASK	(7 << 8)
++#define	 SHA_REG_REV_CUSTOM_MASK	(3 << 6)
++#define	 SHA_REG_REV_Y_MINOR_MASK	(0x3F << 0)
++
++#define	SHA_REG_SYSCFG			0x110
++#define	SHA_REG_SYSCFG_SADVANCED	(1 << 7)
++#define	SHA_REG_SYSCFG_SCONT_SWT	(1 << 6)
++#define	SHA_REG_SYSCFG_SIDLE_MASK	(3 << 4)
++#define	 SHA_REG_SYSCFG_SIDLE_FORCEIDLE	(0 << 4)
++#define	 SHA_REG_SYSCFG_SIDLE_NOIDLE	(1 << 4)
++#define	 SHA_REG_SYSCFG_SIDLE_SMARTIDLE	(2 << 4)
++#define	SHA_REG_SYSCFG_SDMA_EN		(1 << 3)
++#define	SHA_REG_SYSCFG_SIT_EN		(1 << 2)
++#define	SHA_REG_SYSCFG_SOFTRESET	(1 << 1)
++#define	SHA_REG_SYSCFG_AUTOIDLE		(1 << 0)
++
++#define SHA_REG_SYSSTATUS		0x114
++#define SHA_REG_SYSSTATUS_RESETDONE	(1 << 0)
++
++#define SHA_REG_IRQSTATUS		0x118
++#define SHA_REG_IRQSTATUS_CTX_RDY	(1 << 3)
++#define SHA_REG_IRQSTATUS_PARTHASH_RDY (1 << 2)
++#define SHA_REG_IRQSTATUS_INPUT_RDY	(1 << 1)
++#define SHA_REG_IRQSTATUS_OUTPUT_RDY	(1 << 0)
++
++#define SHA_REG_IRQENA			0x11C
++#define SHA_REG_IRQENA_CTX_RDY		(1 << 3)
++#define SHA_REG_IRQENA_PARTHASH_RDY	(1 << 2)
++#define SHA_REG_IRQENA_INPUT_RDY	(1 << 1)
++#define SHA_REG_IRQENA_OUTPUT_RDY	(1 << 0)
++
++#endif /* __DRIVERS_CRYPTO_AM33X_H */
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0006-am33x-Create-driver-for-TRNG-crypto-module.patch

@@ -0,0 +1,324 @@
+From d56c0ab935577ef32ffdf23a62d2e1cecc391730 Mon Sep 17 00:00:00 2001
+From: Greg Turner <gregturner@ti.com>
+Date: Thu, 17 May 2012 15:11:26 -0500
+Subject: [PATCH 6/8] am33x: Create driver for TRNG crypto module
+
+This is the initial version of the driver for the TRNG crypto module for a GP version of OMAP4 derivative SOC's such as AM335x.
+
+Signed-off-by: Greg Turner <gregturner@ti.com>
+---
+ drivers/char/hw_random/omap4-rng.c |  303 ++++++++++++++++++++++++++++++++++++
+ 1 files changed, 303 insertions(+), 0 deletions(-)
+ create mode 100755 drivers/char/hw_random/omap4-rng.c
+
+diff --git a/drivers/char/hw_random/omap4-rng.c b/drivers/char/hw_random/omap4-rng.c
+new file mode 100755
+index 0000000..523ec63
+--- /dev/null
++++ b/drivers/char/hw_random/omap4-rng.c
+@@ -0,0 +1,303 @@
++/*
++ * drivers/char/hw_random/omap4-rng.c
++ *
++ * Copyright (c) 2012 Texas Instruments
++ * TRNG driver for OMAP4 derivatives (AM33x, etc) -  Herman Schuurman <herman@ti.com>
++ *
++ * derived from omap-rng.c.
++ *
++ * Author: Deepak Saxena <dsaxena@plexity.net>
++ *
++ * Copyright 2005 (c) MontaVista Software, Inc.
++ *
++ * Mostly based on original driver:
++ *
++ * Copyright (C) 2005 Nokia Corporation
++ * Author: Juha Yrjölä <juha.yrjola@nokia.com>
++ *
++ * This file is licensed under  the terms of the GNU General Public
++ * License version 2. This program is licensed "as is" without any
++ * warranty of any kind, whether express or implied.
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/random.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/platform_device.h>
++#include <linux/hw_random.h>
++#include <linux/delay.h>
++
++#include <mach/hardware.h>
++#include <asm/io.h>
++
++/* ==================================================================== */
++/** RNG module layout.
++ */
++/* ==================================================================== */
++#define	RNG_REG_OUTPUT_L		0x00
++#define	RNG_REG_OUTPUT_H		0x04
++
++#define	RNG_REG_STATUS			0x08
++#define	RNG_REG_STATUS_NEED_CLK		(1 << 31)
++#define	RNG_REG_STATUS_SHUTDOWN_OFLO	(1 << 1)
++#define	RNG_REG_STATUS_RDY		(1 << 0)
++
++#define	RNG_REG_IMASK			0x0C
++#define	RNG_REG_IMASK_SHUTDOWN_OFLO	(1 << 1)
++#define	RNG_REG_IMASK_RDY		(1 << 0)
++
++#define	RNG_REG_INTACK			0x10
++#define	RNG_REG_INTACK_SHUTDOWN_OFLO	(1 << 1)
++#define	RNG_REG_INTACK_RDY		(1 << 0)
++
++#define	RNG_REG_CONTROL			0x14
++#define	RNG_REG_CONTROL_STARTUP_MASK	0xFFFF0000
++#define	RNG_REG_CONTROL_ENABLE_TRNG	(1 << 10)
++#define	RNG_REG_CONTROL_NO_LFSR_FB	(1 << 2)
++
++#define	RNG_REG_CONFIG			0x18
++#define	RNG_REG_CONFIG_MAX_REFILL_MASK	0xFFFF0000
++#define	RNG_REG_CONFIG_SAMPLE_DIV	0x00000F00
++#define	RNG_REG_CONFIG_MIN_REFILL_MASK	0x000000FF
++
++#define	RNG_REG_ALARMCNT		0x1C
++#define	RNG_REG_ALARMCNT_SHTDWN_MASK	0x3F000000
++#define	RNG_REG_ALARMCNT_SD_THLD_MASK	0x001F0000
++#define	RNG_REG_ALARMCNT_ALM_THLD_MASK	0x000000FF
++
++#define	RNG_REG_FROENABLE		0x20
++#define	RNG_REG_FRODETUNE		0x24
++#define	RNG_REG_ALARMMASK		0x28
++#define	RNG_REG_ALARMSTOP		0x2C
++#define	RNG_REG_LFSR_L			0x30
++#define	RNG_REG_LFSR_M			0x34
++#define	RNG_REG_LFSR_H			0x38
++#define	RNG_REG_COUNT			0x3C
++#define	RNG_REG_TEST			0x40
++
++#define	RNG_REG_OPTIONS			0x78
++#define	RNG_REG_OPTIONS_NUM_FROS_MASK	0x00000FC0
++
++#define	RNG_REG_EIP_REV			0x7C
++#define	RNG_REG_STATUS_EN		0x1FD8
++#define	RNG_REG_STATUS_EN_SHUTDOWN_OFLO	(1 << 1)
++#define	RNG_REG_STATUS_EN_RDY		(1 << 0)
++
++#define	RNG_REG_REV			0x1FE0
++#define	 RNG_REG_REV_X_MAJOR_MASK	(0x0F << 4)
++#define	 RNG_REG_REV_Y_MINOR_MASK	(0x0F << 0)
++
++#define	RNG_REG_SYSCFG			0x1FE4
++#define	RNG_REG_SYSCFG_SIDLEMODE_MASK	(3 << 3)
++#define	 RNG_REG_SYSCFG_SIDLEMODE_FORCE	(0 << 3)
++#define	 RNG_REG_SYSCFG_SIDLEMODE_NO	(1 << 3)
++#define	 RNG_REG_SYSCFG_SIDLEMODE_SMART	(2 << 3)
++#define	RNG_REG_SYSCFG_AUTOIDLE		(1 << 0)
++
++#define	RNG_REG_STATUS_SET		0x1FEC
++#define	RNG_REG_STATUS_SET_SHUTDOWN_OFLO (1 << 1)
++#define	RNG_REG_STATUS_SET_RDY		(1 << 0)
++
++#define	RNG_REG_SOFT_RESET		0x1FF0
++#define	RNG_REG_SOFTRESET		(1 << 0)
++
++#define	RNG_REG_IRQ_EOI			0x1FF4
++#define	RNG_REG_IRQ_EOI_PULSE_INT_CLEAR	(1 << 0)
++
++#define	RNG_REG_IRQSTATUS		0x1FF8
++#define	RNG_REG_IRQSTATUS_IRQ_EN	(1 << 0)
++
++
++static void __iomem *rng_base;
++static struct clk *rng_fck;
++static struct platform_device *rng_dev;
++
++#define trng_read(reg)						\
++({								\
++	u32 __val;						\
++	__val = __raw_readl(rng_base + RNG_REG_##reg);		\
++})
++
++#define trng_write(val, reg)					\
++({								\
++	__raw_writel((val), rng_base + RNG_REG_##reg);		\
++})
++
++static int omap4_rng_data_read(struct hwrng *rng, void *buf, size_t max, bool wait)
++{
++	int res, i;
++
++	for (i = 0; i < 20; i++) {
++		res = trng_read(STATUS) & RNG_REG_STATUS_RDY;
++		if (res || !wait)
++			break;
++		/* RNG produces data fast enough (2+ MBit/sec, even
++		 * during "rngtest" loads, that these delays don't
++		 * seem to trigger.  We *could* use the RNG IRQ, but
++		 * that'd be higher overhead ... so why bother?
++		 */
++		udelay(10);
++	}
++
++	/* If we have data waiting, collect it... */
++	if (res) {
++		*(u32 *)buf = trng_read(OUTPUT_L);
++		buf += sizeof(u32);
++		*(u32 *)buf = trng_read(OUTPUT_H);
++
++		trng_write(RNG_REG_INTACK_RDY, INTACK);
++
++		res = 2  * sizeof(u32);
++	}
++	return res;
++}
++
++static struct hwrng omap4_rng_ops = {
++	.name		= "omap4",
++	.read		= omap4_rng_data_read,
++};
++
++static int __devinit omap4_rng_probe(struct platform_device *pdev)
++{
++	struct resource *res;
++	int ret;
++	u32 reg;
++
++	/*
++	 * A bit ugly, and it will never actually happen but there can
++	 * be only one RNG and this catches any bork
++	 */
++	if (rng_dev)
++		return -EBUSY;
++
++	rng_fck = clk_get(&pdev->dev, "rng_fck");
++	if (IS_ERR(rng_fck)) {
++		dev_err(&pdev->dev, "Could not get rng_fck\n");
++		ret = PTR_ERR(rng_fck);
++		return ret;
++	} else
++		clk_enable(rng_fck);
++
++	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!res) {
++		ret = -ENOENT;
++		goto err_region;
++	}
++
++	if (!request_mem_region(res->start, resource_size(res), pdev->name)) {
++		ret = -EBUSY;
++		goto err_region;
++	}
++
++	dev_set_drvdata(&pdev->dev, res);
++	rng_base = ioremap(res->start, resource_size(res));
++	if (!rng_base) {
++		ret = -ENOMEM;
++		goto err_ioremap;
++	}
++
++	ret = hwrng_register(&omap4_rng_ops);
++	if (ret)
++		goto err_register;
++
++	reg = trng_read(REV);
++	dev_info(&pdev->dev, "OMAP4 Random Number Generator ver. %u.%02u\n",
++		 ((reg & RNG_REG_REV_X_MAJOR_MASK) >> 4),
++		 (reg & RNG_REG_REV_Y_MINOR_MASK));
++
++	rng_dev = pdev;
++
++	/* start TRNG if not running yet */
++	if (!(trng_read(CONTROL) & RNG_REG_CONTROL_ENABLE_TRNG)) {
++		trng_write(0x00220021, CONFIG);
++		trng_write(0x00210400, CONTROL);
++	}
++
++	return 0;
++
++err_register:
++	iounmap(rng_base);
++	rng_base = NULL;
++err_ioremap:
++	release_mem_region(res->start, resource_size(res));
++err_region:
++	clk_disable(rng_fck);
++	clk_put(rng_fck);
++	return ret;
++}
++
++static int __exit omap4_rng_remove(struct platform_device *pdev)
++{
++	struct resource *res = dev_get_drvdata(&pdev->dev);
++
++	hwrng_unregister(&omap4_rng_ops);
++
++	trng_write(trng_read(CONTROL) & ~RNG_REG_CONTROL_ENABLE_TRNG, CONTROL);
++
++	iounmap(rng_base);
++
++	clk_disable(rng_fck);
++	clk_put(rng_fck);
++	release_mem_region(res->start, resource_size(res));
++	rng_base = NULL;
++
++	return 0;
++}
++
++#ifdef CONFIG_PM
++
++static int omap4_rng_suspend(struct platform_device *pdev, pm_message_t message)
++{
++	trng_write(trng_read(CONTROL) & ~RNG_REG_CONTROL_ENABLE_TRNG, CONTROL);
++
++	return 0;
++}
++
++static int omap4_rng_resume(struct platform_device *pdev)
++{
++	trng_write(trng_read(CONTROL) | RNG_REG_CONTROL_ENABLE_TRNG, CONTROL);
++
++	return 0;
++}
++
++#else
++
++#define	omap4_rng_suspend	NULL
++#define	omap4_rng_resume	NULL
++
++#endif
++
++/* work with hotplug and coldplug */
++MODULE_ALIAS("platform:omap4_rng");
++
++static struct platform_driver omap4_rng_driver = {
++	.driver = {
++		.name		= "omap4_rng",
++		.owner		= THIS_MODULE,
++	},
++	.probe		= omap4_rng_probe,
++	.remove		= __exit_p(omap4_rng_remove),
++	.suspend	= omap4_rng_suspend,
++	.resume		= omap4_rng_resume
++};
++
++static int __init omap4_rng_init(void)
++{
++	if (!cpu_is_am33xx()  || omap_type() != OMAP2_DEVICE_TYPE_GP)
++		return -ENODEV;
++
++	return platform_driver_register(&omap4_rng_driver);
++}
++
++static void __exit omap4_rng_exit(void)
++{
++	platform_driver_unregister(&omap4_rng_driver);
++}
++
++module_init(omap4_rng_init);
++module_exit(omap4_rng_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("AM33X TRNG driver");
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x-3.2.0-psp04.06.00.08/0007-am33x-Create-driver-for-AES-crypto-module.patch

@@ -0,0 +1,971 @@
+From 501def5dd499457a38e6284f9780ba169284e530 Mon Sep 17 00:00:00 2001
+From: Greg Turner <gregturner@ti.com>
+Date: Thu, 17 May 2012 15:17:13 -0500
+Subject: [PATCH 7/8] am33x: Create driver for AES crypto module
+
+This is the initial version of the driver for the AES crypto module for a GP version of OMAP4 derivative SOC's such as AM335x.
+
+Signed-off-by: Greg Turner <gregturner@ti.com>
+---
+ drivers/crypto/omap4-aes.c |  950 ++++++++++++++++++++++++++++++++++++++++++++
+ 1 files changed, 950 insertions(+), 0 deletions(-)
+ create mode 100755 drivers/crypto/omap4-aes.c
+
+diff --git a/drivers/crypto/omap4-aes.c b/drivers/crypto/omap4-aes.c
+new file mode 100755
+index 0000000..f0b3fe2
+--- /dev/null
++++ b/drivers/crypto/omap4-aes.c
+@@ -0,0 +1,950 @@
++/*
++ * Cryptographic API.
++ *
++ * Support for OMAP AES HW acceleration.
++ *
++ * Copyright (c) 2010 Nokia Corporation
++ * Author: Dmitry Kasatkin <dmitry.kasatkin@nokia.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ *
++ */
++/*
++ * Copyright © 2011 Texas Instruments Incorporated
++ * Author: Herman Schuurman
++ * Change: July 2011 - Adapted the omap-aes.c driver to support Netra
++ *	implementation of AES hardware accelerator.
++ */
++/*
++ * Copyright © 2011 Texas Instruments Incorporated
++ * Author: Greg Turner
++ * Change: November 2011 - Adapted for AM33x support HW accelerator.
++ */
++
++//#define	DEBUG
++
++#define pr_fmt(fmt) "%s: " fmt, __func__
++
++#include <linux/err.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/errno.h>
++#include <linux/kernel.h>
++#include <linux/clk.h>
++#include <linux/platform_device.h>
++#include <linux/scatterlist.h>
++#include <linux/dma-mapping.h>
++#include <linux/io.h>
++#include <linux/crypto.h>
++#include <linux/interrupt.h>
++#include <crypto/scatterwalk.h>
++#include <crypto/aes.h>
++
++#include <plat/cpu.h>
++#include <plat/dma.h>
++#include <mach/edma.h>
++#include <mach/hardware.h>
++#include "omap4.h"
++
++#define DEFAULT_TIMEOUT		(5*HZ)
++
++#define FLAGS_MODE_MASK		0x000f
++#define FLAGS_ENCRYPT		BIT(0)
++#define FLAGS_CBC		BIT(1)
++#define	FLAGS_CTR		BIT(2)
++#define FLAGS_GIV		BIT(3)
++
++#define FLAGS_INIT		BIT(4)
++#define FLAGS_FAST		BIT(5)
++#define FLAGS_BUSY		BIT(6)
++
++struct omap4_aes_ctx {
++	struct omap4_aes_dev *dd;
++
++	int		keylen;
++	u32		key[AES_KEYSIZE_256 / sizeof(u32)];
++	unsigned long	flags;
++};
++
++struct omap4_aes_reqctx {
++	unsigned long mode;
++};
++
++#define AM33X_AES_QUEUE_LENGTH	1
++#define AM33X_AES_CACHE_SIZE	0
++
++struct omap4_aes_dev {
++	struct list_head		list;
++	unsigned long			phys_base;
++	void __iomem			*io_base;
++	struct clk			*iclk;
++	struct omap4_aes_ctx		*ctx;
++	struct device			*dev;
++	unsigned long			flags;
++	int				err;
++
++	spinlock_t			lock;
++	struct crypto_queue		queue;
++
++	struct tasklet_struct		done_task;
++	struct tasklet_struct		queue_task;
++
++	struct ablkcipher_request	*req;
++	size_t				total;
++	struct scatterlist		*in_sg;
++	size_t				in_offset;
++	struct scatterlist		*out_sg;
++	size_t				out_offset;
++
++	size_t				buflen;
++	void				*buf_in;
++	size_t				dma_size;
++	int				dma_in;
++	int				dma_lch_in;
++	dma_addr_t			dma_addr_in;
++	void				*buf_out;
++	int				dma_out;
++	int				dma_lch_out;
++	dma_addr_t			dma_addr_out;
++};
++
++/* keep registered devices data here */
++static LIST_HEAD(dev_list);
++static DEFINE_SPINLOCK(list_lock);
++
++static inline u32 omap4_aes_read(struct omap4_aes_dev *dd, u32 offset)
++{
++	return __raw_readl(dd->io_base + offset);
++}
++
++static inline void omap4_aes_write(struct omap4_aes_dev *dd, u32 offset,
++				  u32 value)
++{
++	__raw_writel(value, dd->io_base + offset);
++}
++
++static inline void omap4_aes_write_mask(struct omap4_aes_dev *dd, u32 offset,
++				       u32 value, u32 mask)
++{
++	u32 val;
++
++	val = omap4_aes_read(dd, offset);
++	val &= ~mask;
++	val |= value;
++	omap4_aes_write(dd, offset, val);
++}
++
++static void omap4_aes_write_n(struct omap4_aes_dev *dd, u32 offset,
++			     u32 *value, int count)
++{
++	for (; count--; value++, offset += 4)
++		omap4_aes_write(dd, offset, *value);
++}
++
++static int omap4_aes_hw_init(struct omap4_aes_dev *dd)
++{
++	/*
++	 * clocks are enabled when request starts and disabled when finished.
++	 * It may be long delays between requests.
++	 * Device might go to off mode to save power.
++	 */
++	clk_enable(dd->iclk);
++	omap4_aes_write(dd, AES_REG_SYSCFG, 0);
++
++	if (!(dd->flags & FLAGS_INIT)) {
++		dd->flags |= FLAGS_INIT;
++		dd->err = 0;
++	}
++
++	return 0;
++}
++
++static int omap4_aes_write_ctrl(struct omap4_aes_dev *dd)
++{
++	unsigned int key32;
++	int i, err;
++	u32 val, mask;
++
++	err = omap4_aes_hw_init(dd);
++	if (err)
++		return err;
++
++	pr_debug("Set key\n");
++	key32 = dd->ctx->keylen / sizeof(u32);
++
++	/* set a key */
++	for (i = 0; i < key32; i++) {
++		omap4_aes_write(dd, AES_REG_KEY1(i),
++			       __le32_to_cpu(dd->ctx->key[i]));
++	}
++
++	if ((dd->flags & (FLAGS_CBC | FLAGS_CTR)) && dd->req->info)
++		omap4_aes_write_n(dd, AES_REG_IV(0), dd->req->info, 4);
++
++	val = FLD_VAL(((dd->ctx->keylen >> 3) - 1), 4, 3);
++	if (dd->flags & FLAGS_CBC)
++		val |= AES_REG_CTRL_CBC;
++	else if (dd->flags & FLAGS_CTR)
++		val |= AES_REG_CTRL_CTR | AES_REG_CTRL_CTR_WIDTH_32;
++	if (dd->flags & FLAGS_ENCRYPT)
++		val |= AES_REG_CTRL_DIRECTION;
++
++	mask = AES_REG_CTRL_CBC | AES_REG_CTRL_CTR | AES_REG_CTRL_DIRECTION |
++		AES_REG_CTRL_KEY_SIZE_MASK | AES_REG_CTRL_CTR_WIDTH_MASK;
++
++	omap4_aes_write_mask(dd, AES_REG_CTRL, val, mask);
++
++	return 0;
++}
++
++static struct omap4_aes_dev *omap4_aes_find_dev(struct omap4_aes_ctx *ctx)
++{
++	struct omap4_aes_dev *dd = NULL, *tmp;
++
++	spin_lock_bh(&list_lock);
++	if (!ctx->dd) {
++		list_for_each_entry(tmp, &dev_list, list) {
++			/* FIXME: take fist available aes core */
++			dd = tmp;
++			break;
++		}
++		ctx->dd = dd;
++	} else {
++		/* already found before */
++		dd = ctx->dd;
++	}
++	spin_unlock_bh(&list_lock);
++
++	return dd;
++}
++
++static void omap4_aes_dma_callback(unsigned int lch, u16 ch_status, void *data)
++{
++	struct omap4_aes_dev *dd = data;
++
++	edma_stop(lch);
++
++	if (ch_status != DMA_COMPLETE) {
++		pr_err("omap4-aes DMA error status: 0x%hx\n", ch_status);
++		dd->err = -EIO;
++		dd->flags &= ~FLAGS_INIT; /* request to re-initialize */
++	} else if (lch == dd->dma_lch_in) {
++		return;
++	}
++
++	/* dma_lch_out - completed */
++	tasklet_schedule(&dd->done_task);
++}
++
++static int omap4_aes_dma_init(struct omap4_aes_dev *dd)
++{
++	int err = -ENOMEM;
++
++	dd->dma_lch_out = -1;
++	dd->dma_lch_in = -1;
++
++	dd->buf_in = (void *)__get_free_pages(GFP_KERNEL, AM33X_AES_CACHE_SIZE);
++	dd->buf_out = (void *)__get_free_pages(GFP_KERNEL, AM33X_AES_CACHE_SIZE);
++	dd->buflen = PAGE_SIZE << AM33X_AES_CACHE_SIZE;
++	dd->buflen &= ~(AES_BLOCK_SIZE - 1);
++
++	if (!dd->buf_in || !dd->buf_out) {
++		dev_err(dd->dev, "unable to alloc pages.\n");
++		goto err_alloc;
++	}
++
++	/* MAP here */
++	dd->dma_addr_in = dma_map_single(dd->dev, dd->buf_in, dd->buflen,
++					 DMA_TO_DEVICE);
++	if (dma_mapping_error(dd->dev, dd->dma_addr_in)) {
++		dev_err(dd->dev, "dma %d bytes error\n", dd->buflen);
++		err = -EINVAL;
++		goto err_map_in;
++	}
++
++	dd->dma_addr_out = dma_map_single(dd->dev, dd->buf_out, dd->buflen,
++					  DMA_FROM_DEVICE);
++	if (dma_mapping_error(dd->dev, dd->dma_addr_out)) {
++		dev_err(dd->dev, "dma %d bytes error\n", dd->buflen);
++		err = -EINVAL;
++		goto err_map_out;
++	}
++
++	dd->dma_lch_in = edma_alloc_channel(dd->dma_in, omap4_aes_dma_callback,
++					    dd, EVENTQ_DEFAULT);
++
++	if (dd->dma_lch_in < 0) {
++		dev_err(dd->dev, "Unable to request DMA channel\n");
++		goto err_dma_in;
++	}
++
++	dd->dma_lch_out = edma_alloc_channel(dd->dma_out, omap4_aes_dma_callback, dd, EVENTQ_2);
++
++	if (dd->dma_lch_out < 0) {
++		dev_err(dd->dev, "Unable to request DMA channel\n");
++		goto err_dma_out;
++	}
++
++	return 0;
++
++err_dma_out:
++	edma_free_channel(dd->dma_lch_in);
++err_dma_in:
++	dma_unmap_single(dd->dev, dd->dma_addr_out, dd->buflen,
++			 DMA_FROM_DEVICE);
++err_map_out:
++	dma_unmap_single(dd->dev, dd->dma_addr_in, dd->buflen, DMA_TO_DEVICE);
++err_map_in:
++	free_pages((unsigned long)dd->buf_out, AM33X_AES_CACHE_SIZE);
++	free_pages((unsigned long)dd->buf_in, AM33X_AES_CACHE_SIZE);
++err_alloc:
++	if (err)
++		pr_err("error: %d\n", err);
++	return err;
++}
++
++static void omap4_aes_dma_cleanup(struct omap4_aes_dev *dd)
++{
++	edma_free_channel(dd->dma_lch_out);
++	edma_free_channel(dd->dma_lch_in);
++	dma_unmap_single(dd->dev, dd->dma_addr_out, dd->buflen,
++			 DMA_FROM_DEVICE);
++	dma_unmap_single(dd->dev, dd->dma_addr_in, dd->buflen, DMA_TO_DEVICE);
++	free_pages((unsigned long)dd->buf_out, AM33X_AES_CACHE_SIZE);
++	free_pages((unsigned long)dd->buf_in, AM33X_AES_CACHE_SIZE);
++}
++
++static void sg_copy_buf(void *buf, struct scatterlist *sg,
++			unsigned int start, unsigned int nbytes, int out)
++{
++	struct scatter_walk walk;
++
++	if (!nbytes)
++		return;
++
++	scatterwalk_start(&walk, sg);
++	scatterwalk_advance(&walk, start);
++	scatterwalk_copychunks(buf, &walk, nbytes, out);
++	scatterwalk_done(&walk, out, 0);
++}
++
++static int sg_copy(struct scatterlist **sg, size_t *offset, void *buf,
++		   size_t buflen, size_t total, int out)
++{
++	unsigned int count, off = 0;
++
++	while (buflen && total) {
++		count = min((*sg)->length - *offset, total);
++		count = min(count, buflen);
++
++		if (!count)
++			return off;
++
++		/*
++		 * buflen and total are AES_BLOCK_SIZE size aligned,
++		 * so count should be also aligned
++		 */
++
++		sg_copy_buf(buf + off, *sg, *offset, count, out);
++
++		off += count;
++		buflen -= count;
++		*offset += count;
++		total -= count;
++
++		if (*offset == (*sg)->length) {
++			*sg = sg_next(*sg);
++			if (*sg)
++				*offset = 0;
++			else
++				total = 0;
++		}
++	}
++
++	return off;
++}
++
++static int omap4_aes_crypt_dma(struct crypto_tfm *tfm, dma_addr_t dma_addr_in,
++			      dma_addr_t dma_addr_out, int length)
++{
++	struct omap4_aes_ctx *ctx = crypto_tfm_ctx(tfm);
++	struct omap4_aes_dev *dd = ctx->dd;
++	int nblocks;
++	struct edmacc_param p_ram;
++
++	pr_debug("len: %d\n", length);
++
++	dd->dma_size = length;
++
++	if (!(dd->flags & FLAGS_FAST))
++		dma_sync_single_for_device(dd->dev, dma_addr_in, length,
++					   DMA_TO_DEVICE);
++
++	nblocks = DIV_ROUND_UP(length, AES_BLOCK_SIZE);
++
++	/* EDMA IN */
++	p_ram.opt	   = TCINTEN |
++		EDMA_TCC(EDMA_CHAN_SLOT(dd->dma_lch_in));
++	p_ram.src	   = dma_addr_in;
++	p_ram.a_b_cnt      = AES_BLOCK_SIZE | nblocks << 16;
++	p_ram.dst          = dd->phys_base + AES_REG_DATA;
++	p_ram.src_dst_bidx = AES_BLOCK_SIZE;
++	p_ram.link_bcntrld = 1 << 16 | 0xFFFF;
++	p_ram.src_dst_cidx = 0;
++	p_ram.ccnt         = 1;
++	edma_write_slot(dd->dma_lch_in, &p_ram);
++
++	/* EDMA OUT */
++	p_ram.opt	   = TCINTEN |
++		EDMA_TCC(EDMA_CHAN_SLOT(dd->dma_lch_out));
++	p_ram.src	   = dd->phys_base + AES_REG_DATA;
++	p_ram.dst          = dma_addr_out;
++	p_ram.src_dst_bidx = AES_BLOCK_SIZE << 16;
++	edma_write_slot(dd->dma_lch_out, &p_ram);
++
++	edma_start(dd->dma_lch_in);
++	edma_start(dd->dma_lch_out);
++
++	/* write data length info out */
++	omap4_aes_write(dd, AES_REG_LENGTH_N(0), length);
++	omap4_aes_write(dd, AES_REG_LENGTH_N(1), 0);
++	/* start DMA or disable idle mode */
++	omap4_aes_write_mask(dd, AES_REG_SYSCFG,
++			   AES_REG_SYSCFG_DREQ_DATA_OUT_EN | AES_REG_SYSCFG_DREQ_DATA_IN_EN,
++			   AES_REG_SYSCFG_DREQ_MASK);
++
++	return 0;
++}
++
++static int omap4_aes_crypt_dma_start(struct omap4_aes_dev *dd)
++{
++	struct crypto_tfm *tfm = crypto_ablkcipher_tfm(
++					crypto_ablkcipher_reqtfm(dd->req));
++	int err, fast = 0, in, out;
++	size_t count;
++	dma_addr_t addr_in, addr_out;
++
++	pr_debug("total: %d\n", dd->total);
++
++	if (sg_is_last(dd->in_sg) && sg_is_last(dd->out_sg)) {
++		/* check for alignment */
++		in = IS_ALIGNED((u32)dd->in_sg->offset, sizeof(u32));
++		out = IS_ALIGNED((u32)dd->out_sg->offset, sizeof(u32));
++
++		fast = in && out;
++	}
++
++	if (fast)  {
++		count = min(dd->total, sg_dma_len(dd->in_sg));
++		count = min(count, sg_dma_len(dd->out_sg));
++
++		if (count != dd->total) {
++			pr_err("request length != buffer length\n");
++			return -EINVAL;
++		}
++
++		pr_debug("fast\n");
++
++		err = dma_map_sg(dd->dev, dd->in_sg, 1, DMA_TO_DEVICE);
++		if (!err) {
++			dev_err(dd->dev, "dma_map_sg() error\n");
++			return -EINVAL;
++		}
++
++		err = dma_map_sg(dd->dev, dd->out_sg, 1, DMA_FROM_DEVICE);
++		if (!err) {
++			dev_err(dd->dev, "dma_map_sg() error\n");
++			dma_unmap_sg(dd->dev, dd->in_sg, 1, DMA_TO_DEVICE);
++			return -EINVAL;
++		}
++
++		addr_in = sg_dma_address(dd->in_sg);
++		addr_out = sg_dma_address(dd->out_sg);
++
++		dd->flags |= FLAGS_FAST;
++
++	} else {
++		/* use cache buffers */
++		count = sg_copy(&dd->in_sg, &dd->in_offset, dd->buf_in,
++				dd->buflen, dd->total, 0);
++
++		addr_in = dd->dma_addr_in;
++		addr_out = dd->dma_addr_out;
++
++		dd->flags &= ~FLAGS_FAST;
++
++	}
++
++	dd->total -= count;
++
++	err = omap4_aes_crypt_dma(tfm, addr_in, addr_out, count);
++	if (err) {
++		dma_unmap_sg(dd->dev, dd->in_sg, 1, DMA_TO_DEVICE);
++		dma_unmap_sg(dd->dev, dd->out_sg, 1, DMA_TO_DEVICE);
++	}
++
++	return err;
++}
++
++static void omap4_aes_finish_req(struct omap4_aes_dev *dd, int err)
++{
++	struct ablkcipher_request *req = dd->req;
++
++	pr_debug("err: %d\n", err);
++
++	clk_disable(dd->iclk);
++	dd->flags &= ~FLAGS_BUSY;
++
++	req->base.complete(&req->base, err);
++}
++
++static int omap4_aes_crypt_dma_stop(struct omap4_aes_dev *dd)
++{
++	int err = 0;
++	size_t count;
++
++	pr_debug("total: %d\n", dd->total);
++
++	omap4_aes_write_mask(dd, AES_REG_SYSCFG, 0, AES_REG_SYSCFG_DREQ_MASK);
++
++	edma_stop(dd->dma_lch_in);
++	edma_clean_channel(dd->dma_lch_in);
++	edma_stop(dd->dma_lch_out);
++	edma_clean_channel(dd->dma_lch_out);
++
++	if (dd->flags & FLAGS_FAST) {
++		dma_unmap_sg(dd->dev, dd->out_sg, 1, DMA_FROM_DEVICE);
++		dma_unmap_sg(dd->dev, dd->in_sg, 1, DMA_TO_DEVICE);
++	} else {
++		dma_sync_single_for_device(dd->dev, dd->dma_addr_out,
++					   dd->dma_size, DMA_FROM_DEVICE);
++
++		/* copy data */
++		count = sg_copy(&dd->out_sg, &dd->out_offset, dd->buf_out,
++				dd->buflen, dd->dma_size, 1);
++		if (count != dd->dma_size) {
++			err = -EINVAL;
++			pr_err("not all data converted: %u\n", count);
++		}
++	}
++
++	return err;
++}
++
++static int omap4_aes_handle_queue(struct omap4_aes_dev *dd,
++				 struct ablkcipher_request *req)
++{
++	struct crypto_async_request *async_req, *backlog;
++	struct omap4_aes_ctx *ctx;
++	struct omap4_aes_reqctx *rctx;
++	unsigned long flags;
++	int err, ret = 0;
++
++	spin_lock_irqsave(&dd->lock, flags);
++	if (req)
++		ret = ablkcipher_enqueue_request(&dd->queue, req);
++
++	if (dd->flags & FLAGS_BUSY) {
++		spin_unlock_irqrestore(&dd->lock, flags);
++		return ret;
++	}
++	backlog = crypto_get_backlog(&dd->queue);
++	async_req = crypto_dequeue_request(&dd->queue);
++	if (async_req)
++		dd->flags |= FLAGS_BUSY;
++	spin_unlock_irqrestore(&dd->lock, flags);
++
++	if (!async_req)
++		return ret;
++
++	if (backlog)
++		backlog->complete(backlog, -EINPROGRESS);
++
++	req = ablkcipher_request_cast(async_req);
++
++	/* assign new request to device */
++	dd->req = req;
++	dd->total = req->nbytes;
++	dd->in_offset = 0;
++	dd->in_sg = req->src;
++	dd->out_offset = 0;
++	dd->out_sg = req->dst;
++
++	rctx = ablkcipher_request_ctx(req);
++	ctx = crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req));
++	rctx->mode &= FLAGS_MODE_MASK;
++	dd->flags = (dd->flags & ~FLAGS_MODE_MASK) | rctx->mode;
++
++	dd->ctx = ctx;
++	ctx->dd = dd;
++
++	err = omap4_aes_write_ctrl(dd);
++	if (!err)
++		err = omap4_aes_crypt_dma_start(dd);
++	if (err) {
++		/* aes_task will not finish it, so do it here */
++		omap4_aes_finish_req(dd, err);
++		tasklet_schedule(&dd->queue_task);
++	}
++
++	return ret; /* return ret, which is enqueue return value */
++}
++
++static void omap4_aes_done_task(unsigned long data)
++{
++	struct omap4_aes_dev *dd = (struct omap4_aes_dev *)data;
++	int err;
++
++	pr_debug("enter\n");
++
++	err = omap4_aes_crypt_dma_stop(dd);
++
++	err = dd->err ? : err;
++
++	if (dd->total && !err) {
++		err = omap4_aes_crypt_dma_start(dd);
++		if (!err)
++			return; /* DMA started. Not finishing. */
++	}
++
++	omap4_aes_finish_req(dd, err);
++	omap4_aes_handle_queue(dd, NULL);
++
++	pr_debug("exit\n");
++}
++
++static void omap4_aes_queue_task(unsigned long data)
++{
++	struct omap4_aes_dev *dd = (struct omap4_aes_dev *)data;
++
++	omap4_aes_handle_queue(dd, NULL);
++}
++
++static int omap4_aes_crypt(struct ablkcipher_request *req, unsigned long mode)
++{
++	struct omap4_aes_ctx *ctx = crypto_ablkcipher_ctx(
++		crypto_ablkcipher_reqtfm(req));
++	struct omap4_aes_reqctx *rctx = ablkcipher_request_ctx(req);
++	struct omap4_aes_dev *dd;
++
++	pr_debug("nbytes: %d, enc: %d, cbc: %d, ctr: %d\n", req->nbytes,
++		 !!(mode & FLAGS_ENCRYPT),
++		 !!(mode & FLAGS_CBC),
++		 !!(mode & FLAGS_CTR));
++
++	if (!IS_ALIGNED(req->nbytes, AES_BLOCK_SIZE)) {
++		pr_err("request size is not exact amount of AES blocks\n");
++		return -EINVAL;
++	}
++
++	dd = omap4_aes_find_dev(ctx);
++	if (!dd)
++		return -ENODEV;
++
++	rctx->mode = mode;
++
++	return omap4_aes_handle_queue(dd, req);
++}
++
++/* ********************** ALG API ************************************ */
++
++static int omap4_aes_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
++			   unsigned int keylen)
++{
++	struct omap4_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
++
++	if (keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_192 &&
++	    keylen != AES_KEYSIZE_256)
++		return -EINVAL;
++
++	pr_debug("enter, keylen: %d\n", keylen);
++
++	memcpy(ctx->key, key, keylen);
++	ctx->keylen = keylen;
++
++	return 0;
++}
++
++static int omap4_aes_ecb_encrypt(struct ablkcipher_request *req)
++{
++	return omap4_aes_crypt(req, FLAGS_ENCRYPT);
++}
++
++static int omap4_aes_ecb_decrypt(struct ablkcipher_request *req)
++{
++	return omap4_aes_crypt(req, 0);
++}
++
++static int omap4_aes_cbc_encrypt(struct ablkcipher_request *req)
++{
++	return omap4_aes_crypt(req, FLAGS_ENCRYPT | FLAGS_CBC);
++}
++
++static int omap4_aes_cbc_decrypt(struct ablkcipher_request *req)
++{
++	return omap4_aes_crypt(req, FLAGS_CBC);
++}
++
++static int omap4_aes_ctr_encrypt(struct ablkcipher_request *req)
++{
++	return omap4_aes_crypt(req, FLAGS_ENCRYPT | FLAGS_CTR);
++}
++
++static int omap4_aes_ctr_decrypt(struct ablkcipher_request *req)
++{
++	return omap4_aes_crypt(req, FLAGS_CTR);
++}
++
++static int omap4_aes_cra_init(struct crypto_tfm *tfm)
++{
++	pr_debug("enter\n");
++
++	tfm->crt_ablkcipher.reqsize = sizeof(struct omap4_aes_reqctx);
++
++	return 0;
++}
++
++static void omap4_aes_cra_exit(struct crypto_tfm *tfm)
++{
++	pr_debug("enter\n");
++}
++
++/* ********************** ALGS ************************************ */
++
++static struct crypto_alg algs[] = {
++	{
++		.cra_name		= "ecb(aes)",
++		.cra_driver_name	= "ecb-aes-omap4",
++		.cra_priority		= 300,
++		.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
++		.cra_blocksize		= AES_BLOCK_SIZE,
++		.cra_ctxsize		= sizeof(struct omap4_aes_ctx),
++		.cra_alignmask		= 0,
++		.cra_type		= &crypto_ablkcipher_type,
++		.cra_module		= THIS_MODULE,
++		.cra_init		= omap4_aes_cra_init,
++		.cra_exit		= omap4_aes_cra_exit,
++		.cra_u.ablkcipher = {
++			.min_keysize	= AES_MIN_KEY_SIZE,
++			.max_keysize	= AES_MAX_KEY_SIZE,
++			.setkey		= omap4_aes_setkey,
++			.encrypt	= omap4_aes_ecb_encrypt,
++			.decrypt	= omap4_aes_ecb_decrypt,
++		}
++	},
++	{
++		.cra_name		= "cbc(aes)",
++		.cra_driver_name	= "cbc-aes-omap4",
++		.cra_priority		= 300,
++		.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
++		.cra_blocksize		= AES_BLOCK_SIZE,
++		.cra_ctxsize		= sizeof(struct omap4_aes_ctx),
++		.cra_alignmask		= 0,
++		.cra_type		= &crypto_ablkcipher_type,
++		.cra_module		= THIS_MODULE,
++		.cra_init		= omap4_aes_cra_init,
++		.cra_exit		= omap4_aes_cra_exit,
++		.cra_u.ablkcipher = {
++			.min_keysize	= AES_MIN_KEY_SIZE,
++			.max_keysize	= AES_MAX_KEY_SIZE,
++			.geniv		= "eseqiv",
++			.ivsize		= AES_BLOCK_SIZE,
++			.setkey		= omap4_aes_setkey,
++			.encrypt	= omap4_aes_cbc_encrypt,
++			.decrypt	= omap4_aes_cbc_decrypt,
++
++		}
++	},
++	{
++		.cra_name		= "ctr(aes)",
++		.cra_driver_name	= "ctr-aes-omap4",
++		.cra_priority		= 300,
++		.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
++		.cra_blocksize		= AES_BLOCK_SIZE,
++		.cra_ctxsize		= sizeof(struct omap4_aes_ctx),
++		.cra_alignmask		= 0,
++		.cra_type		= &crypto_ablkcipher_type,
++		.cra_module		= THIS_MODULE,
++		.cra_init		= omap4_aes_cra_init,
++		.cra_exit		= omap4_aes_cra_exit,
++		.cra_u.ablkcipher = {
++			.min_keysize	= AES_MIN_KEY_SIZE,
++			.max_keysize	= AES_MAX_KEY_SIZE,
++			.geniv		= "eseqiv",
++			.ivsize		= AES_BLOCK_SIZE,
++			.setkey		= omap4_aes_setkey,
++			.encrypt	= omap4_aes_ctr_encrypt,
++			.decrypt	= omap4_aes_ctr_decrypt,
++		}
++	}
++};
++
++static int omap4_aes_probe(struct platform_device *pdev)
++{
++	struct device *dev = &pdev->dev;
++	struct omap4_aes_dev *dd;
++	struct resource *res;
++	int err = -ENOMEM, i, j;
++	u32 reg;
++
++	dd = kzalloc(sizeof(struct omap4_aes_dev), GFP_KERNEL);
++	if (dd == NULL) {
++		dev_err(dev, "unable to alloc data struct.\n");
++		goto err_data;
++	}
++	dd->dev = dev;
++	platform_set_drvdata(pdev, dd);
++
++	spin_lock_init(&dd->lock);
++	crypto_init_queue(&dd->queue, AM33X_AES_QUEUE_LENGTH);
++
++	/* Get the base address */
++	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!res) {
++		dev_err(dev, "invalid resource type\n");
++		err = -ENODEV;
++		goto err_res;
++	}
++	dd->phys_base = res->start;
++
++	/* Get the DMA */
++	res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
++	if (!res)
++		dev_info(dev, "no DMA info\n");
++	else
++		dd->dma_out = res->start;
++
++	/* Get the DMA */
++	res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
++	if (!res)
++		dev_info(dev, "no DMA info\n");
++	else
++		dd->dma_in = res->start;
++
++	/* Initializing the clock */
++	dd->iclk = clk_get(dev, "aes0_fck");
++	if (IS_ERR(dd->iclk)) {
++		dev_err(dev, "clock initialization failed.\n");
++		err = PTR_ERR(dd->iclk);
++		goto err_res;
++	}
++
++	dd->io_base = ioremap(dd->phys_base, SZ_4K);
++	if (!dd->io_base) {
++		dev_err(dev, "can't ioremap\n");
++		err = -ENOMEM;
++		goto err_io;
++	}
++
++	omap4_aes_hw_init(dd);
++	reg = omap4_aes_read(dd, AES_REG_REV);
++	clk_disable(dd->iclk);
++	dev_info(dev, "AM33X AES hw accel rev: %u.%02u\n",
++		 ((reg & AES_REG_REV_X_MAJOR_MASK) >> 8),
++		 (reg & AES_REG_REV_Y_MINOR_MASK));
++
++	tasklet_init(&dd->done_task, omap4_aes_done_task, (unsigned long)dd);
++	tasklet_init(&dd->queue_task, omap4_aes_queue_task, (unsigned long)dd);
++
++	err = omap4_aes_dma_init(dd);
++	if (err)
++		goto err_dma;
++
++	INIT_LIST_HEAD(&dd->list);
++	spin_lock(&list_lock);
++	list_add_tail(&dd->list, &dev_list);
++	spin_unlock(&list_lock);
++
++	for (i = 0; i < ARRAY_SIZE(algs); i++) {
++		pr_debug("reg alg: %s\n", algs[i].cra_name);
++		INIT_LIST_HEAD(&algs[i].cra_list);
++		err = crypto_register_alg(&algs[i]);
++		if (err)
++			goto err_algs;
++	}
++
++	pr_info("probe() done\n");
++
++	return 0;
++
++err_algs:
++	for (j = 0; j < i; j++)
++		crypto_unregister_alg(&algs[j]);
++	omap4_aes_dma_cleanup(dd);
++err_dma:
++	tasklet_kill(&dd->done_task);
++	tasklet_kill(&dd->queue_task);
++	iounmap(dd->io_base);
++
++err_io:
++	clk_put(dd->iclk);
++err_res:
++	kfree(dd);
++	dd = NULL;
++err_data:
++	dev_err(dev, "initialization failed.\n");
++	return err;
++}
++
++static int omap4_aes_remove(struct platform_device *pdev)
++{
++	struct omap4_aes_dev *dd = platform_get_drvdata(pdev);
++	int i;
++
++	if (!dd)
++		return -ENODEV;
++
++	spin_lock(&list_lock);
++	list_del(&dd->list);
++	spin_unlock(&list_lock);
++
++	for (i = 0; i < ARRAY_SIZE(algs); i++)
++		crypto_unregister_alg(&algs[i]);
++
++	tasklet_kill(&dd->done_task);
++	tasklet_kill(&dd->queue_task);
++	omap4_aes_dma_cleanup(dd);
++	iounmap(dd->io_base);
++	clk_put(dd->iclk);
++	kfree(dd);
++	dd = NULL;
++
++	return 0;
++}
++
++static struct platform_driver omap4_aes_driver = {
++	.probe	= omap4_aes_probe,
++	.remove	= omap4_aes_remove,
++	.driver	= {
++		.name	= "omap4-aes",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init omap4_aes_mod_init(void)
++{
++	pr_info("loading AM33X AES driver\n");
++
++	/* This only works on a GP device */
++	if (!cpu_is_am33xx() || omap_type() != OMAP2_DEVICE_TYPE_GP) {
++		pr_err("Unsupported cpu\n");
++		return -ENODEV;
++	}
++	return  platform_driver_register(&omap4_aes_driver);
++}
++
++static void __exit omap4_aes_mod_exit(void)
++{
++	pr_info("unloading AM33X AES driver\n");
++
++	platform_driver_unregister(&omap4_aes_driver);
++}
++
++module_init(omap4_aes_mod_init);
++module_exit(omap4_aes_mod_exit);
++
++MODULE_DESCRIPTION("AM33X AES acceleration support.");
++MODULE_LICENSE("GPL v2");
++MODULE_AUTHOR("Herman Schuurman");
+--
+1.7.0.4

recipes-kernel/linux/linux-am335x_3.2.0-psp04.06.00.08.bb

@@ -0,0 +1,81 @@
+SECTION = "kernel"
+DESCRIPTION = "Linux kernel for TI33x devices from PSP"
+LICENSE = "GPLv2"
+LIC_FILES_CHKSUM = "file://COPYING;md5=d7810fab7487fb0aad327b76f1be7cd7"
+COMPATIBLE_MACHINE = "ti33x"
+
+DEFAULT_PREFERENCE = "-1"
+
+inherit kernel
+
+# Stage the power management firmware before building the kernel
+DEPENDS += "am33x-cm3"
+
+KERNEL_IMAGETYPE = "uImage"
+
+# The main PR is now using MACHINE_KERNEL_PR, for ti33x see conf/machine/include/ti33x.inc
+MACHINE_KERNEL_PR_append = "a+gitr${SRCREV}"
+
+BRANCH = "v3.2-staging"
+
+# This SRCREV corresponds to tag v3.2_AM335xPSP_04.06.00.08
+SRCREV = "d7e124e8074cccf9958290e773c88a4b2b36412b"
+
+SRC_URI = "git://arago-project.org/git/projects/linux-am33x.git;protocol=git;branch=${BRANCH} \
+           file://defconfig \
+           ${KERNEL_PATCHES} \
+"
+
+S = "${WORKDIR}/git"
+
+# Allow a layer to easily add to the list of patches or completely override them.
+KERNEL_PATCHES ?= "${PATCHES}"
+
+# Add a set of patches that enabled features, fixed bugs or disabled buggy features
+# that weren't part of the official PSP release
+PATCHES = "file://0001-musb-update-PIO-mode-help-information-in-Kconfig.patch \
+               file://0001-am335x_evm_defconfig-turn-off-MUSB-DMA.patch \
+               file://0001-mach-omap2-pm33xx-Disable-VT-switch.patch"
+
+# Add Cryptography support early driver patches while working to get the driver
+# upstream.
+PATCHES += "file://0001-am33x-Add-memory-addresses-for-crypto-modules.patch \
+                file://0002-am33x-Add-crypto-device-and-resource-structures.patch \
+                file://0003-am33x-Add-crypto-device-and-resource-structure-for-T.patch \
+                file://0004-am33x-Add-crypto-drivers-to-Kconfig-and-Makefiles.patch \
+                file://0005-am33x-Create-header-file-for-OMAP4-crypto-modules.patch \
+                file://0006-am33x-Create-driver-for-TRNG-crypto-module.patch \
+                file://0007-am33x-Create-driver-for-AES-crypto-module.patch \
+                file://0008-am33x-Create-driver-for-SHA-MD5-crypto-module.patch \
+                file://0002-AM335x-OCF-Driver-for-Linux-3.patch \
+                file://0001-am335x-Add-crypto-driver-settings-to-defconfig.patch \
+                file://0001-am335x-Add-pm_runtime-API-to-crypto-driver.patch \
+                file://0002-am335x-Add-suspend-resume-routines-to-crypto-driver.patch \
+               "
+
+# Add SmartReflex support early driver patches while working to get the driver
+# upstream.
+PATCHES += "file://0001-am33xx-Add-SmartReflex-support.patch \
+                file://0002-am33xx-Enable-CONFIG_AM33XX_SMARTREFLEX.patch \
+               "
+
+# Add a patch to the omap-serial driver to allow suspend/resume during
+# Bluetooth traffic
+PATCHES += "file://0001-omap-serial-add-delay-before-suspending.patch"
+
+# Add patch to allow wireless to work properly on EVM-SK 1.2.
+PATCHES += "file://0001-am3358-sk-modified-WLAN-enable-and-irq-to-match-boar.patch"
+
+# Add CPU utilization patch for WLAN
+PATCHES += "file://0001-am335xevm-using-edge-triggered-interrupts-for-WLAN.patch"
+
+# Add patch to enable pullup on WLAN enable
+PATCHES += "file://0001-am335x-enable-pullup-on-the-WLAN-enable-pin-fo.patch"
+
+# Copy the am33x-cm3 firmware if it is available
+do_compile_prepend() {
+    if [ -e "${STAGING_DIR_HOST}/${base_libdir}/firmware/am335x-pm-firmware.bin" ]
+    then
+        cp "${STAGING_DIR_HOST}/${base_libdir}/firmware/am335x-pm-firmware.bin" "${S}/firmware"
+    fi
+}