arm-bsp/n1sdp: Enable OP-TEE cache in N1SDP

This change enables N1SDP cache to improve performance by removing this patch: HACK-disable-instruction-cache-and-data-cache.patch Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>
arm-bsp/n1sdp: Move OP-TEE to DDR4
2026-07-18 16:37:08 +00:00 · 2023-10-19 21:14:39 -05:00 · 2023-10-19 21:14:39 -05:00 · 2023-10-19 21:14:39 -05:00 · 2023-10-16 09:28:49 -04:00 · 2023-10-06 09:23:53 -04:00
161 changed files with 3990 additions and 10680 deletions
@@ -150,7 +150,7 @@ n1sdp:
  parallel:
    matrix:
      - TOOLCHAINS: [gcc, armgcc]
-        TS: [none, trusted-services]
+        TS: [none, n1sdp-ts]

 qemu-generic-arm64:
  extends: .build
@@ -167,7 +167,7 @@ qemuarm64-secureboot:
      - KERNEL: [linux-yocto, linux-yocto-dev, linux-yocto-rt]
        TOOLCHAINS: [gcc, clang]
        TCLIBC: [glibc, musl]
-        TS: [none, trusted-services]
+        TS: [none, qemuarm64-secureboot-ts]
        TESTING: testimage

 qemuarm64:
@@ -6,10 +6,6 @@ This repository contains the Arm layers for OpenEmbedded.

  This layer contains general recipes for the Arm architecture, such as firmware, FVPs, and Arm-specific integration.

-* meta-arm-autonomy
-
-  This layer is the distribution for a reference stack for autonomous systems.
-
 * meta-arm-bsp

  This layer contains machines for Arm reference platforms, for example FVP Base, N1SDP, and Juno.
@@ -6,4 +6,3 @@ header:
 repos:
  meta-virtualization:
    url: git://git.yoctoproject.org/meta-virtualization
-    refspec: master
@@ -6,8 +6,8 @@ header:
 local_conf_header:
  trusted_services: |
    TEST_SUITES:append = " trusted_services"
-    # Include TS Crypto, Storage, ITS, Attestation and SMM-Gateway SPs into optee-os image
-    MACHINE_FEATURES:append = " arm-ffa ts-crypto ts-storage ts-its ts-attestation ts-smm-gateway"
+    # Include TS Crypto, TS Protected Storage, TS Internal and Trusted Storage SPs into optee-os image
+    MACHINE_FEATURES:append = " arm-ffa ts-crypto ts-storage ts-its"
    # Include TS demo/test tools into image
    IMAGE_INSTALL:append = " packagegroup-ts-tests"
    # Include TS PSA Arch tests into image
@@ -0,0 +1,14 @@
+header:
+  version: 11
+  includes:
+    - ci/meta-openembedded.yml
+
+local_conf_header:
+  trusted_services: |
+    TEST_SUITES:append = " trusted_services"
+    # Include TS Crypto, TS Protected Storage, TS Internal Trusted Storage and SMM-Gateway SPs into optee-os image
+    MACHINE_FEATURES:append = " arm-ffa ts-crypto ts-storage ts-its ts-smm-gateway"
+    # Include TS demo/test tools into image
+    IMAGE_INSTALL:append = " packagegroup-ts-tests"
+    # Include TS PSA Arch tests into image
+    IMAGE_INSTALL:append = " packagegroup-ts-tests-psa"
@@ -1,6 +1,6 @@
 # The Trusted Services: framework for developing root-of-trust services

-  meta-arm layer includes recipes for [Trusted Services][1] Secure Partitions and Normal World applications
+meta-arm layer includes recipes for [Trusted Services][^1] Secure Partitions and Normal World applications
 in `meta-arm/recipes-security/trusted-services`

 ## Secure Partitions recipes
@@ -12,7 +12,7 @@ These files are automatically included into optee-os image accordingly to define
 ### How to include TS SPs

 To include TS SPs into optee-os image you need to add into MACHINE_FEATURES
-features for each [Secure Partition][2] you would like to include:
+features for each [Secure Partition][^2] you would like to include:

 | Secure Partition  | MACHINE_FEATURE |
 | ----------------- | --------------- |
@@ -22,32 +22,44 @@ features for each [Secure Partition][2] you would like to include:
 | Protected Storage | ts-storage      |
 | se-proxy          | ts-se-proxy     |
 | smm-gateway       | ts-smm-gateway  |
+| spm-test[1-3]     | optee-spmc-test |

 Other steps depend on your machine/platform definition:

 1. For communications between Secure and Normal Words Linux kernel option `CONFIG_ARM_FFA_TRANSPORT=y`
-is required. If your platform doesn't include it already you can add `arm-ffa` into MACHINE_FEATURES.
+   is required. If your platform doesn't include it already you can add `arm-ffa` into MACHINE_FEATURES.
+   (Please see ` meta-arm/recipes-kernel/arm-ffa-tee`.)
+
+   For running the `uefi-test` or the `xtest -t ffa_spmc` tests under Linux the `arm-ffa-user` drivel is required. This is
+   enabled if the `ts-smm-gateway` and/or the `optee-spmc-test` machine features are enabled.
+   (Please see ` meta-arm/recipes-kernel/arm-ffa-user`.)

 2. optee-os might require platform specific OP-TEE build parameters (for example what SEL the SPM Core is implemented at).
-You can find examples in `meta-arm/recipes-security/optee/optee-os_%.bbappend` for qemuarm64-secureboot machine
-and in `meta-arm-bsp/recipes-security/optee/optee-os-n1sdp.inc` and `meta-arm-bsp/recipes-security/optee/optee-os-corstone1000-common.inc`
-for N1SDP and Corstone1000 platforms accordingly.
+   You can find examples in `meta-arm/recipes-security/optee/optee-os_%.bbappend` for qemuarm64-secureboot machine
+   and in `meta-arm-bsp/recipes-security/optee/optee-os-n1sdp.inc` and `meta-arm-bsp/recipes-security/optee/optee-os-corstone1000-common.inc`
+   for N1SDP and Corstone1000 platforms accordingly.

 3. trusted-firmware-a might require platform specific TF-A build parameters (SPD and SPMC details on the platform).
-See `meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_%.bbappend` for qemuarm64-secureboot machine
-and in `meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-n1sdp.inc` and
-`meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc` for N1SDP and Corstone1000 platforms.
+   See `meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_%.bbappend` for qemuarm64-secureboot machine
+   and in `meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-n1sdp.inc` and
+   `meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc` for N1SDP and Corstone1000 platforms.

 ## Normal World applications

-  Optionally for testing purposes you can add `packagegroup-ts-tests` and `packagegroup-ts-tests-psa` package groups into your image.
-They include [Trusted Services test and demo tools][3]
+Optionally for testing purposes you can add `packagegroup-ts-tests` into your image. It includes 
+[Trusted Services test and demo tools][^3] and [xtest][^4] configured to include the `ffa_spmc` tests.

 ## OEQA Trusted Services tests

  meta-arm also includes Trusted Service OEQA tests which can be used for automated testing.
 See `ci/trusted-services.yml` for an example how to include them into an image.

-[1] https://trusted-services.readthedocs.io/en/integration/overview/introduction.html
-[2] https://trusted-services.readthedocs.io/en/integration/developer/deployments/secure-partitions.html
-[3] https://trusted-services.readthedocs.io/en/integration/developer/deployments/test-executables.html
+
+------
+[^1]: https://trusted-services.readthedocs.io/en/integration/overview/index.html
+
+[^2]: https://trusted-services.readthedocs.io/en/integration/deployments/secure-partitions.html
+
+[^3]: https://trusted-services.readthedocs.io/en/integration/deployments/test-executables.html
+
+[^4]: https://optee.readthedocs.io/en/latest/building/gits/optee_test.html
@@ -5,7 +5,7 @@ distro: poky-tiny

 defaults:
  repos:
-    refspec: master
+    refspec: mickledore

 repos:
  meta-arm:
@@ -16,6 +16,7 @@ repos:

  poky:
    url: https://git.yoctoproject.org/git/poky
+    refspec: 31dd418207f6c95ef0aad589cd03cd2a4c9a8bf2
    layers:
      meta:
      meta-poky:
@@ -23,6 +24,7 @@ repos:

  meta-openembedded:
    url: https://git.openembedded.org/meta-openembedded
+    refspec: 5a01ab461c9bcabcbb2298236602373948f8f073
    layers:
      meta-oe:
      meta-python:
@@ -43,6 +43,7 @@ OPTEE_BINARY = "tee-pager_v2.bin"
 # Include smm-gateway and se-proxy SPs into optee-os binary
 MACHINE_FEATURES += "ts-smm-gateway ts-se-proxy"
 TS_PLATFORM = "arm/corstone1000"
+TS_SP_SE_PROXY_CONFIG = "corstone1000"

 # External System(Cortex-M3)
 EXTRA_IMAGEDEPENDS += "external-system"
@@ -1,5 +1,5 @@
 ..
- # Copyright (c) 2022, Arm Limited.
+ # Copyright (c) 2022-2023, Arm Limited.
 #
 # SPDX-License-Identifier: MIT

@@ -10,6 +10,72 @@ Change Log
 This document contains a summary of the new features, changes and
 fixes in each release of Corstone-1000 software stack.

+***************
+Version 2023.06
+***************
+
+Changes
+=======
+
+- GPT support (in TF-M, TF-A, U-boot)
+- Use TF-M BL1 code as the ROM code instead of MCUboot (the next stage bootloader BL2 remains to be MCUboot)
+- Secure Enclave uses CC312 OTP as the provisioning backend in FVP and FPGA
+- NVMXIP block storage support in U-Boot
+- Upgrading the SW stack recipes
+- Upgrades for the U-Boot FF-A driver and MM communication
+
+Corstone-1000 components versions
+=================================
+
+-------------------------------------------+--------------------------------------------+
+| arm-ffa-tee                               | 1.1.2-r0                                   |
+-------------------------------------------+--------------------------------------------+
+| arm-ffa-user                              | 5.0.1-r0                                   |
+-------------------------------------------+--------------------------------------------+
+| corstone1000-external-sys-tests           | 1.0+gitAUTOINC+2945cd92f7-r0               |
+-------------------------------------------+--------------------------------------------+
+| external-system                           | 0.1.0+gitAUTOINC+8c9dca74b1-r0             |
+-------------------------------------------+--------------------------------------------+
+| linux-yocto                               | 6.1.25+gitAUTOINC+36901b5b29_581dc1aa2f-r0 |
+-------------------------------------------+--------------------------------------------+
+| u-boot                                    | 2023.01-r0                                 |
+-------------------------------------------+--------------------------------------------+
+| optee-client                              | 3.18.0-r0                                  |
+-------------------------------------------+--------------------------------------------+
+| optee-os                                  | 3.20.0-r0                                  |
+-------------------------------------------+--------------------------------------------+
+| trusted-firmware-a                        | 2.8.0-r0                                   |
+-------------------------------------------+--------------------------------------------+
+| trusted-firmware-m                        | 1.7.0-r0                                   |
+-------------------------------------------+--------------------------------------------+
+| ts-newlib                                 | 4.1.0-r0                                   |
+-------------------------------------------+--------------------------------------------+
+| ts-psa-{crypto, iat, its. ps}-api-test    | 38cb53a4d9                                 |
+-------------------------------------------+--------------------------------------------+
+| ts-sp-{se-proxy, smm-gateway}             | 08b3d39471                                 |
+-------------------------------------------+--------------------------------------------+
+
+Yocto distribution components versions
+======================================
+
+-------------------------------------------+--------------------------------+
+| meta-arm                                  | mickledore                     |
+-------------------------------------------+--------------------------------+
+| poky                                      | mickledore                     |
+-------------------------------------------+--------------------------------+
+| meta-openembedded                         | mickledore                     |
+-------------------------------------------+--------------------------------+
+| busybox                                   | 1.36.0-r0                      |
+-------------------------------------------+--------------------------------+
+| musl                                      | 1.2.3+gitAUTOINC+7d756e1c04-r0 |
+-------------------------------------------+--------------------------------+
+| gcc-arm-none-eabi-native                  | 11.2-2022.02                   |
+-------------------------------------------+--------------------------------+
+| gcc-cross-aarch64                         | 12.2.rel1-r0                   |
+-------------------------------------------+--------------------------------+
+| openssl                                   | 3.1.0-r0                       |
+-------------------------------------------+--------------------------------+
+
 ******************
 Version 2022.11.23
 ******************
@@ -25,7 +91,7 @@ Changes
 - Upgrades for the U-Boot FF-A driver and MM communication

 Corstone-1000 components versions
-=======================================
+=================================

 +-------------------------------------------+------------+
 | arm-ffa-tee                               | 1.1.1      |
@@ -56,7 +122,7 @@ Corstone-1000 components versions
 +-------------------------------------------+------------+

 Yocto distribution components versions
-=======================================
+======================================

 +-------------------------------------------+---------------------+
 | meta-arm                                  | langdale            |
@@ -161,4 +227,4 @@ Changes

 --------------

-*Copyright (c) 2022, Arm Limited. All rights reserved.*
+*Copyright (c) 2022-2023, Arm Limited. All rights reserved.*
@@ -1,5 +1,5 @@
 ..
- # Copyright (c) 2022, Arm Limited.
+ # Copyright (c) 2022-2023, Arm Limited.
 #
 # SPDX-License-Identifier: MIT

@@ -19,6 +19,28 @@ intended for safety-critical applications. Should Your Software or Your Hardware
 prove defective, you assume the entire cost of all necessary servicing, repair
 or correction.

+***********************
+Release notes - 2023.06
+***********************
+
+Known Issues or Limitations
+---------------------------
+ - FPGA supports Linux distro install and boot through installer. However, FVP only supports openSUSE raw image installation and boot.
+ - Due to the performance uplimit of MPS3 FPGA and FVP, some Linux distros like Fedora Rawhide can not boot on Corstone-1000 (i.e. user may experience timeouts or boot hang).
+ - PSA Crypto tests (psa-crypto-api-test command) take 30 minutes to complete for FVP and 1 hour for MPS3.
+ - Corstone-1000 SoC on FVP doesn't have a secure debug peripheral. It does on the MPS3 .
+ - The following limitations listed in the previous release are still applicable:
+
+   - UEFI Compliant - Boot from network protocols must be implemented -- FAILURE
+
+   - Known limitations regarding ACS tests - see previous release's notes.
+
+Platform Support
+-----------------
+ - This software release is tested on Corstone-1000 FPGA version AN550_v2
+   https://developer.arm.com/downloads/-/download-fpga-images
+ - This software release is tested on Corstone-1000 Fast Model platform (FVP) version 11.19_21
+   https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps

 **************************
 Release notes - 2022.11.23
@@ -174,4 +196,4 @@ For all security issues, contact Arm by email at arm-security@arm.com.

 --------------

-*Copyright (c) 2022, Arm Limited. All rights reserved.*
+*Copyright (c) 2022-2023, Arm Limited. All rights reserved.*
@@ -1,5 +1,5 @@
 ..
- # Copyright (c) 2022, Arm Limited.
+ # Copyright (c) 2022-2023, Arm Limited.
 #
 # SPDX-License-Identifier: MIT

@@ -9,16 +9,16 @@ Software architecture


 *****************
-ARM corstone1000
+Arm Corstone-1000
 *****************

-ARM corstone1000 is a reference solution for IoT devices. It is part of
+Arm Corstone-1000 is a reference solution for IoT devices. It is part of
 Total Solution for IoT which consists of hardware and software reference
 implementation.

-Corstone1000 software plus hardware reference solution is PSA Level-2 ready
+Corstone-1000 software plus hardware reference solution is PSA Level-2 ready
 certified (`PSA L2 Ready`_) as well as System Ready IR certified(`SRIR cert`_).
-More information on the corstone1000 subsystem product and design can be
+More information on the Corstone-1000 subsystem product and design can be
 found at:
 `Arm corstone1000 Software`_ and `Arm corstone1000 Technical Overview`_.

@@ -31,12 +31,12 @@ present in the user-guide document.
 Design Overview
 ***************

-The software architecture of corstone1000 platform is a reference
+The software architecture of Corstone-1000 platform is a reference
 implementation of Platform Security Architecture (`PSA`_) which provides
 framework to build secure IoT devices.

 The base system architecture of the platform is created from three
-different tyes of systems: Secure Enclave, Host and External System.
+different types of systems: Secure Enclave, Host and External System.
 Each subsystem provides different functionality to overall SoC.


@@ -50,9 +50,9 @@ cryptographic functions. It is based on an Cortex-M0+ processor,
 CC312 Cryptographic Accelerator and peripherals, such as watchdog and
 secure flash. Software running on the Secure Enclave is isolated via
 hardware for enhanced security. Communication with the Secure Encalve
-is achieved using Message Hnadling Units (MHUs) and shared memory.
-On system power on, the Secure Enclaves boots first. Its software
-comprises of two boot loading stages, both based on mcuboot, and
+is achieved using Message Handling Units (MHUs) and shared memory.
+On system power on, the Secure Enclave boots first. Its software
+comprises of a  ROM code (TF-M BL1), Mcuboot BL2, and
 TrustedFirmware-M(`TF-M`_) as runtime software. The software design on 
 Secure Enclave follows Firmware Framework for M class
 processor (`FF-M`_) specification.
@@ -66,7 +66,7 @@ The boot process follows Trusted Boot Base Requirement (`TBBR`_).
 The Host Subsystem is taken out of reset by the Secure Enclave system
 during its final stages of the initialization. The Host subsystem runs
 FF-A Secure Partitions(based on `Trusted Services`_) and OPTEE-OS
-(`OPTEE-OS`_) in the secure world, and u-boot(`u-boot repo`_) and
+(`OPTEE-OS`_) in the secure world, and U-Boot(`U-Boot repo`_) and
 linux (`linux repo`_) in the non-secure world. The communication between
 non-secure and the secure world is performed via FF-A messages.

@@ -75,7 +75,7 @@ functionality. The system is based on Cortex-M3 and run RTX RTOS.
 Communictaion between external system and Host(cortex-A35) is performed
 using MHU as transport mechanism and rpmsg messaging system.

-Overall, the corstone1000 architecture is designed to cover a range
+Overall, the Corstone-1000 architecture is designed to cover a range
 of Power, Performance, and Area (PPA) applications, and enable extension
 for use-case specific applications, for example, sensors, cloud
 connectivitiy, and edge computing.
@@ -85,13 +85,13 @@ Secure Boot Chain
 *****************

 For the security of a device, it is essential that only authorized
-software should run on the device. The corstone1000 boot uses a
+software should run on the device. The Corstone-1000 boot uses a
 Secure Boot Chain process where an already authenticated image verifies
 and loads the following software in the chain. For the boot chain
 process to work, the start of the chain should be trusted, forming the
 Root of Trust (RoT) of the device. The RoT of the device is immutable in
 nature and encoded into the device by the device owner before it
-is deployed into the field. In Corstone1000, the BL1 image of the secure
+is deployed into the field. In Corstone-1000, the BL1 image of the secure
 enclave and content of the CC312 OTP (One Time Programmable) memory
 forms the RoT. The BL1 image exists in ROM (Read Only Memory).

@@ -99,18 +99,20 @@ forms the RoT. The BL1 image exists in ROM (Read Only Memory).
   :width: 870
   :alt: SecureBootChain

-It is a lengthy chain to boot the software on corstone1000. On power on,
+It is a lengthy chain to boot the software on Corstone-1000. On power on,
 the secure enclave starts executing BL1 code from the ROM which is the RoT
 of the device. Authentication of an image involves the steps listed below:

 - Load image from flash to dynamic RAM.
- The public key present in the image header is validated by comparing with the hash. Depending on the image, the hash of the public key is either stored in the OTP or part of the software which is being already verfied in the previous stages.
+- The public key present in the image header is validated by comparing with the hash.
+  Depending on the image, the hash of the public key is either stored in the OTP or part
+  of the software which is being already verified in the previous stages.
 - The image is validated using the public key.

 In the secure enclave, BL1 authenticates the BL2 and passes the execution
-control. BL2 authenticates the initial boot loader of the host (Host BL2)
+control. BL2 authenticates the initial boot loader of the host (Host TF-A BL2)
 and TF-M. The execution control is now passed to TF-M. TF-M being the run
-time executable of secure enclaves initializes itself and, in the end,
+time executable of secure enclave which initializes itself and, at the end,
 brings the host CPU out of rest. The host follows the boot standard defined
 in the `TBBR`_ to authenticate the secure and non-secure software.

@@ -118,10 +120,10 @@ in the `TBBR`_ to authenticate the secure and non-secure software.
 Secure Services
 ***************

-corstone1000 is unique in providing a secure environment to run a secure
-workload. The platform has Trustzone technology in the Host subsystem but
+Corstone-1000 is unique in providing a secure environment to run a secure
+workload. The platform has TrustZone technology in the Host subsystem but
 it also has hardware isolated secure enclave environment to run such secure
-workloads. In corstone1000, known Secure Services such as Crypto, Protected
+workloads. In Corstone-1000, known Secure Services such as Crypto, Protected
 Storage, Internal Trusted Storage and Attestation are available via PSA
 Functional APIs in TF-M. There is no difference for a user communicating to
 these services which are running on a secure enclave instead of the
@@ -137,7 +139,7 @@ flow path for such calls.
 The SE Proxy SP (Secure Enclave Proxy Secure Partition) is a proxy partition
 managed by OPTEE which forwards such calls to the secure enclave. The
 solution relies on OpenAMP which uses shared memory and MHU interrupts as
-a doorbell for communication between two cores. corstone1000 implements
+a doorbell for communication between two cores. Corstone-1000 implements
 isolation level 2. Cortex-M0+ MPU (Memory Protection Unit) is used to implement
 isolation level 2.

@@ -147,7 +149,7 @@ lower latency vs higher security. Services running on a secure enclave are
 secure by real hardware isolation but have a higher latency path. In the
 second scenario, the services running on the secure world of the host
 subsystem have lower latency but virtual hardware isolation created by
-Trustzone technology.
+TrustZone technology.


 **********************
@@ -156,14 +158,14 @@ Secure Firmware Update

 Apart from always booting the authorized images, it is also essential that
 the device only accepts the authorized images in the firmware update
-process. corstone1000 supports OTA (Over the Air) firmware updates and
+process. Corstone-1000 supports OTA (Over the Air) firmware updates and
 follows Platform Security Firmware Update sepcification (`FWU`_).

 As standardized into `FWU`_, the external flash is divided into two
 banks of which one bank has currently running images and the other bank is
 used for staging new images.  There are four updatable units, i.e. Secure
 Enclave's BL2 and TF-M, and Host's FIP (Firmware Image Package) and Kernel
-Image. The new images are accepted in the form of a UEFI capsule.
+Image (the initramfs bundle). The new images are accepted in the form of a UEFI capsule.


 .. image:: images/ExternalFlash.png
@@ -194,13 +196,13 @@ guarantee the availability of the device.


 ******************************
-UEFI Runtime Support in u-boot
+UEFI Runtime Support in U-Boot
 ******************************

 Implementation of UEFI boottime and runtime APIs require variable storage.
-In corstone1000, these UEFI variables are stored in the Protected Storage
+In Corstone-1000, these UEFI variables are stored in the Protected Storage
 service. The below diagram presents the data flow to store UEFI variables.
-The u-boot implementation of the UEFI subsystem uses the FF-A driver to
+The U-Boot implementation of the UEFI subsystem uses the U-Boot FF-A driver to
 communicate with the SMM Service in the secure world. The backend of the
 SMM service uses the proxy PS from the SE Proxy SP. From there on, the PS
 calls are forwarded to the secure enclave as explained above.
@@ -215,11 +217,12 @@ calls are forwarded to the secure enclave as explained above.
 References
 ***************
 `ARM corstone1000 Search`_
+
 `Arm security features`_

 --------------

-*Copyright (c) 2022, Arm Limited. All rights reserved.*
+*Copyright (c) 2022-2023, Arm Limited. All rights reserved.*

 .. _Arm corstone1000 Technical Overview: https://developer.arm.com/documentation/102360/0000
 .. _Arm corstone1000 Software: https://developer.arm.com/Tools%20and%20Software/Corstone-1000%20Software
@@ -236,4 +239,4 @@ References
 .. _TBBR: https://developer.arm.com/documentation/den0006/latest
 .. _TF-M: https://www.trustedfirmware.org/projects/tf-m/
 .. _Trusted Services: https://www.trustedfirmware.org/projects/trusted-services/
-.. _u-boot repo: https://github.com/u-boot/u-boot.git
+.. _U-Boot repo: https://github.com/u-boot/u-boot.git
@@ -1,5 +1,5 @@
 ..
- # Copyright (c) 2022, Arm Limited.
+ # Copyright (c) 2022-2023, Arm Limited.
 #
 # SPDX-License-Identifier: MIT

@@ -15,21 +15,35 @@ The Yocto Project relies on the `Bitbake <https://docs.yoctoproject.org/bitbake.
 tool as its build tool. Please see `Yocto Project documentation <https://docs.yoctoproject.org/>`__
 for more information.

-
 Prerequisites
 -------------
-These instructions assume your host PC is running Ubuntu Linux 18.04 or 20.04 LTS, with at least 32GB of free disk space and 16GB of RAM as minimum requirement. The following instructions expect that you are using a bash shell. All the paths stated in this document are absolute paths.

-The following prerequisites must be available on the host system. To resolve these dependencies, run:
+This guide assumes that your host PC is running Ubuntu 20.04 LTS, with at least
+32GB of free disk space and 16GB of RAM as minimum requirement.

-::
+The following prerequisites must be available on the host system:

-    sudo apt-get update
-    sudo apt-get install gawk wget git-core diffstat unzip texinfo gcc-multilib \
-     build-essential chrpath socat cpio python3 python3-pip python3-pexpect \
-     xz-utils debianutils iputils-ping python3-git libegl1-mesa libsdl1.2-dev \
-     xterm zstd liblz4-tool picocom
-    sudo apt-get upgrade libstdc++6
+- Git 1.8.3.1 or greater
+- tar 1.28 or greater
+- Python 3.8.0 or greater.
+- gcc 8.0 or greater.
+- GNU make 4.0 or greater
+
+Please follow the steps described in the Yocto mega manual:
+
+- `Compatible Linux Distribution <https://docs.yoctoproject.org/singleindex.html#compatible-linux-distribution>`__
+- `Build Host Packages <https://docs.yoctoproject.org/singleindex.html#build-host-packages>`__
+
+Targets
+-------
+
+- `Arm Corstone-1000 Ecosystem FVP (Fixed Virtual Platform) <https://developer.arm.com/downloads/-/arm-ecosystem-fvps>`__
+- `Arm Corstone-1000 for MPS3 <https://developer.arm.com/documentation/dai0550/latest/>`__
+
+Yocto stable branch
+-------------------
+
+Corstone-1000 software stack is built on top of Yocto mickledore.

 Provided components
 -------------------
@@ -44,6 +58,8 @@ The Yocto machine config files for the Corstone-1000 FVP and FPGA targets are:
 - ``<_workspace>/meta-arm/meta-arm-bsp/conf/machine/corstone1000-fvp.conf``
 - ``<_workspace>/meta-arm/meta-arm-bsp/conf/machine/corstone1000-mps3.conf``

+**NOTE:** All the paths stated in this document are absolute paths.
+
 *****************
 Software for Host
 *****************
@@ -52,50 +68,52 @@ Trusted Firmware-A
 ==================
 Based on `Trusted Firmware-A <https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git>`__

-+----------+---------------------------------------------------------------------------------------------------+
-| bbappend | <_workspace>/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.7.bbappend |
-+----------+---------------------------------------------------------------------------------------------------+
-| Recipe   | <_workspace>/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.7.bb           |
-+----------+---------------------------------------------------------------------------------------------------+
+----------+-----------------------------------------------------------------------------------------------------+
+| bbappend | <_workspace>/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.8.%.bbappend |
+----------+-----------------------------------------------------------------------------------------------------+
+| Recipe   | <_workspace>/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.8.0.bb           |
+----------+-----------------------------------------------------------------------------------------------------+

 OP-TEE
 ======
 Based on `OP-TEE <https://git.trustedfirmware.org/OP-TEE/optee_os.git>`__

 +----------+------------------------------------------------------------------------------------+
-| bbappend | <_workspace>/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os_3.18.0.bbappend |
+| bbappend | <_workspace>/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os_3.20.0.bbappend |
 +----------+------------------------------------------------------------------------------------+
-| Recipe   | <_workspace>/meta-arm/meta-arm/recipes-security/optee/optee-os_3.18.0.bb           |
+| Recipe   | <_workspace>/meta-arm/meta-arm/recipes-security/optee/optee-os_3.20.0.bb           |
 +----------+------------------------------------------------------------------------------------+

 U-Boot
-=======
-Based on `U-Boot <https://gitlab.com/u-boot>`__
+======
+Based on `U-Boot repo`_

-+----------+---------------------------------------------------------------------+
-| bbappend | <_workspace>/meta-arm/meta-arm/recipes-bsp/u-boot/u-boot_%.bbappend |
-+----------+---------------------------------------------------------------------+
-| Recipe   | <_workspace>/poky/meta/recipes-bsp/u-boot/u-boot_2022.07.bb         |
-+----------+---------------------------------------------------------------------+
+----------+-------------------------------------------------------------------------+
+| bbappend | <_workspace>/meta-arm/meta-arm/recipes-bsp/u-boot/u-boot_%.bbappend     |
+----------+-------------------------------------------------------------------------+
+| bbappend | <_workspace>/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend |
+----------+-------------------------------------------------------------------------+
+| Recipe   | <_workspace>/poky/meta/recipes-bsp/u-boot/u-boot_2023.01.bb             |
+----------+-------------------------------------------------------------------------+

 Linux
 =====
 The distro is based on the `poky-tiny <https://wiki.yoctoproject.org/wiki/Poky-Tiny>`__
 distribution which is a Linux distribution stripped down to a minimal configuration.

-The provided distribution is based on busybox and built using muslibc. The
+The provided distribution is based on busybox and built using musl libc. The
 recipe responsible for building a tiny version of Linux is listed below.

 +-----------+----------------------------------------------------------------------------------------------+
 | bbappend  | <_workspace>/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-yocto_%.bbappend               |
 +-----------+----------------------------------------------------------------------------------------------+
-| Recipe    | <_workspace>/poky/meta/recipes-kernel/linux/linux-yocto_5.19.bb                              |
+| Recipe    | <_workspace>/poky/meta/recipes-kernel/linux/linux-yocto_6.1.bb                               |
 +-----------+----------------------------------------------------------------------------------------------+
 | defconfig | <_workspace>/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/corstone1000/defconfig         |
 +-----------+----------------------------------------------------------------------------------------------+

 External System Tests
-=======================
+=====================
 Based on `Corstone-1000/applications <https://git.gitlab.arm.com/arm-reference-solutions/corstone1000/applications>`__

 +------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
@@ -109,15 +127,15 @@ Software for Boot Processor (a.k.a Secure Enclave)
 **************************************************
 Based on `Trusted Firmware-M <https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git>`__

-+----------+-------------------------------------------------------------------------------------------------+
-| bbappend | <_workspace>/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m_%.bbappend |
-+----------+-------------------------------------------------------------------------------------------------+
-| Recipe   | <_workspace>/meta-arm/meta-arm/recipes-bsp/trusted-firmware-m/trusted-firmware-m_1.6.0.bb       |
-+----------+-------------------------------------------------------------------------------------------------+
+----------+-----------------------------------------------------------------------------------------------------+
+| bbappend | <_workspace>/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m_1.7.%.bbappend |
+----------+-----------------------------------------------------------------------------------------------------+
+| Recipe   | <_workspace>/meta-arm/meta-arm/recipes-bsp/trusted-firmware-m/trusted-firmware-m_1.7.0.bb           |
+----------+-----------------------------------------------------------------------------------------------------+

-**************************************************
+********************************
 Software for the External System
-**************************************************
+********************************

 RTX
 ====
@@ -150,7 +168,7 @@ In the top directory of the workspace ``<_workspace>``, run:

 ::

-    git clone https://git.yoctoproject.org/git/meta-arm -b CORSTONE1000-2022.11.23
+    git clone https://git.yoctoproject.org/git/meta-arm -b CORSTONE1000-2023.06

 To build a Corstone-1000 image for MPS3 FPGA, run:

@@ -173,46 +191,47 @@ Once the build is successful, all output binaries will be placed in the followin
 - ``<_workspace>/build/tmp/deploy/images/corstone1000-mps3/`` folder for FPGA build.

 Everything apart from the Secure Enclave ROM firmware and External System firmware, is bundled into a single binary, the
-``corstone1000-image-corstone1000-{mps3,fvp}.wic.nopt`` file.
+``corstone1000-image-corstone1000-{mps3,fvp}.wic`` file.

 The output binaries run in the Corstone-1000 platform are the following:
 - The Secure Enclave ROM firmware: ``<_workspace>/build/tmp/deploy/images/corstone1000-{mps3,fvp}/bl1.bin``
 - The External System firmware: ``<_workspace>/build/tmp/deploy/images/corstone1000-{mps3,fvp}/es_flashfw.bin``
- - The flash image: ``<_workspace>/build/tmp/deploy/images/corstone1000-{mps3,fvp}/corstone1000-image-corstone1000-{mps3,fvp}.wic.nopt``
+ - The flash image: ``<_workspace>/build/tmp/deploy/images/corstone1000-{mps3,fvp}/corstone1000-image-corstone1000-{mps3,fvp}.wic``

 Flash the firmware image on FPGA
 --------------------------------

-The user should download the FPGA bit file image ``AN550:  Arm® Corstone™-1000 for MPS3 Version 1``
+The user should download the FPGA bit file image ``AN550:  Arm® Corstone™-1000 for MPS3 Version 2.0``
 from `this link <https://developer.arm.com/tools-and-software/development-boards/fpga-prototyping-boards/download-fpga-images>`__
-and under the section ``Arm® Corstone™-1000 for MPS3``.
+and under the section ``Arm® Corstone™-1000 for MPS3``. The download is available after logging in.

 The directory structure of the FPGA bundle is shown below.

 ::

-    Boardfiles
-    ├── MB
-    │   ├── BRD_LOG.TXT
-    │   ├── HBI0309B
-    │   │   ├── AN550
-    │   │   │   ├── AN550_v1.bit
-    │   │   │   ├── an550_v1.txt
-    │   │   │   └── images.txt
-    │   │   ├── board.txt
-    │   │   └── mbb_v210.ebf
-    │   └── HBI0309C
-    │       ├── AN550
-    │       │   ├── AN550_v1.bit
-    │       │   ├── an550_v1.txt
-    │       │   └── images.txt
-    │       ├── board.txt
-    │       └── mbb_v210.ebf
-    ├── SOFTWARE
-    │   ├── ES0.bin
-    │   ├── SE.bin
-    │   └── an550_st.axf
-    └── config.txt
+   Boardfiles
+   ├── config.txt
+   ├── MB
+   │   ├── BRD_LOG.TXT
+   │   ├── HBI0309B
+   │   │   ├── AN550
+   │   │   │   ├── AN550_v2.bit
+   │   │   │   ├── an550_v2.txt
+   │   │   │   └── images.txt
+   │   │   ├── board.txt
+   │   │   └── mbb_v210.ebf
+   │   └── HBI0309C
+   │       ├── AN550
+   │       │   ├── AN550_v2.bit
+   │       │   ├── an550_v2.txt
+   │       │   └── images.txt
+   │       ├── board.txt
+   │       └── mbb_v210.ebf
+   └── SOFTWARE
+        ├── an550_st.axf
+        ├── bl1.bin
+        ├── cs1000.bin
+        └── ES0.bin

 Depending upon the MPS3 board version (printed on the MPS3 board) you should update the images.txt file
 (in corresponding HBI0309x folder. Boardfiles/MB/HBI0309<board_revision>/AN550/images.txt) so that the file points to the images under SOFTWARE directory.
@@ -242,7 +261,7 @@ stack can be seen below;
  IMAGE0FILE: \SOFTWARE\bl1.bin
   
  IMAGE1PORT: 0
-  IMAGE1ADDRESS: 0x00_0010_0000
+  IMAGE1ADDRESS: 0x00_0000_0000
  IMAGE1UPDATE: AUTOQSPI
  IMAGE1FILE: \SOFTWARE\cs1000.bin
   
@@ -256,10 +275,9 @@ OUTPUT_DIR = ``<_workspace>/build/tmp/deploy/images/corstone1000-mps3``
 1. Copy ``bl1.bin`` from OUTPUT_DIR directory to SOFTWARE directory of the FPGA bundle.
 2. Copy ``es_flashfw.bin`` from OUTPUT_DIR directory to SOFTWARE directory of the FPGA bundle
   and rename the binary to ``es0.bin``.
-3. Copy ``corstone1000-image-corstone1000-mps3.wic.nopt`` from OUTPUT_DIR directory to SOFTWARE
-   directory of the FPGA bundle and rename the wic.nopt image to ``cs1000.bin``.
+3. Copy ``corstone1000-image-corstone1000-mps3.wic`` from OUTPUT_DIR directory to SOFTWARE
+   directory of the FPGA bundle and rename the wic image to ``cs1000.bin``.

-   
 **NOTE:** Renaming of the images are required because MCC firmware has
 limitation of 8 characters before .(dot) and 3 characters after .(dot).

@@ -274,7 +292,7 @@ be ttyUSB0, ttyUSB1, ttyUSB2, ttyUSB3 and it might be different on Windows machi
  - ttyUSB0 for MCC, OP-TEE and Secure Partition
  - ttyUSB1 for Boot Processor (Cortex-M0+)
  - ttyUSB2 for Host Processor (Cortex-A35)
-  - ttyUSB3 for External System Processor (Cortex-M3) 
+  - ttyUSB3 for External System Processor (Cortex-M3)

 Run following commands to open serial port terminals on Linux:

@@ -285,12 +303,26 @@ Run following commands to open serial port terminals on Linux:
  sudo picocom -b 115200 /dev/ttyUSB2  # in another terminal.
  sudo picocom -b 115200 /dev/ttyUSB3  # in another terminal.

+**NOTE:** The MPS3 expects an ethernet cable to be plugged in, otherwise it will
+wait for the network for a considerable amount of time, printing the following
+logs:
+
+::
+
+  Generic PHY 40100000.ethernet-ffffffff:01: attached PHY driver (mii_bus:phy_addr=40100000.ethernet-ffffffff:01, irq=POLL)
+  smsc911x 40100000.ethernet eth0: SMSC911x/921x identified at 0xffffffc008e50000, IRQ: 17
+  Waiting up to 100 more seconds for network.
+
 Once the system boot is completed, you should see console
 logs on the serial port terminals. Once the HOST(Cortex-A35) is
 booted completely, user can login to the shell using
 **"root"** login.

-If system does not boot and only the ttyUSB1 logs are visible, please follow the steps in `Clean Secure Flash Before Testing (applicable to FPGA only)`_ under `SystemReady-IR tests`_ section. The previous image used in FPGA (MPS3) might have filled the Secure Flash completely. The best practice is to clean the secure flash in this case.
+If system does not boot and only the ttyUSB1 logs are visible, please follow the
+steps in `Clean Secure Flash Before Testing (applicable to FPGA only)`_ under
+`SystemReady-IR tests`_ section. The previous image used in FPGA (MPS3) might
+have filled the Secure Flash completely. The best practice is to clean the
+secure flash in this case.


 Running the software on FVP
@@ -321,7 +353,7 @@ To run the FVP using the runfvp command, please run the following command:

 When the script is executed, three terminal instances will be launched, one for the boot processor
 (aka Secure Enclave) processing element and two for the Host processing element. Once the FVP is
-executing, the Boot Processor will start to boot, wherein the relevant memory contents of the .wic.nopt
+executing, the Boot Processor will start to boot, wherein the relevant memory contents of the .wic
 file are copied to their respective memory locations within the model, enforce firewall policies
 on memories and peripherals and then, bring the host out of reset.

@@ -337,11 +369,11 @@ Login using the username root.
 The External System can be released out of reset on demand using the systems-comms-tests command.

 SystemReady-IR tests
-------------------------
+--------------------

-*********************
+*************
 Testing steps
-*********************
+*************

 **NOTE**: Running the SystemReady-IR tests described below requires the user to
 work with USB sticks. In our testing, not all USB stick models work well with
@@ -359,7 +391,7 @@ erase the SecureEnclave flash cleanly and prepare a clean board environment for
 the testing.

 Clean Secure Flash Before Testing (applicable to FPGA only)
-==================================================================
+===========================================================

 To prepare a clean board environment with clean secure flash for the testing,
 the user should prepare an image that erases the secure flash cleanly during
@@ -368,17 +400,17 @@ boot. Run following commands to build such image.
 ::

  cd <_workspace>
-  git clone https://git.yoctoproject.org/git/meta-arm -b CORSTONE1000-2022.11.23
-  git clone https://git.gitlab.arm.com/arm-reference-solutions/systemready-patch.git -b CORSTONE1000-2022.11.23
-  cp -f systemready-patch/embedded-a/corstone1000/erase_flash/0001-arm-bsp-trusted-firmware-m-corstone1000-Clean-Secure.patch meta-arm
+  git clone https://git.yoctoproject.org/git/meta-arm -b CORSTONE1000-2023.06
+  git clone https://git.gitlab.arm.com/arm-reference-solutions/systemready-patch.git -b CORSTONE1000-2023.06
+  cp -f systemready-patch/embedded-a/corstone1000/erase_flash/0001-embedded-a-corstone1000-clean-secure-flash.patch meta-arm
  cd meta-arm
-  git apply 0001-arm-bsp-trusted-firmware-m-corstone1000-Clean-Secure.patch
+  git apply 0001-embedded-a-corstone1000-clean-secure-flash.patch
  cd ..
  kas build meta-arm/kas/corstone1000-mps3.yml

 Replace the bl1.bin and cs1000.bin files on the SD card with following files:
  - The ROM firmware: <_workspace>/build/tmp/deploy/images/corstone1000-mps3/bl1.bin
-  - The flash image: <_workspace>/build/tmp/deploy/images/corstone1000-mps3/corstone1000-image-corstone1000-mps3.wic.nopt
+  - The flash image: <_workspace>/build/tmp/deploy/images/corstone1000-mps3/corstone1000-image-corstone1000-mps3.wic

 Now reboot the board. This step erases the Corstone-1000 SecureEnclave flash
 completely, the user should expect following message from TF-M log (can be seen
@@ -394,10 +426,16 @@ Then the user should follow "Building the software stack" to build a clean
 software stack and flash the FPGA as normal. And continue the testing.

 Run SystemReady-IR ACS tests
-=============================
+============================
+
+Architecture Compliance Suite (ACS) is used to ensure architectural compliance
+across different implementations of the architecture. Arm Enterprise ACS
+includes a set of examples of the invariant behaviors that are provided by a
+set of specifications for enterprise systems (For example: SBSA, SBBR, etc.),
+so that implementers can verify if these behaviours have been interpreted correctly.

 ACS image contains two partitions. BOOT partition and RESULT partition.
-Following packages are under BOOT partition
+Following test suites and bootable applications are under BOOT partition:

 * SCT
 * FWTS
@@ -406,12 +444,30 @@ Following packages are under BOOT partition
 * grub
 * uefi manual capsule application

+BOOT partition contains the following:
+
+::
+
+    ├── EFI
+    │   └── BOOT
+    │       ├── app
+    │       ├── bbr
+    │       ├── bootaa64.efi
+    │       ├── bsa
+    │       ├── debug
+    │       ├── Shell.efi
+    │       └── startup.nsh
+    ├── grub
+    ├── grub.cfg
+    ├── Image
+    └── ramdisk-busybox.img
+
 RESULT partition is used to store the test results.
-PLEASE MAKE SURE THAT THE RESULT PARTITION IS EMPTY BEFORE YOU START THE TESTING. OTHERWISE THE TEST RESULTS
+**NOTE**: PLEASE MAKE SURE THAT THE RESULT PARTITION IS EMPTY BEFORE YOU START THE TESTING. OTHERWISE THE TEST RESULTS
 WILL NOT BE CONSISTENT

 FPGA instructions for ACS image
-================================
+===============================

 This section describes how the user can build and run Architecture Compliance
 Suite (ACS) tests on Corstone-1000.
@@ -449,10 +505,11 @@ Once the USB stick with ACS image is prepared, the user should make sure that
 ensure that only the USB stick with the ACS image is connected to the board,
 and then boot the board.

-The FPGA will reset multiple times during the test, and it might take approx. 24-36 hours to finish the test. At the end of test, the FPGA host terminal will halt showing a shell prompt. Once test is finished the result can be copied following above instructions.
+The FPGA will reset multiple times during the test, and it might take approx. 24-36 hours to finish the test.
+

 FVP instructions for ACS image and run
-============================================
+======================================

 Download ACS image from:
 - ``https://gitlab.arm.com/systemready/acs/arm-systemready/-/tree/linux-5.17-rc7/IR/prebuilt_images/v22.04_1.0-Linux-v5.17-rc7``
@@ -487,7 +544,7 @@ Once test is finished, the FVP can be stoped, and result can be copied following
 instructions.

 Common to FVP and FPGA
-===========================
+======================

 U-Boot should be able to boot the grub bootloader from
 the 1st partition and if grub is not interrupted, tests are executed
@@ -496,14 +553,13 @@ automatically in the following sequence:
 - SCT
 - UEFI BSA
 - FWTS
- - BSA Linux

 The results can be fetched from the ``acs_results`` folder in the RESULT partition of the USB stick (FPGA) / SD Card (FVP).

 #####################################################

 Manual capsule update and ESRT checks
---------------------------------------------------------------------
+-------------------------------------

 The following section describes running manual capsule update with the ``direct`` method.

@@ -518,63 +574,86 @@ incorrect capsule (corrupted or outdated) which fails to boot to the host softwa
 Check the "Run SystemReady-IR ACS tests" section above to download and unpack the ACS image file
 - ``ir_acs_live_image.img.xz``

-Download edk2 under <_workspace> :
+Download edk2 under <_workspace>:

 ::

  git clone https://github.com/tianocore/edk2.git
+  cd edk2
+  git checkout f2188fe5d1553ad1896e27b2514d2f8d0308da8a

-*********************
+Download systemready-patch repo under <_workspace>:
+::
+
+  git clone https://git.gitlab.arm.com/arm-reference-solutions/systemready-patch.git -b CORSTONE1000-2023.06
+
+*******************
 Generating Capsules
-*********************
-
-The capsule binary size (wic.nopt file) should be less than 15 MB.
-
-Based on the user's requirement, the user can change the firmware version
-number given to ``--fw-version`` option (the version number needs to be >= 1).
+*******************

 Generating FPGA Capsules
 ========================

 ::

-   <_workspace>/edk2/BaseTools/BinWrappers/PosixLike/GenerateCapsule -e -o \
-   cs1k_cap_mps3_v5 --fw-version 5 --lsv 0 --guid \
-   e2bb9c06-70e9-4b14-97a3-5a7913176e3f --verbose --update-image-index \
-   0 --verbose <_workspace>/build/tmp/deploy/images/corstone1000-mps3/corstone1000-image-corstone1000-mps3.wic.nopt
+   cd <_workspace>/build/tmp/deploy/images/corstone1000-mps3/
+   sh <_workspace>/systemready-patch/embedded-a/corstone1000/capsule_gen/capsule_gen.sh -d mps3
+
+This will generate a file called "corstone1000_image.nopt" which will be used to
+generate a UEFI capsule.

 ::

-   <_workspace>/edk2/BaseTools/BinWrappers/PosixLike/GenerateCapsule -e -o \
-   cs1k_cap_mps3_v6 --fw-version 6 --lsv 0 --guid \
-   e2bb9c06-70e9-4b14-97a3-5a7913176e3f --verbose --update-image-index \
-   0 --verbose <_workspace>/build/tmp/deploy/images/corstone1000-mps3/corstone1000-image-corstone1000-mps3.wic.nopt
+   cd <_workspace>
+   edk2/BaseTools/BinWrappers/PosixLike/GenerateCapsule -e -o cs1k_cap_mps3_v6 --fw-version 6 \
+   --lsv 0 --guid    e2bb9c06-70e9-4b14-97a3-5a7913176e3f --verbose --update-image-index  0 \
+   --verbose build/tmp/deploy/images/corstone1000-mps3/corstone1000_image.nopt
+
+   edk2/BaseTools/BinWrappers/PosixLike/GenerateCapsule -e -o cs1k_cap_mps3_v5 --fw-version 5 \
+   --lsv 0 --guid    e2bb9c06-70e9-4b14-97a3-5a7913176e3f --verbose --update-image-index  0 \
+   --verbose build/tmp/deploy/images/corstone1000-mps3/corstone1000_image.nopt

 Generating FVP Capsules
-========================
+=======================

 ::

-   <_workspace>/edk2/BaseTools/BinWrappers/PosixLike/GenerateCapsule -e -o \
-   cs1k_cap_fvp_v6 --fw-version 6 --lsv 0 --guid \
-   e2bb9c06-70e9-4b14-97a3-5a7913176e3f --verbose --update-image-index \
-   0 --verbose <_workspace>/build/tmp/deploy/images/corstone1000-fvp/corstone1000-image-corstone1000-fvp.wic.nopt
+   cd <_workspace>/build/tmp/deploy/images/corstone1000-fvp/
+   sh <_workspace>/systemready-patch/embedded-a/corstone1000/capsule_gen/capsule_gen.sh -d fvp
+
+This will generate a file called "corstone1000_image.nopt" which will be used to
+generate a UEFI capsule.
+

 ::

-   <_workspace>/edk2/BaseTools/BinWrappers/PosixLike/GenerateCapsule -e -o \
-   cs1k_cap_fvp_v5 --fw-version 5 --lsv 0 --guid \
-   e2bb9c06-70e9-4b14-97a3-5a7913176e3f --verbose --update-image-index \
-   0 --verbose <_workspace>/build/tmp/deploy/images/corstone1000-fvp/corstone1000-image-corstone1000-fvp.wic.nopt
+   cd <_workspace>
+   edk2/BaseTools/BinWrappers/PosixLike/GenerateCapsule -e -o cs1k_cap_fvp_v6 \
+   --fw-version 6 --lsv 0 --guid    e2bb9c06-70e9-4b14-97a3-5a7913176e3f --verbose --update-image-index \
+   0 --verbose build/tmp/deploy/images/corstone1000-fvp/corstone1000_image.nopt

-*********************
+   edk2/BaseTools/BinWrappers/PosixLike/GenerateCapsule -e -o cs1k_cap_fvp_v5 --fw-version 5 \
+   --lsv 0 --guid    e2bb9c06-70e9-4b14-97a3-5a7913176e3f --verbose --update-image-index \
+   0 --verbose build/tmp/deploy/images/corstone1000-fvp/corstone1000_image.nopt
+
+
+Common Notes for FVP and FPGA
+=============================
+
+The capsule binary size (wic file) should be less than 15 MB.
+
+Based on the user's requirement, the user can change the firmware version
+number given to ``--fw-version`` option (the version number needs to be >= 1).
+
+
+****************
 Copying Capsules
-*********************
+****************

 Copying the FPGA capsules
 =========================

-The user should prepare a USB stick as explained in ACS image section (see above).
+The user should prepare a USB stick as explained in ACS image section `FPGA instructions for ACS image`_.
 Place the generated ``cs1k_cap`` files in the root directory of the boot partition
 in the USB stick. Note: As we are running the direct method, the ``cs1k_cap`` file
 should not be under the EFI/UpdateCapsule directory as this may or may not trigger
@@ -612,7 +691,7 @@ Then, unmount the IR image:

 **NOTE:**

-Size of first partition in the image file is calculated in the following way. The data is
+The size of first partition in the image file is calculated in the following way. The data is
 just an example and might vary with different ir_acs_live_image.img files.

 ::
@@ -632,21 +711,21 @@ During this section we will be using the capsule with the higher version (cs1k_c
 and the capsule with the lower version (cs1k_cap_<fvp/mps3>_v5) for the negative scenario.

 Running the FVP with the IR prebuilt image
-==============================================
+==========================================

 Run the FVP with the IR prebuilt image:

 ::

-   <_workspace>/meta-arm/scripts/runfvp --terminals=xterm <_workspace>/build/tmp/deploy/images/corstone1000-fvp/corstone1000-image-corstone1000-fvp.fvpconf -- -C "board.msd_mmc.p_mmc_file ${<path-to-img>/ir_acs_live_image.img}" 
+   <_workspace>/meta-arm/scripts/runfvp --terminals=xterm <_workspace>/build/tmp/deploy/images/corstone1000-fvp/corstone1000-image-corstone1000-fvp.fvpconf -- -C "board.msd_mmc.p_mmc_file=${<path-to-img>/ir_acs_live_image.img}"

 Running the FPGA with the IR prebuilt image
-==============================================
+===========================================

 Insert the prepared USB stick then Power cycle the MPS3 board.

 Executing capsule update for FVP and FPGA
-==============================================
+=========================================

 Reach u-boot then interrupt the boot  to reach the EFI shell.

@@ -687,14 +766,14 @@ Then, reboot manually:
   Shell> reset

 FPGA: Select Corstone-1000 Linux kernel boot
-==============================================
+============================================

 Remove the USB stick before u-boot is reached so the Corstone-1000 kernel will be detected and used for booting.

 **NOTE:** Otherwise, the execution ends up in the ACS live image.

 FVP: Select Corstone-1000 Linux kernel boot
-==============================================
+===========================================

 Interrupt the u-boot shell.

@@ -708,15 +787,14 @@ Run the following commands in order to run the Corstone-1000 Linux kernel and be

 ::

-   $ run retrieve_kernel_load_addr
   $ unzip $kernel_addr 0x90000000
   $ loadm 0x90000000 $kernel_addr_r 0xf00000
   $ bootefi $kernel_addr_r $fdtcontroladdr


-***********************
+*********************
 Capsule update status
-***********************
+*********************

 Positive scenario
 =================
@@ -733,7 +811,8 @@ correctly.
  SysTick_Handler: counted = 30, expiring on = 360
  ...
  metadata_write: success: active = 1, previous = 0
-  accept_full_capsule: exit: fwu state is changed to regular
+  flash_full_capsule: exit
+  corstone1000_fwu_flash_image: exit: ret = 0
  ...


@@ -775,15 +854,19 @@ see appropriate logs in the secure enclave terminal.
  ...  
    uefi_capsule_retrieve_images: image 0 at 0xa0000070, size=15654928
    uefi_capsule_retrieve_images: exit
-    flash_full_capsule: enter: image = 0x0xa0000070, size = 15654928, version = 10
+    flash_full_capsule: enter: image = 0x0xa0000070, size = 7764541, version = 5
    ERROR: flash_full_capsule: version error
    private_metadata_write: enter: boot_index = 1
    private_metadata_write: success
    fmp_set_image_info:133 Enter
    FMP image update: image id = 0
-    FMP image update: status = 1version=11 last_attempt_version=10.
+    FMP image update: status = 1version=6 last_attempt_version=5.
    fmp_set_image_info:157 Exit.
    corstone1000_fwu_flash_image: exit: ret = -1
+    fmp_get_image_info:232 Enter
+    pack_image_info:207 ImageInfo size = 105, ImageName size = 34, ImageVersionName
+    size = 36
+    fmp_get_image_info:236 Exit
  ...


@@ -825,54 +908,96 @@ In the Linux command-line run the following:
   lowest_supported_fw_ver:	0

 Linux distros tests
----------------------------------
+-------------------

-***************************************************************************************
-Debian/OpenSUSE install and boot (applicable to FPGA only)
-***************************************************************************************
+*************************************************************
+Debian install and boot preparation (applicable to FPGA only)
+*************************************************************

-To test Linux distro install and boot, the user should prepare two empty USB sticks (minimum size should be 4GB and formatted with FAT32).
+There is a known issue in the `Shim 15.7 <https://salsa.debian.org/efi-team/shim/-/tree/upstream/15.7?ref_type=tags>`__
+provided with the Debian installer image (see below). This bug causes a fatal
+error when attempting to boot media installer for Debian, and it resets the MPS3 before installation starts.
+A patch to be applied to the Corstone-1000 stack (only applicable when
+installing Debian) is provided to
+`Skip the Shim <https://gitlab.arm.com/arm-reference-solutions/systemready-patch/-/blob/CORSTONE1000-2023.06/embedded-a/corstone1000/shim/0001-arm-bsp-u-boot-corstone1000-Skip-the-shim-by-booting.patch>`__.
+This patch makes U-Boot automatically bypass the Shim and run grub and allows
+the user to proceed with a normal installation. If at the moment of reading this
+document the problem is solved in the Shim, the user is encouraged to try the
+corresponding new installer image. Otherwise, please apply the patch as
+indicated by the instructions listed below. These instructions assume that the
+user has already built the stack by following the build steps of this
+documentation.
+
+::
+
+  cd <_workspace>
+  git clone https://git.gitlab.arm.com/arm-reference-solutions/systemready-patch.git -b CORSTONE1000-2023.06
+  cp -f systemready-patch/embedded-a/corstone1000/shim/0001-arm-bsp-u-boot-corstone1000-Skip-the-shim-by-booting.patch meta-arm
+  cd meta-arm
+  git am 0001-arm-bsp-u-boot-corstone1000-Skip-the-shim-by-booting.patch
+  cd ..
+  kas shell meta-arm/kas/corstone1000-mps3.yml -c="bitbake u-boot trusted-firmware-a corstone1000-image -c cleansstate; bitbake corstone1000-image"
+
+Please update the cs1000.bin on the SD card with the newly generated wic file.
+
+*************************************************
+Debian/openSUSE install (applicable to FPGA only)
+*************************************************
+
+To test Linux distro install and boot, the user should prepare two empty USB
+sticks (minimum size should be 4GB and formatted with FAT32).

 Download one of following Linux distro images:
- - Debian installer image: https://cdimage.debian.org/cdimage/weekly-builds/arm64/iso-dvd/
- - OpenSUSE Tumbleweed installer image: http://download.opensuse.org/ports/aarch64/tumbleweed/iso/
-   - The user should look for a DVD Snapshot like openSUSE-Tumbleweed-DVD-aarch64-Snapshot<date>-Media.iso
+ - `Debian 12.0.0 installer image <https://cdimage.debian.org/debian-cd/current/arm64/iso-dvd/debian-12.0.0-arm64-DVD-1.iso>`__
+ - `OpenSUSE Tumbleweed installer image <http://download.opensuse.org/ports/aarch64/tumbleweed/iso/>`__

-Once the .iso file is downloaded, the .iso file needs to be flashed to your USB drive.
+**NOTE:** For OpenSUSE Tumbleweed, the user should look for a DVD Snapshot like
+openSUSE-Tumbleweed-DVD-aarch64-Snapshot<date>-Media.iso

-In the given example here, we assume the USB device is ``/dev/sdb`` (the user
-should use `lsblk` command to confirm). Be cautious here and don't confuse your
-host PC's own hard drive with the USB drive. Then copy the contents of an iso
-file into the first USB stick, run:
+Once the iso file is downloaded, the iso file needs to be flashed to your USB
+drive. This can be done with your development machine.
+
+In the example given below, we assume the USB device is ``/dev/sdb`` (the user
+should use the `lsblk` command to confirm).
+
+**NOTE:** Please don't confuse your host PC's own hard drive with the USB drive.
+Then, copy the contents of the iso file into the first USB stick by running the
+following command in the development machine:

 ::

  sudo dd if=<path-to-iso_file> of=/dev/sdb iflag=direct oflag=direct status=progress bs=1M; sync;

-Boot the MSP3 board with the first USB stick connected. Open following minicom sessions:
+Unplug the first USB stick from the development machine and connect it to the
+MSP3 board. At this moment, only the first USB stick should be connected. Open
+the following picocom sessions in your development machine:

 ::

  sudo picocom -b 115200 /dev/ttyUSB0  # in one terminal
  sudo picocom -b 115200 /dev/ttyUSB2  # in another terminal.

-Now plug in the second USB stick (once installation screen is visible), the distro installation process will start. The installation prompt can be seen in ttyUSB2. If installer does not start, please try to reboot the board with both USB sticks connected and repeat the process.
+When the installation screen is visible in ttyUSB2, plug in the second USB stick
+in the MPS3 and start the distro installation process. If the installer does not
+start, please try to reboot the board with both USB sticks connected and repeat
+the process.

 **NOTE:** Due to the performance limitation of Corstone-1000 MPS3 FPGA, the
 distro installation process can take up to 24 hours to complete.

-Once installation is complete, unplug the first USB stick and reboot the board.
-After successfully installing and booting the Linux distro, the user should see
-a login prompt:
+*******************************************************
+Debian install clarifications (applicable to FPGA only)
+*******************************************************

-::
+As the installation process for Debian is different than the one for openSUSE,
+Debian may need some extra steps, that are indicated below:

-  debian login:
+During Debian installation, please answer the following question:
+ - "Force GRUB installation to the EFI removable media path?" Yes
+ - "Update NVRAM variables to automatically boot into Debian?" No

-Login with the username root.
-
-**NOTE:** The Debian installer has a known issue "Install the GRUB bootloader - unable to install " and these are the steps to
-follow on the subsequent popups to solve the issue during the installation:
+If the grub installation fails, these are the steps to follow on the subsequent
+popups:

 1. Select "Continue", then "Continue" again on the next popup
 2. Scroll down and select "Execute a shell"
@@ -898,19 +1023,59 @@ follow on the subsequent popups to solve the issue during the installation:
 7. Select "Continue without boot loader", then select "Continue" on the next popup
 8. At this stage, the installation should proceed as normal.

-***************************************************************************************
-OpenSUSE Raw image install and boot (applicable to FVP only)
-***************************************************************************************
+*****************************************************************
+Debian/openSUSE boot after installation (applicable to FPGA only)
+*****************************************************************

-Steps to download openSUSE Tumbleweed raw image:
-  - Go to: http://download.opensuse.org/ports/aarch64/tumbleweed/appliances/
-  - The user should look for a Tumbleweed-ARM-JeOS-efi.aarch64-* Snapshot, for example, ``openSUSE-Tumbleweed-ARM-JeOS-efi.aarch64-<date>-Snapshot<date>.raw.xz``
+Once the installation is complete, unplug the first USB stick and reboot the
+board.
+The board will then enter recovery mode, from which the user can access a shell
+after entering the password for the root user. Proceed to edit the following
+files accordingly:
+
+::
+
+  vi /etc/systemd/system.conf
+  DefaultDeviceTimeoutSec=infinity
+
+The file to be editted next is different depending on the installed distro:
+
+::
+
+  vi /etc/login.defs # Only applicable to Debian
+  vi /usr/etc/login.defs # Only applicable to openSUSE
+  LOGIN_TIMEOUT   180
+
+To make sure the changes are applied, please run:
+
+::
+
+  systemctl daemon-reload
+
+After applying the previous commands, please reboot the board. The user should
+see a login prompt after booting, for example, for debian:
+
+::
+
+  debian login:
+
+Login with the username root and its corresponding password (already set at
+installation time).
+
+************************************************************
+OpenSUSE Raw image install and boot (applicable to FVP only)
+************************************************************
+
+Steps to download OpenSUSE Tumbleweed raw image:
+  - Under `OpenSUSE Tumbleweed appliances <http://download.opensuse.org/ports/aarch64/tumbleweed/appliances/>`__
+  - The user should look for a Tumbleweed-ARM-JeOS-efi.aarch64-* Snapshot, for example,
+    ``openSUSE-Tumbleweed-ARM-JeOS-efi.aarch64-<date>-Snapshot<date>.raw.xz``

 Once the .raw.xz file is downloaded, the raw image file needs to be extracted:

 ::

-       unxz <file-name.raw.xz>
+   unxz <file-name.raw.xz>


 The above command will generate a file ending with extension .raw image. Now, use the following command
@@ -918,23 +1083,23 @@ to run FVP with raw image installation process.

 ::

-<_workspace>/meta-arm/scripts/runfvp --terminals=xterm <_workspace>/build/tmp/deploy/images/corstone1000-fvp/corstone1000-image-corstone1000-fvp.fvpconf -- -C board.msd_mmc.p_mmc_file="${openSUSE raw image file path}" 
+   <_workspace>/meta-arm/scripts/runfvp --terminals=xterm <_workspace>/build/tmp/deploy/images/corstone1000-fvp/corstone1000-image-corstone1000-fvp.fvpconf -- -C board.msd_mmc.p_mmc_file="${openSUSE raw image file path}"

 After successfully installing and booting the Linux distro, the user should see
 a openSUSE login prompt.

 ::

-      localhost login:
+   localhost login:

 Login with the username 'root' and password 'linux'.

 PSA API tests
----------------------
+-------------

-***************************************************************************************
+***********************************************************
 Run PSA API test commands (applicable to both FPGA and FVP)
-***************************************************************************************
+***********************************************************

 When running PSA API test commands (aka PSA Arch Tests) on MPS3 FPGA, the user should make sure there is no
 USB stick connected to the board. Power on the board and boot the board to
@@ -948,7 +1113,7 @@ First, load FF-A TEE kernel module:

 ::

-  insmod /lib/modules/5.19.14-yocto-standard/extra/arm-ffa-tee.ko
+  insmod /lib/modules/6.1.32-yocto-standard/extra/arm-ffa-tee.ko

 Then, check whether the FF-A TEE driver is loaded correctly by using the following command:

@@ -960,7 +1125,7 @@ The output should be:

 ::

-   arm_ffa_tee 16384 - - Live 0xffffffc0004f0000 (O)
+   arm_ffa_tee 16384 - - Live 0xffffffc000510000 (O)

 Now, run the PSA API tests in the following order:

@@ -971,15 +1136,17 @@ Now, run the PSA API tests in the following order:
  psa-its-api-test
  psa-ps-api-test

-External System tests
-----------------------------------
+**NOTE:** The psa-crypto-api-test takes between 30 minutes to 1 hour to run.

-***************************************************************************************
+External System tests
+---------------------
+
+**************************************************************
 Running the External System test command (systems-comms-tests)
-***************************************************************************************
+**************************************************************

 Test 1: Releasing the External System out of reset
-===================================================
+==================================================

 Run this command in the Linux command-line:

@@ -1004,7 +1171,7 @@ The output on the External System terminal should be:
   MHUv2 module 'MHU1_SE' started

 Test 2: Communication
-=============================================
+=====================

 Test 2 releases the External System out of reset if not already done. Then, it performs communication between host and External System.

@@ -1014,7 +1181,7 @@ After running Test 1, run this command in the Linux command-line:

  systems-comms-tests 2

-Additional output on the External System terminal will be printed:  
+Additional output on the External System terminal will be printed:

 ::

@@ -1058,13 +1225,13 @@ The output on the Host terminal should be:


 Tests results
-----------------------------------
+-------------

-As a reference for the end user, reports for various tests for `Corstone-1000 software (CORSTONE1000-2022.11.23) <https://git.yoctoproject.org/meta-arm/tag/?h=CORSTONE1000-2022.11.23>`__
-can be found in `here <https://gitlab.arm.com/arm-reference-solutions/arm-reference-solutions-test-report/-/tree/master/embedded-a/corstone1000>`__.
+As a reference for the end user, reports for various tests for `Corstone-1000 software (CORSTONE1000-2023.06) <https://git.yoctoproject.org/meta-arm/tag/?h=CORSTONE1000-2023.06>`__
+can be found `here <https://gitlab.arm.com/arm-reference-solutions/arm-reference-solutions-test-report/-/tree/master/embedded-a/corstone1000>`__.

 Running the software on FVP on Windows
---------------------------------------------------------------
+--------------------------------------

 If the user needs to run the Corstone-1000 software on FVP on Windows. The user
 should follow the build instructions in this document to build on Linux host
@@ -1073,6 +1240,7 @@ and launch the FVP binary.

 --------------

-*Copyright (c) 2022, Arm Limited. All rights reserved.*
+*Copyright (c) 2022-2023, Arm Limited. All rights reserved.*

 .. _Arm Ecosystem FVPs: https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
+.. _U-Boot repo: https://github.com/u-boot/u-boot.git
@@ -0,0 +1,42 @@
+From 2d305094f8f500362079e9e7637d46129bf980e4 Mon Sep 17 00:00:00 2001
+From: Adam Johnston <adam.johnston@arm.com>
+Date: Tue, 25 Jul 2023 16:05:51 +0000
+Subject: [PATCH] n1sdp: Reserve OP-TEE memory from NWd
+
+The physical memory which is used to run OP-TEE on the N1SDP is known
+to the secure world via TOS_FW_CONFIG, but it may not be known to the
+normal world.
+
+As a precaution, explicitly reserve this memory via NT_FW_CONFIG to
+prevent the normal world from using it. This is not required on most
+platforms as the Trusted OS is run from secure RAM.
+
+Upstream-Status: Pending (not yet submitted to upstream)
+Signed-off-by: Adam Johnston <adam.johnston@arm.com>
+Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>
+---
+ plat/arm/board/n1sdp/fdts/n1sdp_nt_fw_config.dts | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/plat/arm/board/n1sdp/fdts/n1sdp_nt_fw_config.dts b/plat/arm/board/n1sdp/fdts/n1sdp_nt_fw_config.dts
+index da5e04ddb6..b7e2d4e86f 100644
+--- a/plat/arm/board/n1sdp/fdts/n1sdp_nt_fw_config.dts
+++ b/plat/arm/board/n1sdp/fdts/n1sdp_nt_fw_config.dts
+@@ -20,4 +20,16 @@
+ 		local-ddr-size = <0x0>;
+ 		remote-ddr-size = <0x0>;
+ 	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		optee@0xDE000000 {
+			compatible = "removed-dma-pool";
+			reg = <0x0 0xDE000000 0x0 0x02000000>;
+			no-map;
+		};
+	};
+ };
+\ No newline at end of file
@@ -0,0 +1,30 @@
+From 15dab90c3cb8e7677c4f953c2269e8ee1afa01b0 Mon Oct 2 13:45:43 2023
+From: Mariam Elshakfy <mariam.elshakfy@arm.com>
+Date: Mon, 2 Oct 2023 13:45:43 +0000
+Subject: [PATCH] Modify BL32 Location to DDR4
+
+Since OP-TEE start address is changed to run
+from DDR4, this patch changes BL32 entrypoint
+to the correct one.
+
+Upstream-Status: Pending (not yet submitted to upstream)
+Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>
+---
+ plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts b/plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts
+index ed870803c..797dfe3a4 100644
+--- a/plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts
+++ b/plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts
+@@ -22,8 +22,8 @@
+ 		maj_ver = <0x1>;
+ 		min_ver = <0x0>;
+ 		exec_state = <0x0>;
+-		load_address = <0x0 0x08000000>;
+-		entrypoint = <0x0 0x08000000>;
+		load_address = <0x0 0xDE000000>;
+		entrypoint = <0x0 0xDE000000>;
+ 		binary_size = <0x2000000>;
+ 	};
+ 
@@ -0,0 +1,28 @@
+From 9a1d11b9fbadf740c73aee6dca4fd0370b38e4a8 Tue Oct 3 13:49:13 2023
+From: Mariam Elshakfy <mariam.elshakfy@arm.com>
+Date: Tue, 3 Oct 2023 13:49:13 +0000
+Subject: [PATCH] Modify SPMC Base to DDR4
+
+Since OP-TEE start address is changed to run
+from DDR4, this patch changes SPMC base to 
+the correct one.
+
+Upstream-Status: Pending (not yet submitted to upstream)
+Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>
+---
+ plat/arm/board/n1sdp/include/platform_def.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/plat/arm/board/n1sdp/include/platform_def.h b/plat/arm/board/n1sdp/include/platform_def.h
+index b3799a7b2..b12c61b61 100644
+--- a/plat/arm/board/n1sdp/include/platform_def.h
+++ b/plat/arm/board/n1sdp/include/platform_def.h
+@@ -118,7 +118,7 @@
+ 
+ #define PLAT_ARM_MAX_BL31_SIZE		UL(0x40000)
+ 
+-#define PLAT_ARM_SPMC_BASE		U(0x08000000)
+#define PLAT_ARM_SPMC_BASE		U(0xDE000000)
+ #define PLAT_ARM_SPMC_SIZE		UL(0x02000000)  /* 32 MB */
+ 
+ 
@@ -37,6 +37,7 @@ EXTRA_OEMAKE:append = " \
                        NR_OF_IMAGES_IN_FW_BANK=4 \
                        COT=tbbr \
                        ARM_ROTPK_LOCATION=devel_rsa  \
+                        ERRATA_A35_855472=1 \
                        ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem \
                        BL32=${RECIPE_SYSROOT}/lib/firmware/tee-pager_v2.bin \
                        LOG_LEVEL=50 \
@@ -9,6 +9,14 @@ TFA_MBEDTLS        = "1"
 TFA_UBOOT          = "0"
 TFA_UEFI           = "1"

+FILESEXTRAPATHS:prepend := "${THISDIR}/files/n1sdp:"
+
+SRC_URI:append = " \ 
+    file://0001-Reserve-OP-TEE-memory-from-nwd.patch \
+    file://0002-Modify-BL32-Location-to-DDR4.patch \
+    file://0003-Modify-SPMC-Base-to-DDR4.patch \
+    "
+
 TFA_ROT_KEY= "plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem"

 # Enabling Secure-EL1 Payload Dispatcher (SPD)
@@ -0,0 +1,29 @@
+From 77c5a3bd090955e48ffca92bf9535185d26e9017 Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <emekcan.aras@arm.com>
+Date: Mon, 15 May 2023 10:42:23 +0100
+Subject: [PATCH 2/4] Platform: corstone1000: Increase BL2 size in flash layout
+
+Increases BL2 size to align with the flash page size in corstone1000.
+
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+Upstream-Status: Pending [Not submitted to upstream yet]
+---
+ platform/ext/target/arm/corstone1000/partition/flash_layout.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/platform/ext/target/arm/corstone1000/partition/flash_layout.h b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
+index 41b4c6323f..bfe8c4fb3c 100644
+--- a/platform/ext/target/arm/corstone1000/partition/flash_layout.h
+++ b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
+@@ -89,7 +89,7 @@
+ #endif
+ 
+ /* Static Configurations of the Flash */
+-#define SE_BL2_PARTITION_SIZE           (0x18800)    /* 98 KB */
+#define SE_BL2_PARTITION_SIZE           (0x19000)    /* 98 KB */
+ #define SE_BL2_BANK_0_OFFSET            (0x9000)  /* 72nd LBA */
+ #define SE_BL2_BANK_1_OFFSET            (0x1002000)  /* 32784th LBA */
+ 
+-- 
+2.17.1
+
@@ -0,0 +1,33 @@
+From 17244ac692495c23008ff784611d0ee1d42c83dc Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <emekcan.aras@arm.com>
+Date: Mon, 15 May 2023 10:46:18 +0100
+Subject: [PATCH 3/4] Platform: Corstone1000: Increase BL2_DATA_SIZE
+
+Increases BL2_DATA_SIZE to accommodate the changes in
+metadata_write/read.
+
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+Upstream-Status: Pending [Not submitted to upstream yet]
+---
+ platform/ext/target/arm/corstone1000/partition/region_defs.h | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/platform/ext/target/arm/corstone1000/partition/region_defs.h b/platform/ext/target/arm/corstone1000/partition/region_defs.h
+index abfac39b62..e7f0bad2ba 100644
+--- a/platform/ext/target/arm/corstone1000/partition/region_defs.h
+++ b/platform/ext/target/arm/corstone1000/partition/region_defs.h
+@@ -90,9 +90,10 @@
+ #define BL2_CODE_SIZE     (IMAGE_BL2_CODE_SIZE)
+ #define BL2_CODE_LIMIT    (BL2_CODE_START + BL2_CODE_SIZE - 1)
+ 
+#define BL2_DATA_ADDITIONAL 448 /* To increase the BL2_DATA_SIZE more than the default value */
+ #define BL2_DATA_START    (BOOT_TFM_SHARED_DATA_BASE + \
+                            BOOT_TFM_SHARED_DATA_SIZE)
+-#define BL2_DATA_SIZE     (BL2_CODE_START - BL2_HEADER_SIZE - BL2_DATA_START)
+#define BL2_DATA_SIZE     (BL2_CODE_START - BL2_HEADER_SIZE - BL2_DATA_START + BL2_DATA_ADDITIONAL)
+ #define BL2_DATA_LIMIT    (BL2_DATA_START + BL2_DATA_SIZE - 1)
+ 
+ /* SE BL1 regions */
+-- 
+2.17.1
+
@@ -0,0 +1,71 @@
+From 83e423497afecc202a3a50c3e472161390056ebd Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <emekcan.aras@arm.com>
+Date: Mon, 15 May 2023 10:47:27 +0100
+Subject: [PATCH 4/4] Platform: Corstone1000: Calculate the new CRC32 value
+ after changing the metadata
+
+Calculates the new CRC32 value for the metadata struct after chaing a value
+during the capsule update. It also updates the CRC32 field in the metadata
+so it doesn't fail the CRC check after a succesfull capsule update.
+It also skips doing a sanity check the BL2 nv counter after the capsule
+update since the tfm bl1 does not sync metadata and nv counters in OTP during
+the boot anymore.
+
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+Upstream-Status: Pending [Not submitted to upstream yet]
+---
+ .../arm/corstone1000/fw_update_agent/fwu_agent.c       | 10 +++++++---
+ 1 file changed, 7 insertions(+), 3 deletions(-)
+
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+index afd8d66e42..f564f2902c 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+@@ -802,6 +802,8 @@ static enum fwu_agent_error_t flash_full_capsule(
+     }
+     metadata->active_index = previous_active_index;
+     metadata->previous_active_index = active_index;
+    metadata->crc_32 = crc32((uint8_t *)&metadata->version,
+                              sizeof(struct fwu_metadata) - sizeof(uint32_t));
+ 
+     ret = metadata_write(metadata);
+     if (ret) {
+@@ -913,6 +915,8 @@ static enum fwu_agent_error_t accept_full_capsule(
+     if (ret) {
+         return ret;
+     }
+    metadata->crc_32 = crc32((uint8_t *)&metadata->version,
+                              sizeof(struct fwu_metadata) - sizeof(uint32_t));
+ 
+     ret = metadata_write(metadata);
+     if (ret) {
+@@ -1007,6 +1011,8 @@ static enum fwu_agent_error_t fwu_select_previous(
+     if (ret) {
+         return ret;
+     }
+    metadata->crc_32 = crc32((uint8_t *)&metadata->version,
+                              sizeof(struct fwu_metadata) - sizeof(uint32_t));
+ 
+     ret = metadata_write(metadata);
+     if (ret) {
+@@ -1119,8 +1125,7 @@ static enum fwu_agent_error_t update_nv_counters(
+ 
+     FWU_LOG_MSG("%s: enter\n\r", __func__);
+ 
+-    for (int i = 0; i <= FWU_MAX_NV_COUNTER_INDEX; i++) {
+-
+    for (int i = 1; i <= FWU_MAX_NV_COUNTER_INDEX; i++) {
+         switch (i) {
+             case FWU_BL2_NV_COUNTER:
+                 tfm_nv_counter_i = PLAT_NV_COUNTER_BL1_0;
+@@ -1141,7 +1146,6 @@ static enum fwu_agent_error_t update_nv_counters(
+         if (err != TFM_PLAT_ERR_SUCCESS) {
+             return FWU_AGENT_ERROR;
+         }
+-
+         if (priv_metadata->nv_counter[i] < security_cnt) {
+             return FWU_AGENT_ERROR;
+         } else if (priv_metadata->nv_counter[i] > security_cnt) {
+-- 
+2.17.1
+
@@ -0,0 +1,29 @@
+From ef97f7083279565dab45a550139935d741f159a9 Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <emekcan.aras@arm.com>
+Date: Fri, 29 Sep 2023 09:57:19 +0100
+Subject: [PATCH] platform: corstone1000: Increase ITS max asset size
+
+Increases the max asset size for ITS to enable parsec services & tests
+
+Upstream-Status: Pending
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+Signed-off-by: Vikas Katariya <vikas.katariya@arm.com>
+---
+ platform/ext/target/arm/corstone1000/config_tfm_target.h | 5 +++++
+ 1 files changed, 5 insertions(+)
+
+diff --git a/platform/ext/target/arm/corstone1000/config_tfm_target.h b/platform/ext/target/arm/corstone1000/config_tfm_target.h
+index e968366639..3f6e8477e5 100644
+--- a/platform/ext/target/arm/corstone1000/config_tfm_target.h
+++ b/platform/ext/target/arm/corstone1000/config_tfm_target.h
+@@ -24,4 +24,9 @@
+ #undef PS_NUM_ASSETS
+ #define PS_NUM_ASSETS        20
+
+/* The maximum size of asset to be stored in the Internal Trusted Storage area. */
+#undef ITS_MAX_ASSET_SIZE
+#define ITS_MAX_ASSET_SIZE        2048
+
+
+ #endif /* __CONFIG_TFM_TARGET_H__ */
+-- 
@@ -48,7 +48,11 @@ SRC_URI:append:corstone1000 = " \
    file://0010-Platform-corstone1000-Adds-compiler-flags-to-FWU-age.patch      \
    file://0011-Platform-corstone1000-adjust-PS-asset-configuration.patch       \
    file://0012-Platform-corstone1000-Increase-number-of-assets.patch           \
+    file://0013-Platform-corstone1000-Increase-BL2-size-in-flash-lay.patch      \
+    file://0014-Platform-Corstone1000-Increase-BL2_DATA_SIZE.patch              \
+    file://0015-Platform-Corstone1000-Calculate-the-new-CRC32-value-.patch      \
    file://corstone1000/rwx.patch                                               \
+    file://0016-platform-corstone1000-increase-ITS-max-asset-size.patch         \
    "

 # TF-M ships patches for external dependencies that needs to be applied
@@ -1,7 +1,7 @@
-From f1f1780630302e1d7cab95d1c6dc32e2fc0bdd70 Mon Sep 17 00:00:00 2001
+From 5ce8bf4ad1aeb2657a7ab83c46eeb2cdaa56cfd4 Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Fri, 29 Jul 2022 13:06:19 +0100
-Subject: [PATCH 01/27] arm64: smccc: add support for SMCCCv1.2 x0-x17
+Subject: [PATCH 01/42] arm64: smccc: add support for SMCCCv1.2 x0-x17
 registers

 add support for x0-x17 registers used by the SMC calls
@@ -48,7 +48,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 3 files changed, 110 insertions(+)

 diff --git a/arch/arm/cpu/armv8/smccc-call.S b/arch/arm/cpu/armv8/smccc-call.S
-index dc92b28777c3..ec6f299bc929 100644
+index dc92b28777..ec6f299bc9 100644
 --- a/arch/arm/cpu/armv8/smccc-call.S
 +++ b/arch/arm/cpu/armv8/smccc-call.S
@@ -1,6 +1,8 @@
@@ -116,7 +116,7 @@ index dc92b28777c3..ec6f299bc929 100644
 +
 +#endif
 diff --git a/arch/arm/lib/asm-offsets.c b/arch/arm/lib/asm-offsets.c
-index 22fd541f9a28..db6d7ed23428 100644
+index 22fd541f9a..db6d7ed234 100644
 --- a/arch/arm/lib/asm-offsets.c
 +++ b/arch/arm/lib/asm-offsets.c
@@ -9,6 +9,9 @@
@@ -148,7 +148,7 @@ index 22fd541f9a28..db6d7ed23428 100644
 
 	return 0;
 diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
-index e1d09884a1c5..9105031d55d3 100644
+index e1d09884a1..9105031d55 100644
 --- a/include/linux/arm-smccc.h
 +++ b/include/linux/arm-smccc.h
@@ -1,6 +1,8 @@
@@ -209,5 +209,5 @@ index e1d09884a1c5..9105031d55d3 100644
  * struct arm_smccc_quirk - Contains quirk information
  * @id: quirk identification
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 9fe30f542939824f731fda3991a1d4f66fbf3b4b Mon Sep 17 00:00:00 2001
+From 1dcebf6f57e3490f7b3e2464b4114b993dd70c7c Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Thu, 4 Aug 2022 16:46:47 +0100
-Subject: [PATCH 02/27] lib: uuid: introduce uuid_str_to_le_bin function
+Subject: [PATCH 02/42] lib: uuid: introduce uuid_str_to_le_bin function

 convert UUID string to little endian binary data

@@ -42,7 +42,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 2 files changed, 54 insertions(+)

 diff --git a/include/uuid.h b/include/uuid.h
-index 4a4883d3b5b6..293a8eb0a579 100644
+index 4a4883d3b5..293a8eb0a5 100644
 --- a/include/uuid.h
 +++ b/include/uuid.h
@@ -2,6 +2,8 @@
@@ -66,7 +66,7 @@ index 4a4883d3b5b6..293a8eb0a579 100644
 +
 #endif
 diff --git a/lib/uuid.c b/lib/uuid.c
-index 465e1ac38f57..d29f561a70df 100644
+index 465e1ac38f..d29f561a70 100644
 --- a/lib/uuid.c
 +++ b/lib/uuid.c
@@ -1,6 +1,8 @@
@@ -130,5 +130,5 @@ index 465e1ac38f57..d29f561a70df 100644
  * uuid_bin_to_str() - convert big endian binary data to string UUID or GUID.
  *
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 69cfd14c37bee479eb3cb7e6dd2df23f460f0713 Mon Sep 17 00:00:00 2001
+From 77cf1f517f6d92d5e3efb40d8335adb03b289525 Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Tue, 29 Nov 2022 14:40:05 +0000
-Subject: [PATCH 03/27] arm_ffa: introduce Arm FF-A low-level driver
+Subject: [PATCH 03/42] arm_ffa: introduce Arm FF-A low-level driver

 Add the core driver implementing Arm Firmware Framework for Armv8-A v1.0

@@ -134,7 +134,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 create mode 100644 include/arm_ffa.h

 diff --git a/MAINTAINERS b/MAINTAINERS
-index 3fc4cd0f12d3..509619d31ce6 100644
+index 3fc4cd0f12..509619d31c 100644
 --- a/MAINTAINERS
 +++ b/MAINTAINERS
@@ -264,6 +264,13 @@ F:	drivers/net/cortina_ni.h
@@ -153,7 +153,7 @@ index 3fc4cd0f12d3..509619d31ce6 100644
 M:	Fabio Estevam <festevam@gmail.com>
 diff --git a/doc/arch/arm64.ffa.rst b/doc/arch/arm64.ffa.rst
 new file mode 100644
-index 000000000000..dfcec82e456e
+index 0000000000..dfcec82e45
 --- /dev/null
 +++ b/doc/arch/arm64.ffa.rst
@@ -0,0 +1,218 @@
@@ -376,7 +376,7 @@ index 000000000000..dfcec82e456e
 +------------
 +   * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 diff --git a/doc/arch/index.rst b/doc/arch/index.rst
-index b3e85f9bf347..cf1cfc9287c2 100644
+index b3e85f9bf3..cf1cfc9287 100644
 --- a/doc/arch/index.rst
 +++ b/doc/arch/index.rst
@@ -8,6 +8,7 @@ Architecture-specific doc
@@ -388,7 +388,7 @@ index b3e85f9bf347..cf1cfc9287c2 100644
    mips
    nios2
 diff --git a/drivers/Kconfig b/drivers/Kconfig
-index 75ac149d3118..ff75b7c3f883 100644
+index 75ac149d31..ff75b7c3f8 100644
 --- a/drivers/Kconfig
 +++ b/drivers/Kconfig
@@ -6,6 +6,8 @@ source "drivers/core/Kconfig"
@@ -401,7 +401,7 @@ index 75ac149d3118..ff75b7c3f883 100644
 
 source "drivers/axi/Kconfig"
 diff --git a/drivers/Makefile b/drivers/Makefile
-index 6f1de58e0030..28c8f538c83a 100644
+index 6f1de58e00..28c8f538c8 100644
 --- a/drivers/Makefile
 +++ b/drivers/Makefile
@@ -112,6 +112,7 @@ obj-y += iommu/
@@ -414,7 +414,7 @@ index 6f1de58e0030..28c8f538c83a 100644
 obj-$(CONFIG_W1) += w1/
 diff --git a/drivers/firmware/arm-ffa/Kconfig b/drivers/firmware/arm-ffa/Kconfig
 new file mode 100644
-index 000000000000..e4914b9bc779
+index 0000000000..e4914b9bc7
 --- /dev/null
 +++ b/drivers/firmware/arm-ffa/Kconfig
@@ -0,0 +1,30 @@
@@ -450,7 +450,7 @@ index 000000000000..e4914b9bc779
 +
 diff --git a/drivers/firmware/arm-ffa/Makefile b/drivers/firmware/arm-ffa/Makefile
 new file mode 100644
-index 000000000000..043a8915bec5
+index 0000000000..043a8915be
 --- /dev/null
 +++ b/drivers/firmware/arm-ffa/Makefile
@@ -0,0 +1,6 @@
@@ -462,7 +462,7 @@ index 000000000000..043a8915bec5
 +obj-y += arm-ffa-uclass.o core.o
 diff --git a/drivers/firmware/arm-ffa/arm-ffa-uclass.c b/drivers/firmware/arm-ffa/arm-ffa-uclass.c
 new file mode 100644
-index 000000000000..7d9695d28922
+index 0000000000..7d9695d289
 --- /dev/null
 +++ b/drivers/firmware/arm-ffa/arm-ffa-uclass.c
@@ -0,0 +1,16 @@
@@ -484,7 +484,7 @@ index 000000000000..7d9695d28922
 +};
 diff --git a/drivers/firmware/arm-ffa/arm_ffa_prv.h b/drivers/firmware/arm-ffa/arm_ffa_prv.h
 new file mode 100644
-index 000000000000..4eea7dc03604
+index 0000000000..4eea7dc036
 --- /dev/null
 +++ b/drivers/firmware/arm-ffa/arm_ffa_prv.h
@@ -0,0 +1,200 @@
@@ -690,7 +690,7 @@ index 000000000000..4eea7dc03604
 +#endif
 diff --git a/drivers/firmware/arm-ffa/core.c b/drivers/firmware/arm-ffa/core.c
 new file mode 100644
-index 000000000000..0b1f8e6a078d
+index 0000000000..0b1f8e6a07
 --- /dev/null
 +++ b/drivers/firmware/arm-ffa/core.c
@@ -0,0 +1,1315 @@
@@ -2011,7 +2011,7 @@ index 000000000000..0b1f8e6a078d
 +};
 diff --git a/include/arm_ffa.h b/include/arm_ffa.h
 new file mode 100644
-index 000000000000..74b16174c292
+index 0000000000..74b16174c2
 --- /dev/null
 +++ b/include/arm_ffa.h
@@ -0,0 +1,97 @@
@@ -2113,7 +2113,7 @@ index 000000000000..74b16174c292
 +
 +#endif
 diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
-index 376f741cc2bb..fa08a66ac8e0 100644
+index 376f741cc2..fa08a66ac8 100644
 --- a/include/dm/uclass-id.h
 +++ b/include/dm/uclass-id.h
@@ -4,6 +4,9 @@
@@ -2135,5 +2135,5 @@ index 376f741cc2bb..fa08a66ac8e0 100644
 	UCLASS_FPGA,		/* FPGA device */
 	UCLASS_FUZZING_ENGINE,	/* Fuzzing engine */
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 7d2c73749107a5859c7158a859a62c3e8b2d33e2 Mon Sep 17 00:00:00 2001
+From b09b391e33e024a18842dfdc99282d0050cc5fcb Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Thu, 6 Oct 2022 15:04:25 +0100
-Subject: [PATCH 04/27] arm_ffa: efi: unmap RX/TX buffers
+Subject: [PATCH 04/42] arm_ffa: efi: unmap RX/TX buffers

 unmap RX/TX buffers at ExitBootServices()

@@ -32,7 +32,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 1 file changed, 13 insertions(+)

 diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
-index e65ca6a4cbee..3481f2afe7a9 100644
+index e65ca6a4cb..3481f2afe7 100644
 --- a/lib/efi_loader/efi_boottime.c
 +++ b/lib/efi_loader/efi_boottime.c
@@ -3,6 +3,9 @@
@@ -70,5 +70,5 @@ index e65ca6a4cbee..3481f2afe7a9 100644
 	efi_runtime_detach();
 
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From c6b116c4793449775064a8fc949a3b607b7ade27 Mon Sep 17 00:00:00 2001
+From f3bc86a7ec63c0454577cb6712395c577b2cfd66 Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Mon, 6 Jun 2022 12:46:38 +0100
-Subject: [PATCH 05/27] arm_ffa: introduce armffa command
+Subject: [PATCH 05/42] arm_ffa: introduce armffa command

 Provide armffa command showcasing the use of the FF-A driver

@@ -59,7 +59,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 create mode 100644 cmd/armffa.c

 diff --git a/MAINTAINERS b/MAINTAINERS
-index 509619d31ce6..61ce6c436fe1 100644
+index 509619d31c..61ce6c436f 100644
 --- a/MAINTAINERS
 +++ b/MAINTAINERS
@@ -267,6 +267,7 @@ F:	configs/cortina_presidio-asic-pnand_defconfig
@@ -71,7 +71,7 @@ index 509619d31ce6..61ce6c436fe1 100644
 F:	drivers/firmware/arm-ffa/
 F:	include/arm_ffa.h
 diff --git a/cmd/Kconfig b/cmd/Kconfig
-index b2d75987170e..7d0a40e8acb4 100644
+index b2d7598717..7d0a40e8ac 100644
 --- a/cmd/Kconfig
 +++ b/cmd/Kconfig
@@ -924,6 +924,16 @@ endmenu
@@ -92,7 +92,7 @@ index b2d75987170e..7d0a40e8acb4 100644
 	#depends on FLASH_CFI_DRIVER
 	bool "armflash"
 diff --git a/cmd/Makefile b/cmd/Makefile
-index 0b6a96c1d914..c757f1647da6 100644
+index 0b6a96c1d9..c757f1647d 100644
 --- a/cmd/Makefile
 +++ b/cmd/Makefile
@@ -12,6 +12,8 @@ obj-y += panic.o
@@ -106,7 +106,7 @@ index 0b6a96c1d914..c757f1647da6 100644
 obj-$(CONFIG_CMD_AES) += aes.o
 diff --git a/cmd/armffa.c b/cmd/armffa.c
 new file mode 100644
-index 000000000000..d2e8687bfb1f
+index 0000000000..d2e8687bfb
 --- /dev/null
 +++ b/cmd/armffa.c
@@ -0,0 +1,237 @@
@@ -348,7 +348,7 @@ index 000000000000..d2e8687bfb1f
 +	   "devlist\n"
 +	   "	 - displays the arm_ffa device info\n");
 diff --git a/drivers/firmware/arm-ffa/Kconfig b/drivers/firmware/arm-ffa/Kconfig
-index e4914b9bc779..be4df89d23fa 100644
+index e4914b9bc7..be4df89d23 100644
 --- a/drivers/firmware/arm-ffa/Kconfig
 +++ b/drivers/firmware/arm-ffa/Kconfig
@@ -4,6 +4,7 @@ config ARM_FFA_TRANSPORT
@@ -360,5 +360,5 @@ index e4914b9bc779..be4df89d23fa 100644
 	select DEVRES
 	help
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 49ed44c01f7e93d614483fc2d3cc7034808e9c07 Mon Sep 17 00:00:00 2001
+From 301430b7c8dceebe349b82c598097628da733090 Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Tue, 29 Nov 2022 14:44:36 +0000
-Subject: [PATCH 06/27] arm_ffa: introduce the FF-A Sandbox driver
+Subject: [PATCH 06/42] arm_ffa: introduce the FF-A Sandbox driver

 Provide a Sandbox driver to emulate the FF-A ABIs

@@ -53,7 +53,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 create mode 100644 include/sandbox_arm_ffa.h

 diff --git a/MAINTAINERS b/MAINTAINERS
-index 61ce6c436fe1..297d165f8401 100644
+index 61ce6c436f..297d165f84 100644
 --- a/MAINTAINERS
 +++ b/MAINTAINERS
@@ -271,6 +271,7 @@ F:	cmd/armffa.c
@@ -65,7 +65,7 @@ index 61ce6c436fe1..297d165f8401 100644
 ARM FREESCALE IMX
 M:	Stefano Babic <sbabic@denx.de>
 diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
-index ba45ac0b71c1..4b8a1ec42bda 100644
+index ba45ac0b71..4b8a1ec42b 100644
 --- a/configs/sandbox64_defconfig
 +++ b/configs/sandbox64_defconfig
@@ -259,3 +259,5 @@ CONFIG_FWU_MULTI_BANK_UPDATE=y
@@ -76,7 +76,7 @@ index ba45ac0b71c1..4b8a1ec42bda 100644
 +CONFIG_SANDBOX_FFA=y
 \ No newline at end of file
 diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
-index be46cae7aad7..650f06ae61f7 100644
+index be46cae7aa..650f06ae61 100644
 --- a/configs/sandbox_defconfig
 +++ b/configs/sandbox_defconfig
@@ -334,3 +334,5 @@ CONFIG_TEST_FDTDEC=y
@@ -87,7 +87,7 @@ index be46cae7aad7..650f06ae61f7 100644
 +CONFIG_SANDBOX_FFA=y
 \ No newline at end of file
 diff --git a/drivers/firmware/arm-ffa/Kconfig b/drivers/firmware/arm-ffa/Kconfig
-index be4df89d23fa..b86f16d7785d 100644
+index be4df89d23..b86f16d778 100644
 --- a/drivers/firmware/arm-ffa/Kconfig
 +++ b/drivers/firmware/arm-ffa/Kconfig
@@ -2,8 +2,8 @@
@@ -111,7 +111,7 @@ index be4df89d23fa..b86f16d7785d 100644
 +	help
 +	  This emulates the FF-A handling under Sandbox and allows to test the FF-A driver
 diff --git a/drivers/firmware/arm-ffa/Makefile b/drivers/firmware/arm-ffa/Makefile
-index 043a8915bec5..0d21d6b47ab9 100644
+index 043a8915be..0d21d6b47a 100644
 --- a/drivers/firmware/arm-ffa/Makefile
 +++ b/drivers/firmware/arm-ffa/Makefile
@@ -4,3 +4,4 @@
@@ -120,7 +120,7 @@ index 043a8915bec5..0d21d6b47ab9 100644
 obj-y += arm-ffa-uclass.o core.o
 +obj-$(CONFIG_SANDBOX_FFA) += sandbox.o
 diff --git a/drivers/firmware/arm-ffa/arm_ffa_prv.h b/drivers/firmware/arm-ffa/arm_ffa_prv.h
-index 4eea7dc03604..bbc8b87069ff 100644
+index 4eea7dc036..bbc8b87069 100644
 --- a/drivers/firmware/arm-ffa/arm_ffa_prv.h
 +++ b/drivers/firmware/arm-ffa/arm_ffa_prv.h
@@ -19,6 +19,16 @@
@@ -153,7 +153,7 @@ index 4eea7dc03604..bbc8b87069ff 100644
  * struct ffa_partition_uuid - 16 bytes UUID transmitted by FFA_PARTITION_INFO_GET
  * @a1-4:	32-bit words access to the UUID data
 diff --git a/drivers/firmware/arm-ffa/core.c b/drivers/firmware/arm-ffa/core.c
-index 0b1f8e6a078d..560603b28bcc 100644
+index 0b1f8e6a07..560603b28b 100644
 --- a/drivers/firmware/arm-ffa/core.c
 +++ b/drivers/firmware/arm-ffa/core.c
@@ -1072,6 +1072,7 @@ static int ffa_msg_send_direct_req(struct udevice *dev, u16 dst_part_id,
@@ -223,7 +223,7 @@ index 0b1f8e6a078d..560603b28bcc 100644
 
 diff --git a/drivers/firmware/arm-ffa/sandbox.c b/drivers/firmware/arm-ffa/sandbox.c
 new file mode 100644
-index 000000000000..16f1ca926ee2
+index 0000000000..16f1ca926e
 --- /dev/null
 +++ b/drivers/firmware/arm-ffa/sandbox.c
@@ -0,0 +1,659 @@
@@ -888,7 +888,7 @@ index 000000000000..16f1ca926ee2
 +};
 diff --git a/drivers/firmware/arm-ffa/sandbox_arm_ffa_prv.h b/drivers/firmware/arm-ffa/sandbox_arm_ffa_prv.h
 new file mode 100644
-index 000000000000..4db57f5092f8
+index 0000000000..4db57f5092
 --- /dev/null
 +++ b/drivers/firmware/arm-ffa/sandbox_arm_ffa_prv.h
@@ -0,0 +1,144 @@
@@ -1037,7 +1037,7 @@ index 000000000000..4db57f5092f8
 +
 +#endif
 diff --git a/include/arm_ffa.h b/include/arm_ffa.h
-index 74b16174c292..b88904fe50b0 100644
+index 74b16174c2..b88904fe50 100644
 --- a/include/arm_ffa.h
 +++ b/include/arm_ffa.h
@@ -90,7 +90,7 @@ struct ffa_bus_ops {
@@ -1051,7 +1051,7 @@ index 74b16174c292..b88904fe50b0 100644
 
 diff --git a/include/sandbox_arm_ffa.h b/include/sandbox_arm_ffa.h
 new file mode 100644
-index 000000000000..d5df16f2828c
+index 0000000000..d5df16f282
 --- /dev/null
 +++ b/include/sandbox_arm_ffa.h
@@ -0,0 +1,91 @@
@@ -1147,7 +1147,7 @@ index 000000000000..d5df16f2828c
 +
 +#endif
 diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
-index 3481f2afe7a9..fea4eb7a342e 100644
+index 3481f2afe7..fea4eb7a34 100644
 --- a/lib/efi_loader/efi_boottime.c
 +++ b/lib/efi_loader/efi_boottime.c
@@ -2185,7 +2185,7 @@ static efi_status_t EFIAPI efi_exit_boot_services(efi_handle_t image_handle,
@@ -1160,5 +1160,5 @@ index 3481f2afe7a9..fea4eb7a342e 100644
 		if (ffa_bus_ops_get()->rxtx_unmap(NULL))
 			log_err("Can't unmap FF-A RX/TX buffers\n");
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From fcc5de7e0e618fa4ec82d37f5f0687af837e6f54 Mon Sep 17 00:00:00 2001
+From 3664fe7503cbc4348bbd7bcb8fbf7e1db332ac5d Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Mon, 6 Jun 2022 17:26:06 +0100
-Subject: [PATCH 07/27] arm_ffa: introduce Sandbox test cases for UCLASS_FFA
+Subject: [PATCH 07/42] arm_ffa: introduce Sandbox test cases for UCLASS_FFA

 Add functional test cases for the FF-A core driver

@@ -38,7 +38,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 create mode 100644 test/dm/ffa.c

 diff --git a/MAINTAINERS b/MAINTAINERS
-index 297d165f8401..c1d3d4ae1c56 100644
+index 297d165f84..c1d3d4ae1c 100644
 --- a/MAINTAINERS
 +++ b/MAINTAINERS
@@ -272,6 +272,7 @@ F:	doc/arch/arm64.ffa.rst
@@ -50,7 +50,7 @@ index 297d165f8401..c1d3d4ae1c56 100644
 ARM FREESCALE IMX
 M:	Stefano Babic <sbabic@denx.de>
 diff --git a/test/dm/Makefile b/test/dm/Makefile
-index 7a79b6e1a25d..85e99e1c120e 100644
+index 7a79b6e1a2..85e99e1c12 100644
 --- a/test/dm/Makefile
 +++ b/test/dm/Makefile
@@ -1,6 +1,7 @@
@@ -71,7 +71,7 @@ index 7a79b6e1a25d..85e99e1c120e 100644
 obj-y += regmap.o
 diff --git a/test/dm/ffa.c b/test/dm/ffa.c
 new file mode 100644
-index 000000000000..128d8626a761
+index 0000000000..128d8626a7
 --- /dev/null
 +++ b/test/dm/ffa.c
@@ -0,0 +1,392 @@
@@ -468,5 +468,5 @@ index 000000000000..128d8626a761
 +
 +DM_TEST(dm_test_ffa_nack, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 5816c61212f9710a5c7310cd7c57cc349e852152 Mon Sep 17 00:00:00 2001
+From 5af272d2bb2a7a8c8a4732c8d598dd1713856949 Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Tue, 29 Nov 2022 14:48:34 +0000
-Subject: [PATCH 08/27] arm_ffa: introduce armffa command Sandbox test
+Subject: [PATCH 08/42] arm_ffa: introduce armffa command Sandbox test

 Add Sandbox test for the armffa command

@@ -27,7 +27,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 create mode 100644 test/cmd/armffa.c

 diff --git a/MAINTAINERS b/MAINTAINERS
-index c1d3d4ae1c56..a2f60a3b93a6 100644
+index c1d3d4ae1c..a2f60a3b93 100644
 --- a/MAINTAINERS
 +++ b/MAINTAINERS
@@ -272,6 +272,7 @@ F:	doc/arch/arm64.ffa.rst
@@ -39,7 +39,7 @@ index c1d3d4ae1c56..a2f60a3b93a6 100644
 
 ARM FREESCALE IMX
 diff --git a/test/cmd/Makefile b/test/cmd/Makefile
-index bc961df3dcee..21aa6d740ee8 100644
+index bc961df3dc..21aa6d740e 100644
 --- a/test/cmd/Makefile
 +++ b/test/cmd/Makefile
@@ -1,6 +1,7 @@
@@ -60,7 +60,7 @@ index bc961df3dcee..21aa6d740ee8 100644
 obj-$(CONFIG_CMD_WGET) += wget.o
 diff --git a/test/cmd/armffa.c b/test/cmd/armffa.c
 new file mode 100644
-index 000000000000..e04363ba63f9
+index 0000000000..e04363ba63
 --- /dev/null
 +++ b/test/cmd/armffa.c
@@ -0,0 +1,39 @@
@@ -104,5 +104,5 @@ index 000000000000..e04363ba63f9
 +
 +DM_TEST(dm_test_armffa_cmd, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From e371b2d29aa447c1a186ab25b37b99fded967b77 Mon Sep 17 00:00:00 2001
+From ca1ae0e78ee3476090919459ec5d08187d5eefbc Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Mon, 15 Aug 2022 15:12:49 +0100
-Subject: [PATCH 09/27] arm_ffa: efi: introduce FF-A MM communication
+Subject: [PATCH 09/42] arm_ffa: efi: introduce FF-A MM communication

 Add MM communication support using FF-A transport

@@ -88,7 +88,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 3 files changed, 307 insertions(+), 6 deletions(-)

 diff --git a/include/mm_communication.h b/include/mm_communication.h
-index e65fbde60d0a..d409bed77714 100644
+index e65fbde60d..d409bed777 100644
 --- a/include/mm_communication.h
 +++ b/include/mm_communication.h
@@ -6,6 +6,8 @@
@@ -111,7 +111,7 @@ index e65fbde60d0a..d409bed77714 100644
  * Interface to the pseudo Trusted Application (TA), which provides a
  * communication channel with the Standalone MM (Management Mode)
 diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
-index b498c72206fd..ca7390848125 100644
+index b498c72206..ca73908481 100644
 --- a/lib/efi_loader/Kconfig
 +++ b/lib/efi_loader/Kconfig
@@ -55,13 +55,23 @@ config EFI_VARIABLE_FILE_STORE
@@ -141,7 +141,7 @@ index b498c72206fd..ca7390848125 100644
 	bool "Don't persist non-volatile UEFI variables"
 	help
 diff --git a/lib/efi_loader/efi_variable_tee.c b/lib/efi_loader/efi_variable_tee.c
-index dfef18435dfa..3933a24e8cdc 100644
+index dfef18435d..3933a24e8c 100644
 --- a/lib/efi_loader/efi_variable_tee.c
 +++ b/lib/efi_loader/efi_variable_tee.c
@@ -4,9 +4,12 @@
@@ -496,5 +496,5 @@ index dfef18435dfa..3933a24e8cdc 100644
 
 	/*
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From a5d70b9bf23b38fbc8c6b4c3f384278aeca3bbce Mon Sep 17 00:00:00 2001
+From a595dfd91d3e226eaa39e324673871c73ae0aa29 Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Fri, 23 Sep 2022 15:17:21 +0100
-Subject: [PATCH 10/27] arm_ffa: efi: corstone1000: enable MM communication
+Subject: [PATCH 10/42] arm_ffa: efi: corstone1000: enable MM communication

 turn on EFI MM communication

@@ -44,7 +44,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 2 files changed, 12 insertions(+)

 diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
-index dddfa2750762..d1dc06c86c2c 100644
+index dddfa27507..d1dc06c86c 100644
 --- a/configs/corstone1000_defconfig
 +++ b/configs/corstone1000_defconfig
@@ -52,3 +52,5 @@ CONFIG_DM_SERIAL=y
@@ -54,7 +54,7 @@ index dddfa2750762..d1dc06c86c2c 100644
 +CONFIG_EFI_MM_COMM_TEE=y
 +CONFIG_ARM_FFA_TRANSPORT=y
 diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
-index 8e0230c135e3..b6226fa12af3 100644
+index 8e0230c135..b6226fa12a 100644
 --- a/include/configs/corstone1000.h
 +++ b/include/configs/corstone1000.h
@@ -14,6 +14,15 @@
@@ -82,5 +82,5 @@ index 8e0230c135e3..b6226fa12af3 100644
 
 #define BOOT_TARGET_DEVICES(func) \
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 6a73345662d53ebaa9750c70aa8fc7f40d3f8524 Mon Sep 17 00:00:00 2001
+From b9c44c396f9ad9588184272cdc5ed98e19e82c0a Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Tue, 29 Nov 2022 15:11:27 +0000
-Subject: [PATCH 11/27] efi: corstone1000: introduce EFI capsule update
+Subject: [PATCH 11/42] efi: corstone1000: introduce EFI capsule update

 This commit provides capsule update feature for Corstone1000.

@@ -32,7 +32,7 @@ Upstream-Status: Pending [Not submitted to upstream yet]
 7 files changed, 200 insertions(+), 4 deletions(-)

 diff --git a/board/armltd/corstone1000/corstone1000.c b/board/armltd/corstone1000/corstone1000.c
-index 4f4b96a095c2..76816f8f4ea1 100644
+index 4f4b96a095..76816f8f4e 100644
 --- a/board/armltd/corstone1000/corstone1000.c
 +++ b/board/armltd/corstone1000/corstone1000.c
@@ -66,6 +66,10 @@ static struct mm_region corstone1000_mem_map[] = {
@@ -47,7 +47,7 @@ index 4f4b96a095c2..76816f8f4ea1 100644
 {
 	return 0;
 diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
-index d1dc06c86c2c..06eac3e041fe 100644
+index d1dc06c86c..06eac3e041 100644
 --- a/configs/corstone1000_defconfig
 +++ b/configs/corstone1000_defconfig
@@ -54,3 +54,6 @@ CONFIG_USB_ISP1760=y
@@ -58,7 +58,7 @@ index d1dc06c86c2c..06eac3e041fe 100644
 +CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y
 +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
 diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
-index b6226fa12af3..cd30499e3c9c 100644
+index b6226fa12a..cd30499e3c 100644
 --- a/include/configs/corstone1000.h
 +++ b/include/configs/corstone1000.h
@@ -14,6 +14,24 @@
@@ -87,7 +87,7 @@ index b6226fa12af3..cd30499e3c9c 100644
 
 /*
 diff --git a/include/efi_loader.h b/include/efi_loader.h
-index f9e427f09059..26981141c228 100644
+index f9e427f090..26981141c2 100644
 --- a/include/efi_loader.h
 +++ b/include/efi_loader.h
@@ -1032,11 +1032,11 @@ extern const struct efi_firmware_management_protocol efi_fmp_fit;
@@ -105,7 +105,7 @@ index f9e427f09059..26981141c228 100644
 		efi_uintn_t capsule_count,
 		u64 *maximum_capsule_size,
 diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
-index fea4eb7a342e..faab74474d77 100644
+index fea4eb7a34..faab74474d 100644
 --- a/lib/efi_loader/efi_boottime.c
 +++ b/lib/efi_loader/efi_boottime.c
@@ -2103,6 +2103,33 @@ static void efi_exit_caches(void)
@@ -159,7 +159,7 @@ index fea4eb7a342e..faab74474d77 100644
 	efi_set_watchdog(0);
 	schedule();
 diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
-index 0997cd248fe3..9e8ddaac7f03 100644
+index 0997cd248f..9e8ddaac7f 100644
 --- a/lib/efi_loader/efi_capsule.c
 +++ b/lib/efi_loader/efi_capsule.c
@@ -26,6 +26,14 @@
@@ -329,7 +329,7 @@ index 0997cd248fe3..9e8ddaac7f03 100644
 		efi_uintn_t capsule_count,
 		u64 *maximum_capsule_size,
 diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c
-index 543764113530..1ad2fa52d7e9 100644
+index 5437641135..1ad2fa52d7 100644
 --- a/lib/efi_loader/efi_setup.c
 +++ b/lib/efi_loader/efi_setup.c
@@ -16,6 +16,13 @@
@@ -362,5 +362,5 @@ index 543764113530..1ad2fa52d7e9 100644
 		ret = efi_set_variable_int(u"CapsuleMax",
 					   &efi_guid_capsule_report,
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 2f76fd5cf66a983f68bc115463b9ea5714b3c221 Mon Sep 17 00:00:00 2001
+From ac738fa33edec9ff712dee6d10491cb2eb7cfe3a Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Fri, 4 Mar 2022 15:56:09 +0000
-Subject: [PATCH 12/27] arm: corstone1000: fix unrecognized filesystem type
+Subject: [PATCH 12/42] arm: corstone1000: fix unrecognized filesystem type

 Some usb sticks are not recognized by usb, just add a
 delay before checking status.
@@ -13,7 +13,7 @@ Upstream-Status: Pending [Not submitted to upstream yet]
 1 file changed, 3 insertions(+)

 diff --git a/common/usb_storage.c b/common/usb_storage.c
-index ac6427577379..1d2680c3cd33 100644
+index ac64275773..1d2680c3cd 100644
 --- a/common/usb_storage.c
 +++ b/common/usb_storage.c
@@ -785,6 +785,9 @@ static int usb_stor_BBB_transport(struct scsi_cmd *srb, struct us_data *us)
@@ -27,5 +27,5 @@ index ac6427577379..1d2680c3cd33 100644
 	result = usb_bulk_msg(us->pusb_dev, pipein, csw, UMASS_BBB_CSW_SIZE,
 				&actlen, USB_CNTL_TIMEOUT*5);
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 8727a1b34fb500ca5cce6fc1c30a1d73bf23aaba Mon Sep 17 00:00:00 2001
+From baa961b6050508710e1c6b572f2e93ac5c488201 Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Fri, 10 Dec 2021 20:03:35 +0000
-Subject: [PATCH 13/27] efi_capsule: corstone1000: pass interface id and buffer
+Subject: [PATCH 13/42] efi_capsule: corstone1000: pass interface id and buffer
 event id using register w4

 Initially the interface/event IDs are passed to the SP using register
@@ -23,7 +23,7 @@ Upstream-Status: Pending [Not submitted to upstream yet]
 2 files changed, 13 insertions(+), 4 deletions(-)

 diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
-index cd30499e3c9c..e4c7bcb96f27 100644
+index cd30499e3c..e4c7bcb96f 100644
 --- a/include/configs/corstone1000.h
 +++ b/include/configs/corstone1000.h
@@ -24,6 +24,12 @@
@@ -40,7 +40,7 @@ index cd30499e3c9c..e4c7bcb96f27 100644
 #define CORSTONE1000_CAPSULE_BUFFER_SIZE	(8192) /* 32 MB */
 
 diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
-index 9e8ddaac7f03..bd4cc8d27285 100644
+index 9e8ddaac7f..bd4cc8d272 100644
 --- a/lib/efi_loader/efi_capsule.c
 +++ b/lib/efi_loader/efi_capsule.c
@@ -29,6 +29,8 @@
@@ -70,5 +70,5 @@ index 9e8ddaac7f03..bd4cc8d27285 100644
 	return ffa_bus_ops_get()->sync_send_receive(NULL, CORSTONE1000_SEPROXY_PART_ID, &msg, 0);
 }
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 80273f9bcab14059ec92e5c05826ae52113cebe6 Mon Sep 17 00:00:00 2001
+From d761d59dd251ae93980f659d253576fc872f2c5f Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Fri, 10 Dec 2021 20:10:41 +0000
-Subject: [PATCH 14/27] efi_boottime: corstone1000: pass interface id and
+Subject: [PATCH 14/42] efi_boottime: corstone1000: pass interface id and
 kernel event id using register w4

 Initially the interface/event IDs are passed to the SP using register
@@ -22,7 +22,7 @@ Upstream-Status: Pending [Not submitted to upstream yet]
 1 file changed, 10 insertions(+), 3 deletions(-)

 diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
-index faab74474d77..36a0be7ba104 100644
+index faab74474d..36a0be7ba1 100644
 --- a/lib/efi_loader/efi_boottime.c
 +++ b/lib/efi_loader/efi_boottime.c
@@ -30,6 +30,11 @@
@@ -54,5 +54,5 @@ index faab74474d77..36a0be7ba104 100644
 	return ffa_bus_ops_get()->sync_send_receive(CORSTONE1000_SEPROXY_PART_ID, &msg, 0);
 }
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 315d4eb0f5be4ed844bf6c7496d2ea62e518aa5c Mon Sep 17 00:00:00 2001
+From 5e09d349ec8af6585bce777acbfd2d218fc2e8d4 Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Sat, 11 Dec 2021 13:23:55 +0000
-Subject: [PATCH 15/27] efi_loader: corstone1000: remove guid check from
+Subject: [PATCH 15/42] efi_loader: corstone1000: remove guid check from
 corstone1000 config option

 Use generic fmp guid and no separte check is required for
@@ -15,7 +15,7 @@ Upstream-Status: Pending [Not submitted to upstream yet]
 1 file changed, 1 insertion(+), 15 deletions(-)

 diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
-index bd4cc8d27285..ef7b358ddba9 100644
+index bd4cc8d272..ef7b358ddb 100644
 --- a/lib/efi_loader/efi_capsule.c
 +++ b/lib/efi_loader/efi_capsule.c
@@ -830,12 +830,6 @@ efi_status_t __efi_runtime EFIAPI efi_update_capsule(
@@ -49,5 +49,5 @@ index bd4cc8d27285..ef7b358ddba9 100644
 			goto out;
 	}
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 978d2b92a2ae1f2be71c85271c2d79a5eaf74815 Mon Sep 17 00:00:00 2001
+From e3ccad1cf9e905ec15ff772dcf53972fafcf54ee Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Fri, 17 Dec 2021 19:49:02 +0000
-Subject: [PATCH 16/27] efi_loader: populate ESRT table if EFI_ESRT config
+Subject: [PATCH 16/42] efi_loader: populate ESRT table if EFI_ESRT config
 option is set

 This change is to call efi_esrt_populate function if CONFIG_EFI_ESRT
@@ -15,7 +15,7 @@ Upstream-Status: Pending [Not submitted to upstream yet]
 1 file changed, 7 insertions(+)

 diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
-index ef7b358ddba9..8eb8fc406adf 100644
+index ef7b358ddb..8eb8fc406a 100644
 --- a/lib/efi_loader/efi_capsule.c
 +++ b/lib/efi_loader/efi_capsule.c
@@ -852,6 +852,13 @@ efi_status_t __efi_runtime EFIAPI efi_update_capsule(
@@ -33,5 +33,5 @@ index ef7b358ddba9..8eb8fc406adf 100644
 #endif
 
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 03f0a1ac1450223ff2aa9be116e918230371048e Mon Sep 17 00:00:00 2001
+From d8f79ab37bae283599e40018055ff9d5648fb647 Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Fri, 17 Dec 2021 19:50:25 +0000
-Subject: [PATCH 17/27] efi_firmware: add get_image_info for corstone1000
+Subject: [PATCH 17/42] efi_firmware: add get_image_info for corstone1000

 This change is to populate get_image_info which eventually
 will be populated in ESRT table
@@ -14,7 +14,7 @@ Upstream-Status: Pending [Not submitted to upstream yet]
 1 file changed, 71 insertions(+), 1 deletion(-)

 diff --git a/lib/efi_loader/efi_firmware.c b/lib/efi_loader/efi_firmware.c
-index 93e2b01c07a6..0a38a96351ff 100644
+index 93e2b01c07..0a38a96351 100644
 --- a/lib/efi_loader/efi_firmware.c
 +++ b/lib/efi_loader/efi_firmware.c
@@ -18,11 +18,69 @@
@@ -119,5 +119,5 @@ index 93e2b01c07a6..0a38a96351ff 100644
 			     NULL, NULL))
 		return EFI_EXIT(EFI_DEVICE_ERROR);
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 5866edd29215e939eaad38956886df6c7af5ab96 Mon Sep 17 00:00:00 2001
+From a6fee840a411a6a7b6c276d0a7b1d5445039e6c2 Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Mon, 15 Aug 2022 15:46:18 +0100
-Subject: [PATCH 18/27] efi_loader: send bootcomplete message to secure enclave
+Subject: [PATCH 18/42] efi_loader: send bootcomplete message to secure enclave

 On corstone1000 platform, Secure Enclave will be expecting
 an event from uboot when it performs capsule update. Previously,
@@ -21,7 +21,7 @@ Upstream-Status: Pending [Not submitted to upstream yet]
 4 files changed, 41 insertions(+), 45 deletions(-)

 diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
-index e4c7bcb96f27..be13b98d4829 100644
+index e4c7bcb96f..be13b98d48 100644
 --- a/include/configs/corstone1000.h
 +++ b/include/configs/corstone1000.h
@@ -22,7 +22,7 @@
@@ -34,7 +34,7 @@ index e4c7bcb96f27..be13b98d4829 100644
 #define PREP_SEPROXY_SVC_ID_MASK	GENMASK(31, 16)
 #define PREP_SEPROXY_SVC_ID(x)	 (FIELD_PREP(PREP_SEPROXY_SVC_ID_MASK, (x)))
 diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
-index 36a0be7ba104..fea4eb7a342e 100644
+index 36a0be7ba1..fea4eb7a34 100644
 --- a/lib/efi_loader/efi_boottime.c
 +++ b/lib/efi_loader/efi_boottime.c
@@ -30,11 +30,6 @@
@@ -102,7 +102,7 @@ index 36a0be7ba104..fea4eb7a342e 100644
 	efi_set_watchdog(0);
 	schedule();
 diff --git a/lib/efi_loader/efi_firmware.c b/lib/efi_loader/efi_firmware.c
-index 0a38a96351ff..70568f22909e 100644
+index 0a38a96351..70568f2290 100644
 --- a/lib/efi_loader/efi_firmware.c
 +++ b/lib/efi_loader/efi_firmware.c
@@ -48,7 +48,7 @@ static efi_status_t efi_corstone1000_img_info_get (
@@ -115,7 +115,7 @@ index 0a38a96351ff..70568f22909e 100644
 	}
 
 diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c
-index 1ad2fa52d7e9..89f988b09c44 100644
+index 1ad2fa52d7..89f988b09c 100644
 --- a/lib/efi_loader/efi_setup.c
 +++ b/lib/efi_loader/efi_setup.c
@@ -17,6 +17,9 @@
@@ -179,5 +179,5 @@ index 1ad2fa52d7e9..89f988b09c44 100644
 	if (ret != EFI_SUCCESS) {
 		printf("EFI: Corstone-1000: cannot allocate caspsule shared buffer\n");
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 56c14cd9a96d0c0907b2cb9c1b95a5debff97f75 Mon Sep 17 00:00:00 2001
+From 3d28467e447f12c5aa276827aa742e7eed1d577a Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Fri, 14 Jan 2022 15:24:18 +0000
-Subject: [PATCH 19/27] efi_loader: fix null pointer exception with
+Subject: [PATCH 19/42] efi_loader: fix null pointer exception with
 get_image_info

 get_img_info API implemented for corstone1000 target does not
@@ -17,7 +17,7 @@ Upstream-Status: Pending [Not submitted to upstream yet]
 1 file changed, 11 insertions(+), 8 deletions(-)

 diff --git a/lib/efi_loader/efi_firmware.c b/lib/efi_loader/efi_firmware.c
-index 70568f22909e..c883e2ff0aa9 100644
+index 70568f2290..c883e2ff0a 100644
 --- a/lib/efi_loader/efi_firmware.c
 +++ b/lib/efi_loader/efi_firmware.c
@@ -39,26 +39,29 @@ static efi_status_t efi_corstone1000_img_info_get (
@@ -59,5 +59,5 @@ index 70568f22909e..c883e2ff0aa9 100644
 					     IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED;
 	image_info[i].attributes_setting = IMAGE_ATTRIBUTE_IMAGE_UPDATABLE;
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 0a4aa2a03a208996e7448c79edd0adef9a697255 Mon Sep 17 00:00:00 2001
+From d6c183a99a7d232ef5dbf886c49e7fb75b50ecf9 Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Wed, 30 Nov 2022 15:37:22 +0000
-Subject: [PATCH 20/27] arm:corstone1000: add mmc for fvp
+Subject: [PATCH 20/42] arm:corstone1000: add mmc for fvp

 Enable support mmc/sdcard for the corstone1000 FVP.

@@ -15,7 +15,7 @@ Upstream-Status: Pending [Not submitted to upstream yet]
 3 files changed, 32 insertions(+), 8 deletions(-)

 diff --git a/board/armltd/corstone1000/corstone1000.c b/board/armltd/corstone1000/corstone1000.c
-index 76816f8f4ea1..d6ca6e896140 100644
+index 76816f8f4e..d6ca6e8961 100644
 --- a/board/armltd/corstone1000/corstone1000.c
 +++ b/board/armltd/corstone1000/corstone1000.c
@@ -38,19 +38,35 @@ static struct mm_region corstone1000_mem_map[] = {
@@ -61,7 +61,7 @@ index 76816f8f4ea1..d6ca6e896140 100644
 		/* OCVM */
 		.virt = 0x80000000UL,
 diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
-index 06eac3e041fe..f7c276a10a6e 100644
+index 06eac3e041..f7c276a10a 100644
 --- a/configs/corstone1000_defconfig
 +++ b/configs/corstone1000_defconfig
@@ -40,7 +40,13 @@ CONFIG_VERSION_VARIABLE=y
@@ -80,7 +80,7 @@ index 06eac3e041fe..f7c276a10a6e 100644
 CONFIG_PHY_SMSC=y
 CONFIG_SMC911X=y
 diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
-index be13b98d4829..a015a1630e2c 100644
+index be13b98d48..a015a1630e 100644
 --- a/include/configs/corstone1000.h
 +++ b/include/configs/corstone1000.h
@@ -59,7 +59,9 @@
@@ -95,5 +95,5 @@ index be13b98d4829..a015a1630e2c 100644
 #include <config_distro_bootcmd.h>
 
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From c9503083c042e453be3178a79ba3ff81e8d7ca17 Mon Sep 17 00:00:00 2001
+From 155f20028ad5f3ba5d2362ec48abb7804eaade00 Mon Sep 17 00:00:00 2001
 From: Jon Mason <jon.mason@arm.com>
 Date: Wed, 30 Nov 2022 18:59:59 +0000
-Subject: [PATCH 21/27] corstone1000: add compressed kernel support
+Subject: [PATCH 21/42] corstone1000: add compressed kernel support

 The corstone1000 kernel has become too large to fit in the available
 storage.  Swtiching to a compressed kernel avoids the problem, but
@@ -17,7 +17,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
-index f7c276a10a6e..1179bf5f3bfd 100644
+index f7c276a10a..1179bf5f3b 100644
 --- a/configs/corstone1000_defconfig
 +++ b/configs/corstone1000_defconfig
@@ -15,7 +15,7 @@ CONFIG_FIT=y
@@ -30,5 +30,5 @@ index f7c276a10a6e..1179bf5f3bfd 100644
 CONFIG_LOGLEVEL=7
 # CONFIG_DISPLAY_CPUINFO is not set
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 2229a66346fb16f092d79fc2e9756ec34ff041a4 Mon Sep 17 00:00:00 2001
+From 984c431cd594c112d71ea1378bc1ac3b72806baa Mon Sep 17 00:00:00 2001
 From: Emekcan <emekcan.aras@arm.com>
 Date: Wed, 30 Nov 2022 19:02:26 +0000
-Subject: [PATCH 22/27] Introduce external sys driver to device-tree
+Subject: [PATCH 22/42] Introduce external sys driver to device-tree

 It adds external sys driver binding to u-boot
 device tree.
@@ -14,7 +14,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 1 file changed, 7 insertions(+)

 diff --git a/arch/arm/dts/corstone1000.dtsi b/arch/arm/dts/corstone1000.dtsi
-index 4e46826f883a..2c7185e1391a 100644
+index 4e46826f88..2c7185e139 100644
 --- a/arch/arm/dts/corstone1000.dtsi
 +++ b/arch/arm/dts/corstone1000.dtsi
@@ -160,5 +160,12 @@
@@ -31,5 +31,5 @@ index 4e46826f883a..2c7185e1391a 100644
 	};
 };
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From aef33222f500c91badd301aecefd153c6d0eb834 Mon Sep 17 00:00:00 2001
+From 4167fe9079b64aaaf3eefc53063d242af8d2badd Mon Sep 17 00:00:00 2001
 From: Emekcan <emekcan.aras@arm.com>
 Date: Mon, 12 Sep 2022 15:47:06 +0100
-Subject: [PATCH 23/27] Add mhu and rpmsg client to u-boot device tree
+Subject: [PATCH 23/42] Add mhu and rpmsg client to u-boot device tree

 Adds external system controller and mhu driver to u-boot
 device tree. This enables communication between host and
@@ -15,7 +15,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 1 file changed, 50 insertions(+)

 diff --git a/arch/arm/dts/corstone1000.dtsi b/arch/arm/dts/corstone1000.dtsi
-index 2c7185e1391a..61e0c33247ce 100644
+index 2c7185e139..61e0c33247 100644
 --- a/arch/arm/dts/corstone1000.dtsi
 +++ b/arch/arm/dts/corstone1000.dtsi
@@ -161,6 +161,56 @@
@@ -76,5 +76,5 @@ index 2c7185e1391a..61e0c33247ce 100644
 			compatible = "arm,extsys_ctrl";
 			reg = <0x1A010310 0x4>,
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 34f363f9d1c13abecd06ec37567704d0dfc05e77 Mon Sep 17 00:00:00 2001
+From f924535544515cdb350b2979b8c413cf221124b6 Mon Sep 17 00:00:00 2001
 From: Satish Kumar <satish.kumar01@arm.com>
 Date: Wed, 30 Nov 2022 19:11:43 +0000
-Subject: [PATCH 24/27] arm/corstone1000: esrt support
+Subject: [PATCH 24/42] arm/corstone1000: esrt support

 The implementation is platform specific and would require
 change in future.
@@ -20,7 +20,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 3 files changed, 143 insertions(+), 9 deletions(-)

 diff --git a/include/efi_api.h b/include/efi_api.h
-index 9bd70b0f18ce..23e427236a8f 100644
+index 9bd70b0f18..23e427236a 100644
 --- a/include/efi_api.h
 +++ b/include/efi_api.h
@@ -2030,7 +2030,7 @@ struct efi_firmware_image_descriptor {
@@ -33,7 +33,7 @@ index 9bd70b0f18ce..23e427236a8f 100644
 struct efi_firmware_management_protocol {
 	efi_status_t (EFIAPI *get_image_info)(
 diff --git a/lib/efi_loader/efi_firmware.c b/lib/efi_loader/efi_firmware.c
-index c883e2ff0aa9..c6ab6e2182dd 100644
+index c883e2ff0a..c6ab6e2182 100644
 --- a/lib/efi_loader/efi_firmware.c
 +++ b/lib/efi_loader/efi_firmware.c
@@ -15,6 +15,7 @@
@@ -186,7 +186,7 @@ index c883e2ff0aa9..c6ab6e2182dd 100644
 	.set_image = efi_firmware_fit_set_image,
 	.check_image = efi_firmware_check_image_unsupported,
 diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c
-index 89f988b09c44..08c742edbd12 100644
+index 89f988b09c..08c742edbd 100644
 --- a/lib/efi_loader/efi_setup.c
 +++ b/lib/efi_loader/efi_setup.c
@@ -167,14 +167,6 @@ static efi_status_t efi_init_capsule(void)
@@ -221,5 +221,5 @@ index 89f988b09c44..08c742edbd12 100644
 	ret = efi_init_variables();
 	if (ret != EFI_SUCCESS)
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 61f17cf403e2c1108b76556c879aa21945b31dcb Mon Sep 17 00:00:00 2001
+From 1f165f5b6e7d82611b55260b7254fee5fbebe539 Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Wed, 30 Nov 2022 19:14:52 +0000
-Subject: [PATCH 25/27] efi_setup: discover FF-A bus before raising EFI started
+Subject: [PATCH 25/42] efi_setup: discover FF-A bus before raising EFI started
 event

 add FF-A discovery to efi_corstone1000_uboot_efi_started_event()
@@ -14,7 +14,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 1 file changed, 9 insertions(+), 2 deletions(-)

 diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c
-index 08c742edbd12..65bd626e49b4 100644
+index 08c742edbd..65bd626e49 100644
 --- a/lib/efi_loader/efi_setup.c
 +++ b/lib/efi_loader/efi_setup.c
@@ -142,9 +142,16 @@ static efi_status_t efi_init_secure_boot(void)
@@ -47,5 +47,5 @@ index 08c742edbd12..65bd626e49b4 100644
 
 	/* Initialize variable services */
 -- 
-2.39.1
+2.25.1

@@ -1,7 +1,7 @@
-From 646269a92824f3e9b4145848e42ad3ba555e8931 Mon Sep 17 00:00:00 2001
+From 2a281a45b7dfc5c0e78f6256bf0ac122d825ce82 Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Mon, 5 Dec 2022 17:02:32 +0000
-Subject: [PATCH 26/27] corstone1000: enable distro booting command
+Subject: [PATCH 26/42] corstone1000: enable distro booting command

 enable distro_bootcmd

@@ -13,7 +13,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 1 file changed, 1 insertion(+)

 diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
-index a015a1630e2c..c30a7bfa0c0b 100644
+index a015a1630e..c30a7bfa0c 100644
 --- a/include/configs/corstone1000.h
 +++ b/include/configs/corstone1000.h
@@ -65,5 +65,6 @@
@@ -24,5 +24,5 @@ index a015a1630e2c..c30a7bfa0c0b 100644
 
 #endif
 -- 
-2.39.1
+2.25.1

@@ -0,0 +1,455 @@
+From c7567aaf75a66e204d492a8f6e2a3b4bfb8a7e45 Mon Sep 17 00:00:00 2001
+From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Date: Fri, 14 Apr 2023 13:23:25 +0100
+Subject: [PATCH 27/42] drivers/mtd/nvmxip: introduce NVM XIP block storage
+ emulation
+
+add block storage emulation for NVM XIP flash devices
+
+Some paltforms such as Corstone-1000 need to see NVM XIP raw flash
+as a block storage device with read only capability.
+
+Here NVM flash devices are devices with addressable
+memory (e.g: QSPI NOR flash).
+
+The implementation is generic and can be used by different platforms.
+
+Two drivers are provided as follows.
+
+  nvmxip-blk :
+
+    a generic block driver allowing to read from the XIP flash
+
+  nvmxip Uclass driver :
+
+        When a device is described in the DT and associated with
+        UCLASS_NVMXIP, the Uclass creates a block device and binds it with
+	 the nvmxip-blk.
+
+Platforms can use multiple NVM XIP devices at the same time by defining a
+DT node for each one of them.
+
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Upstream-Status: Backport [https://github.com/u-boot/u-boot/commit/c9c2c95d4cd27fe0cd41fe13a863899d268f973c]
+---
+ MAINTAINERS                         |   6 ++
+ doc/develop/driver-model/index.rst  |   1 +
+ doc/develop/driver-model/nvmxip.rst |  48 +++++++++++
+ drivers/block/blk-uclass.c          |   1 +
+ drivers/mtd/Kconfig                 |   2 +
+ drivers/mtd/Makefile                |   1 +
+ drivers/mtd/nvmxip/Kconfig          |  13 +++
+ drivers/mtd/nvmxip/Makefile         |   7 ++
+ drivers/mtd/nvmxip/nvmxip-uclass.c  |  67 ++++++++++++++++
+ drivers/mtd/nvmxip/nvmxip.c         | 119 ++++++++++++++++++++++++++++
+ drivers/mtd/nvmxip/nvmxip.h         |  32 ++++++++
+ include/dm/uclass-id.h              |   1 +
+ 12 files changed, 298 insertions(+)
+ create mode 100644 doc/develop/driver-model/nvmxip.rst
+ create mode 100644 drivers/mtd/nvmxip/Kconfig
+ create mode 100644 drivers/mtd/nvmxip/Makefile
+ create mode 100644 drivers/mtd/nvmxip/nvmxip-uclass.c
+ create mode 100644 drivers/mtd/nvmxip/nvmxip.c
+ create mode 100644 drivers/mtd/nvmxip/nvmxip.h
+
+diff --git a/MAINTAINERS b/MAINTAINERS
+index a2f60a3b93..1dbfab5f43 100644
+--- a/MAINTAINERS
+++ b/MAINTAINERS
+@@ -1202,6 +1202,12 @@ F:	cmd/nvme.c
+ F:	include/nvme.h
+ F:	doc/develop/driver-model/nvme.rst
+ 
+NVMXIP
+M:	Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+S:	Maintained
+F:	doc/develop/driver-model/nvmxip.rst
+F:	drivers/mtd/nvmxip/
+
+ NVMEM
+ M:	Sean Anderson <seanga2@gmail.com>
+ S:	Maintained
+diff --git a/doc/develop/driver-model/index.rst b/doc/develop/driver-model/index.rst
+index 7366ef818c..8e12bbd936 100644
+--- a/doc/develop/driver-model/index.rst
+++ b/doc/develop/driver-model/index.rst
+@@ -20,6 +20,7 @@ subsystems
+    livetree
+    migration
+    nvme
+   nvmxip
+    of-plat
+    pci-info
+    pmic-framework
+diff --git a/doc/develop/driver-model/nvmxip.rst b/doc/develop/driver-model/nvmxip.rst
+new file mode 100644
+index 0000000000..fe087b13d2
+--- /dev/null
+++ b/doc/develop/driver-model/nvmxip.rst
+@@ -0,0 +1,48 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+NVM XIP Block Storage Emulation Driver
+=======================================
+
+Summary
+-------
+
+Non-Volatile Memory devices with addressable memory (e.g: QSPI NOR flash) could
+be used for block storage needs (e.g: parsing a GPT layout in a raw QSPI NOR flash).
+
+The NVMXIP Uclass provides this functionality and can be used for any 64-bit platform.
+
+The NVMXIP Uclass provides the following drivers:
+
+      nvmxip-blk block driver:
+
+        A generic block driver allowing to read from the XIP flash.
+	The driver belongs to UCLASS_BLK.
+	The driver implemented by drivers/mtd/nvmxip/nvmxip.c
+
+      nvmxip Uclass driver:
+
+        When a device is described in the DT and associated with UCLASS_NVMXIP,
+        the Uclass creates a block device and binds it with the nvmxip-blk.
+	The Uclass driver implemented by drivers/mtd/nvmxip/nvmxip-uclass.c
+
+    The implementation is generic and can be used by different platforms.
+
+Supported hardware
+--------------------------------
+
+Any 64-bit plaform.
+
+Configuration
+----------------------
+
+config NVMXIP
+	  This option allows the emulation of a block storage device
+	  on top of a direct access non volatile memory XIP flash devices.
+	  This support provides the read operation.
+	  This option provides the block storage driver nvmxip-blk which
+	  handles the read operation. This driver is HW agnostic and can support
+	  multiple flash devices at the same time.
+
+Contributors
+------------
+   * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
+index c69fc4d518..e8ab576c32 100644
+--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
+@@ -28,6 +28,7 @@ static struct {
+ 	{ UCLASS_AHCI, "sata" },
+ 	{ UCLASS_HOST, "host" },
+ 	{ UCLASS_NVME, "nvme" },
+	{ UCLASS_NVMXIP, "nvmxip" },
+ 	{ UCLASS_EFI_MEDIA, "efi" },
+ 	{ UCLASS_EFI_LOADER, "efiloader" },
+ 	{ UCLASS_VIRTIO, "virtio" },
+diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
+index fcdb450f77..0537ac64e3 100644
+--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
+@@ -224,4 +224,6 @@ source "drivers/mtd/spi/Kconfig"
+ 
+ source "drivers/mtd/ubi/Kconfig"
+ 
+source "drivers/mtd/nvmxip/Kconfig"
+
+ endmenu
+diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
+index 3a78590aaa..c638980ea2 100644
+--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
+@@ -25,6 +25,7 @@ obj-y += nand/
+ obj-y += onenand/
+ obj-y += spi/
+ obj-$(CONFIG_MTD_UBI) += ubi/
+obj-$(CONFIG_NVMXIP) += nvmxip/
+ 
+ #SPL/TPL build
+ else
+diff --git a/drivers/mtd/nvmxip/Kconfig b/drivers/mtd/nvmxip/Kconfig
+new file mode 100644
+index 0000000000..ef53fc3c79
+--- /dev/null
+++ b/drivers/mtd/nvmxip/Kconfig
+@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright 2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
+# Authors:
+#   Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+config NVMXIP
+	bool "NVM XIP devices support"
+	select BLK
+	help
+	  This option allows the emulation of a block storage device
+	  on top of a direct access non volatile memory XIP flash devices.
+	  This support provides the read operation.
+diff --git a/drivers/mtd/nvmxip/Makefile b/drivers/mtd/nvmxip/Makefile
+new file mode 100644
+index 0000000000..07890982c7
+--- /dev/null
+++ b/drivers/mtd/nvmxip/Makefile
+@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright 2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
+# Authors:
+#   Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+obj-y += nvmxip-uclass.o nvmxip.o
+diff --git a/drivers/mtd/nvmxip/nvmxip-uclass.c b/drivers/mtd/nvmxip/nvmxip-uclass.c
+new file mode 100644
+index 0000000000..9f96041e3d
+--- /dev/null
+++ b/drivers/mtd/nvmxip/nvmxip-uclass.c
+@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
+ *
+ * Authors:
+ *   Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <log.h>
+#include <linux/bitops.h>
+#include "nvmxip.h"
+
+/* LBA Macros */
+
+#define DEFAULT_LBA_SHIFT 10 /* 1024 bytes per block */
+#define DEFAULT_LBA_COUNT 1024 /* block count */
+
+#define DEFAULT_LBA_SZ BIT(DEFAULT_LBA_SHIFT)
+
+/**
+ * nvmxip_post_bind() - post binding treatments
+ * @dev:	the NVMXIP device
+ *
+ * Create and probe a child block device.
+ *
+ * Return:
+ *
+ * 0 on success. Otherwise, failure
+ */
+static int nvmxip_post_bind(struct udevice *udev)
+{
+	int ret;
+	struct udevice *bdev = NULL;
+	char bdev_name[NVMXIP_BLKDEV_NAME_SZ + 1];
+	int devnum;
+
+	devnum = uclass_id_count(UCLASS_NVMXIP);
+	snprintf(bdev_name, NVMXIP_BLKDEV_NAME_SZ, "blk#%d", devnum);
+
+	ret = blk_create_devicef(udev, NVMXIP_BLKDRV_NAME, bdev_name, UCLASS_NVMXIP,
+				 devnum, DEFAULT_LBA_SZ,
+				 DEFAULT_LBA_COUNT, &bdev);
+	if (ret) {
+		log_err("[%s]: failure during creation of the block device %s, error %d\n",
+			udev->name, bdev_name, ret);
+		return ret;
+	}
+
+	ret = blk_probe_or_unbind(bdev);
+	if (ret) {
+		log_err("[%s]: failure during probing the block device %s, error %d\n",
+			udev->name, bdev_name, ret);
+		return ret;
+	}
+
+	log_info("[%s]: the block device %s ready for use\n", udev->name, bdev_name);
+
+	return 0;
+}
+
+UCLASS_DRIVER(nvmxip) = {
+	.name	   = "nvmxip",
+	.id	   = UCLASS_NVMXIP,
+	.post_bind = nvmxip_post_bind,
+};
+diff --git a/drivers/mtd/nvmxip/nvmxip.c b/drivers/mtd/nvmxip/nvmxip.c
+new file mode 100644
+index 0000000000..a359e3b482
+--- /dev/null
+++ b/drivers/mtd/nvmxip/nvmxip.c
+@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
+ *
+ * Authors:
+ *   Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <log.h>
+#include <mapmem.h>
+#include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/errno.h>
+#include "nvmxip.h"
+
+/**
+ * nvmxip_mmio_rawread() - read from the XIP flash
+ * @address:	address of the data
+ * @value:	pointer to where storing the value read
+ *
+ * Read raw data from the XIP flash.
+ *
+ * Return:
+ *
+ * Always return 0.
+ */
+static int nvmxip_mmio_rawread(const phys_addr_t address, u64 *value)
+{
+	*value = readq(address);
+	return 0;
+}
+
+/**
+ * nvmxip_blk_read() - block device read operation
+ * @dev:	the block device
+ * @blknr:	first block number to read from
+ * @blkcnt:	number of blocks to read
+ * @buffer:	destination buffer
+ *
+ * Read data from the block storage device.
+ *
+ * Return:
+ *
+ * number of blocks read on success. Otherwise, failure
+ */
+static ulong nvmxip_blk_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, void *buffer)
+{
+	struct nvmxip_plat *plat = dev_get_plat(dev->parent);
+	struct blk_desc *desc = dev_get_uclass_plat(dev);
+	/* number of the u64 words to read */
+	u32 qwords = (blkcnt * desc->blksz) / sizeof(u64);
+	/* physical address of the first block to read */
+	phys_addr_t blkaddr = plat->phys_base + blknr * desc->blksz;
+	u64 *virt_blkaddr;
+	u64 *pdst = buffer;
+	uint qdata_idx;
+
+	if (!pdst)
+		return -EINVAL;
+
+	log_debug("[%s]: reading from blknr: %lu , blkcnt: %lu\n", dev->name, blknr, blkcnt);
+
+	virt_blkaddr = map_sysmem(blkaddr, 0);
+
+	/* assumption: the data is virtually contiguous */
+
+	for (qdata_idx = 0 ; qdata_idx < qwords ; qdata_idx++)
+		nvmxip_mmio_rawread((phys_addr_t)(virt_blkaddr + qdata_idx), pdst++);
+
+	log_debug("[%s]:     src[0]: 0x%llx , dst[0]: 0x%llx , src[-1]: 0x%llx , dst[-1]: 0x%llx\n",
+		  dev->name,
+		  *virt_blkaddr,
+		  *(u64 *)buffer,
+		  *(u64 *)((u8 *)virt_blkaddr + desc->blksz * blkcnt - sizeof(u64)),
+		  *(u64 *)((u8 *)buffer + desc->blksz * blkcnt - sizeof(u64)));
+
+	unmap_sysmem(virt_blkaddr);
+
+	return blkcnt;
+}
+
+/**
+ * nvmxip_blk_probe() - block storage device probe
+ * @dev:	the block storage device
+ *
+ * Initialize the block storage descriptor.
+ *
+ * Return:
+ *
+ * Always return 0.
+ */
+static int nvmxip_blk_probe(struct udevice *dev)
+{
+	struct nvmxip_plat *plat = dev_get_plat(dev->parent);
+	struct blk_desc *desc = dev_get_uclass_plat(dev);
+
+	desc->lba = plat->lba;
+	desc->log2blksz = plat->lba_shift;
+	desc->blksz = BIT(plat->lba_shift);
+	desc->bdev = dev;
+
+	log_debug("[%s]: block storage layout\n    lbas: %lu , log2blksz: %d, blksz: %lu\n",
+		  dev->name, desc->lba, desc->log2blksz, desc->blksz);
+
+	return 0;
+}
+
+static const struct blk_ops nvmxip_blk_ops = {
+	.read	= nvmxip_blk_read,
+};
+
+U_BOOT_DRIVER(nvmxip_blk) = {
+	.name	= NVMXIP_BLKDRV_NAME,
+	.id	= UCLASS_BLK,
+	.probe	= nvmxip_blk_probe,
+	.ops	= &nvmxip_blk_ops,
+};
+diff --git a/drivers/mtd/nvmxip/nvmxip.h b/drivers/mtd/nvmxip/nvmxip.h
+new file mode 100644
+index 0000000000..f4ef37725d
+--- /dev/null
+++ b/drivers/mtd/nvmxip/nvmxip.h
+@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
+ *
+ * Authors:
+ *   Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+ */
+
+#ifndef __DRIVER_NVMXIP_H__
+#define __DRIVER_NVMXIP_H__
+
+#include <blk.h>
+
+#define NVMXIP_BLKDRV_NAME    "nvmxip-blk"
+#define NVMXIP_BLKDEV_NAME_SZ 20
+
+/**
+ * struct nvmxip_plat - the NVMXIP driver plat
+ *
+ * @phys_base:	NVM XIP device base address
+ * @lba_shift:	block size shift count
+ * @lba:	number of blocks
+ *
+ * The NVMXIP information read from the DT.
+ */
+struct nvmxip_plat {
+	phys_addr_t phys_base;
+	u32 lba_shift;
+	lbaint_t lba;
+};
+
+#endif /* __DRIVER_NVMXIP_H__ */
+diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
+index fa08a66ac8..f3564a49d9 100644
+--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
+@@ -92,6 +92,7 @@ enum uclass_id {
+ 	UCLASS_NOP,		/* No-op devices */
+ 	UCLASS_NORTHBRIDGE,	/* Intel Northbridge / SDRAM controller */
+ 	UCLASS_NVME,		/* NVM Express device */
+	UCLASS_NVMXIP,		/* NVM XIP devices */
+ 	UCLASS_P2SB,		/* (x86) Primary-to-Sideband Bus */
+ 	UCLASS_PANEL,		/* Display panel, such as an LCD */
+ 	UCLASS_PANEL_BACKLIGHT,	/* Backlight controller for panel */
+-- 
+2.25.1
+
@@ -1,595 +0,0 @@
-From 1d277bc8c275fae8e8cd400344bdacbdce3a6b46 Mon Sep 17 00:00:00 2001
-From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-Date: Tue, 13 Dec 2022 19:47:49 +0000
-Subject: [PATCH 27/43] drivers/nvmxip: introduce NVM XIP block storage
- emulation
-
-add block storage emulation for NVM XIP flash devices
-
-Some paltforms such as Corstone-1000 need to see NVM XIP raw flash
-as a block storage device with read only capability.
-
-Here NVM flash devices are devices with addressable
-memory (e.g: QSPI NOR flash).
-
-The implementation is generic and can be used by different platforms.
-
-Two drivers are provided as follows.
-
-  nvmxip-blk :
-
-    a generic block driver allowing to read from the XIP flash
-
-  nvmxip_qspi :
-
-    The driver probed with the DT and parent of the nvmxip-blk device.
-    nvmxip_qspi can be reused by other platforms. If the platform
-    has custom settings to apply before using the flash, then the platform
-    can provide its own parent driver belonging to UCLASS_NVMXIP and reuse
-    nvmxip-blk. The custom driver can be implmented like nvmxip_qspi in
-    addition to the platform custom settings.
-
-Platforms can use multiple NVM XIP devices at the same time by defining a
-DT node for each one of them.
-
-For more details please refer to doc/develop/driver-model/nvmxip.rst
-
-Upstream-Status: Submitted
-Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
- MAINTAINERS                                |   7 ++
- doc/develop/driver-model/index.rst         |   1 +
- doc/develop/driver-model/nvmxip.rst        |  70 ++++++++++++
- doc/device-tree-bindings/nvmxip/nvmxip.txt |  56 +++++++++
- drivers/Kconfig                            |   2 +
- drivers/Makefile                           |   1 +
- drivers/block/blk-uclass.c                 |   1 +
- drivers/nvmxip/Kconfig                     |  17 +++
- drivers/nvmxip/Makefile                    |   7 ++
- drivers/nvmxip/nvmxip-uclass.c             |  13 +++
- drivers/nvmxip/nvmxip.c                    | 127 +++++++++++++++++++++
- drivers/nvmxip/nvmxip.h                    |  46 ++++++++
- drivers/nvmxip/nvmxip_qspi.c               |  65 +++++++++++
- include/dm/uclass-id.h                     |   1 +
- 14 files changed, 414 insertions(+)
- create mode 100644 doc/develop/driver-model/nvmxip.rst
- create mode 100644 doc/device-tree-bindings/nvmxip/nvmxip.txt
- create mode 100644 drivers/nvmxip/Kconfig
- create mode 100644 drivers/nvmxip/Makefile
- create mode 100644 drivers/nvmxip/nvmxip-uclass.c
- create mode 100644 drivers/nvmxip/nvmxip.c
- create mode 100644 drivers/nvmxip/nvmxip.h
- create mode 100644 drivers/nvmxip/nvmxip_qspi.c
-
-diff --git a/MAINTAINERS b/MAINTAINERS
-index 9feaf0502f5b..ba15dd02d58d 100644
--- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -1204,6 +1204,13 @@ F:	cmd/nvme.c
- F:	include/nvme.h
- F:	doc/develop/driver-model/nvme.rst
- 
-+NVMXIP
-+M:	Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-+S:	Maintained
-+F:	doc/develop/driver-model/nvmxip.rst
-+F:	doc/device-tree-bindings/nvmxip/nvmxip.txt
-+F:	drivers/nvmxip/
-+
- NVMEM
- M:	Sean Anderson <seanga2@gmail.com>
- S:	Maintained
-diff --git a/doc/develop/driver-model/index.rst b/doc/develop/driver-model/index.rst
-index 7366ef818c5a..8e12bbd9366a 100644
--- a/doc/develop/driver-model/index.rst
-+++ b/doc/develop/driver-model/index.rst
-@@ -20,6 +20,7 @@ subsystems
-    livetree
-    migration
-    nvme
-+   nvmxip
-    of-plat
-    pci-info
-    pmic-framework
-diff --git a/doc/develop/driver-model/nvmxip.rst b/doc/develop/driver-model/nvmxip.rst
-new file mode 100644
-index 000000000000..91b24e4e50d2
--- /dev/null
-+++ b/doc/develop/driver-model/nvmxip.rst
-@@ -0,0 +1,70 @@
-+.. SPDX-License-Identifier: GPL-2.0+
-+
-+NVM XIP Block Storage Emulation Driver
-+=======================================
-+
-+Summary
-+-------
-+
-+Non-Volatile Memory devices with addressable memory (e.g: QSPI NOR flash) could
-+be used for block storage needs (e.g: parsing a GPT layout in a raw QSPI NOR flash).
-+
-+The NVMXIP class provides this functionality and can be used for any 64-bit platform.
-+
-+The NVMXIP class provides the following drivers:
-+
-+      nvmxip-blk :
-+
-+        A generic block driver allowing to read from the XIP flash.
-+	The driver belongs to UCLASS_BLK.
-+	The driver implemented by drivers/nvmxip/nvmxip.c
-+
-+      nvmxip_qspi :
-+
-+        The driver probed with the DT and parent of the nvmxip-blk device.
-+        nvmxip_qspi can be reused by other platforms. If the platform
-+        has custom settings to apply before using the flash, then the platform
-+        can provide its own parent driver belonging to UCLASS_NVMXIP and reuse
-+        nvmxip-blk. The custom driver can be implmented like nvmxip_qspi in
-+        addition to the platform custom settings.
-+	The nvmxip_qspi driver belongs to UCLASS_NVMXIP.
-+	The driver implemented by drivers/nvmxip/nvmxip_qspi.c
-+
-+    The implementation is generic and can be used by different platforms.
-+
-+Supported hardware
-+--------------------------------
-+
-+Any 64-bit plaform.
-+
-+Configuration
-+----------------------
-+
-+config NVMXIP
-+	  This option allows the emulation of a block storage device
-+	  on top of a direct access non volatile memory XIP flash devices.
-+	  This support provides the read operation.
-+	  This option provides the block storage driver nvmxip-blk which
-+	  handles the read operation. This driver is HW agnostic and can support
-+	  multiple flash devices at the same time.
-+
-+config NVMXIP_QSPI
-+	  This option allows the emulation of a block storage device on top of a QSPI XIP flash.
-+	  Any platform that needs to emulate one or multiple XIP flash devices can turn this
-+	  option on to enable the functionality. NVMXIP config is selected automatically.
-+	  Platforms that need to add custom treatments before accessing to the flash, can
-+	  write their own driver (same as nvmxip_qspi in addition to the custom settings).
-+
-+Device Tree nodes
-+--------------------
-+
-+Multiple XIP flash devices can be used at the same time by describing them through DT
-+nodes.
-+
-+Please refer to the documentation of the DT binding at:
-+
-+doc/device-tree-bindings/nvmxip/nvmxip.txt
-+
-+Contributors
-+------------
-+   * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-diff --git a/doc/device-tree-bindings/nvmxip/nvmxip.txt b/doc/device-tree-bindings/nvmxip/nvmxip.txt
-new file mode 100644
-index 000000000000..7c4b03f66b57
--- /dev/null
-+++ b/doc/device-tree-bindings/nvmxip/nvmxip.txt
-@@ -0,0 +1,56 @@
-+Specifying NVMXIP information for devices
-+======================================
-+
-+NVM XIP flash device nodes
-+---------------------------
-+
-+Each flash device should have its own node.
-+
-+Each node must specify the following fields:
-+
-+1)
-+		compatible = "nvmxip,qspi";
-+
-+This allows to bind the flash device with the nvmxip_qspi driver
-+If a platform has its own driver, please provide your own compatible
-+string.
-+
-+2)
-+		reg = <0x0 0x08000000 0x0 0x00200000>;
-+
-+The start address and size of the flash device. The values give here are an
-+example (when the cell size is 2).
-+
-+When cell size is 1, the reg field looks like this:
-+
-+		reg = <0x08000000 0x00200000>;
-+
-+3)
-+
-+		lba_shift = <9>;
-+
-+The number of bit shifts used to calculate the size in bytes of one block.
-+In this example the block size is 1 << 9 = 2 ^ 9 = 512 bytes
-+
-+4)
-+
-+		lba = <4096>;
-+
-+The number of blocks.
-+
-+Example of multiple flash devices
-+----------------------------------------------------
-+
-+	nvmxip-qspi1@08000000 {
-+		compatible = "nvmxip,qspi";
-+		reg = <0x0 0x08000000 0x0 0x00200000>;
-+		lba_shift = <9>;
-+		lba = <4096>;
-+	};
-+
-+	nvmxip-qspi2@08200000 {
-+		compatible = "nvmxip,qspi";
-+		reg = <0x0 0x08200000 0x0 0x00100000>;
-+		lba_shift = <9>;
-+		lba = <2048>;
-+	};
-diff --git a/drivers/Kconfig b/drivers/Kconfig
-index e51f0547c3da..d425ff1e76c7 100644
--- a/drivers/Kconfig
-+++ b/drivers/Kconfig
-@@ -78,6 +78,8 @@ source "drivers/net/Kconfig"
- 
- source "drivers/nvme/Kconfig"
- 
-+source "drivers/nvmxip/Kconfig"
-+
- source "drivers/pci/Kconfig"
- 
- source "drivers/pci_endpoint/Kconfig"
-diff --git a/drivers/Makefile b/drivers/Makefile
-index f0a7530295c5..fb1b62cbd6ff 100644
--- a/drivers/Makefile
-+++ b/drivers/Makefile
-@@ -89,6 +89,7 @@ obj-$(CONFIG_FWU_MDATA) += fwu-mdata/
- obj-y += misc/
- obj-$(CONFIG_MMC) += mmc/
- obj-$(CONFIG_NVME) += nvme/
-+obj-$(CONFIG_NVMXIP) += nvmxip/
- obj-$(CONFIG_PCI_ENDPOINT) += pci_endpoint/
- obj-y += dfu/
- obj-$(CONFIG_PCH) += pch/
-diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
-index c69fc4d51829..e8ab576c3253 100644
--- a/drivers/block/blk-uclass.c
-+++ b/drivers/block/blk-uclass.c
-@@ -28,6 +28,7 @@ static struct {
- 	{ UCLASS_AHCI, "sata" },
- 	{ UCLASS_HOST, "host" },
- 	{ UCLASS_NVME, "nvme" },
-+	{ UCLASS_NVMXIP, "nvmxip" },
- 	{ UCLASS_EFI_MEDIA, "efi" },
- 	{ UCLASS_EFI_LOADER, "efiloader" },
- 	{ UCLASS_VIRTIO, "virtio" },
-diff --git a/drivers/nvmxip/Kconfig b/drivers/nvmxip/Kconfig
-new file mode 100644
-index 000000000000..6a23acaf1895
--- /dev/null
-+++ b/drivers/nvmxip/Kconfig
-@@ -0,0 +1,17 @@
-+# SPDX-License-Identifier: GPL-2.0+
-+#
-+# Copyright (C) 2022, Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-+
-+config NVMXIP
-+	bool "NVM XIP devices support"
-+	select BLK
-+	help
-+	  This option allows the emulation of a block storage device
-+	  on top of a direct access non volatile memory XIP flash devices.
-+	  This support provides the read operation.
-+
-+config NVMXIP_QSPI
-+	bool "QSPI XIP  support"
-+	select NVMXIP
-+	help
-+	  This option allows the emulation of a block storage device on top of a QSPI XIP flash
-diff --git a/drivers/nvmxip/Makefile b/drivers/nvmxip/Makefile
-new file mode 100644
-index 000000000000..d8ad2a160b47
--- /dev/null
-+++ b/drivers/nvmxip/Makefile
-@@ -0,0 +1,7 @@
-+# SPDX-License-Identifier: GPL-2.0+
-+#
-+# (C) Copyright 2022
-+# Abdellatif El Khlifi, Arm Limited, abdellatif.elkhlifi@arm.com.
-+
-+obj-y += nvmxip-uclass.o nvmxip.o
-+obj-$(CONFIG_NVMXIP_QSPI) += nvmxip_qspi.o
-diff --git a/drivers/nvmxip/nvmxip-uclass.c b/drivers/nvmxip/nvmxip-uclass.c
-new file mode 100644
-index 000000000000..0f7e47b8af86
--- /dev/null
-+++ b/drivers/nvmxip/nvmxip-uclass.c
-@@ -0,0 +1,13 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * (C) Copyright 2022 ARM Limited
-+ * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-+ */
-+
-+#include <common.h>
-+#include <dm.h>
-+
-+UCLASS_DRIVER(nvmxip) = {
-+	.name	= "nvmxip",
-+	.id	= UCLASS_NVMXIP,
-+};
-diff --git a/drivers/nvmxip/nvmxip.c b/drivers/nvmxip/nvmxip.c
-new file mode 100644
-index 000000000000..6ba48183c575
--- /dev/null
-+++ b/drivers/nvmxip/nvmxip.c
-@@ -0,0 +1,127 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * (C) Copyright 2022 ARM Limited
-+ * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-+ */
-+
-+#include <common.h>
-+#include <dm.h>
-+#include <dm/device-internal.h>
-+#include "nvmxip.h"
-+
-+static u32 nvmxip_bdev_max_devs;
-+
-+static int nvmxip_mmio_rawread(const phys_addr_t address, u64 *value)
-+{
-+	*value = readq(address);
-+	return 0;
-+}
-+
-+static ulong nvmxip_blk_read(struct udevice *udev, lbaint_t blknr, lbaint_t blkcnt, void *buffer)
-+{
-+	struct nvmxip_blk_priv *bpriv_data = dev_get_priv(udev);
-+	struct blk_desc *desc = dev_get_uclass_plat(udev);
-+
-+	/* size of 1 block */
-+	/* number of the u64 words to read */
-+	u32 qwords = (blkcnt * desc->blksz) / sizeof(u64);
-+	/* physical address of the first block to read */
-+	phys_addr_t blkaddr = bpriv_data->pplat_data->phys_base + blknr * desc->blksz;
-+	u64 *virt_blkaddr;
-+	u64 *pdst = buffer;
-+	u32 qdata_idx;
-+
-+	if (!pdst)
-+		return -EINVAL;
-+
-+	pr_debug("[%s]: reading from blknr: %lu , blkcnt: %lu\n", udev->name, blknr, blkcnt);
-+
-+	virt_blkaddr = map_sysmem(blkaddr, 0);
-+
-+	/* assumption: the data is virtually contiguous */
-+
-+	for (qdata_idx = 0 ; qdata_idx < qwords ; qdata_idx++)
-+		nvmxip_mmio_rawread((phys_addr_t)(virt_blkaddr + qdata_idx), pdst++);
-+
-+	pr_debug("[%s]:     src[0]: 0x%llx , dst[0]: 0x%llx , src[-1]: 0x%llx , dst[-1]: 0x%llx\n",
-+		 udev->name,
-+		 *virt_blkaddr,
-+		 *(u64 *)buffer,
-+		 *(u64 *)((u8 *)virt_blkaddr + desc->blksz * blkcnt - sizeof(u64)),
-+		 *(u64 *)((u8 *)buffer + desc->blksz * blkcnt - sizeof(u64)));
-+
-+	unmap_sysmem(virt_blkaddr);
-+
-+	return blkcnt;
-+}
-+
-+static int nvmxip_blk_probe(struct udevice *udev)
-+{
-+	struct nvmxip_priv *ppriv_data = dev_get_priv(udev->parent);
-+	struct blk_desc *desc = dev_get_uclass_plat(udev);
-+	struct nvmxip_blk_priv *bpriv_data = dev_get_priv(udev);
-+
-+	bpriv_data->bdev = udev;
-+	bpriv_data->pplat_data = ppriv_data->plat_data;
-+	desc->lba = bpriv_data->pplat_data->lba;
-+	desc->log2blksz = bpriv_data->pplat_data->lba_shift;
-+	desc->blksz = 1 << bpriv_data->pplat_data->lba_shift;
-+	desc->bdev = bpriv_data->bdev;
-+
-+	pr_debug("[%s]: block storage layout\n    lbas: %lu , log2blksz: %d, blksz: %lu\n",
-+		 udev->name, desc->lba, desc->log2blksz, desc->blksz);
-+
-+	return 0;
-+}
-+
-+int nvmxip_init(struct udevice *udev)
-+{
-+	struct nvmxip_plat *plat_data = dev_get_plat(udev);
-+	struct nvmxip_priv *priv_data = dev_get_priv(udev);
-+	int ret;
-+	struct udevice *bdev = NULL;
-+	char bdev_name[NVMXIP_BLKDEV_NAME_SZ + 1] = {0};
-+
-+	priv_data->udev = udev;
-+	priv_data->plat_data = plat_data;
-+
-+	nvmxip_bdev_max_devs++;
-+
-+	snprintf(bdev_name, NVMXIP_BLKDEV_NAME_SZ, "nvmxip-blk#%d", nvmxip_bdev_max_devs);
-+
-+	ret = blk_create_devicef(udev, NVMXIP_BLKDRV_NAME, bdev_name, UCLASS_NVMXIP,
-+				 nvmxip_bdev_max_devs, NVMXIP_DEFAULT_LBA_SZ,
-+				 NVMXIP_DEFAULT_LBA_COUNT, &bdev);
-+	if (ret) {
-+		pr_err("[%s]: failure during creation of the block device %s, error %d\n",
-+		       udev->name, bdev_name, ret);
-+		goto blkdev_setup_error;
-+	}
-+
-+	ret = blk_probe_or_unbind(bdev);
-+	if (ret) {
-+		pr_err("[%s]: failure during probing the block device %s, error %d\n",
-+		       udev->name, bdev_name, ret);
-+		goto blkdev_setup_error;
-+	}
-+
-+	pr_info("[%s]: the block device %s ready for use\n", udev->name, bdev_name);
-+
-+	return 0;
-+
-+blkdev_setup_error:
-+	nvmxip_bdev_max_devs--;
-+	return ret;
-+}
-+
-+static const struct blk_ops nvmxip_blk_ops = {
-+	.read	= nvmxip_blk_read,
-+};
-+
-+U_BOOT_DRIVER(nvmxip_blk) = {
-+	.name	= NVMXIP_BLKDRV_NAME,
-+	.id	= UCLASS_BLK,
-+	.probe	= nvmxip_blk_probe,
-+	.ops	= &nvmxip_blk_ops,
-+	.priv_auto	= sizeof(struct nvmxip_blk_priv),
-+};
-diff --git a/drivers/nvmxip/nvmxip.h b/drivers/nvmxip/nvmxip.h
-new file mode 100644
-index 000000000000..393172cc2f86
--- /dev/null
-+++ b/drivers/nvmxip/nvmxip.h
-@@ -0,0 +1,46 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+/*
-+ * (C) Copyright 2022 ARM Limited
-+ * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-+ */
-+
-+#ifndef __DRIVER_NVMXIP_H__
-+#define __DRIVER_NVMXIP_H__
-+
-+#include <asm/io.h>
-+#include <blk.h>
-+#include <linux/bitops.h>
-+#include <linux/compat.h>
-+#include <mapmem.h>
-+
-+#define NVMXIP_BLKDRV_NAME    "nvmxip-blk"
-+
-+#define NVMXIP_BLKDEV_NAME_SZ 20
-+
-+#define NVMXIP_DEFAULT_LBA_SHIFT 10 /* 1024 bytes per block */
-+#define NVMXIP_DEFAULT_LBA_COUNT 1024 /* block count */
-+
-+#define NVMXIP_DEFAULT_LBA_SZ BIT(NVMXIP_DEFAULT_LBA_SHIFT)
-+
-+/* NVM XIP device platform data */
-+struct nvmxip_plat {
-+	phys_addr_t phys_base; /* NVM XIP device base address */
-+	u32 lba_shift; /* block size shift count (read from device tree) */
-+	lbaint_t lba; /* number of blocks (read from device tree) */
-+};
-+
-+/* NVM XIP device private data */
-+struct nvmxip_priv {
-+	struct udevice *udev;
-+	struct nvmxip_plat *plat_data;
-+};
-+
-+/* Private data of the block device associated with the NVM XIP device (the parent) */
-+struct nvmxip_blk_priv {
-+	struct udevice *bdev;
-+	struct nvmxip_plat *pplat_data; /* parent device platform data */
-+};
-+
-+int nvmxip_init(struct udevice *udev);
-+
-+#endif /* __DRIVER_NVMXIP_H__ */
-diff --git a/drivers/nvmxip/nvmxip_qspi.c b/drivers/nvmxip/nvmxip_qspi.c
-new file mode 100644
-index 000000000000..749625134acd
--- /dev/null
-+++ b/drivers/nvmxip/nvmxip_qspi.c
-@@ -0,0 +1,65 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * (C) Copyright 2022 ARM Limited
-+ * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-+ */
-+
-+#include <common.h>
-+#include <dm.h>
-+#include <fdt_support.h>
-+#include "nvmxip.h"
-+
-+#include <asm/global_data.h>
-+DECLARE_GLOBAL_DATA_PTR;
-+
-+#define NVMXIP_QSPI_DRV_NAME "nvmxip_qspi"
-+
-+static int nvmxip_qspi_probe(struct udevice *dev)
-+{
-+	pr_debug("[%s][%s]\n", __func__, dev->name);
-+	return nvmxip_init(dev);
-+}
-+
-+static int nvmxip_qspi_of_to_plat(struct udevice *dev)
-+{
-+	struct nvmxip_plat *plat_data = dev_get_plat(dev);
-+	int ret;
-+
-+	plat_data->phys_base = (phys_addr_t)dev_read_addr(dev);
-+	if (plat_data->phys_base == FDT_ADDR_T_NONE) {
-+		pr_err("[%s]: can not get base address from device tree\n", dev->name);
-+		return -EINVAL;
-+	}
-+
-+	ret = dev_read_u32(dev, "lba_shift", &plat_data->lba_shift);
-+	if (ret) {
-+		pr_err("[%s]: can not get lba_shift from device tree\n", dev->name);
-+		return -EINVAL;
-+	}
-+
-+	ret = dev_read_u32(dev, "lba", (u32 *)&plat_data->lba);
-+	if (ret) {
-+		pr_err("[%s]: can not get lba from device tree\n", dev->name);
-+		return -EINVAL;
-+	}
-+
-+	pr_debug("[%s]: XIP device base addr: 0x%llx , lba_shift: %d , lbas: %lu\n",
-+		 dev->name, plat_data->phys_base, plat_data->lba_shift, plat_data->lba);
-+
-+	return 0;
-+}
-+
-+static const struct udevice_id nvmxip_qspi_ids[] = {
-+	{ .compatible = "nvmxip,qspi" },
-+	{ /* sentinel */ }
-+};
-+
-+U_BOOT_DRIVER(nvmxip_qspi) = {
-+	.name = NVMXIP_QSPI_DRV_NAME,
-+	.id = UCLASS_NVMXIP,
-+	.of_match = nvmxip_qspi_ids,
-+	.of_to_plat = nvmxip_qspi_of_to_plat,
-+	.priv_auto = sizeof(struct nvmxip_priv),
-+	.plat_auto = sizeof(struct nvmxip_plat),
-+	.probe = nvmxip_qspi_probe,
-+};
-diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
-index fa08a66ac8e0..f3564a49d912 100644
--- a/include/dm/uclass-id.h
-+++ b/include/dm/uclass-id.h
-@@ -92,6 +92,7 @@ enum uclass_id {
- 	UCLASS_NOP,		/* No-op devices */
- 	UCLASS_NORTHBRIDGE,	/* Intel Northbridge / SDRAM controller */
- 	UCLASS_NVME,		/* NVM Express device */
-+	UCLASS_NVMXIP,		/* NVM XIP devices */
- 	UCLASS_P2SB,		/* (x86) Primary-to-Sideband Bus */
- 	UCLASS_PANEL,		/* Display panel, such as an LCD */
- 	UCLASS_PANEL_BACKLIGHT,	/* Backlight controller for panel */
-- 
-2.39.2
-
@@ -0,0 +1,271 @@
+From 4b71ade0e8e5ad3692b1decb5c1d0c9472827535 Mon Sep 17 00:00:00 2001
+From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Date: Fri, 14 Apr 2023 13:44:25 +0100
+Subject: [PATCH 28/42] drivers/mtd/nvmxip: introduce QSPI XIP driver
+
+add nvmxip_qspi driver under UCLASS_NVMXIP
+
+The device associated with this driver is the parent of the blk#<id> device
+nvmxip_qspi can be reused by other platforms. If the platform
+has custom settings to apply before using the flash, then the platform
+can provide its own parent driver belonging to UCLASS_NVMXIP and reuse
+nvmxip-blk driver. The custom driver can be implemented like nvmxip_qspi in
+addition to the platform custom settings.
+
+Platforms can use multiple NVM XIP devices at the same time by defining a
+DT node for each one of them.
+
+For more details please refer to doc/develop/driver-model/nvmxip_qspi.rst
+
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Upstream-Status: Backport [https://github.com/u-boot/u-boot/commit/c9c2c95d4cd27fe0cd41fe13a863899d268f973c]
+---
+ MAINTAINERS                                   |  1 +
+ doc/develop/driver-model/nvmxip.rst           | 45 +++++++++++-
+ .../nvmxip/nvmxip_qspi.txt                    | 56 +++++++++++++++
+ drivers/mtd/nvmxip/Kconfig                    |  6 ++
+ drivers/mtd/nvmxip/Makefile                   |  1 +
+ drivers/mtd/nvmxip/nvmxip_qspi.c              | 70 +++++++++++++++++++
+ 6 files changed, 178 insertions(+), 1 deletion(-)
+ create mode 100644 doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
+ create mode 100644 drivers/mtd/nvmxip/nvmxip_qspi.c
+
+diff --git a/MAINTAINERS b/MAINTAINERS
+index 1dbfab5f43..f81654346e 100644
+--- a/MAINTAINERS
+++ b/MAINTAINERS
+@@ -1206,6 +1206,7 @@ NVMXIP
+ M:	Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+ S:	Maintained
+ F:	doc/develop/driver-model/nvmxip.rst
+F:	doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
+ F:	drivers/mtd/nvmxip/
+ 
+ NVMEM
+diff --git a/doc/develop/driver-model/nvmxip.rst b/doc/develop/driver-model/nvmxip.rst
+index fe087b13d2..09afdbcccf 100644
+--- a/doc/develop/driver-model/nvmxip.rst
+++ b/doc/develop/driver-model/nvmxip.rst
+@@ -25,7 +25,33 @@ The NVMXIP Uclass provides the following drivers:
+         the Uclass creates a block device and binds it with the nvmxip-blk.
+ 	The Uclass driver implemented by drivers/mtd/nvmxip/nvmxip-uclass.c
+ 
+-    The implementation is generic and can be used by different platforms.
+      nvmxip_qspi driver :
+
+        The driver probed with the DT and is the parent of the blk#<id> device.
+        nvmxip_qspi can be reused by other platforms. If the platform
+        has custom settings to apply before using the flash, then the platform
+        can provide its own parent driver belonging to UCLASS_NVMXIP and reuse
+        nvmxip-blk. The custom driver can be implemented like nvmxip_qspi in
+        addition to the platform custom settings.
+	The nvmxip_qspi driver belongs to UCLASS_NVMXIP.
+	The driver implemented by drivers/mtd/nvmxip/nvmxip_qspi.c
+
+	For example, if we have two NVMXIP devices described in the DT
+	The devices hierarchy is as follows:
+
+::
+
+   => dm tree
+
+        Class     Index  Probed  Driver                Name
+    -----------------------------------------------------------
+    ...
+     nvmxip        0  [ + ]   nvmxip_qspi           |-- nvmxip-qspi1@08000000
+     blk           3  [ + ]   nvmxip-blk                    |   `-- nvmxip-qspi1@08000000.blk#1
+     nvmxip        1  [ + ]   nvmxip_qspi           |-- nvmxip-qspi2@08200000
+     blk           4  [ + ]   nvmxip-blk                    |   `-- nvmxip-qspi2@08200000.blk#2
+
+The implementation is generic and can be used by different platforms.
+ 
+ Supported hardware
+ --------------------------------
+@@ -43,6 +69,23 @@ config NVMXIP
+ 	  handles the read operation. This driver is HW agnostic and can support
+ 	  multiple flash devices at the same time.
+ 
+config NVMXIP_QSPI
+	  This option allows the emulation of a block storage device on top of a QSPI XIP flash.
+	  Any platform that needs to emulate one or multiple QSPI XIP flash devices can turn this
+	  option on to enable the functionality. NVMXIP config is selected automatically.
+	  Platforms that need to add custom treatments before accessing to the flash, can
+	  write their own driver (same as nvmxip_qspi in addition to the custom settings).
+
+Device Tree nodes
+--------------------
+
+Multiple QSPI XIP flash devices can be used at the same time by describing them through DT
+nodes.
+
+Please refer to the documentation of the DT binding at:
+
+doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
+
+ Contributors
+ ------------
+    * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+diff --git a/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt b/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
+new file mode 100644
+index 0000000000..cc60e9efdc
+--- /dev/null
+++ b/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
+@@ -0,0 +1,56 @@
+Specifying NVMXIP information for devices
+======================================
+
+QSPI XIP flash device nodes
+---------------------------
+
+Each flash device should have its own node.
+
+Each node must specify the following fields:
+
+1)
+		compatible = "nvmxip,qspi";
+
+This allows to bind the flash device with the nvmxip_qspi driver
+If a platform has its own driver, please provide your own compatible
+string.
+
+2)
+		reg = <0x0 0x08000000 0x0 0x00200000>;
+
+The start address and size of the flash device. The values give here are an
+example (when the cell size is 2).
+
+When cell size is 1, the reg field looks like this:
+
+		reg = <0x08000000 0x00200000>;
+
+3)
+
+		lba_shift = <9>;
+
+The number of bit shifts used to calculate the size in bytes of one block.
+In this example the block size is 1 << 9 = 2 ^ 9 = 512 bytes
+
+4)
+
+		lba = <4096>;
+
+The number of blocks.
+
+Example of multiple flash devices
+----------------------------------------------------
+
+	nvmxip-qspi1@08000000 {
+		compatible = "nvmxip,qspi";
+		reg = <0x0 0x08000000 0x0 0x00200000>;
+		lba_shift = <9>;
+		lba = <4096>;
+	};
+
+	nvmxip-qspi2@08200000 {
+		compatible = "nvmxip,qspi";
+		reg = <0x0 0x08200000 0x0 0x00100000>;
+		lba_shift = <9>;
+		lba = <2048>;
+	};
+diff --git a/drivers/mtd/nvmxip/Kconfig b/drivers/mtd/nvmxip/Kconfig
+index ef53fc3c79..3ef7105026 100644
+--- a/drivers/mtd/nvmxip/Kconfig
+++ b/drivers/mtd/nvmxip/Kconfig
+@@ -11,3 +11,9 @@ config NVMXIP
+ 	  This option allows the emulation of a block storage device
+ 	  on top of a direct access non volatile memory XIP flash devices.
+ 	  This support provides the read operation.
+
+config NVMXIP_QSPI
+	bool "QSPI XIP  support"
+	select NVMXIP
+	help
+	  This option allows the emulation of a block storage device on top of a QSPI XIP flash
+diff --git a/drivers/mtd/nvmxip/Makefile b/drivers/mtd/nvmxip/Makefile
+index 07890982c7..54eacc102e 100644
+--- a/drivers/mtd/nvmxip/Makefile
+++ b/drivers/mtd/nvmxip/Makefile
+@@ -5,3 +5,4 @@
+ #   Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+ 
+ obj-y += nvmxip-uclass.o nvmxip.o
+obj-$(CONFIG_NVMXIP_QSPI) += nvmxip_qspi.o
+diff --git a/drivers/mtd/nvmxip/nvmxip_qspi.c b/drivers/mtd/nvmxip/nvmxip_qspi.c
+new file mode 100644
+index 0000000000..7221fd1cb4
+--- /dev/null
+++ b/drivers/mtd/nvmxip/nvmxip_qspi.c
+@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
+ *
+ * Authors:
+ *   Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <fdt_support.h>
+#include <linux/errno.h>
+#include "nvmxip.h"
+
+#include <asm/global_data.h>
+DECLARE_GLOBAL_DATA_PTR;
+
+#define NVMXIP_QSPI_DRV_NAME "nvmxip_qspi"
+
+/**
+ * nvmxip_qspi_of_to_plat() -read from DT
+ * @dev:	the NVMXIP device
+ *
+ * Read from the DT the NVMXIP information.
+ *
+ * Return:
+ *
+ * 0 on success. Otherwise, failure
+ */
+static int nvmxip_qspi_of_to_plat(struct udevice *dev)
+{
+	struct nvmxip_plat *plat = dev_get_plat(dev);
+	int ret;
+
+	plat->phys_base = (phys_addr_t)dev_read_addr(dev);
+	if (plat->phys_base == FDT_ADDR_T_NONE) {
+		log_err("[%s]: can not get base address from device tree\n", dev->name);
+		return -EINVAL;
+	}
+
+	ret = dev_read_u32(dev, "lba_shift", &plat->lba_shift);
+	if (ret) {
+		log_err("[%s]: can not get lba_shift from device tree\n", dev->name);
+		return -EINVAL;
+	}
+
+	ret = dev_read_u32(dev, "lba", (u32 *)&plat->lba);
+	if (ret) {
+		log_err("[%s]: can not get lba from device tree\n", dev->name);
+		return -EINVAL;
+	}
+
+	log_debug("[%s]: XIP device base addr: 0x%llx , lba_shift: %d , lbas: %lu\n",
+		  dev->name, plat->phys_base, plat->lba_shift, plat->lba);
+
+	return 0;
+}
+
+static const struct udevice_id nvmxip_qspi_ids[] = {
+	{ .compatible = "nvmxip,qspi" },
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(nvmxip_qspi) = {
+	.name = NVMXIP_QSPI_DRV_NAME,
+	.id = UCLASS_NVMXIP,
+	.of_match = nvmxip_qspi_ids,
+	.of_to_plat = nvmxip_qspi_of_to_plat,
+	.plat_auto = sizeof(struct nvmxip_plat),
+};
+-- 
+2.25.1
+
@@ -1,113 +0,0 @@
-From 2b0606f603de13524ce9b63578f4c3358c3ac6df Mon Sep 17 00:00:00 2001
-From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-Date: Thu, 22 Dec 2022 12:15:42 +0000
-Subject: [PATCH 29/43] sandbox64: add support for NVMXIP QSPI
-
-enable NVMXIP QSPI for sandbox 64-bit
-
-Adding two NVM XIP QSPI storage devices.
-
-Upstream-Status: Submitted
-Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
- arch/sandbox/dts/sandbox64.dts | 13 +++++++++++++
- arch/sandbox/dts/test.dts      | 14 ++++++++++++++
- configs/sandbox_defconfig      |  1 +
- drivers/nvmxip/nvmxip.c        |  4 ++++
- drivers/nvmxip/nvmxip.h        |  3 +++
- 5 files changed, 35 insertions(+)
-
-diff --git a/arch/sandbox/dts/sandbox64.dts b/arch/sandbox/dts/sandbox64.dts
-index a9cd7908f83e..aed3801af8a9 100644
--- a/arch/sandbox/dts/sandbox64.dts
-+++ b/arch/sandbox/dts/sandbox64.dts
-@@ -89,6 +89,19 @@
- 		cs-gpios = <0>, <&gpio_a 0>;
- 	};
- 
-+	nvmxip-qspi1@08000000 {
-+		compatible = "nvmxip,qspi";
-+		reg = <0x0 0x08000000 0x0 0x00200000>;
-+		lba_shift = <9>;
-+		lba = <4096>;
-+	};
-+
-+	nvmxip-qspi2@08200000 {
-+		compatible = "nvmxip,qspi";
-+		reg = <0x0 0x08200000 0x0 0x00100000>;
-+		lba_shift = <9>;
-+		lba = <2048>;
-+	};
- };
- 
- #include "sandbox.dtsi"
-diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
-index 2e580f980fc6..54f2b308e793 100644
--- a/arch/sandbox/dts/test.dts
-+++ b/arch/sandbox/dts/test.dts
-@@ -1756,6 +1756,20 @@
- 		compatible = "u-boot,fwu-mdata-gpt";
- 		fwu-mdata-store = <&mmc0>;
- 	};
-+
-+	nvmxip-qspi1@08000000 {
-+		compatible = "nvmxip,qspi";
-+		reg = <0x08000000 0x00200000>;
-+		lba_shift = <9>;
-+		lba = <4096>;
-+	};
-+
-+	nvmxip-qspi2@08200000 {
-+		compatible = "nvmxip,qspi";
-+		reg = <0x08200000 0x00100000>;
-+		lba_shift = <9>;
-+		lba = <2048>;
-+	};
- };
- 
- #include "sandbox_pmic.dtsi"
-diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
-index e6ea96a6b924..f22230b5cce2 100644
--- a/configs/sandbox_defconfig
-+++ b/configs/sandbox_defconfig
-@@ -138,6 +138,7 @@ CONFIG_NETCONSOLE=y
- CONFIG_IP_DEFRAG=y
- CONFIG_BOOTP_SERVERIP=y
- CONFIG_IPV6=y
-+CONFIG_NVMXIP_QSPI=y
- CONFIG_DM_DMA=y
- CONFIG_DEVRES=y
- CONFIG_DEBUG_DEVRES=y
-diff --git a/drivers/nvmxip/nvmxip.c b/drivers/nvmxip/nvmxip.c
-index 6ba48183c575..af9c9a3b7270 100644
--- a/drivers/nvmxip/nvmxip.c
-+++ b/drivers/nvmxip/nvmxip.c
-@@ -85,6 +85,10 @@ int nvmxip_init(struct udevice *udev)
- 	priv_data->udev = udev;
- 	priv_data->plat_data = plat_data;
- 
-+#if CONFIG_IS_ENABLED(SANDBOX64)
-+	sandbox_set_enable_memio(true);
-+#endif
-+
- 	nvmxip_bdev_max_devs++;
- 
- 	snprintf(bdev_name, NVMXIP_BLKDEV_NAME_SZ, "nvmxip-blk#%d", nvmxip_bdev_max_devs);
-diff --git a/drivers/nvmxip/nvmxip.h b/drivers/nvmxip/nvmxip.h
-index 393172cc2f86..0384ce2e2b47 100644
--- a/drivers/nvmxip/nvmxip.h
-+++ b/drivers/nvmxip/nvmxip.h
-@@ -8,6 +8,9 @@
- #define __DRIVER_NVMXIP_H__
- 
- #include <asm/io.h>
-+#if CONFIG_IS_ENABLED(SANDBOX64)
-+#include <asm/test.h>
-+#endif
- #include <blk.h>
- #include <linux/bitops.h>
- #include <linux/compat.h>
-- 
-2.39.2
-
@@ -1,22 +1,21 @@
-From 3262ee6a5300221969e61eff7a8f18336a135a73 Mon Sep 17 00:00:00 2001
+From 1b80dfbefd59c8ddff77960552d6c0cc2747758c Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Fri, 16 Dec 2022 17:20:58 +0000
-Subject: [PATCH 28/43] sandbox64: fix: return unsigned long in readq()
+Subject: [PATCH 29/42] sandbox64: fix: return unsigned long in readq()

 make readq return unsigned long

 readq should return 64-bit data

-Upstream-Status: Submitted
 Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
+Upstream-Status: Backport [https://github.com/u-boot/u-boot/commit/c9c2c95d4cd27fe0cd41fe13a863899d268f973c]
 ---
 arch/sandbox/cpu/cpu.c        | 2 +-
 arch/sandbox/include/asm/io.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

 diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c
-index 636d3545b954..248d17a85c82 100644
+index 636d3545b9..248d17a85c 100644
 --- a/arch/sandbox/cpu/cpu.c
 +++ b/arch/sandbox/cpu/cpu.c
@@ -230,7 +230,7 @@ phys_addr_t map_to_sysmem(const void *ptr)
@@ -29,7 +28,7 @@ index 636d3545b954..248d17a85c82 100644
 	struct sandbox_state *state = state_get_current();
 
 diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h
-index ad6c29a4e26c..31ab7289b4bd 100644
+index ad6c29a4e2..31ab7289b4 100644
 --- a/arch/sandbox/include/asm/io.h
 +++ b/arch/sandbox/include/asm/io.h
@@ -45,7 +45,7 @@ static inline void unmap_sysmem(const void *vaddr)
@@ -42,5 +41,5 @@ index ad6c29a4e26c..31ab7289b4bd 100644
 
 #define readb(addr) sandbox_read((const void *)addr, SB_SIZE_8)
 -- 
-2.39.2
+2.25.1

@@ -0,0 +1,161 @@
+From 25467e433f02f40f5999ed6e6b0d3adb4c9cf16d Mon Sep 17 00:00:00 2001
+From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Date: Fri, 9 Jun 2023 13:08:37 +0100
+Subject: [PATCH 30/42] sandbox64: add support for NVMXIP QSPI
+
+enable NVMXIP QSPI for sandbox 64-bit
+
+Adding two NVM XIP QSPI storage devices.
+
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
+Upstream-Status: Backport [https://github.com/u-boot/u-boot/commit/c9c2c95d4cd27fe0cd41fe13a863899d268f973c]
+
+Changelog:
+===============
+
+v2:
+
+* address nits
+---
+ arch/sandbox/dts/sandbox64.dts                  | 13 +++++++++++++
+ arch/sandbox/dts/test.dts                       | 14 ++++++++++++++
+ configs/sandbox64_defconfig                     |  3 ++-
+ doc/develop/driver-model/nvmxip.rst             |  2 +-
+ doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt |  6 +++---
+ drivers/mtd/nvmxip/nvmxip-uclass.c              |  7 +++++++
+ 6 files changed, 40 insertions(+), 5 deletions(-)
+
+diff --git a/arch/sandbox/dts/sandbox64.dts b/arch/sandbox/dts/sandbox64.dts
+index 3eb0457089..c9a2f4b4a4 100644
+--- a/arch/sandbox/dts/sandbox64.dts
+++ b/arch/sandbox/dts/sandbox64.dts
+@@ -89,6 +89,19 @@
+ 		cs-gpios = <0>, <&gpio_a 0>;
+ 	};
+ 
+	nvmxip-qspi1@08000000 {
+		compatible = "nvmxip,qspi";
+		reg = /bits/ 64 <0x08000000 0x00200000>;
+		lba_shift = <9>;
+		lba = <4096>;
+	};
+
+	nvmxip-qspi2@08200000 {
+		compatible = "nvmxip,qspi";
+		reg = /bits/ 64 <0x08200000 0x00100000>;
+		lba_shift = <9>;
+		lba = <2048>;
+	};
+ };
+ 
+ #include "sandbox.dtsi"
+diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
+index dffe10adbf..c3ba0a225e 100644
+--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
+@@ -1745,6 +1745,20 @@
+ 		compatible = "u-boot,fwu-mdata-gpt";
+ 		fwu-mdata-store = <&mmc0>;
+ 	};
+
+	nvmxip-qspi1@08000000 {
+		compatible = "nvmxip,qspi";
+		reg = <0x08000000 0x00200000>;
+		lba_shift = <9>;
+		lba = <4096>;
+	};
+
+	nvmxip-qspi2@08200000 {
+		compatible = "nvmxip,qspi";
+		reg = <0x08200000 0x00100000>;
+		lba_shift = <9>;
+		lba = <2048>;
+	};
+ };
+ 
+ #include "sandbox_pmic.dtsi"
+diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
+index 4b8a1ec42b..2dca176ae3 100644
+--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
+@@ -260,4 +260,5 @@ CONFIG_UNIT_TEST=y
+ CONFIG_UT_TIME=y
+ CONFIG_UT_DM=y
+ CONFIG_ARM_FFA_TRANSPORT=y
+-CONFIG_SANDBOX_FFA=y
+\ No newline at end of file
+CONFIG_SANDBOX_FFA=y
+CONFIG_NVMXIP_QSPI=y
+\ No newline at end of file
+diff --git a/doc/develop/driver-model/nvmxip.rst b/doc/develop/driver-model/nvmxip.rst
+index 09afdbcccf..e85dc220b9 100644
+--- a/doc/develop/driver-model/nvmxip.rst
+++ b/doc/develop/driver-model/nvmxip.rst
+@@ -56,7 +56,7 @@ The implementation is generic and can be used by different platforms.
+ Supported hardware
+ --------------------------------
+ 
+-Any 64-bit plaform.
+Any plaform supporting readq().
+ 
+ Configuration
+ ----------------------
+diff --git a/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt b/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
+index cc60e9efdc..882728d541 100644
+--- a/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
+++ b/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
+@@ -16,7 +16,7 @@ If a platform has its own driver, please provide your own compatible
+ string.
+ 
+ 2)
+-		reg = <0x0 0x08000000 0x0 0x00200000>;
+		reg = /bits/ 64 <0x08000000 0x00200000>;
+ 
+ The start address and size of the flash device. The values give here are an
+ example (when the cell size is 2).
+@@ -43,14 +43,14 @@ Example of multiple flash devices
+ 
+ 	nvmxip-qspi1@08000000 {
+ 		compatible = "nvmxip,qspi";
+-		reg = <0x0 0x08000000 0x0 0x00200000>;
+		reg = /bits/ 64 <0x08000000 0x00200000>;
+ 		lba_shift = <9>;
+ 		lba = <4096>;
+ 	};
+ 
+ 	nvmxip-qspi2@08200000 {
+ 		compatible = "nvmxip,qspi";
+-		reg = <0x0 0x08200000 0x0 0x00100000>;
+		reg = /bits/ 64 <0x08200000 0x00100000>;
+ 		lba_shift = <9>;
+ 		lba = <2048>;
+ 	};
+diff --git a/drivers/mtd/nvmxip/nvmxip-uclass.c b/drivers/mtd/nvmxip/nvmxip-uclass.c
+index 9f96041e3d..6d8eb177b5 100644
+--- a/drivers/mtd/nvmxip/nvmxip-uclass.c
+++ b/drivers/mtd/nvmxip/nvmxip-uclass.c
+@@ -9,6 +9,9 @@
+ #include <common.h>
+ #include <dm.h>
+ #include <log.h>
+#if CONFIG_IS_ENABLED(SANDBOX64)
+#include <asm/test.h>
+#endif
+ #include <linux/bitops.h>
+ #include "nvmxip.h"
+ 
+@@ -36,6 +39,10 @@ static int nvmxip_post_bind(struct udevice *udev)
+ 	char bdev_name[NVMXIP_BLKDEV_NAME_SZ + 1];
+ 	int devnum;
+ 
+#if CONFIG_IS_ENABLED(SANDBOX64)
+	sandbox_set_enable_memio(true);
+#endif
+
+ 	devnum = uclass_id_count(UCLASS_NVMXIP);
+ 	snprintf(bdev_name, NVMXIP_BLKDEV_NAME_SZ, "blk#%d", devnum);
+ 
+-- 
+2.25.1
+
@@ -1,21 +1,28 @@
-From 3f72e390fc8e1a0d774d80c3ccd21be38c9af1db Mon Sep 17 00:00:00 2001
+From 635848c90343a1b8a268519e3fc78ef7af2e4819 Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Mon, 19 Dec 2022 13:20:19 +0000
-Subject: [PATCH 30/43] corstone1000: add NVM XIP QSPI device tree node
+Subject: [PATCH 31/42] corstone1000: add NVM XIP QSPI device tree node

 add QSPI flash device node for block storage access

-Upstream-Status: Submitted
 Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
+Upstream-Status: Backport [https://github.com/u-boot/u-boot/commit/c9c2c95d4cd27fe0cd41fe13a863899d268f973c]
 ---
- arch/arm/dts/corstone1000.dtsi | 7 +++++++
- 1 file changed, 7 insertions(+)
+ arch/arm/dts/corstone1000.dtsi | 9 ++++++++-
+ 1 file changed, 8 insertions(+), 1 deletion(-)

 diff --git a/arch/arm/dts/corstone1000.dtsi b/arch/arm/dts/corstone1000.dtsi
-index 61e0c33247ce..faf4e12bab2a 100644
+index 61e0c33247..18c4d1e19a 100644
 --- a/arch/arm/dts/corstone1000.dtsi
 +++ b/arch/arm/dts/corstone1000.dtsi
+@@ -1,6 +1,6 @@
+ // SPDX-License-Identifier: GPL-2.0 or MIT
+ /*
+- * Copyright (c) 2022, Arm Limited. All rights reserved.
+ * Copyright 2022-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
+  * Copyright (c) 2022, Linaro Limited. All rights reserved.
+  *
+  */
@@ -38,6 +38,13 @@
 		reg = <0x88200000 0x77e00000>;
 	};
@@ -31,5 +38,5 @@ index 61e0c33247ce..faf4e12bab2a 100644
 		compatible = "arm,gic-400";
 		#interrupt-cells = <3>;
 -- 
-2.39.2
+2.25.1

@@ -1,29 +0,0 @@
-From 0c3d61d499039ff0828376bb21b4fb1de071b8d2 Mon Sep 17 00:00:00 2001
-From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-Date: Mon, 19 Dec 2022 13:25:23 +0000
-Subject: [PATCH 31/43] corstone1000: enable NVM XIP QSPI flash
-
-add the QSPI flash device with block storage capability
-
-Upstream-Status: Submitted
-Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
- configs/corstone1000_defconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
-index 1179bf5f3bfd..2986cc95932f 100644
--- a/configs/corstone1000_defconfig
-+++ b/configs/corstone1000_defconfig
-@@ -58,6 +58,7 @@ CONFIG_DM_SERIAL=y
- CONFIG_USB=y
- CONFIG_USB_ISP1760=y
- CONFIG_ERRNO_STR=y
-+CONFIG_NVMXIP_QSPI=y
- CONFIG_EFI_MM_COMM_TEE=y
- CONFIG_ARM_FFA_TRANSPORT=y
- CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
-- 
-2.39.2
-
@@ -1,7 +1,7 @@
-From 3be91bde755c376a38c3affb9640b39df1acdd9c Mon Sep 17 00:00:00 2001
+From 0ecb61da60febc66e589d6fbf439478af1c88283 Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-Date: Thu, 22 Dec 2022 11:30:16 +0000
-Subject: [PATCH 32/43] sandbox64: add a test case for UCLASS_NVMXIP
+Date: Mon, 12 Jun 2023 17:33:54 +0100
+Subject: [PATCH 32/42] sandbox64: add a test case for UCLASS_NVMXIP

 provide a test for NVM XIP devices

@@ -11,32 +11,47 @@ The test case allows to make sure of the following:
 - The DT entries are read correctly
 - the data read from the flash by the NVMXIP block driver is correct

-Upstream-Status: Submitted
 Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
+Upstream-Status: Backport [https://github.com/u-boot/u-boot/commit/c9c2c95d4cd27fe0cd41fe13a863899d268f973c]
+
+Changelog:
+===============
+
+v2:
+
+* address nits
 ---
 MAINTAINERS      |   1 +
- test/dm/Makefile |   4 ++
- test/dm/nvmxip.c | 115 +++++++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 120 insertions(+)
+ test/dm/Makefile |   6 +-
+ test/dm/nvmxip.c | 145 +++++++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 151 insertions(+), 1 deletion(-)
 create mode 100644 test/dm/nvmxip.c

 diff --git a/MAINTAINERS b/MAINTAINERS
-index ba15dd02d58d..82cb6075cb32 100644
+index f81654346e..6692ce9974 100644
 --- a/MAINTAINERS
 +++ b/MAINTAINERS
-@@ -1210,6 +1210,7 @@ S:	Maintained
+@@ -1208,6 +1208,7 @@ S:	Maintained
 F:	doc/develop/driver-model/nvmxip.rst
- F:	doc/device-tree-bindings/nvmxip/nvmxip.txt
- F:	drivers/nvmxip/
+ F:	doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
+ F:	drivers/mtd/nvmxip/
 +F:	test/dm/nvmxip.c
 
 NVMEM
 M:	Sean Anderson <seanga2@gmail.com>
 diff --git a/test/dm/Makefile b/test/dm/Makefile
-index 85e99e1c120e..bc8214da2da2 100644
+index 85e99e1c12..963fa927f7 100644
 --- a/test/dm/Makefile
 +++ b/test/dm/Makefile
+@@ -1,7 +1,7 @@
+ # SPDX-License-Identifier: GPL-2.0+
+ #
+ # Copyright (c) 2013 Google, Inc
+-# (C) Copyright 2022 ARM Limited
+# Copyright 2022-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
+ 
+ obj-$(CONFIG_UT_DM) += test-dm.o
+ 
@@ -18,6 +18,10 @@ obj-$(CONFIG_UT_DM) += test-uclass.o
 obj-$(CONFIG_UT_DM) += core.o
 obj-$(CONFIG_UT_DM) += read.o
@@ -50,28 +65,32 @@ index 85e99e1c120e..bc8214da2da2 100644
 obj-y += acpi.o
 diff --git a/test/dm/nvmxip.c b/test/dm/nvmxip.c
 new file mode 100644
-index 000000000000..484e6077b4a9
+index 0000000000..e934748eb5
 --- /dev/null
 +++ b/test/dm/nvmxip.c
-@@ -0,0 +1,115 @@
+@@ -0,0 +1,145 @@
 +// SPDX-License-Identifier: GPL-2.0+
 +/*
 + * Functional tests for UCLASS_FFA  class
 + *
-+ * (C) Copyright 2022 ARM Limited
-+ * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+ * Copyright 2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
+ *
+ * Authors:
+ *   Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 + */
 +
 +#include <common.h>
-+#include <console.h>
 +#include <blk.h>
+#include <console.h>
 +#include <dm.h>
+#include <mapmem.h>
 +#include <dm/test.h>
-+#include "../../drivers/nvmxip/nvmxip.h"
+#include <linux/bitops.h>
 +#include <test/test.h>
 +#include <test/ut.h>
+#include "../../drivers/mtd/nvmxip/nvmxip.h"
 +
-+/* NVMXIP devices described in the device tree  */
+/* NVMXIP devices described in the device tree */
 +#define SANDBOX_NVMXIP_DEVICES 2
 +
 +/* reference device tree data for the probed devices */
@@ -82,37 +101,56 @@ index 000000000000..484e6077b4a9
 +#define NVMXIP_BLK_START_PATTERN 0x1122334455667788ULL
 +#define NVMXIP_BLK_END_PATTERN 0xa1a2a3a4a5a6a7a8ULL
 +
-+static int dm_nvmxip_flash_sanity(u8 device_idx, void *buffer)
+/**
+ * dm_nvmxip_flash_sanity() - check flash data
+ * @uts: test state
+ * @device_idx:	the NVMXIP device index
+ * @buffer:	the user buffer where the blocks data is copied to
+ *
+ * Mode 1: When buffer is NULL, initialize the flash with pattern data at the start
+ * and at the end of each block. This pattern data will be used to check data consistency
+ * when verifying the data read.
+ * Mode 2: When the user buffer is provided in the argument (not NULL), compare the data
+ * of the start and the end of each block in the user buffer with the expected pattern data.
+ * Return an error when the check fails.
+ *
+ * Return:
+ *
+ * 0 on success. Otherwise, failure
+ */
+static int dm_nvmxip_flash_sanity(struct unit_test_state *uts, u8 device_idx, void *buffer)
 +{
 +	int i;
-+	u64 *ptr = NULL;
-+	u8 *base = NULL;
+	u64 *ptr;
+	u8 *base;
 +	unsigned long blksz;
 +
-+	blksz = 1 << nvmqspi_refdata[device_idx].lba_shift;
+	blksz = BIT(nvmqspi_refdata[device_idx].lba_shift);
 +
-+	/* if buffer not NULL, init the flash with the pattern data*/
-+	if (!buffer)
+	if (!buffer) {
+		/* Mode 1: point at the flash start address. Pattern data will be written */
 +		base = map_sysmem(nvmqspi_refdata[device_idx].phys_base, 0);
-+	else
+	} else {
+		/* Mode 2: point at the user buffer containing the data read and to be verified */
 +		base = buffer;
+	}
 +
 +	for (i = 0; i < nvmqspi_refdata[device_idx].lba ; i++) {
 +		ptr = (u64 *)(base + i * blksz);
 +
-+		/* write an 8 bytes pattern at the start of the current block*/
+		/* write an 8 bytes pattern at the start of the current block */
 +		if (!buffer)
 +			*ptr = NVMXIP_BLK_START_PATTERN;
-+		else if (*ptr != NVMXIP_BLK_START_PATTERN)
-+			return -EINVAL;
+		else
+			ut_asserteq_64(NVMXIP_BLK_START_PATTERN, *ptr);
 +
 +		ptr = (u64 *)((u8 *)ptr + blksz - sizeof(u64));
 +
-+		/* write an 8 bytes pattern at the end of the current block*/
+		/* write an 8 bytes pattern at the end of the current block */
 +		if (!buffer)
 +			*ptr = NVMXIP_BLK_END_PATTERN;
-+		else if (*ptr != NVMXIP_BLK_END_PATTERN)
-+			return -EINVAL;
+		else
+			ut_asserteq_64(NVMXIP_BLK_END_PATTERN, *ptr);
 +	}
 +
 +	if (!buffer)
@@ -121,6 +159,13 @@ index 000000000000..484e6077b4a9
 +	return 0;
 +}
 +
+/**
+ * dm_test_nvmxip() - check flash data
+ * @uts: test state
+ * Return:
+ *
+ * CMD_RET_SUCCESS on success. Otherwise, failure
+ */
 +static int dm_test_nvmxip(struct unit_test_state *uts)
 +{
 +	struct nvmxip_plat *plat_data = NULL;
@@ -130,10 +175,10 @@ index 000000000000..484e6077b4a9
 +	unsigned long flashsz;
 +
 +	/* set the flash content first for both devices */
-+	dm_nvmxip_flash_sanity(0, NULL);
-+	dm_nvmxip_flash_sanity(1, NULL);
+	dm_nvmxip_flash_sanity(uts, 0, NULL);
+	dm_nvmxip_flash_sanity(uts, 1, NULL);
 +
-+	/*  probing all NVM XIP QSPI devices */
+	/* probing all NVM XIP QSPI devices */
 +	for (device_idx = 0, uclass_first_device(UCLASS_NVMXIP, &dev);
 +	     dev;
 +	     uclass_next_device(&dev), device_idx++) {
@@ -151,14 +196,14 @@ index 000000000000..484e6077b4a9
 +		buffer = calloc(flashsz, 1);
 +		ut_assertok(!buffer);
 +
-+		/* the block device is the child of the parent device probed with DT*/
+		/* the block device is the child of the parent device probed with DT */
 +		ut_assertok(device_find_first_child(dev, &bdev));
 +
-+		/* reading all the flash blocks*/
+		/* reading all the flash blocks */
 +		ut_asserteq(plat_data->lba, blk_read(bdev, 0, plat_data->lba, buffer));
 +
 +		/* compare the data read from flash with the expected data */
-+		ut_assertok(dm_nvmxip_flash_sanity(device_idx, buffer));
+		dm_nvmxip_flash_sanity(uts, device_idx, buffer);
 +
 +		free(buffer);
 +	}
@@ -170,5 +215,5 @@ index 000000000000..484e6077b4a9
 +
 +DM_TEST(dm_test_nvmxip, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
 -- 
-2.39.2
+2.25.1

@@ -1,7 +1,7 @@
-From 9ef889ff89e6d2e2e40edecbd4ab7601c3d68052 Mon Sep 17 00:00:00 2001
+From e2fb90ab15babd146dd47b7c946674cd5a5260a1 Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Wed, 1 Feb 2023 15:58:07 +0000
-Subject: [PATCH 34/43] corstone1000: add fwu-metadata store info
+Subject: [PATCH 33/42] corstone1000: add fwu-metadata store info

 Add fwu-mdata node and handle for the reference
 nvmxip-qspi.
@@ -13,7 +13,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 1 file changed, 6 insertions(+), 1 deletion(-)

 diff --git a/arch/arm/dts/corstone1000.dtsi b/arch/arm/dts/corstone1000.dtsi
-index faf4e12bab2a..b1d83b5ba861 100644
+index 18c4d1e19a..25a032b6b3 100644
 --- a/arch/arm/dts/corstone1000.dtsi
 +++ b/arch/arm/dts/corstone1000.dtsi
@@ -38,7 +38,7 @@
@@ -38,5 +38,5 @@ index faf4e12bab2a..b1d83b5ba861 100644
 		compatible = "simple-bus";
 		#address-cells = <1>;
 -- 
-2.39.2
+2.25.1

@@ -1,135 +0,0 @@
-From 560ebe3eb6197322b9d00c8e3cf30fb7e679d8b2 Mon Sep 17 00:00:00 2001
-From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-Date: Thu, 22 Dec 2022 16:20:46 +0000
-Subject: [PATCH 33/43] nvmxip: provide a u-boot shell test command
-
-nvmxip command allows probing the NVM XIP devices manually
-
-The command is provided for test purposes only.
-
-Use:
-
-nvmxip probe
-
-Upstream-Status: Submitted
-Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
- cmd/Kconfig                    |  7 +++++
- cmd/Makefile                   |  1 +
- cmd/nvmxip.c                   | 47 ++++++++++++++++++++++++++++++++++
- configs/corstone1000_defconfig |  1 +
- configs/sandbox_defconfig      |  1 +
- 5 files changed, 57 insertions(+)
- create mode 100644 cmd/nvmxip.c
-
-diff --git a/cmd/Kconfig b/cmd/Kconfig
-index 5e278ecb1597..b6a3e5908534 100644
--- a/cmd/Kconfig
-+++ b/cmd/Kconfig
-@@ -938,6 +938,13 @@ config CMD_ARMFFA
- 		- Sending a data pattern to the specified partition
- 		- Displaying the arm_ffa device info
- 
-+config CMD_NVMXIP
-+	bool "NVM XIP probe command"
-+	depends on NVMXIP
-+	help
-+	  Probes all NVM XIP devices. The command is for
-+	  test purposes only (not to be upstreamed)
-+
- config CMD_ARMFLASH
- 	#depends on FLASH_CFI_DRIVER
- 	bool "armflash"
-diff --git a/cmd/Makefile b/cmd/Makefile
-index c757f1647da6..0a3d98100703 100644
--- a/cmd/Makefile
-+++ b/cmd/Makefile
-@@ -154,6 +154,7 @@ obj-$(CONFIG_CMD_RTC) += rtc.o
- obj-$(CONFIG_SANDBOX) += host.o
- obj-$(CONFIG_CMD_SATA) += sata.o
- obj-$(CONFIG_CMD_NVME) += nvme.o
-+obj-$(CONFIG_CMD_NVMXIP) += nvmxip.o
- obj-$(CONFIG_SANDBOX) += sb.o
- obj-$(CONFIG_CMD_SF) += sf.o
- obj-$(CONFIG_CMD_SCSI) += scsi.o disk.o
-diff --git a/cmd/nvmxip.c b/cmd/nvmxip.c
-new file mode 100644
-index 000000000000..3eb0d84afc04
--- /dev/null
-+++ b/cmd/nvmxip.c
-@@ -0,0 +1,47 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * (C) Copyright 2022 ARM Limited
-+ * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
-+ */
-+
-+#include <common.h>
-+#include <command.h>
-+#include <dm.h>
-+
-+int do_nvmxip_probe(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
-+{
-+	struct udevice *dev = NULL;
-+	for (uclass_first_device(UCLASS_NVMXIP, &dev); dev; uclass_next_device(&dev));
-+
-+	return 0;
-+}
-+
-+static struct cmd_tbl nvmxip_commands[] = {
-+	U_BOOT_CMD_MKENT(probe, 1, 1, do_nvmxip_probe, "", ""),
-+};
-+
-+static int do_nvmxip(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
-+{
-+	struct cmd_tbl *nvmxip_cmd;
-+	int ret;
-+
-+	if (argc < 2)
-+		return CMD_RET_USAGE;
-+
-+	nvmxip_cmd = find_cmd_tbl(argv[1], nvmxip_commands, ARRAY_SIZE(nvmxip_commands));
-+
-+	argc -= 2;
-+	argv += 2;
-+
-+	if (!nvmxip_cmd || argc > nvmxip_cmd->maxargs)
-+		return CMD_RET_USAGE;
-+
-+	ret = nvmxip_cmd->cmd(nvmxip_cmd, flag, argc, argv);
-+
-+	return cmd_process_error(nvmxip_cmd, ret);
-+}
-+
-+U_BOOT_CMD(nvmxip, 4, 1, do_nvmxip,
-+	   "NVM XIP probe command",
-+	   "probe\n"
-+	"	 - probes all NVM XIP devices\n");
-diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
-index 2986cc95932f..e009faee0252 100644
--- a/configs/corstone1000_defconfig
-+++ b/configs/corstone1000_defconfig
-@@ -59,6 +59,7 @@ CONFIG_USB=y
- CONFIG_USB_ISP1760=y
- CONFIG_ERRNO_STR=y
- CONFIG_NVMXIP_QSPI=y
-+CONFIG_CMD_NVMXIP=y
- CONFIG_EFI_MM_COMM_TEE=y
- CONFIG_ARM_FFA_TRANSPORT=y
- CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
-diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
-index f22230b5cce2..3b895be9e4ba 100644
--- a/configs/sandbox_defconfig
-+++ b/configs/sandbox_defconfig
-@@ -139,6 +139,7 @@ CONFIG_IP_DEFRAG=y
- CONFIG_BOOTP_SERVERIP=y
- CONFIG_IPV6=y
- CONFIG_NVMXIP_QSPI=y
-+CONFIG_CMD_NVMXIP=y
- CONFIG_DM_DMA=y
- CONFIG_DEVRES=y
- CONFIG_DEBUG_DEVRES=y
-- 
-2.39.2
-
@@ -1,7 +1,7 @@
-From a8142be9b32a769040b6238ff611c22cb31c8cb5 Mon Sep 17 00:00:00 2001
+From ac77679ffcb4b7fac01414c1492d3e1aae13f9be Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Wed, 1 Feb 2023 16:13:24 +0000
-Subject: [PATCH 37/43] fwu_metadata: make sure structures are packed
+Subject: [PATCH 35/42] fwu_metadata: make sure structures are packed

 The fwu metadata in the metadata partitions
 should/are packed to guarantee that the info is
@@ -16,7 +16,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 1 file changed, 3 insertions(+), 3 deletions(-)

 diff --git a/include/fwu_mdata.h b/include/fwu_mdata.h
-index 8fda4f4ac225..c61221a91735 100644
+index 8fda4f4ac2..c61221a917 100644
 --- a/include/fwu_mdata.h
 +++ b/include/fwu_mdata.h
@@ -22,7 +22,7 @@ struct fwu_image_bank_info {
@@ -46,5 +46,5 @@ index 8fda4f4ac225..c61221a91735 100644
 
 #endif /* _FWU_MDATA_H_ */
 -- 
-2.39.2
+2.25.1

@@ -1,7 +1,7 @@
-From ceae4ec0d459b1ef12e544f4e36d6043a09d3b05 Mon Sep 17 00:00:00 2001
+From 92948559987d02baf9f690d9bbdc96d1179264ef Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Wed, 1 Feb 2023 16:15:30 +0000
-Subject: [PATCH 38/43] corstone1000: add boot index
+Subject: [PATCH 36/42] corstone1000: add boot index

 it is expected that the firmware that runs before
 u-boot somehow provide the information of the bank
@@ -16,7 +16,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 1 file changed, 2 insertions(+), 1 deletion(-)

 diff --git a/board/armltd/corstone1000/corstone1000.c b/board/armltd/corstone1000/corstone1000.c
-index d6ca6e896140..0a58ccd99cdd 100644
+index d6ca6e8961..0a58ccd99c 100644
 --- a/board/armltd/corstone1000/corstone1000.c
 +++ b/board/armltd/corstone1000/corstone1000.c
@@ -106,6 +106,7 @@ int dram_init_banksize(void)
@@ -29,5 +29,5 @@ index d6ca6e896140..0a58ccd99cdd 100644
 +	*boot_idx = 0;
 }
 -- 
-2.39.2
+2.25.1

@@ -1,44 +0,0 @@
-From 83823733015998702e4dc0365764fe7dde4a321f Mon Sep 17 00:00:00 2001
-From: Rui Miguel Silva <rui.silva@linaro.org>
-Date: Wed, 1 Feb 2023 15:59:36 +0000
-Subject: [PATCH 35/43] nvmxip: shorter block device name
-
-Make the block device name shorter, so it will be set and presented
-inside the array limits.
-
-Upstream-Status: Pending
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
- drivers/nvmxip/nvmxip.c      | 2 +-
- drivers/nvmxip/nvmxip_qspi.c | 2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/nvmxip/nvmxip.c b/drivers/nvmxip/nvmxip.c
-index af9c9a3b7270..91fe995f2d4d 100644
--- a/drivers/nvmxip/nvmxip.c
-+++ b/drivers/nvmxip/nvmxip.c
-@@ -91,7 +91,7 @@ int nvmxip_init(struct udevice *udev)
- 
- 	nvmxip_bdev_max_devs++;
- 
-	snprintf(bdev_name, NVMXIP_BLKDEV_NAME_SZ, "nvmxip-blk#%d", nvmxip_bdev_max_devs);
-+	snprintf(bdev_name, NVMXIP_BLKDEV_NAME_SZ, "blk#%d", nvmxip_bdev_max_devs);
- 
- 	ret = blk_create_devicef(udev, NVMXIP_BLKDRV_NAME, bdev_name, UCLASS_NVMXIP,
- 				 nvmxip_bdev_max_devs, NVMXIP_DEFAULT_LBA_SZ,
-diff --git a/drivers/nvmxip/nvmxip_qspi.c b/drivers/nvmxip/nvmxip_qspi.c
-index 749625134acd..f6f5435e6377 100644
--- a/drivers/nvmxip/nvmxip_qspi.c
-+++ b/drivers/nvmxip/nvmxip_qspi.c
-@@ -43,7 +43,7 @@ static int nvmxip_qspi_of_to_plat(struct udevice *dev)
- 		return -EINVAL;
- 	}
- 
-	pr_debug("[%s]: XIP device base addr: 0x%llx , lba_shift: %d , lbas: %lu\n",
-+	log_err("[%s]: XIP device base addr: 0x%llx , lba_shift: %d , lbas: %lu\n",
- 		 dev->name, plat_data->phys_base, plat_data->lba_shift, plat_data->lba);
- 
- 	return 0;
-- 
-2.39.2
-
@@ -1,7 +1,7 @@
-From 80a2910370b0acc35f6fb2fbe3a7e56fecb1a08a Mon Sep 17 00:00:00 2001
+From 1a54c12aa6eed28a1a4e4f50d1aeb92a31cf6f52 Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Wed, 1 Feb 2023 16:17:21 +0000
-Subject: [PATCH 39/43] corstone1000: adjust boot bank and kernel location
+Subject: [PATCH 37/42] corstone1000: adjust boot bank and kernel location

 Adjust in the env boot script the address of the
 bootbank with the new gpt layout, and also the
@@ -17,7 +17,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 1 file changed, 2 insertions(+), 2 deletions(-)

 diff --git a/board/armltd/corstone1000/corstone1000.env b/board/armltd/corstone1000/corstone1000.env
-index b24ff07fc6bd..a6ee4962211b 100644
+index b24ff07fc6..a6ee496221 100644
 --- a/board/armltd/corstone1000/corstone1000.env
 +++ b/board/armltd/corstone1000/corstone1000.env
@@ -1,8 +1,8 @@
@@ -32,5 +32,5 @@ index b24ff07fc6bd..a6ee4962211b 100644
 retrieve_kernel_load_addr=
 	if itest.l *${boot_bank_flag} == 0; then
 -- 
-2.39.2
+2.25.1

@@ -1,31 +0,0 @@
-From 53d29d35cdbcf493f6a9046458947d3e91f01add Mon Sep 17 00:00:00 2001
-From: Rui Miguel Silva <rui.silva@linaro.org>
-Date: Wed, 1 Feb 2023 16:11:25 +0000
-Subject: [PATCH 36/43] efi_boottime: allow to reset a path after boot
-
-Allow to install multiple protocol interfaces in an
-already installed root interface.
-This may need to be fix in other way, but for now
-looks like the get away fix.
-
-Upstream-Status: Pending
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
- lib/efi_loader/efi_boottime.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
-index fea4eb7a342e..90f43ff9a62f 100644
--- a/lib/efi_loader/efi_boottime.c
-+++ b/lib/efi_loader/efi_boottime.c
-@@ -2669,7 +2669,6 @@ efi_install_multiple_protocol_interfaces_int(efi_handle_t *handle,
- 				EFI_PRINT("Path %pD already installed\n",
- 					  protocol_interface);
- 				ret = EFI_ALREADY_STARTED;
-				break;
- 			}
- 		}
- 		ret = EFI_CALL(efi_install_protocol_interface(handle, protocol,
-- 
-2.39.2
-
@@ -1,7 +1,7 @@
-From 0c2bd094b7686e9497327d825470cb90aa29d10f Mon Sep 17 00:00:00 2001
+From 5e0b7e40c4702d5494378d3e120fce0136f69a79 Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
-Date: Wed, 1 Feb 2023 16:19:40 +0000
-Subject: [PATCH 40/43] corstone1000: add nvmxip, fwu-mdata and gpt options
+Date: Fri, 9 Jun 2023 13:28:06 +0100
+Subject: [PATCH 38/42] corstone1000: add nvmxip, fwu-mdata and gpt options

 Enable the newest features: nvmxip, fwu-metadata and
 gpt. Commands to print the partition info, gpt info
@@ -10,11 +10,11 @@ and fwu metadata will be available.
 Upstream-Status: Pending
 Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 ---
- configs/corstone1000_defconfig | 33 ++++++++++++++++++++-------------
- 1 file changed, 20 insertions(+), 13 deletions(-)
+ configs/corstone1000_defconfig | 29 +++++++++++++++++++----------
+ 1 file changed, 19 insertions(+), 10 deletions(-)

 diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
-index e009faee0252..96bb86ec91e9 100644
+index 1179bf5f3b..c38113ce95 100644
 --- a/configs/corstone1000_defconfig
 +++ b/configs/corstone1000_defconfig
@@ -4,18 +4,20 @@ CONFIG_TARGET_CORSTONE1000=y
@@ -41,7 +41,7 @@ index e009faee0252..96bb86ec91e9 100644
 CONFIG_CONSOLE_RECORD=y
 CONFIG_LOGLEVEL=7
 # CONFIG_DISPLAY_CPUINFO is not set
-@@ -23,11 +25,16 @@ CONFIG_LOGLEVEL=7
+@@ -23,11 +25,15 @@ CONFIG_LOGLEVEL=7
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_CBSIZE=512
 # CONFIG_CMD_CONSOLE is not set
@@ -49,7 +49,6 @@ index e009faee0252..96bb86ec91e9 100644
 CONFIG_CMD_BOOTZ=y
 CONFIG_SYS_BOOTM_LEN=0x800000
 # CONFIG_CMD_XIMG is not set
-+CONFIG_CMD_NVMXIP=y
 +CONFIG_CMD_GPT=y
 +# CONFIG_RANDOM_UUID is not set
 CONFIG_CMD_LOADM=y
@@ -58,7 +57,7 @@ index e009faee0252..96bb86ec91e9 100644
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NFS is not set
-@@ -39,29 +46,29 @@ CONFIG_OF_CONTROL=y
+@@ -39,27 +45,30 @@ CONFIG_OF_CONTROL=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
@@ -87,10 +86,8 @@ index e009faee0252..96bb86ec91e9 100644
 CONFIG_USB=y
 CONFIG_USB_ISP1760=y
 CONFIG_ERRNO_STR=y
-CONFIG_NVMXIP_QSPI=y
-CONFIG_CMD_NVMXIP=y
 CONFIG_EFI_MM_COMM_TEE=y
-CONFIG_ARM_FFA_TRANSPORT=y
+ CONFIG_ARM_FFA_TRANSPORT=y
 CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
 +CONFIG_EFI_CAPSULE_ON_DISK=y
 +CONFIG_EFI_IGNORE_OSINDICATIONS=y
@@ -99,5 +96,5 @@ index e009faee0252..96bb86ec91e9 100644
 +CONFIG_FWU_MULTI_BANK_UPDATE=y
 +# CONFIG_TOOLS_MKEFICAPSULE is not set
 -- 
-2.40.0
+2.25.1

@@ -1,7 +1,7 @@
-From 37b3c73d9307d1de3b78e3ccba0ba6ba0867d6b8 Mon Sep 17 00:00:00 2001
+From d280414229d7bbee368f40be6cde17e4f251dd0f Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
-Date: Thu, 23 Feb 2023 10:32:04 +0000
-Subject: [PATCH 41/43] nvmxip: move header to include
+Date: Fri, 9 Jun 2023 13:31:53 +0100
+Subject: [PATCH 39/42] nvmxip: move header to include

 Move header to include to allow external code
 to get the internal bdev structures to access
@@ -14,13 +14,13 @@ listing.
 Upstream-Status: Pending
 Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 ---
- disk/part.c                          | 3 +++
- {drivers/nvmxip => include}/nvmxip.h | 0
+ disk/part.c                              | 3 +++
+ {drivers/mtd/nvmxip => include}/nvmxip.h | 0
 2 files changed, 3 insertions(+)
- rename {drivers/nvmxip => include}/nvmxip.h (100%)
+ rename {drivers/mtd/nvmxip => include}/nvmxip.h (100%)

 diff --git a/disk/part.c b/disk/part.c
-index 5ee60a7fb591..593dd0004fa4 100644
+index 5ee60a7fb5..593dd0004f 100644
 --- a/disk/part.c
 +++ b/disk/part.c
@@ -270,6 +270,9 @@ static void print_part_header(const char *type, struct blk_desc *dev_desc)
@@ -33,10 +33,10 @@ index 5ee60a7fb591..593dd0004fa4 100644
 	case UCLASS_PVBLOCK:
 		puts("PV BLOCK");
 		break;
-diff --git a/drivers/nvmxip/nvmxip.h b/include/nvmxip.h
+diff --git a/drivers/mtd/nvmxip/nvmxip.h b/include/nvmxip.h
 similarity index 100%
-rename from drivers/nvmxip/nvmxip.h
+rename from drivers/mtd/nvmxip/nvmxip.h
 rename to include/nvmxip.h
 -- 
-2.39.2
+2.25.1

@@ -1,7 +1,7 @@
-From d736c596f7a8446955d35bef5adae22de24ab9ab Mon Sep 17 00:00:00 2001
+From e7cb997fd59c883572994b504dbc77bc670de8f7 Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Thu, 23 Feb 2023 10:35:00 +0000
-Subject: [PATCH 42/43] corstone1000: set kernel_addr based on boot_idx
+Subject: [PATCH 40/42] corstone1000: set kernel_addr based on boot_idx

 We need to distinguish between boot banks and from which
 partition to load the kernel+initramfs to memory.
@@ -19,7 +19,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 3 files changed, 58 insertions(+), 9 deletions(-)

 diff --git a/board/armltd/corstone1000/corstone1000.c b/board/armltd/corstone1000/corstone1000.c
-index 0a58ccd99cdd..b767195cccb6 100644
+index 0a58ccd99c..b767195ccc 100644
 --- a/board/armltd/corstone1000/corstone1000.c
 +++ b/board/armltd/corstone1000/corstone1000.c
@@ -5,13 +5,23 @@
@@ -100,7 +100,7 @@ index 0a58ccd99cdd..b767195cccb6 100644
 +	return ret;
 }
 diff --git a/board/armltd/corstone1000/corstone1000.env b/board/armltd/corstone1000/corstone1000.env
-index a6ee4962211b..ee318b1b1c30 100644
+index a6ee496221..ee318b1b1c 100644
 --- a/board/armltd/corstone1000/corstone1000.env
 +++ b/board/armltd/corstone1000/corstone1000.env
@@ -2,12 +2,4 @@
@@ -117,7 +117,7 @@ index a6ee4962211b..ee318b1b1c30 100644
 -	fi;
 kernel_addr_r=0x88200000
 diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
-index 96bb86ec91e9..23e9e6ae5bd3 100644
+index c38113ce95..20359cb181 100644
 --- a/configs/corstone1000_defconfig
 +++ b/configs/corstone1000_defconfig
@@ -22,6 +22,7 @@ CONFIG_CONSOLE_RECORD=y
@@ -129,5 +129,5 @@ index 96bb86ec91e9..23e9e6ae5bd3 100644
 CONFIG_SYS_CBSIZE=512
 # CONFIG_CMD_CONSOLE is not set
 -- 
-2.40.0
+2.25.1

@@ -1,7 +1,7 @@
-From b32aee10c66a9c2a3b6b948ad957deca3391c4bf Mon Sep 17 00:00:00 2001
+From ab07a26290e44fb198403b658b8f1550e959a0cc Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Mon, 27 Feb 2023 14:40:13 +0000
-Subject: [PATCH 43/43] corstone1000: boot index from active
+Subject: [PATCH 41/42] corstone1000: boot index from active

 In our platform, the Secure Enclave is the one who control
 all the boot tries and status, so, every time we get here
@@ -14,7 +14,7 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 1 file changed, 12 insertions(+), 1 deletion(-)

 diff --git a/board/armltd/corstone1000/corstone1000.c b/board/armltd/corstone1000/corstone1000.c
-index 0923ca6e8c5b..e949edb79745 100644
+index b767195ccc..db508ac3cb 100644
 --- a/board/armltd/corstone1000/corstone1000.c
 +++ b/board/armltd/corstone1000/corstone1000.c
@@ -118,7 +118,18 @@ int dram_init_banksize(void)
@@ -38,5 +38,5 @@ index 0923ca6e8c5b..e949edb79745 100644
 
 int board_late_init(void)
 -- 
-2.39.2
+2.25.1

@@ -0,0 +1,30 @@
+From 8bf48a56aa014146a8950532906b06e191754daa Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <emekcan.aras@arm.com>
+Date: Wed, 24 May 2023 09:12:11 +0100
+Subject: [PATCH 42/42] corstone1000: enable PSCI reset
+
+Even though corstone1000 does not implement entire PSCI APIs,it relies on
+PSCI reset interface for the system reset. U-boot change the config name, so we
+need to enable it again.
+
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+---
+ configs/corstone1000_defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
+index 20359cb181..19fe1432ae 100644
+--- a/configs/corstone1000_defconfig
+++ b/configs/corstone1000_defconfig
+@@ -62,6 +62,7 @@ CONFIG_DM_RTC=y
+ CONFIG_RTC_EMULATION=y
+ CONFIG_DM_SERIAL=y
+ CONFIG_SYSRESET=y
+CONFIG_SYSRESET_PSCI=y
+ CONFIG_USB=y
+ CONFIG_USB_ISP1760=y
+ CONFIG_ERRNO_STR=y
+-- 
+2.25.1
+
@@ -0,0 +1,32 @@
+From 9f326f0db8aa13fde93e2ed79055b920c8598a28 Mon Sep 17 00:00:00 2001
+From: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+Date: Mon, 12 Jun 2023 15:14:52 +0000
+Subject: [PATCH] Enable EFI set/get time services
+
+SetTime_Conf and SetTime_Func tests in UEFI SCT test suite of ACS
+fails with unsupported return value. CONFIG_EFI_SET_TIME and
+CONFIG_EFI_GET_TIME config values are added to enable these EFI
+services.
+
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
+---
+ configs/corstone1000_defconfig | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
+index c692cc91bd..f1901dfe8b 100644
+--- a/configs/corstone1000_defconfig
+++ b/configs/corstone1000_defconfig
+@@ -7,6 +7,8 @@ CONFIG_NR_DRAM_BANKS=1
+ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x83f00000
+ CONFIG_DM_GPIO=y
+CONFIG_EFI_SET_TIME=y
+CONFIG_EFI_GET_TIME=y
+ CONFIG_DEFAULT_DEVICE_TREE="corstone1000-mps3"
+ CONFIG_SYS_PROMPT="corstone1000# "
+ CONFIG_IDENT_STRING=" corstone1000 aarch64 "
+-- 
+2.17.1
+
@@ -0,0 +1,47 @@
+From dfebda98ce08d0cab411521ab3d9e832ed1b4608 Mon Sep 17 00:00:00 2001
+From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+Date: Thu, 15 Jun 2023 16:51:49 +0100
+Subject: [PATCH] corstone1000: fix compilation warnings in
+ fwu_plat_get_bootidx()
+
+Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+---
+ board/armltd/corstone1000/corstone1000.c | 7 +++----
+ 1 file changed, 3 insertions(+), 4 deletions(-)
+
+diff --git a/board/armltd/corstone1000/corstone1000.c b/board/armltd/corstone1000/corstone1000.c
+index db508ac3cb..2e1ace5d04 100644
+--- a/board/armltd/corstone1000/corstone1000.c
+++ b/board/armltd/corstone1000/corstone1000.c
+@@ -9,6 +9,7 @@
+ #include <common.h>
+ #include <dm.h>
+ #include <env.h>
+#include <fwu.h>
+ #include <netdev.h>
+ #include <nvmxip.h>
+ #include <part.h>
+@@ -116,7 +117,7 @@ int dram_init_banksize(void)
+ 	return 0;
+ }
+ 
+-void fwu_plat_get_bootidx(int *boot_idx)
+void fwu_plat_get_bootidx(uint *boot_idx)
+ {
+ 	int ret;
+ 
+@@ -127,9 +128,7 @@ void fwu_plat_get_bootidx(int *boot_idx)
+ 	 */
+ 	ret = fwu_get_active_index(boot_idx);
+ 	if (ret < 0)
+-		log_err("corstone1000: failed to read active index\n");
+-
+-	return ret;
+		log_err("corstone1000: failed to read active index err %d\n", ret);
+ }
+ 
+ int board_late_init(void)
+-- 
+2.25.1
+
@@ -18,49 +18,49 @@ EXTRA_OEMAKE:append:corstone1000 = ' DEVICE_TREE=${CORSTONE1000_DEVICE_TREE}'
 SYSROOT_DIRS:append:corstone1000 = " /boot"

 SRC_URI:append:corstone1000 = " \
-        file://0001-arm64-smccc-add-support-for-SMCCCv1.2-x0-x17-registe.patch		\
-        file://0002-lib-uuid-introduce-uuid_str_to_le_bin-function.patch		\
-        file://0003-arm_ffa-introduce-Arm-FF-A-low-level-driver.patch			\
-        file://0004-arm_ffa-efi-unmap-RX-TX-buffers.patch				\
-        file://0005-arm_ffa-introduce-armffa-command.patch				\
-        file://0006-arm_ffa-introduce-the-FF-A-Sandbox-driver.patch			\
-        file://0007-arm_ffa-introduce-Sandbox-test-cases-for-UCLASS_FFA.patch		\
-        file://0008-arm_ffa-introduce-armffa-command-Sandbox-test.patch			\
-        file://0009-arm_ffa-efi-introduce-FF-A-MM-communication.patch			\
-        file://0010-arm_ffa-efi-corstone1000-enable-MM-communication.patch		\
-        file://0011-efi-corstone1000-introduce-EFI-capsule-update.patch			\
-        file://0012-arm-corstone1000-fix-unrecognized-filesystem-type.patch		\
-        file://0013-efi_capsule-corstone1000-pass-interface-id-and-buffe.patch		\
-        file://0014-efi_boottime-corstone1000-pass-interface-id-and-kern.patch		\
-        file://0015-efi_loader-corstone1000-remove-guid-check-from-corst.patch		\
-        file://0016-efi_loader-populate-ESRT-table-if-EFI_ESRT-config-op.patch		\
-        file://0017-efi_firmware-add-get_image_info-for-corstone1000.patch		\
-        file://0018-efi_loader-send-bootcomplete-message-to-secure-encla.patch		\
-        file://0019-efi_loader-fix-null-pointer-exception-with-get_image.patch		\
-        file://0020-arm-corstone1000-add-mmc-for-fvp.patch				\
-        file://0021-corstone1000-add-compressed-kernel-support.patch			\
-        file://0022-Introduce-external-sys-driver-to-device-tree.patch			\
-        file://0023-Add-mhu-and-rpmsg-client-to-u-boot-device-tree.patch		\
-        file://0024-arm-corstone1000-esrt-support.patch					\
-        file://0025-efi_setup-discover-FF-A-bus-before-raising-EFI-start.patch		\
-        file://0026-corstone1000-enable-distro-booting-command.patch			\
-        file://0027-drivers-nvmxip-introduce-NVM-XIP-block-storage-emula.patch		\
-        file://0028-sandbox64-fix-return-unsigned-long-in-readq.patch			\
-        file://0029-sandbox64-add-support-for-NVMXIP-QSPI.patch			\
-        file://0030-corstone1000-add-NVM-XIP-QSPI-device-tree-node.patch		\
-        file://0031-corstone1000-enable-NVM-XIP-QSPI-flash.patch			\
-        file://0032-sandbox64-add-a-test-case-for-UCLASS_NVMXIP.patch			\
-        file://0033-nvmxip-provide-a-u-boot-shell-test-command.patch			\
-        file://0034-corstone1000-add-fwu-metadata-store-info.patch			\
-        file://0035-nvmxip-shorter-block-device-name.patch				\
-        file://0036-efi_boottime-allow-to-reset-a-path-after-boot.patch		\
-        file://0037-fwu_metadata-make-sure-structures-are-packed.patch			\
-        file://0038-corstone1000-add-boot-index.patch					\
-        file://0039-corstone1000-adjust-boot-bank-and-kernel-location.patch		\
-        file://0040-corstone1000-add-nvmxip-fwu-mdata-and-gpt-options.patch		\
-        file://0041-nvmxip-move-header-to-include.patch				\
-        file://0042-corstone1000-set-kernel_addr-based-on-boot_idx.patch		\
-        file://0043-corstone1000-boot-index-from-active.patch				\
+        file://0001-arm64-smccc-add-support-for-SMCCCv1.2-x0-x17-registe.patch            \ 
+        file://0002-lib-uuid-introduce-uuid_str_to_le_bin-function.patch		  \ 
+        file://0003-arm_ffa-introduce-Arm-FF-A-low-level-driver.patch			  \ 
+        file://0004-arm_ffa-efi-unmap-RX-TX-buffers.patch				  \ 
+        file://0005-arm_ffa-introduce-armffa-command.patch				  \ 
+        file://0006-arm_ffa-introduce-the-FF-A-Sandbox-driver.patch			  \ 
+        file://0007-arm_ffa-introduce-Sandbox-test-cases-for-UCLASS_FFA.patch		  \ 
+        file://0008-arm_ffa-introduce-armffa-command-Sandbox-test.patch			  \ 
+        file://0009-arm_ffa-efi-introduce-FF-A-MM-communication.patch			  \ 
+        file://0010-arm_ffa-efi-corstone1000-enable-MM-communication.patch		  \ 
+        file://0011-efi-corstone1000-introduce-EFI-capsule-update.patch			  \ 
+        file://0012-arm-corstone1000-fix-unrecognized-filesystem-type.patch		  \ 
+        file://0013-efi_capsule-corstone1000-pass-interface-id-and-buffe.patch		  \ 
+        file://0014-efi_boottime-corstone1000-pass-interface-id-and-kern.patch		  \ 
+        file://0015-efi_loader-corstone1000-remove-guid-check-from-corst.patch		  \ 
+        file://0016-efi_loader-populate-ESRT-table-if-EFI_ESRT-config-op.patch		  \ 
+        file://0017-efi_firmware-add-get_image_info-for-corstone1000.patch		  \ 
+        file://0018-efi_loader-send-bootcomplete-message-to-secure-encla.patch		  \ 
+        file://0019-efi_loader-fix-null-pointer-exception-with-get_image.patch		  \ 
+        file://0020-arm-corstone1000-add-mmc-for-fvp.patch				  \ 
+        file://0021-corstone1000-add-compressed-kernel-support.patch			  \ 
+        file://0022-Introduce-external-sys-driver-to-device-tree.patch			  \ 
+        file://0023-Add-mhu-and-rpmsg-client-to-u-boot-device-tree.patch		  \ 
+        file://0024-arm-corstone1000-esrt-support.patch					  \ 
+        file://0025-efi_setup-discover-FF-A-bus-before-raising-EFI-start.patch		  \ 
+        file://0026-corstone1000-enable-distro-booting-command.patch			  \ 
+        file://0027-drivers-mtd-nvmxip-introduce-NVM-XIP-block-storage-e.patch		  \ 
+        file://0028-drivers-mtd-nvmxip-introduce-QSPI-XIP-driver.patch			  \ 
+        file://0029-sandbox64-fix-return-unsigned-long-in-readq.patch			  \ 
+        file://0030-sandbox64-add-support-for-NVMXIP-QSPI.patch				  \ 
+        file://0031-corstone1000-add-NVM-XIP-QSPI-device-tree-node.patch		  \ 
+        file://0032-sandbox64-add-a-test-case-for-UCLASS_NVMXIP.patch			  \ 
+        file://0033-corstone1000-add-fwu-metadata-store-info.patch			  \ 
+        file://0034-fwu_metadata-make-sure-structures-are-packed.patch			  \ 
+        file://0035-corstone1000-add-boot-index.patch					  \ 
+        file://0036-corstone1000-adjust-boot-bank-and-kernel-location.patch		  \ 
+        file://0037-corstone1000-add-nvmxip-fwu-mdata-and-gpt-options.patch		  \ 
+        file://0038-nvmxip-move-header-to-include.patch					  \ 
+        file://0039-corstone1000-set-kernel_addr-based-on-boot_idx.patch		  \ 
+        file://0040-corstone1000-boot-index-from-active.patch				  \ 
+        file://0041-corstone1000-enable-PSCI-reset.patch				  \
+        file://0042-Enable-EFI-set-get-time-services.patch                                \
+        file://0043-corstone1000-fix-compilation-warnings-in-fwu_plat_get_bootidx.patch   \ 
        "

 #
@@ -23,6 +23,7 @@ SRC_URI:append = "\
    file://0007-Platform-ARM-N1Sdp-Persistent-storage-for-N1Sdp.patch;patchdir=edk2-platforms \
    file://0008-Platform-ARM-N1Sdp-Enable-FaultTolerantWrite-Dxe-dri.patch;patchdir=edk2-platforms \
    file://0009-Platform-ARM-N1Sdp-manually-poll-QSPI-status-bit-aft.patch;patchdir=edk2-platforms \
+    file://0010-Platform-ARM-N1Sdp-Reserve-OP-TEE-Region-from-UEFI.patch;patchdir=edk2-platforms \
 "

 do_deploy:append() {
@@ -0,0 +1,65 @@
+From 235fabb2269a86e016bab2886b9129c77f0fea71 Wed Oct 11 16:18:22 2023
+From: Mariam Elshakfy <mariam.elshakfy@arm.com>
+Date: Wed Oct 11 16:18:22 2023 +0000
+
+Subject: [PATCH] Platform/ARM/N1Sdp: Reserve OP-TEE Region from UEFI
+
+To enable cache on N1SDP, OP-TEE has to be moved
+to run from DDR4 memory. Since this memory is
+known to application side, it must be reserved
+
+Upstream-Status: Pending (not yet submitted to upstream)
+Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>
+
+diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
+index 78f309c3aa..dc82d5bd87 100644
+--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
+@@ -62,6 +62,9 @@
+ 
+   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
+ 
+  gArmNeoverseN1SocTokenSpaceGuid.PcdOpteeMemoryBase
+  gArmNeoverseN1SocTokenSpaceGuid.PcdOpteeMemorySize
+
+ [Guids]
+   gArmNeoverseN1SocPlatformInfoDescriptorGuid
+   gEfiHobListGuid          ## CONSUMES  ## SystemTable
+diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+index 8bb9407490..d8ad0f975c 100644
+--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+@@ -150,6 +150,19 @@ ArmPlatformGetVirtualMemoryMap (
+     EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
+     EFI_RESOURCE_ATTRIBUTE_TESTED;
+ 
+  // Reserved OP-TEE region
+  BuildResourceDescriptorHob (
+      EFI_RESOURCE_SYSTEM_MEMORY,
+      ResourceAttributes,
+      PcdGet64 (PcdOpteeMemoryBase),
+      PcdGet64 (PcdOpteeMemorySize)
+    );
+  BuildMemoryAllocationHob (
+    PcdGet64 (PcdOpteeMemoryBase),
+    PcdGet64 (PcdOpteeMemorySize),
+    EfiReservedMemoryType
+  );
+
+   BuildResourceDescriptorHob (
+     EFI_RESOURCE_SYSTEM_MEMORY,
+     ResourceAttributes,
+diff --git a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
+index 9e257ebde0..b400b94fd5 100644
+--- a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
+++ b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
+@@ -86,5 +86,9 @@
+   gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio64Translation|0x40000000000|UINT64|0x00000050
+   gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieSegmentNumber|2|UINT32|0x00000051
+ 
+  # Base Address of OP-TEE
+  gArmNeoverseN1SocTokenSpaceGuid.PcdOpteeMemoryBase|0xDE000000|UINT64|0x00000052
+  gArmNeoverseN1SocTokenSpaceGuid.PcdOpteeMemorySize|0x02000000|UINT64|0x00000053
+
+ [Ppis]
+   gNtFwConfigDtInfoPpiGuid =  { 0xb50dee0e, 0x577f, 0x47fb, { 0x83, 0xd0, 0x41, 0x78, 0x61, 0x8b, 0x33, 0x8a } }
@@ -49,8 +49,8 @@ index 00000000..06b4975a
 +CFG_CORE_HEAP_SIZE = 0x32000 # 200kb
 +
 +CFG_TEE_CORE_NB_CORE = 4
-+CFG_TZDRAM_START ?= 0x08000000
-+CFG_TZDRAM_SIZE  ?= 0x02008000
+CFG_TZDRAM_START ?= 0xDE000000
+CFG_TZDRAM_SIZE  ?= 0x02000000
 +
 +CFG_SHMEM_START  ?= 0x83000000
 +CFG_SHMEM_SIZE   ?= 0x00210000
@@ -1,46 +0,0 @@
-Upstream-Status: Pending [Not submitted to upstream yet]
-Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
-
-From 0c3ce4c09cd7d2ff4cd2e62acab899dd88dc9514 Mon Sep 17 00:00:00 2001
-From: Vishnu Banavath <vishnu.banavath@arm.com>
-Date: Wed, 20 Jul 2022 16:45:59 +0100
-Subject: [PATCH] HACK: disable instruction cache and data cache.
-
-For some reason, n1sdp fails to boot with instruction cache and
-data cache enabled. This is a temporary change to disable I cache
-and D cache until a proper fix is found.
-
-Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
-
-%% original patch: 0003-HACK-disable-instruction-cache-and-data-cache.patch
-
-diff --git a/core/arch/arm/kernel/entry_a64.S b/core/arch/arm/kernel/entry_a64.S
-index 875b6e69..594d6928 100644
--- a/core/arch/arm/kernel/entry_a64.S
-+++ b/core/arch/arm/kernel/entry_a64.S
-@@ -52,7 +52,7 @@
- 
- 	.macro set_sctlr_el1
- 		mrs	x0, sctlr_el1
-		orr	x0, x0, #SCTLR_I
-+		bic	x0, x0, #SCTLR_I
- 		orr	x0, x0, #SCTLR_SA
- 		orr	x0, x0, #SCTLR_SPAN
- #if defined(CFG_CORE_RWDATA_NOEXEC)
-@@ -490,11 +490,11 @@ LOCAL_FUNC enable_mmu , : , .identity_map
- 	isb
- 
- 	/* Enable I and D cache */
-	mrs	x1, sctlr_el1
-+	/* mrs	x1, sctlr_el1
- 	orr	x1, x1, #SCTLR_I
- 	orr	x1, x1, #SCTLR_C
- 	msr	sctlr_el1, x1
-	isb
-+	isb */
- 
- 	/* Adjust stack pointers and return address */
- 	msr	spsel, #1
-- 
-2.17.1
-
@@ -1,5 +1,7 @@
 SRC_URI:remove = " \
                  file://0003-core-link-add-no-warn-rwx-segments.patch \
+                  file://0007-core-spmc-handle-non-secure-interrupts.patch \
+                  file://0008-core-spmc-configure-SP-s-NS-interrupt-action-based-o.patch \
                 "

 COMPATIBLE_MACHINE = "corstone1000"
@@ -8,10 +8,9 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files/optee-os/n1sdp:"
 SRC_URI:append = " \
    file://0001-core-arm-add-MPIDR-affinity-shift-and-mask-for-32-bi.patch \
    file://0002-plat-n1sdp-add-N1SDP-platform-support.patch \
-    file://0003-HACK-disable-instruction-cache-and-data-cache.patch \
-    file://0004-Handle-logging-syscall.patch \
-    file://0005-plat-n1sdp-register-DRAM1-to-optee-os.patch \
-    file://0006-plat-n1sdp-add-external-device-tree-base-and-size.patch \
+    file://0003-Handle-logging-syscall.patch \
+    file://0004-plat-n1sdp-register-DRAM1-to-optee-os.patch \
+    file://0005-plat-n1sdp-add-external-device-tree-base-and-size.patch \
    "

 EXTRA_OEMAKE += " CFG_TEE_CORE_LOG_LEVEL=4"
@@ -1,287 +0,0 @@
-From 13de79cd4f0d25b812e5f4ad4a19bc075496be83 Mon Sep 17 00:00:00 2001
-From: Vishnu Banavath <vishnu.banavath@arm.com>
-Date: Fri, 3 Dec 2021 16:36:51 +0000
-Subject: [PATCH 01/20] Add openamp to SE proxy deployment
-
-Openamp is required to communicate between secure partitions(running on
-Cortex-A) and trusted-firmware-m(running on Cortex-M).
-These changes are to fetch libmetal and openamp from github repo's
-and build it.
-
-Upstream-Status: Pending
-Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
- deployments/se-proxy/opteesp/lse.S            | 28 ++++++++
- deployments/se-proxy/se-proxy.cmake           |  8 +++
- external/openamp/libmetal-init-cache.cmake.in | 20 ++++++
- external/openamp/libmetal.cmake               | 67 +++++++++++++++++++
- external/openamp/openamp-init-cache.cmake.in  | 20 ++++++
- external/openamp/openamp.cmake                | 66 ++++++++++++++++++
- 6 files changed, 209 insertions(+)
- create mode 100644 deployments/se-proxy/opteesp/lse.S
- create mode 100644 external/openamp/libmetal-init-cache.cmake.in
- create mode 100644 external/openamp/libmetal.cmake
- create mode 100644 external/openamp/openamp-init-cache.cmake.in
- create mode 100644 external/openamp/openamp.cmake
-
-diff --git a/deployments/se-proxy/opteesp/lse.S b/deployments/se-proxy/opteesp/lse.S
-new file mode 100644
-index 000000000000..8e466d65fc2b
--- /dev/null
-+++ b/deployments/se-proxy/opteesp/lse.S
-@@ -0,0 +1,28 @@
-+// SPDX-License-Identifier: BSD-3-Clause
-+/*
-+ * Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
-+ */
-+
-+.text
-+.globl __aarch64_cas4_acq_rel
-+.globl __aarch64_cas4_sync
-+
-+__aarch64_cas4_acq_rel:
-+	mov	w16, w0
-+	ldaxr	w0, [x2]
-+	cmp	w0, w16
-+0:	bne	1f
-+
-+	stlxr	w17, w1, [x2]
-+	cbnz	w17, 0b
-+1:	ret
-+
-+__aarch64_cas4_sync:
-+	mov	w16, w0
-+	ldxr	w0, [x2]
-+	cmp	w0, w16
-+0:	bne	1f
-+
-+	stlxr	w17, w1, [x2]
-+	cbnz	w17, 0b
-+1:	ret
-diff --git a/deployments/se-proxy/se-proxy.cmake b/deployments/se-proxy/se-proxy.cmake
-index 426c66c05350..d39873a0fe81 100644
--- a/deployments/se-proxy/se-proxy.cmake
-+++ b/deployments/se-proxy/se-proxy.cmake
-@@ -61,6 +61,7 @@ add_components(TARGET "se-proxy"
- target_sources(se-proxy PRIVATE
- 	${CMAKE_CURRENT_LIST_DIR}/common/se_proxy_sp.c
- 	${CMAKE_CURRENT_LIST_DIR}/common/service_proxy_factory.c
-+	${CMAKE_CURRENT_LIST_DIR}/opteesp/lse.S
- )
- 
- #-------------------------------------------------------------------------------
-@@ -73,6 +74,13 @@ include(../../../external/nanopb/nanopb.cmake)
- target_link_libraries(se-proxy PRIVATE nanopb::protobuf-nanopb-static)
- protobuf_generate_all(TGT "se-proxy" NAMESPACE "protobuf" BASE_DIR "${TS_ROOT}/protocols")
- 
-+# libmetal
-+include(../../../external/openamp/libmetal.cmake)
-+
-+# OpenAMP
-+include(../../../external/openamp/openamp.cmake)
-+target_link_libraries(se-proxy PRIVATE openamp libmetal)
-+
- #################################################################
- 
- target_include_directories(se-proxy PRIVATE
-diff --git a/external/openamp/libmetal-init-cache.cmake.in b/external/openamp/libmetal-init-cache.cmake.in
-new file mode 100644
-index 000000000000..04c25fbde960
--- /dev/null
-+++ b/external/openamp/libmetal-init-cache.cmake.in
-@@ -0,0 +1,20 @@
-+#-------------------------------------------------------------------------------
-+# Copyright (c) 2021-2022, Arm Limited and Contributors. All rights reserved.
-+# Copyright (c) 2021-2022, Linaro. All rights reserved.
-+#
-+# SPDX-License-Identifier: BSD-3-Clause
-+#
-+#-------------------------------------------------------------------------------
-+
-+set(CMAKE_INSTALL_PREFIX "@BUILD_INSTALL_DIR@" CACHE STRING "")
-+set(CMAKE_TOOLCHAIN_FILE "@TS_EXTERNAL_LIB_TOOLCHAIN_FILE@" CACHE STRING "")
-+set(BUILD_SHARED_LIBS Off CACHE BOOL "")
-+set(BUILD_STATIC_LIBS On CACHE BOOL "")
-+
-+set(WITH_DOC OFF CACHE BOOL "")
-+set(WITH_TESTS OFF CACHE BOOL "")
-+set(WITH_EXAMPLES OFF CACHE BOOL "")
-+set(WITH_DEFAULT_LOGGER OFF CACHE BOOL "")
-+set(MACHINE "template" CACHE STRING "")
-+
-+@_cmake_fragment@
-diff --git a/external/openamp/libmetal.cmake b/external/openamp/libmetal.cmake
-new file mode 100644
-index 000000000000..6e5004ff555c
--- /dev/null
-+++ b/external/openamp/libmetal.cmake
-@@ -0,0 +1,67 @@
-+#-------------------------------------------------------------------------------
-+# Copyright (c) 2022 Linaro Limited
-+# Copyright (c) 2022, Arm Limited. All rights reserved.
-+#
-+# SPDX-License-Identifier: BSD-3-Clause
-+#
-+#-------------------------------------------------------------------------------
-+
-+set (LIBMETAL_URL "https://github.com/OpenAMP/libmetal.git"
-+		    CACHE STRING "libmetal repository URL")
-+set (LIBMETAL_INSTALL_DIR "${CMAKE_CURRENT_BINARY_DIR}/libmetal_install"
-+		    CACHE DIR "libmetal installation directory")
-+set(LIBMETAL_SOURCE_DIR "${CMAKE_CURRENT_BINARY_DIR}/_deps/libmetal"
-+		CACHE DIR "libmetal source-code")
-+set (LIBMETAL_PACKAGE_DIR "${LIBMETAL_INSTALL_DIR}/libmetal/cmake"
-+			    CACHE DIR "libmetal CMake package directory")
-+set (LIBMETAL_TARGET_NAME "libmetal")
-+set (LIBMETAL_REFSPEC "f252f0e007fbfb8b3a52b1d5901250ddac96baad"
-+			CACHE STRING "The version of libmetal to use")
-+set(LIBMETAL_BINARY_DIR "${CMAKE_CURRENT_BINARY_DIR}/_deps/libmetal-build")
-+
-+set(GIT_OPTIONS
-+    GIT_REPOSITORY ${LIBMETAL_URL}
-+    GIT_TAG ${LIBMETAL_REFSPEC}
-+    GIT_SHALLOW FALSE
-+)
-+
-+if(NOT LIBMETAL_DEBUG)
-+	set(LIBMETAL_BUILD_TYPE "Release")
-+else()
-+	set(LIBMETAL_BUILD_TYPE "Debug")
-+endif()
-+
-+include(FetchContent)
-+
-+# Checking git
-+find_program(GIT_COMMAND "git")
-+if (NOT GIT_COMMAND)
-+	message(FATAL_ERROR "Please install git")
-+endif()
-+
-+# Only pass libc settings to libmetal if needed. For environments where the
-+# standard library is not overridden, this is not needed.
-+if(TARGET stdlib::c)
-+	include(${TS_ROOT}/tools/cmake/common/PropertyCopy.cmake)
-+
-+	# Save libc settings
-+	save_interface_target_properties(TGT stdlib::c PREFIX LIBC)
-+	# Translate libc settings to cmake code fragment. Will be inserted into
-+	# libmetal-init-cache.cmake.in when LazyFetch configures the file.
-+	translate_interface_target_properties(PREFIX LIBC RES _cmake_fragment)
-+	unset_saved_properties(LIBC)
-+endif()
-+
-+include(${TS_ROOT}/tools/cmake/common/LazyFetch.cmake REQUIRED)
-+LazyFetch_MakeAvailable(DEP_NAME libmetal
-+    FETCH_OPTIONS "${GIT_OPTIONS}"
-+    INSTALL_DIR "${LIBMETAL_INSTALL_DIR}"
-+    CACHE_FILE "${TS_ROOT}/external/openamp/libmetal-init-cache.cmake.in"
-+    SOURCE_DIR "${LIBMETAL_SOURCE_DIR}"
-+)
-+unset(_cmake_fragment)
-+
-+#Create an imported target to have clean abstraction in the build-system.
-+add_library(libmetal STATIC IMPORTED)
-+set_property(TARGET libmetal PROPERTY IMPORTED_LOCATION "${LIBMETAL_INSTALL_DIR}/lib/${CMAKE_STATIC_LIBRARY_PREFIX}metal${CMAKE_STATIC_LIBRARY_SUFFIX}")
-+set_property(TARGET libmetal PROPERTY INTERFACE_INCLUDE_DIRECTORIES "${LIBMETAL_INSTALL_DIR}/include")
-diff --git a/external/openamp/openamp-init-cache.cmake.in b/external/openamp/openamp-init-cache.cmake.in
-new file mode 100644
-index 000000000000..302b80511bce
--- /dev/null
-+++ b/external/openamp/openamp-init-cache.cmake.in
-@@ -0,0 +1,20 @@
-+#-------------------------------------------------------------------------------
-+# Copyright (c) 2021-2022, Arm Limited and Contributors. All rights reserved.
-+# Copyright (c) 2021-2022, Linaro. All rights reserved.
-+#
-+# SPDX-License-Identifier: BSD-3-Clause
-+#
-+#-------------------------------------------------------------------------------
-+
-+set(CMAKE_INSTALL_PREFIX "@BUILD_INSTALL_DIR@" CACHE STRING "")
-+set(CMAKE_TOOLCHAIN_FILE "@TS_EXTERNAL_LIB_TOOLCHAIN_FILE@" CACHE STRING "")
-+set(BUILD_SHARED_LIBS Off CACHE BOOL "")
-+set(BUILD_STATIC_LIBS On CACHE BOOL "")
-+
-+set(LIBMETAL_INCLUDE_DIR "@CMAKE_CURRENT_BINARY_DIR@/libmetal_install/include" CACHE
-+    STRING "")
-+set(LIBMETAL_LIB "@CMAKE_CURRENT_BINARY_DIR@/libmetal_install/lib" CACHE STRING "")
-+set(RPMSG_BUFFER_SIZE "512" CACHE STRING "")
-+set(MACHINE "template" CACHE STRING "")
-+
-+@_cmake_fragment@
-diff --git a/external/openamp/openamp.cmake b/external/openamp/openamp.cmake
-new file mode 100644
-index 000000000000..449f35f4fda4
--- /dev/null
-+++ b/external/openamp/openamp.cmake
-@@ -0,0 +1,66 @@
-+#-------------------------------------------------------------------------------
-+# Copyright (c) 2022 Linaro Limited
-+# Copyright (c) 2022, Arm Limited. All rights reserved.
-+#
-+# SPDX-License-Identifier: BSD-3-Clause
-+#
-+#-------------------------------------------------------------------------------
-+
-+set (OPENAMP_URL "https://github.com/OpenAMP/open-amp.git"
-+		    CACHE STRING "OpenAMP repository URL")
-+set (OPENAMP_INSTALL_DIR "${CMAKE_CURRENT_BINARY_DIR}/openamp_install"
-+			    CACHE DIR "OpenAMP installation directory")
-+set (OPENAMP_SOURCE_DIR "${CMAKE_CURRENT_BINARY_DIR}/_deps/openamp"
-+			    CACHE DIR "OpenAMP source code directory")
-+set (OPENAMP_PACKAGE_DIR "${OPENAMP_INSTALL_DIR}/openamp/cmake"
-+			    CACHE DIR "OpenAMP CMake package directory")
-+set (OPENAMP_TARGET_NAME "openamp")
-+set (OPENAMP_REFSPEC "347397decaa43372fc4d00f965640ebde042966d"
-+			CACHE STRING "The version of openamp to use")
-+
-+set(GIT_OPTIONS
-+    GIT_REPOSITORY ${OPENAMP_URL}
-+    GIT_TAG ${OPENAMP_REFSPEC}
-+    GIT_SHALLOW FALSE
-+)
-+
-+if(NOT OPENAMP_DEBUG)
-+	set(OPENAMP_BUILD_TYPE "Release")
-+else()
-+	set(OPENAMP_BUILD_TYPE "Debug")
-+endif()
-+
-+include(FetchContent)
-+
-+# Checking git
-+find_program(GIT_COMMAND "git")
-+if (NOT GIT_COMMAND)
-+	message(FATAL_ERROR "Please install git")
-+endif()
-+
-+# Only pass libc settings to openamp if needed. For environments where the
-+# standard library is not overridden, this is not needed.
-+if(TARGET stdlib::c)
-+	include(${TS_ROOT}/tools/cmake/common/PropertyCopy.cmake)
-+
-+	# Save libc settings
-+	save_interface_target_properties(TGT stdlib::c PREFIX LIBC)
-+	# Translate libc settings to cmake code fragment. Will be inserted into
-+	# libmetal-init-cache.cmake.in when LazyFetch configures the file.
-+	translate_interface_target_properties(PREFIX LIBC RES _cmake_fragment)
-+	unset_saved_properties(LIBC)
-+endif()
-+
-+include(${TS_ROOT}/tools/cmake/common/LazyFetch.cmake REQUIRED)
-+LazyFetch_MakeAvailable(DEP_NAME openamp
-+    FETCH_OPTIONS "${GIT_OPTIONS}"
-+    INSTALL_DIR "${OPENAMP_INSTALL_DIR}"
-+    CACHE_FILE "${TS_ROOT}/external/openamp/openamp-init-cache.cmake.in"
-+    SOURCE_DIR "${OPENAMP_SOURCE_DIR}"
-+)
-+unset(_cmake_fragment)
-+
-+#Create an imported target to have clean abstraction in the build-system.
-+add_library(openamp STATIC IMPORTED)
-+set_property(TARGET openamp PROPERTY IMPORTED_LOCATION "${OPENAMP_INSTALL_DIR}/lib/${CMAKE_STATIC_LIBRARY_PREFIX}open_amp${CMAKE_STATIC_LIBRARY_SUFFIX}")
-+set_property(TARGET openamp PROPERTY INTERFACE_INCLUDE_DIRECTORIES "${OPENAMP_INSTALL_DIR}/include")
-- 
-2.38.1
-
@@ -1,7 +1,7 @@
-From 050be6fdfee656b0556766cc1db30f4c0ea87c79 Mon Sep 17 00:00:00 2001
+From a965129153a0cca340535fe2cf99dbfef9b557da Mon Sep 17 00:00:00 2001
 From: Julian Hall <julian.hall@arm.com>
 Date: Tue, 12 Oct 2021 15:45:41 +0100
-Subject: [PATCH 13/20] Add stub capsule update service components
+Subject: [PATCH 1/6] Add stub capsule update service components

 To facilitate development of a capsule update service provider,
 stub components are added to provide a starting point for an
@@ -18,15 +18,12 @@ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
 .../provider/capsule_update_provider.c        | 133 ++++++++++++++++++
 .../provider/capsule_update_provider.h        |  51 +++++++
 .../capsule_update/provider/component.cmake   |  13 ++
- deployments/se-proxy/common/se_proxy_sp.c     |   3 +
- .../se-proxy/common/service_proxy_factory.c   |  16 +++
- .../se-proxy/common/service_proxy_factory.h   |   1 +
- deployments/se-proxy/se-proxy.cmake           |   1 +
+ .../se-proxy/infra/corstone1000/infra.cmake   |   1 +
 deployments/se-proxy/se_proxy_interfaces.h    |   9 +-
 .../capsule_update/capsule_update_proto.h     |  13 ++
 protocols/service/capsule_update/opcodes.h    |  17 +++
 protocols/service/capsule_update/parameters.h |  15 ++
- 12 files changed, 292 insertions(+), 4 deletions(-)
+ 9 files changed, 272 insertions(+), 4 deletions(-)
 create mode 100644 components/service/capsule_update/backend/capsule_update_backend.h
 create mode 100644 components/service/capsule_update/provider/capsule_update_provider.c
 create mode 100644 components/service/capsule_update/provider/capsule_update_provider.h
@@ -280,75 +277,18 @@ index 000000000000..1d412eb234d9
 +target_sources(${TGT} PRIVATE
 +	"${CMAKE_CURRENT_LIST_DIR}/capsule_update_provider.c"
 +	)
-diff --git a/deployments/se-proxy/common/se_proxy_sp.c b/deployments/se-proxy/common/se_proxy_sp.c
-index a37396f4454b..a38ad6ca3f56 100644
--- a/deployments/se-proxy/common/se_proxy_sp.c
-+++ b/deployments/se-proxy/common/se_proxy_sp.c
-@@ -77,6 +77,9 @@ void __noreturn sp_main(struct ffa_init_info *init_info)
- 	}
- 	rpc_demux_attach(&rpc_demux, SE_PROXY_INTERFACE_ID_ATTEST, rpc_iface);
- 
-+	rpc_iface = capsule_update_proxy_create();
-+	rpc_demux_attach(&rpc_demux, SE_PROXY_INTERFACE_ID_CAPSULE_UPDATE, rpc_iface);
-+
- 	/* End of boot phase */
- 	result = sp_msg_wait(&req_msg);
- 	if (result != SP_RESULT_OK) {
-diff --git a/deployments/se-proxy/common/service_proxy_factory.c b/deployments/se-proxy/common/service_proxy_factory.c
-index 7edeef8b434a..591cc9eeb59e 100644
--- a/deployments/se-proxy/common/service_proxy_factory.c
-+++ b/deployments/se-proxy/common/service_proxy_factory.c
-@@ -13,6 +13,7 @@
- #include <service/crypto/factory/crypto_provider_factory.h>
- #include <service/secure_storage/frontend/secure_storage_provider/secure_storage_provider.h>
- #include <trace.h>
-+#include <service/capsule_update/provider/capsule_update_provider.h>
- 
- /* Stub backends */
- #include <service/crypto/backend/psa_ipc/crypto_ipc_backend.h>
-@@ -93,3 +94,18 @@ struct rpc_interface *its_proxy_create(void)
-  
-         return secure_storage_provider_init(&its_provider, backend);
- }
-+
-+struct rpc_interface *capsule_update_proxy_create(void)
-+{
-+	static struct capsule_update_provider capsule_update_provider;
-+	static struct rpc_caller *capsule_update_caller;
-+
-+	capsule_update_caller = openamp_caller_init(&openamp);
-+
-+	if (!capsule_update_caller)
-+	return NULL;
-+
-+	capsule_update_provider.client.caller = capsule_update_caller;
-+
-+	return capsule_update_provider_init(&capsule_update_provider);
-+}
-diff --git a/deployments/se-proxy/common/service_proxy_factory.h b/deployments/se-proxy/common/service_proxy_factory.h
-index 298d407a2371..02aa7fe2550d 100644
--- a/deployments/se-proxy/common/service_proxy_factory.h
-+++ b/deployments/se-proxy/common/service_proxy_factory.h
-@@ -17,6 +17,7 @@ struct rpc_interface *attest_proxy_create(void);
- struct rpc_interface *crypto_proxy_create(void);
- struct rpc_interface *ps_proxy_create(void);
- struct rpc_interface *its_proxy_create(void);
-+struct rpc_interface *capsule_update_proxy_create(void);
- 
- #ifdef __cplusplus
- }
-diff --git a/deployments/se-proxy/se-proxy.cmake b/deployments/se-proxy/se-proxy.cmake
-index 3dbbc36c968d..f0db2d43f443 100644
--- a/deployments/se-proxy/se-proxy.cmake
-+++ b/deployments/se-proxy/se-proxy.cmake
-@@ -51,6 +51,7 @@ add_components(TARGET "se-proxy"
- 		"components/service/attestation/provider/serializer/packed-c"
+diff --git a/deployments/se-proxy/infra/corstone1000/infra.cmake b/deployments/se-proxy/infra/corstone1000/infra.cmake
+index 4e7e2bd58028..e60b5400617f 100644
+--- a/deployments/se-proxy/infra/corstone1000/infra.cmake
+++ b/deployments/se-proxy/infra/corstone1000/infra.cmake
+@@ -21,6 +21,7 @@ add_components(TARGET "se-proxy"
+ 		"components/service/attestation/key_mngr/local"
 		"components/service/attestation/reporter/psa_ipc"
- 		"components/service/attestation/client/psa_ipc"
+ 		"components/service/crypto/backend/psa_ipc"
 +		"components/service/capsule_update/provider"
- 		"components/rpc/openamp/caller/sp"
+ 		"components/service/secure_storage/backend/secure_storage_ipc"
+ )
 
- 		# Stub service provider backends
 diff --git a/deployments/se-proxy/se_proxy_interfaces.h b/deployments/se-proxy/se_proxy_interfaces.h
 index 48908f846990..3d4a7c204785 100644
 --- a/deployments/se-proxy/se_proxy_interfaces.h
@@ -432,5 +372,5 @@ index 000000000000..285d924186be
 +
 +#endif /* CAPSULE_UPDATE_PARAMETERS_H */
 -- 
-2.38.1
+2.40.0

@@ -1,7 +1,7 @@
-From 1a4d46fdc0b5745b9cfb0789e4b778111bd6dbbb Mon Sep 17 00:00:00 2001
+From 51a7024967187644011c5043ef0f733cf81b26be Mon Sep 17 00:00:00 2001
 From: Satish Kumar <satish.kumar01@arm.com>
 Date: Mon, 14 Feb 2022 08:22:25 +0000
-Subject: [PATCH 18/20] Fixes in AEAD for psa-arch test 54 and 58.
+Subject: [PATCH 2/6] Fixes in AEAD for psa-arch test 54 and 58.

 Upstream-Status: Pending [Not submitted to upstream yet]
 Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
@@ -29,7 +29,7 @@ index c4ffb20cf7f8..a91f66c14008 100644
 
 	/* Mandatory input data parameter */
 diff --git a/components/service/crypto/include/psa/crypto_sizes.h b/components/service/crypto/include/psa/crypto_sizes.h
-index 4d7bf6e959b0..e3c4df2927b3 100644
+index 30aa102da581..130d27295878 100644
 --- a/components/service/crypto/include/psa/crypto_sizes.h
 +++ b/components/service/crypto/include/psa/crypto_sizes.h
@@ -351,7 +351,7 @@
@@ -117,5 +117,5 @@ index 0be266b52403..435fd3b523ce 100644
 
 /* Variable length input parameter tags */
 -- 
-2.38.1
+2.40.0

@@ -1,7 +1,7 @@
-From 70cf374fb55f2d62ecbe28049253df33b42b6749 Mon Sep 17 00:00:00 2001
+From 5c8ac10337ac853d8a82992fb6e1d91b122b99d2 Mon Sep 17 00:00:00 2001
 From: Satish Kumar <satish.kumar01@arm.com>
 Date: Fri, 8 Jul 2022 09:48:06 +0100
-Subject: [PATCH 20/20] FMP Support in Corstone1000.
+Subject: [PATCH 3/6] FMP Support in Corstone1000.

 The FMP support is used by u-boot to pupolate ESRT information
 for the kernel.
@@ -414,5 +414,5 @@ index 000000000000..95fba2a04d5c
 +
 +#endif /* CORSTONE1000_FMP_SERVICE_H */
 -- 
-2.38.1
+2.40.0

@@ -1,298 +0,0 @@
-From fb6d2f33e26c7b6ef88d552feca1f835da3f0df6 Mon Sep 17 00:00:00 2001
-From: Vishnu Banavath <vishnu.banavath@arm.com>
-Date: Fri, 3 Dec 2021 19:05:18 +0000
-Subject: [PATCH 04/20] add psa client definitions for ff-m
-
-Add PSA client definitions in common include to add future
-ff-m support.
-
-Upstream-Status: Pending
-Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
- .../service/common/include/psa/client.h       | 194 ++++++++++++++++++
- components/service/common/include/psa/sid.h   |  71 +++++++
- 2 files changed, 265 insertions(+)
- create mode 100644 components/service/common/include/psa/client.h
- create mode 100644 components/service/common/include/psa/sid.h
-
-diff --git a/components/service/common/include/psa/client.h b/components/service/common/include/psa/client.h
-new file mode 100644
-index 000000000000..69ccf14f40a3
--- /dev/null
-+++ b/components/service/common/include/psa/client.h
-@@ -0,0 +1,194 @@
-+/*
-+ * Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
-+ *
-+ * SPDX-License-Identifier: BSD-3-Clause
-+ */
-+
-+#ifndef SERVICE_PSA_IPC_H
-+#define SERVICE_PSA_IPC_H
-+
-+#include <stddef.h>
-+#include <stdint.h>
-+
-+#include <rpc_caller.h>
-+#include <psa/error.h>
-+
-+#ifdef __cplusplus
-+extern "C" {
-+#endif
-+
-+#ifndef IOVEC_LEN
-+#define IOVEC_LEN(arr) ((uint32_t)(sizeof(arr)/sizeof(arr[0])))
-+#endif
-+
-+/*********************** PSA Client Macros and Types *************************/
-+
-+typedef int32_t psa_handle_t;
-+
-+/**
-+ * The version of the PSA Framework API that is being used to build the calling
-+ * firmware. Only part of features of FF-M v1.1 have been implemented. FF-M v1.1
-+ * is compatible with v1.0.
-+ */
-+#define PSA_FRAMEWORK_VERSION       (0x0101u)
-+
-+/**
-+ * Return value from psa_version() if the requested RoT Service is not present
-+ * in the system.
-+ */
-+#define PSA_VERSION_NONE            (0u)
-+
-+/**
-+ * The zero-value null handle can be assigned to variables used in clients and
-+ * RoT Services, indicating that there is no current connection or message.
-+ */
-+#define PSA_NULL_HANDLE             ((psa_handle_t)0)
-+
-+/**
-+ * Tests whether a handle value returned by psa_connect() is valid.
-+ */
-+#define PSA_HANDLE_IS_VALID(handle) ((psa_handle_t)(handle) > 0)
-+
-+/**
-+ * Converts the handle value returned from a failed call psa_connect() into
-+ * an error code.
-+ */
-+#define PSA_HANDLE_TO_ERROR(handle) ((psa_status_t)(handle))
-+
-+/**
-+ * Maximum number of input and output vectors for a request to psa_call().
-+ */
-+#define PSA_MAX_IOVEC               (4u)
-+
-+/**
-+ * An IPC message type that indicates a generic client request.
-+ */
-+#define PSA_IPC_CALL                (0)
-+
-+/**
-+ * A read-only input memory region provided to an RoT Service.
-+ */
-+struct __attribute__ ((__packed__)) psa_invec {
-+    uint32_t base;           /*!< the start address of the memory buffer */
-+    uint32_t len;                 /*!< the size in bytes                      */
-+};
-+
-+/**
-+ * A writable output memory region provided to an RoT Service.
-+ */
-+struct __attribute__ ((__packed__)) psa_outvec {
-+    uint32_t base;                 /*!< the start address of the memory buffer */
-+    uint32_t len;                 /*!< the size in bytes                      */
-+};
-+
-+/*************************** PSA Client API **********************************/
-+
-+/**
-+ * \brief Retrieve the version of the PSA Framework API that is implemented.
-+ *
-+ * \param[in] rpc_caller        RPC caller to use
-+ * \return version              The version of the PSA Framework implementation
-+ *                              that is providing the runtime services to the
-+ *                              caller. The major and minor version are encoded
-+ *                              as follows:
-+ * \arg                           version[15:8] -- major version number.
-+ * \arg                           version[7:0]  -- minor version number.
-+ */
-+uint32_t psa_framework_version(struct rpc_caller *caller);
-+
-+/**
-+ * \brief Retrieve the version of an RoT Service or indicate that it is not
-+ *        present on this system.
-+ *
-+ * \param[in] rpc_caller        RPC caller to use
-+ * \param[in] sid               ID of the RoT Service to query.
-+ *
-+ * \retval PSA_VERSION_NONE     The RoT Service is not implemented, or the
-+ *                              caller is not permitted to access the service.
-+ * \retval > 0                  The version of the implemented RoT Service.
-+ */
-+uint32_t psa_version(struct rpc_caller *caller, uint32_t sid);
-+
-+/**
-+ * \brief Connect to an RoT Service by its SID.
-+ *
-+ * \param[in] rpc_caller        RPC caller to use
-+ * \param[in] sid               ID of the RoT Service to connect to.
-+ * \param[in] version           Requested version of the RoT Service.
-+ *
-+ * \retval > 0                  A handle for the connection.
-+ * \retval PSA_ERROR_CONNECTION_REFUSED The SPM or RoT Service has refused the
-+ *                              connection.
-+ * \retval PSA_ERROR_CONNECTION_BUSY The SPM or RoT Service cannot make the
-+ *                              connection at the moment.
-+ * \retval "PROGRAMMER ERROR"   The call is a PROGRAMMER ERROR if one or more
-+ *                              of the following are true:
-+ * \arg                           The RoT Service ID is not present.
-+ * \arg                           The RoT Service version is not supported.
-+ * \arg                           The caller is not allowed to access the RoT
-+ *                                service.
-+ */
-+psa_handle_t psa_connect(struct rpc_caller *caller, uint32_t sid,
-+			 uint32_t version);
-+
-+/**
-+ * \brief Call an RoT Service on an established connection.
-+ *
-+ * \note  FF-M 1.0 proposes 6 parameters for psa_call but the secure gateway ABI
-+ *        support at most 4 parameters. TF-M chooses to encode 'in_len',
-+ *        'out_len', and 'type' into a 32-bit integer to improve efficiency.
-+ *        Compared with struct-based encoding, this method saves extra memory
-+ *        check and memory copy operation. The disadvantage is that the 'type'
-+ *        range has to be reduced into a 16-bit integer. So with this encoding,
-+ *        the valid range for 'type' is 0-32767.
-+ *
-+ * \param[in] rpc_caller        RPC caller to use
-+ * \param[in] handle            A handle to an established connection.
-+ * \param[in] type              The request type.
-+ *                              Must be zero( \ref PSA_IPC_CALL) or positive.
-+ * \param[in] in_vec            Array of input \ref psa_invec structures.
-+ * \param[in] in_len            Number of input \ref psa_invec structures.
-+ * \param[in,out] out_vec       Array of output \ref psa_outvec structures.
-+ * \param[in] out_len           Number of output \ref psa_outvec structures.
-+ *
-+ * \retval >=0                  RoT Service-specific status value.
-+ * \retval <0                   RoT Service-specific error code.
-+ * \retval PSA_ERROR_PROGRAMMER_ERROR The connection has been terminated by the
-+ *                              RoT Service. The call is a PROGRAMMER ERROR if
-+ *                              one or more of the following are true:
-+ * \arg                           An invalid handle was passed.
-+ * \arg                           The connection is already handling a request.
-+ * \arg                           type < 0.
-+ * \arg                           An invalid memory reference was provided.
-+ * \arg                           in_len + out_len > PSA_MAX_IOVEC.
-+ * \arg                           The message is unrecognized by the RoT
-+ *                                Service or incorrectly formatted.
-+ */
-+psa_status_t psa_call(struct rpc_caller *caller, psa_handle_t handle,
-+		      int32_t type, const struct psa_invec *in_vec,
-+		      size_t in_len, struct psa_outvec *out_vec, size_t out_len);
-+
-+/**
-+ * \brief Close a connection to an RoT Service.
-+ *
-+ * \param[in] rpc_caller        RPC caller to use
-+ * \param[in] handle            A handle to an established connection, or the
-+ *                              null handle.
-+ *
-+ * \retval void                 Success.
-+ * \retval "PROGRAMMER ERROR"   The call is a PROGRAMMER ERROR if one or more
-+ *                              of the following are true:
-+ * \arg                           An invalid handle was provided that is not
-+ *                                the null handle.
-+ * \arg                           The connection is currently handling a
-+ *                                request.
-+ */
-+void psa_close(struct rpc_caller *caller, psa_handle_t handle);
-+
-+#ifdef __cplusplus
-+}
-+#endif
-+
-+#endif /* SERVICE_PSA_IPC_H */
-+
-+
-diff --git a/components/service/common/include/psa/sid.h b/components/service/common/include/psa/sid.h
-new file mode 100644
-index 000000000000..aaa973c6e987
--- /dev/null
-+++ b/components/service/common/include/psa/sid.h
-@@ -0,0 +1,71 @@
-+/*
-+ * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
-+ *
-+ * SPDX-License-Identifier: BSD-3-Clause
-+ *
-+ */
-+
-+#ifndef __PSA_MANIFEST_SID_H__
-+#define __PSA_MANIFEST_SID_H__
-+
-+#ifdef __cplusplus
-+extern "C" {
-+#endif
-+
-+/******** TFM_SP_PS ********/
-+#define TFM_PROTECTED_STORAGE_SERVICE_SID                          (0x00000060U)
-+#define TFM_PROTECTED_STORAGE_SERVICE_VERSION                      (1U)
-+#define TFM_PROTECTED_STORAGE_SERVICE_HANDLE                       (0x40000101U)
-+
-+/* Invalid UID */
-+#define TFM_PS_INVALID_UID 0
-+
-+/* PS message types that distinguish PS services. */
-+#define TFM_PS_SET                1001
-+#define TFM_PS_GET                1002
-+#define TFM_PS_GET_INFO           1003
-+#define TFM_PS_REMOVE             1004
-+#define TFM_PS_GET_SUPPORT        1005
-+
-+/******** TFM_SP_ITS ********/
-+#define TFM_INTERNAL_TRUSTED_STORAGE_SERVICE_SID                   (0x00000070U)
-+#define TFM_INTERNAL_TRUSTED_STORAGE_SERVICE_VERSION               (1U)
-+#define TFM_INTERNAL_TRUSTED_STORAGE_SERVICE_HANDLE                (0x40000102U)
-+
-+/******** TFM_SP_CRYPTO ********/
-+#define TFM_CRYPTO_SID                                             (0x00000080U)
-+#define TFM_CRYPTO_VERSION                                         (1U)
-+#define TFM_CRYPTO_HANDLE                                          (0x40000100U)
-+
-+/******** TFM_SP_PLATFORM ********/
-+#define TFM_SP_PLATFORM_SYSTEM_RESET_SID                           (0x00000040U)
-+#define TFM_SP_PLATFORM_SYSTEM_RESET_VERSION                       (1U)
-+#define TFM_SP_PLATFORM_IOCTL_SID                                  (0x00000041U)
-+#define TFM_SP_PLATFORM_IOCTL_VERSION                              (1U)
-+#define TFM_SP_PLATFORM_NV_COUNTER_SID                             (0x00000042U)
-+#define TFM_SP_PLATFORM_NV_COUNTER_VERSION                         (1U)
-+
-+/******** TFM_SP_INITIAL_ATTESTATION ********/
-+#define TFM_ATTESTATION_SERVICE_SID                                (0x00000020U)
-+#define TFM_ATTESTATION_SERVICE_VERSION                            (1U)
-+#define TFM_ATTESTATION_SERVICE_HANDLE                             (0x40000103U)
-+
-+/******** TFM_SP_FWU ********/
-+#define TFM_FWU_WRITE_SID                                          (0x000000A0U)
-+#define TFM_FWU_WRITE_VERSION                                      (1U)
-+#define TFM_FWU_INSTALL_SID                                        (0x000000A1U)
-+#define TFM_FWU_INSTALL_VERSION                                    (1U)
-+#define TFM_FWU_ABORT_SID                                          (0x000000A2U)
-+#define TFM_FWU_ABORT_VERSION                                      (1U)
-+#define TFM_FWU_QUERY_SID                                          (0x000000A3U)
-+#define TFM_FWU_QUERY_VERSION                                      (1U)
-+#define TFM_FWU_REQUEST_REBOOT_SID                                 (0x000000A4U)
-+#define TFM_FWU_REQUEST_REBOOT_VERSION                             (1U)
-+#define TFM_FWU_ACCEPT_SID                                         (0x000000A5U)
-+#define TFM_FWU_ACCEPT_VERSION                                     (1U)
-+
-+#ifdef __cplusplus
-+}
-+#endif
-+
-+#endif /* __PSA_MANIFEST_SID_H__ */
-- 
-2.38.1
-
@@ -1,295 +0,0 @@
-From 0311fc8f131fe7a2b0f4dd9988c610fda47394aa Mon Sep 17 00:00:00 2001
-From: Vishnu Banavath <vishnu.banavath@arm.com>
-Date: Fri, 3 Dec 2021 19:13:03 +0000
-Subject: [PATCH 05/20] Add common service component to ipc support
-
-Add support for inter processor communication for PSA
-including, the openamp client side structures lib.
-
-Upstream-Status: Pending
-Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
- .../service/common/psa_ipc/component.cmake    |  13 ++
- .../service/common/psa_ipc/service_psa_ipc.c  |  97 +++++++++++++
- .../psa_ipc/service_psa_ipc_openamp_lib.h     | 131 ++++++++++++++++++
- deployments/se-proxy/se-proxy.cmake           |   1 +
- 4 files changed, 242 insertions(+)
- create mode 100644 components/service/common/psa_ipc/component.cmake
- create mode 100644 components/service/common/psa_ipc/service_psa_ipc.c
- create mode 100644 components/service/common/psa_ipc/service_psa_ipc_openamp_lib.h
-
-diff --git a/components/service/common/psa_ipc/component.cmake b/components/service/common/psa_ipc/component.cmake
-new file mode 100644
-index 000000000000..5a1c9e62e2f0
--- /dev/null
-+++ b/components/service/common/psa_ipc/component.cmake
-@@ -0,0 +1,13 @@
-+#-------------------------------------------------------------------------------
-+# Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
-+#
-+# SPDX-License-Identifier: BSD-3-Clause
-+#
-+#-------------------------------------------------------------------------------
-+if (NOT DEFINED TGT)
-+	message(FATAL_ERROR "mandatory parameter TGT is not defined.")
-+endif()
-+
-+target_sources(${TGT} PRIVATE
-+	"${CMAKE_CURRENT_LIST_DIR}/service_psa_ipc.c"
-+	)
-diff --git a/components/service/common/psa_ipc/service_psa_ipc.c b/components/service/common/psa_ipc/service_psa_ipc.c
-new file mode 100644
-index 000000000000..e8093c20a523
--- /dev/null
-+++ b/components/service/common/psa_ipc/service_psa_ipc.c
-@@ -0,0 +1,97 @@
-+/*
-+ * Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
-+ *
-+ * SPDX-License-Identifier: BSD-3-Clause
-+ */
-+
-+#include <stddef.h>
-+#include <stdint.h>
-+#include <string.h>
-+#include <trace.h>
-+
-+#include <protocols/rpc/common/packed-c/status.h>
-+#include <psa/error.h>
-+#include <rpc_caller.h>
-+
-+#include <psa/client.h>
-+#include "service_psa_ipc_openamp_lib.h"
-+
-+psa_handle_t psa_connect(struct rpc_caller *caller, uint32_t sid,
-+			 uint32_t version)
-+{
-+	psa_status_t psa_status = PSA_SUCCESS;
-+	struct s_openamp_msg *resp_msg = NULL;
-+	struct ns_openamp_msg *req_msg;
-+	rpc_call_handle rpc_handle;
-+	size_t resp_len;
-+	uint8_t *resp;
-+	uint8_t *req;
-+	int ret;
-+
-+	rpc_handle = rpc_caller_begin(caller, &req,
-+				      sizeof(struct ns_openamp_msg));
-+	if (!rpc_handle) {
-+		EMSG("psa_connect: could not get handle");
-+		return PSA_ERROR_GENERIC_ERROR;
-+	}
-+
-+	req_msg = (struct ns_openamp_msg *)req;
-+
-+	req_msg->call_type = OPENAMP_PSA_CONNECT;
-+	req_msg->params.psa_connect_params.sid = sid;
-+	req_msg->params.psa_connect_params.version = version;
-+
-+	ret = rpc_caller_invoke(caller, rpc_handle, 0, &psa_status, &resp,
-+				&resp_len);
-+	if (ret != TS_RPC_CALL_ACCEPTED) {
-+		EMSG("psa_connect: invoke failed: %d", ret);
-+		return PSA_ERROR_GENERIC_ERROR;
-+	}
-+
-+	if (psa_status == PSA_SUCCESS)
-+		resp_msg = (struct s_openamp_msg *)resp;
-+
-+	rpc_caller_end(caller, rpc_handle);
-+
-+	return resp_msg ? (psa_handle_t)resp_msg->reply : PSA_NULL_HANDLE;
-+}
-+
-+psa_status_t psa_call(struct rpc_caller *caller, psa_handle_t handle,
-+		      int32_t type, const struct psa_invec *in_vec,
-+		      size_t in_len, struct psa_outvec *out_vec, size_t out_len)
-+{
-+
-+}
-+
-+void psa_close(struct rpc_caller *caller, psa_handle_t handle)
-+{
-+	psa_status_t psa_status = PSA_SUCCESS;
-+	struct s_openamp_msg *resp_msg = NULL;
-+	struct ns_openamp_msg *req_msg;
-+	rpc_call_handle rpc_handle;
-+	size_t resp_len;
-+	uint8_t *resp;
-+	uint8_t *req;
-+	int ret;
-+
-+	rpc_handle = rpc_caller_begin(caller, &req,
-+				      sizeof(struct ns_openamp_msg));
-+	if (!rpc_handle) {
-+		EMSG("psa_close: could not get handle");
-+		return;
-+	}
-+
-+	req_msg = (struct ns_openamp_msg *)req;
-+
-+	req_msg->call_type = OPENAMP_PSA_CLOSE;
-+	req_msg->params.psa_close_params.handle = handle;
-+
-+	ret = rpc_caller_invoke(caller, rpc_handle, 0, &psa_status, &resp,
-+				&resp_len);
-+	if (ret != TS_RPC_CALL_ACCEPTED) {
-+		EMSG("psa_close: invoke failed: %d", ret);
-+		return;
-+	}
-+
-+	rpc_caller_end(caller, rpc_handle);
-+}
-diff --git a/components/service/common/psa_ipc/service_psa_ipc_openamp_lib.h b/components/service/common/psa_ipc/service_psa_ipc_openamp_lib.h
-new file mode 100644
-index 000000000000..33ea96660572
--- /dev/null
-+++ b/components/service/common/psa_ipc/service_psa_ipc_openamp_lib.h
-@@ -0,0 +1,131 @@
-+/*
-+ * Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
-+ *
-+ * SPDX-License-Identifier: BSD-3-Clause
-+ */
-+
-+#ifndef SERVICE_PSA_IPC_OPENAMP_LIB_H
-+#define SERVICE_PSA_IPC_OPENAMP_LIB_H
-+
-+#include <stddef.h>
-+#include <stdint.h>
-+
-+#include <compiler.h>
-+#include <psa/error.h>
-+
-+#include <stdint.h>
-+#include <psa/client.h>
-+
-+#ifdef __cplusplus
-+extern "C" {
-+#endif
-+
-+/* PSA client call type value */
-+#define OPENAMP_PSA_FRAMEWORK_VERSION       (0x1)
-+#define OPENAMP_PSA_VERSION                 (0x2)
-+#define OPENAMP_PSA_CONNECT                 (0x3)
-+#define OPENAMP_PSA_CALL                    (0x4)
-+#define OPENAMP_PSA_CLOSE                   (0x5)
-+
-+/* Return code of openamp APIs */
-+#define OPENAMP_SUCCESS                     (0)
-+#define OPENAMP_MAP_FULL                    (INT32_MIN + 1)
-+#define OPENAMP_MAP_ERROR                   (INT32_MIN + 2)
-+#define OPENAMP_INVAL_PARAMS                (INT32_MIN + 3)
-+#define OPENAMP_NO_PERMS                    (INT32_MIN + 4)
-+#define OPENAMP_NO_PEND_EVENT               (INT32_MIN + 5)
-+#define OPENAMP_CHAN_BUSY                   (INT32_MIN + 6)
-+#define OPENAMP_CALLBACK_REG_ERROR          (INT32_MIN + 7)
-+#define OPENAMP_INIT_ERROR                  (INT32_MIN + 8)
-+
-+#define HOLD_INPUT_BUFFER (1) /* IF true, TF-M Library will hold the openamp
-+			       * buffer so that openamp shared memory buffer
-+			       * does not get freed.
-+			       */
-+
-+/*
-+ * This structure holds the parameters used in a PSA client call.
-+ */
-+typedef struct __packed psa_client_in_params {
-+	union {
-+		struct __packed {
-+			uint32_t        sid;
-+		} psa_version_params;
-+
-+		struct __packed {
-+			uint32_t        sid;
-+			uint32_t        version;
-+		} psa_connect_params;
-+
-+		struct __packed {
-+			psa_handle_t     handle;
-+			int32_t          type;
-+			uint32_t         in_vec;
-+			uint32_t         in_len;
-+			uint32_t         out_vec;
-+			uint32_t         out_len;
-+		} psa_call_params;
-+
-+		struct __packed {
-+			psa_handle_t    handle;
-+		} psa_close_params;
-+	};
-+} psa_client_in_params_t;
-+
-+/* Openamp message passed from NSPE to SPE to deliver a PSA client call */
-+struct __packed ns_openamp_msg {
-+	uint32_t                      call_type;   /* PSA client call type */
-+	struct psa_client_in_params   params;      /* Contain parameters used in PSA
-+						  * client call
-+						  */
-+
-+	int32_t                     client_id;   /* Optional client ID of the
-+						  * non-secure caller.
-+						  * It is required to identify the
-+						  * non-secure task when NSPE OS
-+						  * enforces non-secure task
-+						  * isolation
-+						  */
-+	int32_t                     request_id;  /* This is the unique ID for a
-+						  * request send to TF-M by the
-+						  * non-secure core. TF-M forward
-+						  * the ID back to non-secure on the
-+						  * reply to a given request. Using
-+						  * this id, the non-secure library
-+						  * can identify the request for
-+						  * which the reply has received.
-+						  */
-+};
-+
-+/*
-+ * This structure holds the location of the out data of the PSA client call.
-+ */
-+struct __packed psa_client_out_params {
-+	uint32_t              out_vec;
-+	uint32_t              out_len;
-+};
-+
-+
-+/* Openamp message from SPE to NSPE delivering the reply back for a PSA client
-+ * call.
-+ */
-+struct __packed s_openamp_msg {
-+	int32_t                     request_id;  /* Using this id, the non-secure
-+						  * library identifies the request.
-+						  * TF-M forwards the same
-+						  * request-id received on the
-+						  * initial request.
-+						  */
-+	int32_t                     reply;       /* Reply of the PSA client call */
-+	struct psa_client_out_params     params;      /* Contain out data result of the
-+						       * PSA client call.
-+						       */
-+};
-+
-+#ifdef __cplusplus
-+}
-+#endif
-+
-+#endif /* SERVICE_PSA_IPC_OPENAMP_LIB_H */
-+
-+
-diff --git a/deployments/se-proxy/se-proxy.cmake b/deployments/se-proxy/se-proxy.cmake
-index 34fe5ff1b925..dd0c5d00c21e 100644
--- a/deployments/se-proxy/se-proxy.cmake
-+++ b/deployments/se-proxy/se-proxy.cmake
-@@ -24,6 +24,7 @@ add_components(TARGET "se-proxy"
- 		"components/service/common/include"
- 		"components/service/common/serializer/protobuf"
- 		"components/service/common/client"
-+		"components/service/common/psa_ipc"
- 		"components/service/common/provider"
- 		"components/service/discovery/provider"
- 		"components/service/discovery/provider/serializer/packed-c"
-- 
-2.38.1
-
@@ -0,0 +1,27 @@
+From 041d30bb9cc6857f5ef26ded154ff7126dafaa20 Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <emekcan.aras@arm.com>
+Date: Fri, 16 Jun 2023 10:47:48 +0100
+Subject: [PATCH] plat: corstone1000: add compile definitions for
+ ECP_DP_SECP512R1
+
+Corstone1000 runs PSA-API tests which requires this ECC algorithm.
+Without setting this, corstone1000 fails psa-api-crypto-test no 243.
+
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+---
+ platform/providers/arm/corstone1000/platform.cmake | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/platform/providers/arm/corstone1000/platform.cmake b/platform/providers/arm/corstone1000/platform.cmake
+index dbdf1097..e7a295dd 100644
+--- a/platform/providers/arm/corstone1000/platform.cmake
+++ b/platform/providers/arm/corstone1000/platform.cmake
+@@ -14,3 +14,5 @@ target_compile_definitions(${TGT} PRIVATE
+ 	SMM_VARIABLE_INDEX_STORAGE_UID=0x787
+ 	SMM_GATEWAY_MAX_UEFI_VARIABLES=100
+ )
+
+add_compile_definitions(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
+-- 
+2.17.1
+
@@ -1,523 +0,0 @@
-From ed4371d63cb52c121be9678bc225055944286c30 Mon Sep 17 00:00:00 2001
-From: Vishnu Banavath <vishnu.banavath@arm.com>
-Date: Fri, 3 Dec 2021 19:19:24 +0000
-Subject: [PATCH 06/20] Add secure storage ipc backend
-
-Add secure storage ipc ff-m implementation which may use
-openamp as rpc to communicate with other processor.
-
-Upstream-Status: Pending
-Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
- .../service/common/psa_ipc/service_psa_ipc.c  | 143 +++++++++++-
- .../secure_storage_ipc/component.cmake        |  14 ++
- .../secure_storage_ipc/secure_storage_ipc.c   | 214 ++++++++++++++++++
- .../secure_storage_ipc/secure_storage_ipc.h   |  52 +++++
- deployments/se-proxy/se-proxy.cmake           |   1 +
- 5 files changed, 420 insertions(+), 4 deletions(-)
- create mode 100644 components/service/secure_storage/backend/secure_storage_ipc/component.cmake
- create mode 100644 components/service/secure_storage/backend/secure_storage_ipc/secure_storage_ipc.c
- create mode 100644 components/service/secure_storage/backend/secure_storage_ipc/secure_storage_ipc.h
-
-diff --git a/components/service/common/psa_ipc/service_psa_ipc.c b/components/service/common/psa_ipc/service_psa_ipc.c
-index e8093c20a523..95a07c135f31 100644
--- a/components/service/common/psa_ipc/service_psa_ipc.c
-+++ b/components/service/common/psa_ipc/service_psa_ipc.c
-@@ -16,6 +16,52 @@
- #include <psa/client.h>
- #include "service_psa_ipc_openamp_lib.h"
- 
-+static struct psa_invec *psa_call_in_vec_param(uint8_t *req)
-+{
-+	return (struct psa_invec *)(req + sizeof(struct ns_openamp_msg));
-+}
-+
-+static struct psa_outvec *psa_call_out_vec_param(uint8_t *req, size_t in_len)
-+{
-+	return (struct psa_outvec *)(req + sizeof(struct ns_openamp_msg) +
-+				     (in_len * sizeof(struct psa_invec)));
-+}
-+
-+static size_t psa_call_header_len(const struct psa_invec *in_vec, size_t in_len,
-+				  struct psa_outvec *out_vec, size_t out_len)
-+{
-+	return sizeof(struct ns_openamp_msg) + (in_len * sizeof(*in_vec)) +
-+		(out_len * sizeof(*out_vec));
-+}
-+
-+static size_t psa_call_in_vec_len(const struct psa_invec *in_vec, size_t in_len)
-+{
-+	size_t req_len = 0;
-+	int i;
-+
-+	if (!in_vec || !in_len)
-+		return 0;
-+
-+	for (i = 0; i < in_len; i++)
-+		req_len += in_vec[i].len;
-+
-+	return req_len;
-+}
-+
-+static size_t psa_call_out_vec_len(const struct psa_outvec *out_vec, size_t out_len)
-+{
-+	size_t resp_len = 0;
-+	int i;
-+
-+	if (!out_vec || !out_len)
-+		return 0;
-+
-+	for (i = 0; i < out_len; i++)
-+		resp_len += out_vec[i].len;
-+
-+	return resp_len;
-+}
-+
- psa_handle_t psa_connect(struct rpc_caller *caller, uint32_t sid,
- 			 uint32_t version)
- {
-@@ -31,7 +77,7 @@ psa_handle_t psa_connect(struct rpc_caller *caller, uint32_t sid,
- 	rpc_handle = rpc_caller_begin(caller, &req,
- 				      sizeof(struct ns_openamp_msg));
- 	if (!rpc_handle) {
-		EMSG("psa_connect: could not get handle");
-+		EMSG("psa_connect: could not get rpc handle");
- 		return PSA_ERROR_GENERIC_ERROR;
- 	}
- 
-@@ -56,14 +102,100 @@ psa_handle_t psa_connect(struct rpc_caller *caller, uint32_t sid,
- 	return resp_msg ? (psa_handle_t)resp_msg->reply : PSA_NULL_HANDLE;
- }
- 
-psa_status_t psa_call(struct rpc_caller *caller, psa_handle_t handle,
-+psa_status_t psa_call(struct rpc_caller *caller, psa_handle_t psa_handle,
- 		      int32_t type, const struct psa_invec *in_vec,
- 		      size_t in_len, struct psa_outvec *out_vec, size_t out_len)
- {
-+	psa_status_t psa_status = PSA_SUCCESS;
-+	struct s_openamp_msg *resp_msg = NULL;
-+	struct psa_outvec *out_vec_param;
-+	struct psa_invec *in_vec_param;
-+	struct ns_openamp_msg *req_msg;
-+	rpc_call_handle rpc_handle;
-+	size_t out_vec_len;
-+	size_t in_vec_len;
-+	size_t header_len;
-+	uint8_t *payload;
-+	size_t resp_len;
-+	uint8_t *resp;
-+	uint8_t *req;
-+	int ret;
-+	int i;
-+
-+	if ((psa_handle == PSA_NULL_HANDLE) || !caller)
-+		return PSA_ERROR_INVALID_ARGUMENT;
-+
-+	header_len = psa_call_header_len(in_vec, in_len, out_vec, out_len);
-+	in_vec_len = psa_call_in_vec_len(in_vec, in_len);
-+	out_vec_len = psa_call_out_vec_len(out_vec, out_len);
- 
-+	rpc_handle = rpc_caller_begin(caller, &req, header_len + in_vec_len);
-+	if (!rpc_handle) {
-+		EMSG("psa_call: could not get handle");
-+		return PSA_ERROR_GENERIC_ERROR;
-+	}
-+
-+	payload = req + header_len;
-+
-+	out_vec_param = psa_call_out_vec_param(req, in_len);
-+	in_vec_param = psa_call_in_vec_param(req);
-+
-+	req_msg = (struct ns_openamp_msg *)req;
-+
-+	req_msg->call_type = OPENAMP_PSA_CALL;
-+	req_msg->request_id = 1234;
-+	req_msg->params.psa_call_params.handle = psa_handle;
-+	req_msg->params.psa_call_params.type = type;
-+	req_msg->params.psa_call_params.in_len = in_len;
-+	req_msg->params.psa_call_params.in_vec = rpc_caller_virt_to_phys(caller, in_vec_param);
-+	req_msg->params.psa_call_params.out_len = out_len;
-+	req_msg->params.psa_call_params.out_vec = rpc_caller_virt_to_phys(caller, out_vec_param);
-+
-+	for (i = 0; i < in_len; i++) {
-+		in_vec_param[i].base = rpc_caller_virt_to_phys(caller, payload);
-+		in_vec_param[i].len = in_vec[i].len;
-+
-+		memcpy(payload, in_vec[i].base, in_vec[i].len);
-+		payload += in_vec[i].len;
-+	}
-+
-+	for (i = 0; i < out_len; i++) {
-+		out_vec_param[i].base = NULL;
-+		out_vec_param[i].len = out_vec[i].len;
-+	}
-+
-+	ret = rpc_caller_invoke(caller, rpc_handle, 0, &psa_status, &resp,
-+				&resp_len);
-+	if (ret != TS_RPC_CALL_ACCEPTED) {
-+		EMSG("psa_call: invoke failed: %d", ret);
-+		return PSA_ERROR_GENERIC_ERROR;
-+	}
-+
-+	if (psa_status != PSA_SUCCESS) {
-+		EMSG("psa_call: psa_status invoke failed: %d", psa_status);
-+		return PSA_ERROR_GENERIC_ERROR;
-+	}
-+
-+	resp_msg = (struct s_openamp_msg *)resp;
-+
-+	if (!resp_msg || !out_len || resp_msg->reply != PSA_SUCCESS)
-+		goto caller_end;
-+
-+	out_vec_param = (struct psa_outvec *)rpc_caller_phys_to_virt(caller,
-+						     resp_msg->params.out_vec);
-+
-+	for (i = 0; i < resp_msg->params.out_len; i++) {
-+		memcpy(out_vec[i].base, rpc_caller_phys_to_virt(caller, out_vec_param[i].base),
-+		       out_vec[i].len);
-+	}
-+
-+caller_end:
-+	rpc_caller_end(caller, rpc_handle);
-+
-+	return resp_msg ? resp_msg->reply : PSA_ERROR_COMMUNICATION_FAILURE;
- }
- 
-void psa_close(struct rpc_caller *caller, psa_handle_t handle)
-+void psa_close(struct rpc_caller *caller, psa_handle_t psa_handle)
- {
- 	psa_status_t psa_status = PSA_SUCCESS;
- 	struct s_openamp_msg *resp_msg = NULL;
-@@ -74,6 +206,9 @@ void psa_close(struct rpc_caller *caller, psa_handle_t handle)
- 	uint8_t *req;
- 	int ret;
- 
-+	if ((psa_handle == PSA_NULL_HANDLE) || !caller)
-+		return;
-+
- 	rpc_handle = rpc_caller_begin(caller, &req,
- 				      sizeof(struct ns_openamp_msg));
- 	if (!rpc_handle) {
-@@ -84,7 +219,7 @@ void psa_close(struct rpc_caller *caller, psa_handle_t handle)
- 	req_msg = (struct ns_openamp_msg *)req;
- 
- 	req_msg->call_type = OPENAMP_PSA_CLOSE;
-	req_msg->params.psa_close_params.handle = handle;
-+	req_msg->params.psa_close_params.handle = psa_handle;
- 
- 	ret = rpc_caller_invoke(caller, rpc_handle, 0, &psa_status, &resp,
- 				&resp_len);
-diff --git a/components/service/secure_storage/backend/secure_storage_ipc/component.cmake b/components/service/secure_storage/backend/secure_storage_ipc/component.cmake
-new file mode 100644
-index 000000000000..5d8f6714e0bd
--- /dev/null
-+++ b/components/service/secure_storage/backend/secure_storage_ipc/component.cmake
-@@ -0,0 +1,14 @@
-+#-------------------------------------------------------------------------------
-+# Copyright (c) 2020-2021, Arm Limited and Contributors. All rights reserved.
-+#
-+# SPDX-License-Identifier: BSD-3-Clause
-+#
-+#-------------------------------------------------------------------------------
-+if (NOT DEFINED TGT)
-+	message(FATAL_ERROR "mandatory parameter TGT is not defined.")
-+endif()
-+
-+target_sources(${TGT} PRIVATE
-+	"${CMAKE_CURRENT_LIST_DIR}/secure_storage_ipc.c"
-+	)
-+
-diff --git a/components/service/secure_storage/backend/secure_storage_ipc/secure_storage_ipc.c b/components/service/secure_storage/backend/secure_storage_ipc/secure_storage_ipc.c
-new file mode 100644
-index 000000000000..9b55f77dd395
--- /dev/null
-+++ b/components/service/secure_storage/backend/secure_storage_ipc/secure_storage_ipc.c
-@@ -0,0 +1,214 @@
-+/*
-+ * Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
-+ *
-+ * SPDX-License-Identifier: BSD-3-Clause
-+ */
-+
-+#include <protocols/rpc/common/packed-c/status.h>
-+#include "secure_storage_ipc.h"
-+#include <psa/client.h>
-+#include <psa/sid.h>
-+#include <rpc_caller.h>
-+#include <string.h>
-+#include <trace.h>
-+
-+
-+static psa_status_t secure_storage_ipc_set(void *context, uint32_t client_id,
-+			 psa_storage_uid_t uid, size_t data_length,
-+			 const void *p_data, psa_storage_create_flags_t create_flags)
-+{
-+	struct secure_storage_ipc *ipc = context;
-+	struct rpc_caller *caller = ipc->client.caller;
-+	psa_handle_t psa_handle;
-+	psa_status_t psa_status;
-+	struct psa_invec in_vec[] = {
-+		{ .base = &uid, .len = sizeof(uid) },
-+		{ .base = p_data, .len = data_length },
-+		{ .base = &create_flags, .len = sizeof(create_flags) },
-+	};
-+
-+	(void)client_id;
-+
-+	ipc->client.rpc_status = TS_RPC_CALL_ACCEPTED;
-+
-+	/* Validating input parameters */
-+	if (p_data == NULL)
-+		return PSA_ERROR_INVALID_ARGUMENT;
-+
-+	psa_status = psa_call(caller, TFM_PROTECTED_STORAGE_SERVICE_HANDLE,
-+			      TFM_PS_SET, in_vec, IOVEC_LEN(in_vec), NULL, 0);
-+	if (psa_status < 0)
-+		EMSG("ipc_set: psa_call failed: %d", psa_status);
-+
-+	return psa_status;
-+}
-+
-+static psa_status_t secure_storage_ipc_get(void *context,
-+					   uint32_t client_id,
-+					   psa_storage_uid_t uid,
-+					   size_t data_offset,
-+					   size_t data_size,
-+					   void *p_data,
-+					   size_t *p_data_length)
-+{
-+	struct secure_storage_ipc *ipc = context;
-+	struct rpc_caller *caller = ipc->client.caller;
-+	psa_handle_t psa_handle;
-+	psa_status_t psa_status;
-+	uint32_t offset = (uint32_t)data_offset;
-+	struct psa_invec in_vec[] = {
-+		{ .base = &uid, .len = sizeof(uid) },
-+		{ .base = &offset, .len = sizeof(offset) },
-+	};
-+	struct psa_outvec out_vec[] = {
-+		{ .base = p_data, .len = data_size },
-+	};
-+
-+	if (!p_data_length) {
-+		EMSG("ipc_get: p_data_length not defined");
-+		return PSA_ERROR_INVALID_ARGUMENT;
-+	}
-+
-+	psa_status = psa_call(caller, TFM_PROTECTED_STORAGE_SERVICE_HANDLE,
-+			      TFM_PS_GET, in_vec, IOVEC_LEN(in_vec),
-+			      out_vec, IOVEC_LEN(out_vec));
-+	if (psa_status == PSA_SUCCESS)
-+		*p_data_length = out_vec[0].len;
-+
-+	return psa_status;
-+}
-+
-+static psa_status_t secure_storage_ipc_get_info(void *context,
-+						uint32_t client_id,
-+						psa_storage_uid_t uid,
-+						struct psa_storage_info_t *p_info)
-+{
-+	struct secure_storage_ipc *ipc = context;
-+	struct rpc_caller *caller = ipc->client.caller;
-+	psa_handle_t psa_handle;
-+	psa_status_t psa_status;
-+	struct psa_invec in_vec[] = {
-+		{ .base = &uid, .len = sizeof(uid) },
-+	};
-+	struct psa_outvec out_vec[] = {
-+		{ .base = p_info, .len = sizeof(*p_info) },
-+	};
-+
-+	(void)client_id;
-+
-+	/* Validating input parameters */
-+	if (!p_info)
-+		return PSA_ERROR_INVALID_ARGUMENT;
-+
-+	psa_status = psa_call(caller, TFM_PROTECTED_STORAGE_SERVICE_HANDLE,
-+			      TFM_PS_GET_INFO, in_vec,
-+			      IOVEC_LEN(in_vec), out_vec, IOVEC_LEN(out_vec));
-+	if (psa_status != PSA_SUCCESS)
-+		EMSG("ipc_get_info: failed to psa_call: %d", psa_status);
-+
-+	return psa_status;
-+}
-+
-+static psa_status_t secure_storage_ipc_remove(void *context,
-+						uint32_t client_id,
-+						psa_storage_uid_t uid)
-+{
-+	struct secure_storage_ipc *ipc = context;
-+	struct rpc_caller *caller = ipc->client.caller;
-+	psa_handle_t psa_handle;
-+	psa_status_t psa_status;
-+	struct psa_invec in_vec[] = {
-+		{ .base = &uid, .len = sizeof(uid) },
-+	};
-+
-+	(void)client_id;
-+
-+	psa_status = psa_call(caller, TFM_PROTECTED_STORAGE_SERVICE_HANDLE,
-+			      TFM_PS_REMOVE, in_vec,
-+			      IOVEC_LEN(in_vec), NULL, 0);
-+	if (psa_status != PSA_SUCCESS)
-+		EMSG("ipc_remove: failed to psa_call: %d", psa_status);
-+
-+	return psa_status;
-+}
-+
-+static psa_status_t secure_storage_ipc_create(void *context,
-+					      uint32_t client_id,
-+					      uint64_t uid,
-+					      size_t capacity,
-+					      uint32_t create_flags)
-+{
-+	(void)context;
-+	(void)uid;
-+	(void)client_id;
-+	(void)capacity;
-+	(void)create_flags;
-+
-+	return PSA_ERROR_NOT_SUPPORTED;
-+}
-+
-+static psa_status_t secure_storage_set_extended(void *context,
-+						uint32_t client_id,
-+						uint64_t uid,
-+						size_t data_offset,
-+						size_t data_length,
-+						const void *p_data)
-+{
-+	(void)context;
-+	(void)uid;
-+	(void)client_id;
-+	(void)data_offset;
-+	(void)data_length;
-+	(void)p_data;
-+
-+	return PSA_ERROR_NOT_SUPPORTED;
-+}
-+
-+static uint32_t secure_storage_get_support(void *context, uint32_t client_id)
-+{
-+	struct secure_storage_ipc *ipc = context;
-+	struct rpc_caller *caller = ipc->client.caller;
-+	psa_handle_t psa_handle;
-+	psa_status_t psa_status;
-+	uint32_t support_flags;
-+	struct psa_outvec out_vec[] = {
-+		{ .base = &support_flags, .len =  sizeof(support_flags) },
-+	};
-+
-+	(void)client_id;
-+
-+	psa_status = psa_call(caller, TFM_PROTECTED_STORAGE_SERVICE_HANDLE,
-+			      TFM_PS_GET_SUPPORT, NULL, 0,
-+			      out_vec, IOVEC_LEN(out_vec));
-+	if (psa_status != PSA_SUCCESS)
-+		EMSG("ipc_get_support: failed to psa_call: %d", psa_status);
-+
-+	return psa_status;
-+}
-+
-+struct storage_backend *secure_storage_ipc_init(struct secure_storage_ipc *context,
-+						struct rpc_caller *caller)
-+{
-+	service_client_init(&context->client, caller);
-+
-+	static const struct storage_backend_interface interface =
-+	{
-+		.set = secure_storage_ipc_set,
-+		.get = secure_storage_ipc_get,
-+		.get_info = secure_storage_ipc_get_info,
-+		.remove = secure_storage_ipc_remove,
-+		.create = secure_storage_ipc_create,
-+		.set_extended = secure_storage_set_extended,
-+		.get_support = secure_storage_get_support,
-+	};
-+
-+	context->backend.context = context;
-+	context->backend.interface = &interface;
-+
-+	return &context->backend;
-+}
-+
-+void secure_storage_ipc_deinit(struct secure_storage_ipc *context)
-+{
-+	service_client_deinit(&context->client);
-+}
-diff --git a/components/service/secure_storage/backend/secure_storage_ipc/secure_storage_ipc.h b/components/service/secure_storage/backend/secure_storage_ipc/secure_storage_ipc.h
-new file mode 100644
-index 000000000000..e8c1e8fd2f92
--- /dev/null
-+++ b/components/service/secure_storage/backend/secure_storage_ipc/secure_storage_ipc.h
-@@ -0,0 +1,52 @@
-+/*
-+ * Copyright (c) 2020-2021, Arm Limited and Contributors. All rights reserved.
-+ *
-+ * SPDX-License-Identifier: BSD-3-Clause
-+ */
-+
-+#ifndef SECURE_STORAGE_IPC_H
-+#define SECURE_STORAGE_IPC_H
-+
-+#include <service/secure_storage/backend/storage_backend.h>
-+#include <service/common/client/service_client.h>
-+
-+#ifdef __cplusplus
-+extern "C" {
-+#endif
-+
-+/**
-+ * @brief      Secure storage ipc instance
-+ */
-+struct secure_storage_ipc
-+{
-+    struct storage_backend backend;
-+    struct service_client client;
-+};
-+
-+/**
-+ * @brief      Initialize a secure storage ipc client
-+ *
-+ * A secure storage client is a storage backend that makes RPC calls
-+ * to a remote secure storage provider.
-+ *
-+ * @param[in]  context    Instance data
-+ * @param[in]  rpc_caller RPC caller instance
-+ *
-+ *
-+ * @return     Pointer to inialized storage backend or NULL on failure
-+ */
-+struct storage_backend *secure_storage_ipc_init(struct secure_storage_ipc *context,
-+						struct rpc_caller *caller);
-+
-+/**
-+ * @brief      Deinitialize a secure storage ipc client
-+ *
-+ * @param[in]  context   Instance data
-+ */
-+void secure_storage_ipc_deinit(struct secure_storage_ipc *context);
-+
-+#ifdef __cplusplus
-+}
-+#endif
-+
-+#endif /* SECURE_STORAGE_IPC_H */
-diff --git a/deployments/se-proxy/se-proxy.cmake b/deployments/se-proxy/se-proxy.cmake
-index dd0c5d00c21e..cd51460406ca 100644
--- a/deployments/se-proxy/se-proxy.cmake
-+++ b/deployments/se-proxy/se-proxy.cmake
-@@ -45,6 +45,7 @@ add_components(TARGET "se-proxy"
- 		"components/service/crypto/factory/full"
- 		"components/service/secure_storage/include"
- 		"components/service/secure_storage/frontend/secure_storage_provider"
-+		"components/service/secure_storage/backend/secure_storage_ipc"
- 		"components/service/attestation/include"
- 		"components/service/attestation/provider"
- 		"components/service/attestation/provider/serializer/packed-c"
-- 
-2.38.1
-
@@ -1,21 +1,21 @@
-From 956b8a8e1dd5702b9c1657f4ec27a7aeddb0758e Mon Sep 17 00:00:00 2001
-From: Mohamed Omar Asaker <mohamed.omarasaker@arm.com>
-Date: Mon, 21 Nov 2022 00:08:20 +0000
-Subject: [PATCH] Use the stateless platform service calls
-
-Calls to psa_connect is not needed and psa_call can be called
-directly with a pre defined handle.
+From a71e99045996c57a4f80509ae8b770aa4f73f6c0 Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <emekcan.aras@arm.com>
+Date: Sun, 18 Jun 2023 14:38:42 +0100
+Subject: [PATCH] plat: corstone1000: Use the stateless platform service calls
+ Calls to psa_connect is not needed and psa_call can be called directly with a
+ pre defined handle.

 Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
 Signed-off-by: Mohamed Omar Asaker <mohamed.omarasaker@arm.com>
-Upstream-Status: Inappropriate [Design is to revisted]
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>

+Upstream-Status: Inappropriate [Design is to revisted]
 ---
 .../provider/capsule_update_provider.c        | 24 ++++---------------
 .../provider/corstone1000_fmp_service.c       | 10 ++++----
 .../provider/corstone1000_fmp_service.h       |  3 +--
- components/service/common/include/psa/sid.h   |  6 +++++
- 4 files changed, 16 insertions(+), 27 deletions(-)
+ components/service/common/include/psa/sid.h   |  7 ++++++
+ 4 files changed, 17 insertions(+), 27 deletions(-)

 diff --git a/components/service/capsule_update/provider/capsule_update_provider.c b/components/service/capsule_update/provider/capsule_update_provider.c
 index 991a2235..6809249f 100644
@@ -119,22 +119,23 @@ index 95fba2a0..963223e8 100644
 #ifdef __cplusplus
 } /* extern "C" */
 diff --git a/components/service/common/include/psa/sid.h b/components/service/common/include/psa/sid.h
-index 7a29cc25..8103a9af 100644
+index 5aaa659d..fc3a4fb0 100644
 --- a/components/service/common/include/psa/sid.h
 +++ b/components/service/common/include/psa/sid.h
-@@ -37,6 +37,12 @@ extern "C" {
+@@ -40,6 +40,13 @@ extern "C" {
 #define TFM_CRYPTO_VERSION                                         (1U)
 #define TFM_CRYPTO_HANDLE                                          (0x40000100U)
 
-+
 +/******** TFM_PLATFORM_SERVICE *******/
 +#define TFM_PLATFORM_API_ID_IOCTL         (1013)
 +#define TFM_PLATFORM_SERVICE_HANDLE       (0x40000105U)
 +
-+
- /**
-  * \brief Define a progressive numerical value for each SID which can be used
-  *        when dispatching the requests to the service
+/**
+ * \brief Define a progressive numerical value for each SID which can be used
+ *        when dispatching the requests to the service
+ /******** TFM_SP_PLATFORM ********/
+ #define TFM_SP_PLATFORM_SYSTEM_RESET_SID                           (0x00000040U)
+ #define TFM_SP_PLATFORM_SYSTEM_RESET_VERSION                       (1U)
 -- 
-2.25.1
+2.17.1

@@ -1,63 +0,0 @@
-From d1377a5ed909e3a1d9caca56aeda262a80322a4b Mon Sep 17 00:00:00 2001
-From: Vishnu Banavath <vishnu.banavath@arm.com>
-Date: Fri, 3 Dec 2021 19:25:34 +0000
-Subject: [PATCH 07/20] Use secure storage ipc and openamp for se_proxy
-
-Remove mock up backend for secure storage in se proxy
-deployment and use instead the secure storage ipc backend with
-openamp as rpc to secure enclave side.
-
-Upstream-Status: Pending
-Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
- .../se-proxy/common/service_proxy_factory.c      | 16 +++++++++++++---
- 1 file changed, 13 insertions(+), 3 deletions(-)
-
-diff --git a/deployments/se-proxy/common/service_proxy_factory.c b/deployments/se-proxy/common/service_proxy_factory.c
-index acfb6e8873fa..57290056d614 100644
--- a/deployments/se-proxy/common/service_proxy_factory.c
-+++ b/deployments/se-proxy/common/service_proxy_factory.c
-@@ -6,15 +6,20 @@
- 
- #include <stddef.h>
- #include <rpc/common/endpoint/rpc_interface.h>
-+#include <rpc/openamp/caller/sp/openamp_caller.h>
- #include <service/attestation/provider/attest_provider.h>
- #include <service/attestation/provider/serializer/packed-c/packedc_attest_provider_serializer.h>
- #include <service/crypto/factory/crypto_provider_factory.h>
- #include <service/secure_storage/frontend/secure_storage_provider/secure_storage_provider.h>
-+#include <trace.h>
- 
- /* Stub backends */
- #include <service/crypto/backend/stub/stub_crypto_backend.h>
-+#include <service/secure_storage/backend/secure_storage_ipc/secure_storage_ipc.h>
- #include <service/secure_storage/backend/mock_store/mock_store.h>
- 
-+struct openamp_caller openamp;
-+
- struct rpc_interface *attest_proxy_create(void)
- {
- 	struct rpc_interface *attest_iface;
-@@ -47,10 +52,15 @@ struct rpc_interface *crypto_proxy_create(void)
- 
- struct rpc_interface *ps_proxy_create(void)
- {
-	static struct mock_store ps_backend;
- 	static struct secure_storage_provider ps_provider;
-
-	struct storage_backend *backend = mock_store_init(&ps_backend);
-+	static struct secure_storage_ipc ps_backend;
-+	static struct rpc_caller *storage_caller;
-+	struct storage_backend *backend;
-+
-+	storage_caller = openamp_caller_init(&openamp);
-+	if (!storage_caller)
-+		return NULL;
-+	backend = secure_storage_ipc_init(&ps_backend, &openamp.rpc_caller);
- 
- 	return secure_storage_provider_init(&ps_provider, backend);
- }
-- 
-2.38.1
-
@@ -0,0 +1,78 @@
+From b5b31064959665f4cc616733be3d989ae4356636 Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <emekcan.aras@arm.com>
+Date: Sun, 18 Jun 2023 16:05:27 +0100
+Subject: [PATCH] plat: corstone1000: Initialize capsule update provider
+
+Initializes the capsule update service provider in se-proxy-sp.c deployment
+for corstone1000.
+
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+Upstream-Status: Inappropriate [Design is to revisted]
+
+---
+ deployments/se-proxy/env/commonsp/se_proxy_sp.c |  3 +++
+ .../infra/corstone1000/service_proxy_factory.c  | 17 +++++++++++++++++
+ .../se-proxy/infra/service_proxy_factory.h      |  1 +
+ 3 files changed, 21 insertions(+)
+
+diff --git a/deployments/se-proxy/env/commonsp/se_proxy_sp.c b/deployments/se-proxy/env/commonsp/se_proxy_sp.c
+index 45fcb385..dc2a9d49 100644
+--- a/deployments/se-proxy/env/commonsp/se_proxy_sp.c
+++ b/deployments/se-proxy/env/commonsp/se_proxy_sp.c
+@@ -77,6 +77,9 @@ void __noreturn sp_main(struct ffa_init_info *init_info)
+ 	}
+ 	rpc_demux_attach(&rpc_demux, SE_PROXY_INTERFACE_ID_ATTEST, rpc_iface);
+ 
+	rpc_iface = capsule_update_proxy_create();
+	rpc_demux_attach(&rpc_demux, SE_PROXY_INTERFACE_ID_CAPSULE_UPDATE, rpc_iface);
+
+ 	/* End of boot phase */
+ 	result = sp_msg_wait(&req_msg);
+ 	if (result != SP_RESULT_OK) {
+diff --git a/deployments/se-proxy/infra/corstone1000/service_proxy_factory.c b/deployments/se-proxy/infra/corstone1000/service_proxy_factory.c
+index bacab1de..32d88c97 100644
+--- a/deployments/se-proxy/infra/corstone1000/service_proxy_factory.c
+++ b/deployments/se-proxy/infra/corstone1000/service_proxy_factory.c
+@@ -14,6 +14,7 @@
+ #include <service/crypto/factory/crypto_provider_factory.h>
+ #include <service/secure_storage/frontend/secure_storage_provider/secure_storage_provider.h>
+ #include <trace.h>
+#include <service/capsule_update/provider/capsule_update_provider.h>
+ 
+ /* backends */
+ #include <service/crypto/backend/psa_ipc/crypto_ipc_backend.h>
+@@ -94,3 +95,19 @@ struct rpc_interface *its_proxy_create(void)
+ 
+ 	return secure_storage_provider_init(&its_provider, backend);
+ }
+
+struct rpc_interface *capsule_update_proxy_create(void)
+{
+	static struct capsule_update_provider capsule_update_provider;
+	static struct rpc_caller *capsule_update_caller;
+
+	capsule_update_caller = psa_ipc_caller_init(&psa_ipc);
+
+	if (!capsule_update_caller)
+	return NULL;
+
+	capsule_update_provider.client.caller = capsule_update_caller;
+
+	return capsule_update_provider_init(&capsule_update_provider);
+}
+
+diff --git a/deployments/se-proxy/infra/service_proxy_factory.h b/deployments/se-proxy/infra/service_proxy_factory.h
+index 298d407a..02aa7fe2 100644
+--- a/deployments/se-proxy/infra/service_proxy_factory.h
+++ b/deployments/se-proxy/infra/service_proxy_factory.h
+@@ -17,6 +17,7 @@ struct rpc_interface *attest_proxy_create(void);
+ struct rpc_interface *crypto_proxy_create(void);
+ struct rpc_interface *ps_proxy_create(void);
+ struct rpc_interface *its_proxy_create(void);
+struct rpc_interface *capsule_update_proxy_create(void);
+ 
+ #ifdef __cplusplus
+ }
+-- 
+2.17.1
+
--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
Mariam Elshakfy	9bcc166bd5	arm-bsp/n1sdp: Enable OP-TEE cache in N1SDP This change enables N1SDP cache to improve performance by removing this patch: HACK-disable-instruction-cache-and-data-cache.patch Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>	2023-10-19 21:14:39 -05:00
Mariam Elshakfy	0e35e4b951	arm-bsp/n1sdp: Move OP-TEE to DDR4 Since the original location of OP-TEE in DDR3 observes a HW issue when cache is enabled, this change moves OP-TEE to run from DDR4. Patches are added to TF-A to reflect that change and the used region is also reserved in UEFI (EDK2) to protect against allocations by UEFI applications. OP-TEE size is modified for consistency across all patches to be 32 MB (0x02000000) instead of (0x02008000). Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>	2023-10-19 21:14:39 -05:00
Jon Mason	bbe2d63100	arm/linux-yocto: remove defconfig patch Mikko Rapeli upstreamed the patch for the Nuvoton defconfig issue and it has been pulled back the 6.1 kernel. So, it is no longer needed here. Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-10-19 21:14:39 -05:00
Vikas Katariya	2b57548b36	arm-bsp/corstone1000: Fix RSA key generation issue This support is for Cassini distro using Corstone-1000 platform. When running parsec test, it reports an error `PSA_ERROR_DATA_INVALID (-153)`. This is related to `ITS_MAX_ASSET_SIZE` configuration which is been set to 512 on the secure enclave (TF-M), which defines the max asset size and it overflows when running the parsec tests. The key is generated, but when it is asked to store via `psa_its_set` it returns `PSA_ERROR_INVALID_ARGUMENT (-135)`, which then propagates to `PSA_ERROR_DATA_INVALID (-153)` Increasing the `ITS_MAX_ASSET_SIZE` to 2048 solves this issue. Signed-off-by: Vikas Katariya <vikas.katariya@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-10-16 09:28:49 -04:00
Jon Mason	c6380674f5	arm/trusted-services: add SRCREV_FORMAT SRCREV_FORMAT is now required. Add that to address the build breakage. Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-10-06 09:23:53 -04:00
Jon Mason	6e199b354e	README: remove reference to meta-arm-autonomy Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-10-01 16:01:33 -04:00
Abdellatif El Khlifi	7c67197694	arm-bsp/trusted-firmware-a: corstone1000: enable ERRATA_A35_855472 enable errata 855472 for Cortex-A35 in Corstone-1000 Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-09-29 11:35:27 -04:00
Robbie Cao	85b0e80e7d	arm/recipes-kernel: Add preempt-rt support for generic-arm64 Add kernel configuration necessary to build an image with preempt-rt support for generic-arm64. And tweak kernel configuration for preempt-rt kernel. Signed-off-by: Robbie Cao <robbie.cao@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-08-14 10:26:48 -04:00
Jon Mason	821fa15a73	arm/linux-yocto: move 6.1 patches to a unique bbappend Move the 3 patches only needed by the 6.1 kernel into a unique bbappend The defconfig changes cannot be moved into a config fragment because they only exist in the defconfig file (because the patches that integrated their functionality into the kernel were not merged). Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-08-14 10:25:36 -04:00
Jon Mason	18edb7bcff	CI: remove master refspec for meta-virtualization yml file Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-08-14 09:54:23 -04:00
Adam Johnston	10c355b9c7	arm-bsp/trusted-firmware-a: Reserve OP-TEE memory from NWd on N1SDP The physical memory which is used to run OP-TEE on the N1SDP is known to the secure world via TOS_FW_CONFIG, but it may not be known to the normal world. As a precaution, explicitly reserve this memory via NT_FW_CONFIG to prevent the normal world from using it. This is not required on most platforms as the Trusted OS is run from secure RAM. Signed-off-by: Adam Johnston <adam.johnston@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-07-27 09:44:10 -04:00
Abdellatif El Khlifi	1a15a5b052	kas: set the SHAs for 2023.06 release set poky and meta-openembedded SHAs Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-07-06 13:35:20 -04:00
Abdellatif El Khlifi	0bf2afab93	arm-bsp/documentation: corstone1000: update user guide Adding extra details to corstone1000 user guide. Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-07-06 13:34:54 -04:00
Abdellatif El Khlifi	c1201c0c3a	arm-bsp/documentation: corstone1000: update the release note Updates the release note copyright. Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-07-06 13:34:54 -04:00
Abdellatif El Khlifi	fd7cb4d462	arm-bsp/doc: corstone1000: Update the software architecture document Align the document with the current design. Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>	2023-06-27 09:28:42 +01:00
Abdellatif El Khlifi	7d4cc90156	arm-bsp/documentation: corstone1000: Update change log Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>	2023-06-27 09:28:42 +01:00
Tomás González	1bfb03f9a6	arm-bsp/documentation: corstone1000: Update the release notes Update the release notes with Known Issues and Limitations. Signed-off-by: Tomás González <tomasagustin.gonzalezorlando@arm.com>	2023-06-27 09:28:42 +01:00
Tomás González	bef3c42e38	arm-bsp/documentation: corstone1000: Update the user guide Signed-off-by: Tomás González <tomasagustin.gonzalezorlando@arm.com> Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>	2023-06-27 09:28:42 +01:00
Emekcan Aras	779594c5d8	arm-bsp/trusted-services: corstone1000: Fix Capsule Update Adds missing update service definitions for using stateless platform services and initializes the capsule udpate provider in se-proxy-sp for corstone1000. Signed-off-by: Emekcan Aras <emekcan.aras@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-22 09:33:11 -04:00
Emekcan Aras	bd0c162e37	arm-bsp/trusted-services: corstone1000: Fix PSA_RAW_KEY agreement test Adds missing compilation option to fix psa_raw_key_aggrement test for corstone1000. Signed-off-by: Emekcan Aras <emekcan.aras@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-22 09:33:11 -04:00
Emekcan Aras	4a946ac8de	arm-bsp/u-boot: corstone1000: Fix u-boot compilation warnings From: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com> Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-22 09:33:11 -04:00
Emekcan Aras	d0b423c63c	arm-bsp/optee-os:corstone1000: Drop SPMC non secure interrupt patches From: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com> These 2 patches causes the secure world to enter into an infinite loop when the PSA arch tests are triggered. This is a temporary fix and the issue needs to be investigated before the patches can be enabled. Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-22 09:33:11 -04:00
Emekcan Aras	5024b767e3	arm-bsp/trusted-services: corstone1000: GetNextVariableName Fix This patch is required to handle one of the corner cases of the GetNextVariableName EFI service as specified in the UEFI spec. Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-22 09:33:11 -04:00
Emekcan Aras	00bff355e5	arm-bsp/u-boot: corstone1000: Enable EFI set/get time services From: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com> This patch adds the required configs to the corstone1000 u-boot defconfig to enable the EFI services. This is done to fix the SCT failure reported by the SetTime_Conf and SetTime_Func. Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-22 09:33:11 -04:00
Emekcan Aras	4a7198a135	arm-bsp/u-boot: corstone1000: Fix EFI multiple protocol install failure From: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com> The patch fixes the ACS InstallMultipleProtocolInterfaces_Conf failures in corstone1000 platform by dropping a workaround u-boot patch. The NVMXIP initialization had some issues during u-boot boot stage which led to the workaround patch. Upstream-Status: Pending [Not submitted to upstream yet] Signed-off-by: Emekcan Aras <emekcan.aras@arm.com> Signed-off-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-22 09:33:11 -04:00
Denys Dmytriyenko	7bd239d4f3	optee-os: do not explicitly set CFG_MAP_EXT_DT_SECURE=y CFG_MAP_EXT_DT_SECURE=y should be set per platform, as it requires CFG_DT=y to also be set, which is not the case for all the platforms out there using optee-os. Moreover CFG_MAP_EXT_DT_SECURE is already being set conditionally in optee-os-ts. Signed-off-by: Denys Dmytriyenko <denys@konsulko.com> Signed-off-by: Denys Dmytriyenko <denis@denix.org> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-14 09:17:47 -04:00
Adam Johnston	b1a9fd76be	CI: Platform specific Trusted Services config Split trusted-services.xml into qemuarm64-secureboot-ts.yml and n1sdp-ts.yml as collection of Trusted Services which can be tested on each platform has diverged. Signed-off-by: Adam Johnston <adam.johnston@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-14 09:17:32 -04:00
Rui Miguel Silva	58a97781d5	arm-bps/corstone1000: setup trusted service proxy configuration Make sure we setup the new variable for the configuration of the SE-Proxy service for our machine. This will trigger the right configuration building trusted services and all psa-arch test pass as before. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-14 09:17:32 -04:00
Gyorgy Szing	e995c42311	optee-os: unblock NWd interrupts Update Trusted Services and backport an OP-TEE update which allows interrupting the SPs by NWd interrupts. This solves the kernel stall problems which are due to long cryptographic operations being executed in the SWd. Signed-off-by: Gyorgy Szing <Gyorgy.Szing@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-14 09:17:32 -04:00
Gyorgy Szing	5e05b281f4	arm/trusted-services: fix nanopb build error The nanopb build step randomly fails in the yocto CI due to a race condition. This change adds a patch file to disable parallel build for nanopb. This is a temporary workaround and a proper fix will be up-streamed int he future. Signed-off-by: Gyorgy Szing <Gyorgy.Szing@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-14 09:17:32 -04:00
Rui Miguel Silva	cb811a559b	arm-bsp/trusted-services: remove merged patches for corstone1000 Patch related with the changes to support the in/out_vec modifications in TF-M v1.7 was merged in upstream trusted-services integration branch. So, drop this 3 out of tree patches not needed to be applied any more. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-14 09:17:32 -04:00
Gyorgy Szing	0d7ee992c1	arm/trusted-services: disable psa-iat on qemuarm64-secureboot TF-A v2.8 does not support measured boot and FF-A which is mandatory for PSA Initial Attestation SP to work correctly. Signed-off-by: Gyorgy Szing <Gyorgy.Szing@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-14 09:17:32 -04:00
Gyorgy Szing	45206b21b9	trusted-services: update documentation Add information related to SPMC tests and fix stale links. Signed-off-by: Gyorgy Szing <Gyorgy.Szing@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-14 09:17:32 -04:00
Rui Miguel Silva	5c19e4a87a	arm-bsp/trusted-services:corstone1000: remove already merged patches Remove already merged patches in trusted services integration branch to avoid clash during apply patch stage and rebase the remaining patches. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-14 09:17:32 -04:00
Gyorgy Szing	065e86ab5f	arm/oeqa: enable OP-TEE SPMC tests Run the ffa_spmc test group of xtest if the optee-spmc-test machine feature is enabled. Signed-off-by: Anton Antonov <Anton.Antonov@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-14 09:17:32 -04:00
Gyorgy Szing	b3c96e3fc3	optee-os: enable SPMC test Add ta-devkit and optee-test. Change configuration to enable building and deploying OP-TEE SPMC tests. Signed-off-by: Gyorgy Szing <Gyorgy.Szing@arm.com> Signed-off-by: Anton Antonov <Anton.Antonov@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-14 09:17:32 -04:00
Gyorgy Szing	48abf0167d	optee-test: backport SWd ABI compatibility changes The ABI used by the arm-ffa-user driver to call into the SWd changed. The change was driven by the MM over FF-A ABI implementation which is used by SmmGW SP and uefi-test. uefi-test uses the same arm-ffa-user driver as xtest hence xtest needs to be updated to use the new driver. This xtest change is already merged up-stream but after v3.20, which is used here. This change adds backported xtest changes as carried patches. Signed-off-by: Gyorgy Szing <Gyorgy.Szing@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-14 09:17:32 -04:00
Gyorgy Szing	adea344855	arm/trusted-firmware-a: Add TOS_FW_CONFIG handling for quemu This change: - cherry-picks TF-A changes from master which implement passing TOS_FW_CONFIG DTB from the FIP package to the trusted OS. - add an OP-TEE SPMC specific SPMC manifest file - configures TF-A to build the manifest, add it to the FIP package and pass it to OP-TEE as a boot argument. This functionality needs matching changes in OPTEE (OP-TEE v3.21 or v3.20 + carried patches.) Signed-off-by: Gyorgy Szing <Gyorgy.Szing@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-14 09:17:32 -04:00
Gyorgy Szing	809d2b43f9	optee-os: Add support for TOS_FW_CONFIG on qemu OP-TEE SPMC v3.20 and TF-A v2.8 is incompatible on qemu, and OP-TEE panics during boot because having an SPMC manifest passed to the SPMC is mandatory since v3.20. TF-A and OP-TEE upstream already fixed this issue by modifying the ABI between the SPMD and SPMC. Moreover qemu support in TF-A has been extended to allow building an SPMC manifest DTS file, and loading it from the FIP package. This change adds the needed OP-TEE fixes as carried patches. The TF-A change will be added in the next commit. Signed-off-by: Gyorgy Szing <Gyorgy.Szing@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-14 09:17:32 -04:00
Anton Antonov	15d6b7c4e9	arm/oeqa: Make ts-service-test config match selected SPs Split tests to groups, and enable groups based on machine features set. This allows limiting tests to testing deployed SPs only. Signed-off-by: Anton Antonov <Anton.Antonov@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-14 09:17:32 -04:00
Gyorgy Szing	2ffe50d4b5	optee-os: remove v3.18 pin of OP-TEE on qemuarm64-secureboot To enable up-to date version of Trusted Services op-tee v3.20 or newer is needed. Signed-off-by: Gyorgy Szing <Gyorgy.Szing@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-14 09:17:32 -04:00
Gyorgy Szing	b25e1ef90d	arm/trusted-services: update TS version This change updates to latest available version of Trusted Services. List of changes: - adapt SP recipes to file structure changes and support for "configurations". In TS each SP can be built in various different setups to allow adapting to platform and integration specific differences. - MbedTLS dependency has been updated to v3.3.0. - This needs new python dependencies are required in the build environment. - psa-acs was updated to a matching version. - do_patch() has been updated to support the MbedTLS patch added in TS. - Update TS dependency patching method to use git instead of patch. - Downgrade nanopb to match up-stream dependency version. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Gyorgy Szing <Gyorgy.Szing@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-14 09:17:32 -04:00
Abdellatif El Khlifi	8db460fa5d	arm-bsp/u-boot: corstone1000: upgrade NVMXIP support The patchset has been merged in U-Boot master (https://github.com/u-boot/u-boot/commit/c9c2c95d4cd27fe0cd41fe13a863899d268f973c) This commit upgrades the NVMXIP patches with the merged ones. Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-13 10:08:53 -04:00
Emekcan Aras	36f77ab664	arm-bsp/u-boot: corstone1000: enable PSCI reset Even though corstone1000 platform does not support the entire PSCI APIs, it relys on PSCI reset interface for system reset. The name of this config changed in the new version of u-boot. This enables PSCI reset, so the system can be resetted in u-boot again. Signed-off-by: Emekcan Aras <emekcan.aras@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-06-06 11:00:23 -04:00
Abdellatif El Khlifi	6850977577	kas: corstone1000: set branches to mickledore point poky/meta-openembedded to mickledore Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-05-16 13:00:10 -04:00
Emekcan Aras	91b504e686	arm-bsp/wic: corstone1000: Fix and limit the partition size for corstone1000 It fixes and limits the partition size to fix capsule update feature after the GPT changes. The partitions in the second bank needs to have correct size and the partitions in first bank should have a fixed size since corstone1000 does not support partial update and has a limited flash to support variable size. Signed-off-by: Emekcan Aras <emekcan.aras@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-05-15 13:00:16 -04:00
Emekcan Aras	50624c6f2f	arm-bsp/trusted-firmware-m: Align Capsule Update with GPT changes This patch aligns capsule update feature in tfm with GPT/BL1 changes. Adjusts BL2 flash and data size and adds missing CRC checks. Signed-off-by: Emekcan Aras <emekcan.aras@arm.com> Signed-off-by: Jon Mason <jon.mason@arm.com>	2023-05-15 13:00:16 -04:00