CI: only run pending-updates on master

This job takes a few minutes and isn't useful unless it's being ran for
master, or is being actively worked on.

Signed-off-by: Ross Burton <ross.burton@arm.com>
Signed-off-by: Jon Mason <jon.mason@arm.com>

.b4-config

@@ -0,0 +1,2 @@
+[b4]
+	send-series-to = meta-arm@lists.yoctoproject.org

.gitlab-ci.yml

@@ -1,4 +1,4 @@
-image: ${MIRROR_GHCR}/siemens/kas/kas:4.3.2
+image: ${MIRROR_GHCR}/siemens/kas/kas:4.4
 
 variables:
   # These are needed as the k8s executor doesn't respect the container
@@ -10,7 +10,7 @@ variables:
   # The default machine tag for the build jobs
   DEFAULT_TAG: ""
   # The machine tag for the ACS test jobs
-  ACS_TAG: ""
+  ACS_TAG: "$DEFAULT_TAG"
   # The directory to use as the persistent cache (the root for DL_DIR, SSTATE_DIR, etc)
   CACHE_DIR: $CI_BUILDS_DIR/persist
   # The container mirror to use
@@ -33,28 +33,24 @@ stages:
   stage: build
   interruptible: true
   variables:
+    KUBERNETES_CPU_REQUEST: $CPU_REQUEST
     KAS_WORK_DIR: $CI_PROJECT_DIR/work
-    KAS_REPO_REF_DIR: $CACHE_DIR/repos
+    KAS_BUILD_DIR: $KAS_WORK_DIR/build
+    # Set this in the environment to enable local repository caches
+    KAS_REPO_REF_DIR: ""
     SSTATE_DIR: $CACHE_DIR/sstate
     DL_DIR: $CACHE_DIR/downloads
     BB_LOGCONFIG: $CI_PROJECT_DIR/ci/logging.yml
     TOOLCHAIN_DIR: $CACHE_DIR/toolchains
-    IMAGE_DIR: $CI_PROJECT_DIR/work/build/tmp/deploy/images
-    TOOLCHAIN_LINK_DIR: $CI_PROJECT_DIR/work/build/toolchains
+    IMAGE_DIR: $KAS_BUILD_DIR/tmp/deploy/images
+    TOOLCHAIN_LINK_DIR: $KAS_BUILD_DIR/toolchains
   before_script:
-    - echo KAS_WORK_DIR = $KAS_WORK_DIR
-    - echo SSTATE_DIR = $SSTATE_DIR
-    - echo DL_DIR = $DL_DIR
     - rm -rf $KAS_WORK_DIR
     - mkdir --verbose --parents $KAS_WORK_DIR $KAS_REPO_REF_DIR $SSTATE_DIR $DL_DIR $TOOLCHAIN_DIR $TOOLCHAIN_LINK_DIR
-    # Must do this here, as it's the only way to make sure the toolchain is installed on the same builder
-    - ./ci/get-binary-toolchains $DL_DIR $TOOLCHAIN_DIR $TOOLCHAIN_LINK_DIR
 
 # Generalised fragment to do a Kas build
 .build:
   extends: .setup
-  variables:
-    KUBERNETES_CPU_REQUEST: $CPU_REQUEST
   rules:
     # Don't run MR pipelines
     - if: $CI_PIPELINE_SOURCE == "merge_request_event"
@@ -75,13 +71,17 @@ stages:
     - echo KASFILES=$KASFILES
     - kas dump --update --force-checkout --resolve-refs --resolve-env $KASFILES
     - kas build $KASFILES
-    - ./ci/check-warnings $KAS_WORK_DIR/build/warnings.log
+    - ./ci/check-warnings $KAS_BUILD_DIR/warnings.log
+    - kas shell ci/base.yml:lockfile.yml --command "$CI_PROJECT_DIR/ci/junit.sh $KAS_WORK_DIR/build"
+
   artifacts:
     name: "logs"
     when: always
     paths:
-      - $CI_PROJECT_DIR/work/build/tmp*/work*/**/temp/log.do_*.*
-      - $CI_PROJECT_DIR/work/build/tmp*/work*/**/testimage/*
+      - $KAS_BUILD_DIR/tmp*/work*/**/temp/log.do_*.*
+      - $KAS_BUILD_DIR/tmp*/work*/**/testimage/*
+    reports:
+      junit: $KAS_BUILD_DIR/tmp/log/oeqa/junit.xml
 
 #
 # Prep stage, update repositories once.
@@ -94,7 +94,18 @@ update-repos:
     exit_codes: 128
   script:
     - |
-      flock --verbose --timeout 60 $KAS_REPO_REF_DIR ./ci/update-repos
+      exit_code=0
+
+      # Dump the environment for reference
+      printenv
+
+      # Update the reference repositories if needed
+      if [ -n "$KAS_REPO_REF_DIR" ]; then
+        flock --verbose --timeout 60 $KAS_REPO_REF_DIR --command ./ci/update-repos || exit_code=$?
+        # Exit now if that failed, unless the status was 128 (fetch failed)
+        test $exit_code != 0 -a $exit_code != 128 && exit 1
+      fi
+
       # Only generate if doesn't already exist, to allow feature branches to drop one in.
       if test -f lockfile.yml; then
         echo Using existing lockfile.yml
@@ -102,23 +113,26 @@ update-repos:
         # Be sure that this is the complete list of layers being fetched
         kas dump --lock --update ci/qemuarm64.yml:ci/meta-openembedded.yml:ci/clang.yml:ci/meta-virtualization.yml | tee lockfile.yml
       fi
+      exit $exit_code
   artifacts:
     name: "lockfile"
+    when: always
     paths:
       - lockfile.yml
 
 #
 # Build stage, the actual build jobs
 #
-# Available options for building are
-#  DISTRO: [poky, poky-tiny]
+# Available options for building are (VIRT _must_ be last for ssh override)
+#  DISTRO: [poky, poky-altcfg, poky-tiny]
 #  KERNEL: [linux-yocto, linux-yocto-dev, linux-yocto-rt]
-#  TOOLCHAINS: [gcc, clang, external-gccarm]
+#  TOOLCHAINS: [gcc, clang]
 #  TCLIBC: [glibc, musl]
 #  FIRMWARE: [u-boot, edk2]
 #  TS: [none, trusted-services]
-#  VIRT: [none, xen]
 #  TESTING: testimage
+#  SECUREDEBUG: [none, secure-debug]
+#  VIRT: [none, xen]
 
 arm-systemready-ir-acs:
   extends: .build
@@ -128,7 +142,7 @@ arm-systemready-ir-acs:
       # arm-systemready-ir-acs must be specified after fvp-base for ordering
       # purposes for the jobs-to-kas output. It is not enough to just have it
       # in the job name because fvp-base.yml overwrites the target.
-      - PLATFORM: fvp-base
+      - PLATFORM: [fvp-base, corstone1000-fvp]
         ARM_SYSTEMREADY_IR_ACS: arm-systemready-ir-acs
   tags:
     - ${ACS_TAG}
@@ -160,6 +174,7 @@ corstone1000-mps3:
       - FIRMWARE: corstone1000-firmware-only
         TESTING: [none, tftf]
       - FIRMWARE: none
+        SECUREDEBUG: [none, secure-debug]
 
 documentation:
   extends: .setup
@@ -190,22 +205,10 @@ fvp-base:
     matrix:
       - TS: [none, fvp-base-ts]
         TESTING: testimage
-      - FIRMWARE: edk2
+      - FIRMWARE: [u-boot, edk2]
+        TESTING: testimage
       - SYSTEMREADY_FIRMWARE: arm-systemready-firmware
 
-arm-systemready-ir-acs:
-  extends: .build
-  timeout: 12h
-  parallel:
-    matrix:
-      # arm-systemready-ir-acs must be specified after fvp-base for ordering
-      # purposes for the jobs-to-kas output. It is not enough to just have it
-      # in the job name because fvp-base.yml overwrites the target.
-      - PLATFORM: [fvp-base, corstone1000-fvp]
-        ARM_SYSTEMREADY_IR_ACS: arm-systemready-ir-acs
-  tags:
-    - ${ACS_TAG}
-
 fvps:
   extends: .build
 
@@ -247,14 +250,13 @@ musca-b1:
 musca-s1:
   extends: .build
 
-n1sdp:
-  extends: .build
-  parallel:
-    matrix:
-      - TESTING: [none, n1sdp-ts, n1sdp-optee, tftf]
-
 pending-updates:
   extends: .setup
+  # Only run this job for the default branch (master), or if forced with
+  # BUILD_FORCE_PENDING_UPDATES.
+  rules:
+    - if: $CI_COMMIT_BRANCH == $CI_DEFAULT_BRANCH
+    - if: $BUILD_FORCE_PENDING_UPDATES != null
   artifacts:
     paths:
       - update-report
@@ -263,9 +265,6 @@ pending-updates:
     # This configuration has all of the layers we need enabled
     - kas shell --update --force-checkout ci/qemuarm64.yml:ci/meta-openembedded.yml:ci/meta-secure-core.yml:lockfile.yml --command \
       "$CI_PROJECT_DIR/scripts/machine-summary.py -t report -o $CI_PROJECT_DIR/update-report $($CI_PROJECT_DIR/ci/listmachines.py meta-arm meta-arm-bsp)"
-  # Do this on x86 whilst the compilers are x86-only
-  tags:
-    - x86_64
 
 qemuarm64-secureboot:
   extends: .build
@@ -276,6 +275,10 @@ qemuarm64-secureboot:
         TCLIBC: [glibc, musl]
         TS: [none, qemuarm64-secureboot-ts]
         TESTING: testimage
+      - TOOLCHAINS: [gcc, clang]
+        TS: [none, qemuarm64-secureboot-ts]
+        UEFISB: [none, uefi-secureboot]
+        TESTING: testimage
       - KERNEL: linux-yocto-dev
         TESTING: testimage
 
@@ -302,7 +305,7 @@ qemuarm-secureboot:
         TOOLCHAINS: [gcc, clang]
         TCLIBC: [glibc, musl]
         TESTING: testimage
-      - TOOLCHAINS: external-gccarm
+      - DISTRO: [poky, poky-altcfg]
         TESTING: testimage
       - KERNEL: linux-yocto-dev
         TESTING: testimage
@@ -339,6 +342,8 @@ sbsa-ref:
       - KERNEL: [linux-yocto, linux-yocto-rt]
         TOOLCHAINS: [gcc, clang]
         TESTING: testimage
+      - DISTRO: poky-altcfg
+        TESTING: testimage
       - KERNEL: linux-yocto-dev
         TESTING: testimage
 
@@ -350,6 +355,12 @@ selftest:
 
 sgi575:
   extends: .build
+  parallel:
+    matrix:
+      - TESTING: testimage
+  # FVP binary is x86-only
+  tags:
+    - x86_64
 
 toolchains:
   extends: .build

0001-procps-fix-build-with-new-glibc-but-old-kernel-heade.patch

@@ -1,79 +0,0 @@
-From 42358d889ed652a8c386862f8c65e5fbe7484de2 Mon Sep 17 00:00:00 2001
-From: Ross Burton <ross.burton@arm.com>
-Date: Fri, 26 Apr 2024 10:38:28 +0000
-Subject: [PATCH] procps: fix build with new glibc but old kernel headers
-
-If you're building procps with a newer glibc (with pidfd_open()) but
-older kernel headers (say 4.x, before __NR_pidfd_open) then procps will
-fail to build because of a typo in configure.ac.
-
-Signed-off-by: Ross Burton <ross.burton@arm.com>
----
- .../procps/procps/pidfd.patch                 | 42 +++++++++++++++++++
- meta/recipes-extended/procps/procps_4.0.4.bb  |  1 +
- 2 files changed, 43 insertions(+)
- create mode 100644 meta/recipes-extended/procps/procps/pidfd.patch
-
-diff --git a/meta/recipes-extended/procps/procps/pidfd.patch b/meta/recipes-extended/procps/procps/pidfd.patch
-new file mode 100644
-index 00000000000..f5e8183e547
---- /dev/null
-+++ b/meta/recipes-extended/procps/procps/pidfd.patch
-@@ -0,0 +1,42 @@
-+From c8f625e085b8249cc009e8b19c3a19100217eb35 Mon Sep 17 00:00:00 2001
-+From: Ross Burton <ross.burton@arm.com>
-+Date: Thu, 25 Apr 2024 13:33:15 +0000
-+Subject: [PATCH] Fix pidfd_open detection
-+
-+This check for pidfd_open uses AC_CHECK_FUNC which just runs the specified code, but 
-+src/pgrep.c checks HAVE_PIDFD_OPEN which will only be defined by AC_CHECK_FUNCS.
-+
-+Also pidfd_open is defined in sys/pidfd.h so that needs including.
-+
-+Upstream-Status: Pending
-+Signed-off-by: Ross Burton <ross.burton@arm.com>
-+---
-+
-+diff --git a/configure.ac b/configure.ac
-+index fec27e3f..024731c7 100644
-+--- a/configure.ac
-++++ b/configure.ac
-+@@ -170,7 +170,7 @@ AC_TRY_COMPILE([#include <errno.h>],
-+ 		AC_MSG_RESULT(yes),
-+ 		AC_MSG_RESULT(no))
-+ 
-+-AC_CHECK_FUNC([pidfd_open], [enable_pidwait=yes], [
-++AC_CHECK_FUNCS([pidfd_open], [enable_pidwait=yes], [
-+   AC_MSG_CHECKING([for __NR_pidfd_open])
-+   AC_COMPILE_IFELSE([AC_LANG_SOURCE([
-+ #include <sys/syscall.h>
-+diff --git a/src/pgrep.c b/src/pgrep.c
-+index d8e57dff..c5211aec 100644
-+--- a/src/pgrep.c
-++++ b/src/pgrep.c
-+@@ -44,7 +44,9 @@
-+
-+ #ifdef ENABLE_PIDWAIT
-+ #include <sys/epoll.h>
-+-#ifndef HAVE_PIDFD_OPEN
-++#ifdef HAVE_PIDFD_OPEN
-++#include <sys/pidfd.h>
-++#else
-+ #include <sys/syscall.h>
-+ #endif /* !HAVE_PIDFD_OPEN */
-+ #endif
-diff --git a/meta/recipes-extended/procps/procps_4.0.4.bb b/meta/recipes-extended/procps/procps_4.0.4.bb
-index 800384f22f7..ec8c4b0261b 100644
---- a/meta/recipes-extended/procps/procps_4.0.4.bb
-+++ b/meta/recipes-extended/procps/procps_4.0.4.bb
-@@ -14,6 +14,7 @@ inherit autotools gettext pkgconfig update-alternatives
- 
- SRC_URI = "git://gitlab.com/procps-ng/procps.git;protocol=https;branch=master \
-            file://sysctl.conf \
-+           file://pidfd.patch \
-            "
- SRCREV = "4ddcef2fd843170c8e2d59a83042978f41037a2b"
- 
--- 
-2.34.1
-

README.md

@@ -8,7 +8,7 @@ This repository contains the Arm layers for OpenEmbedded.
 
 * meta-arm-bsp
 
-  This layer contains machines for Arm reference platforms, for example FVP Base, N1SDP, and Juno.
+  This layer contains machines for Arm reference platforms, for example FVP Base, Corstone1000, and Juno.
 
 * meta-arm-toolchain
 
@@ -19,19 +19,23 @@ Other Directories
 
 * ci
 
-  This directory contains gitlab continuous integration configuration files (KAS yaml files) as well as scripts needed for this
+  This directory contains gitlab continuous integration configuration files (KAS yaml files) as well as scripts needed for this.
+
+* documentation
+
+  This directory contains information on the files in this repository, building, and other relevant documents.
 
 * kas
 
-  This directory contains KAS yaml files to describe builds for systems not used in CI
+  This directory contains KAS yaml files to describe builds for systems not used in CI.
 
 * scripts
 
-  This directory contains scripts used in running the CI tests
+  This directory contains scripts used in running the CI tests.
 
 Mailing List
 ------------
-To interact with the meta-arm developer community, please email the meta-arm mailing list at meta-arm@lists.yoctoproject.org
+To interact with the meta-arm developer community, please email the meta-arm mailing list at <meta-arm@lists.yoctoproject.org>.
 Currently, it is configured to only allow emails to members from those subscribed.
 To subscribe to the meta-arm mailing list, please go to
 https://lists.yoctoproject.org/g/meta-arm
@@ -42,32 +46,51 @@ Currently, we only accept patches from the meta-arm mailing list.  For general
 information on how to submit a patch, please read
 https://www.openembedded.org/wiki/How_to_submit_a_patch_to_OpenEmbedded
 
-E-mail meta-arm@lists.yoctoproject.org with patches created using this process. You can configure git-send-email to automatically use this address for the meta-arm repository with the following git command:
+E-mail <meta-arm@lists.yoctoproject.org> with patches created using this process. You can configure git-send-email to automatically use this address for the meta-arm repository with the following git command:
 
-$ git config --local --add sendemail.to meta-arm@lists.yoctoproject.org
+`$ git config --local --add sendemail.to meta-arm@lists.yoctoproject.org`
 
 Commits and patches added should follow the OpenEmbedded patch guidelines:
 
 https://www.openembedded.org/wiki/Commit_Patch_Message_Guidelines
 
 The component being changed in the shortlog should be prefixed with the layer name (without the meta- prefix), for example:
+>  arm-bsp/trusted-firmware-a: decrease frobbing level
 
-  arm-bsp/trusted-firmware-a: decrease frobbing level
+>  arm-toolchain/gcc: enable foobar v2
 
-  arm-toolchain/gcc: enable foobar v2
+All contributions are under the [MIT License](/COPYING.MIT).
+
+For a quick start guide on how to build and use meta-arm, go to [quick-start.md](/documentation/quick-start.md).
+
+For information on the continuous integration done on meta-arm and how to use it, go to [continuous-integration-and-kas.md](/documentation/continuous-integration-and-kas.md).
+
+Backporting
+--------------
+Backporting patches to older releases may be done upon request, but only after a version of the patch has been accepted into the master branch.  This is done by adding the branch name to email subject line.  This should be between the square brackets (e.g., "[" and "]"), and before or after the "PATCH".  For example,
+> [nanbield PATCH] arm/linux-yocto: backport patch to fix 6.5.13 networking issues
+
+Automatic backporting will be done to all branches if the "Fixes: <SHA>" wording is added to the patch commit message.  This is similar to how the Linux kernel community does their LTS kernel backporting.  For more information see the "Fixes" portion of
+https://www.kernel.org/doc/html/latest/process/submitting-patches.html#submittingpatches
 
 Releases and Release Schedule
 --------------
 We follow the Yocto Project release methodology, schedule, and stable/LTS support timelines.  For more information on these, please reference:
-https://docs.yoctoproject.org/ref-manual/release-process.html
-https://wiki.yoctoproject.org/wiki/Releases
-https://wiki.yoctoproject.org/wiki/Stable_Release_and_LTS
+* https://docs.yoctoproject.org/ref-manual/release-process.html
+* https://wiki.yoctoproject.org/wiki/Releases
+* https://wiki.yoctoproject.org/wiki/Stable_Release_and_LTS
+
+For more in-depth information on the meta-arm release and branch methodology, go to </documentation/releases.md>.
 
 Reporting bugs
 --------------
-E-mail meta-arm@lists.yoctoproject.org with the error encountered and the steps
+E-mail <meta-arm@lists.yoctoproject.org> with the error encountered and the steps
 to reproduce the issue.
 
+Security and Reporting Security Issues
+--------------
+For information on the security of meta-arm and how to report issues, please consult [SECURITY.md](/SECURITY.md).
+
 Maintainer(s)
 -------------
 * Jon Mason <jon.mason@arm.com>

SECURITY.md

@@ -18,7 +18,7 @@ number), please contact the meta-arm mailing list at
 meta-arm@lists.yoctoproject.org and arm-security@arm.com.
 
 If you are dealing with a not-yet released or urgent issue, please send a mail
-to the maintainers (see README.md) and arm-security@arm.com, including as much
+to the maintainers \(see [README.md](/README.md)\) and arm-security@arm.com, including as much
 detail as possible.  Encrypted emails using PGP are welcome.
 
 For more information, please visit https://developer.arm.com/support/arm-security-updates/report-security-vulnerabilities.
@@ -27,11 +27,20 @@ For more information, please visit https://developer.arm.com/support/arm-securit
 ## Branches maintained with security fixes
 
 meta-arm follows the Yocto release model, so see
-[https://wiki.yoctoproject.org/wiki/Stable_Release_and_LTS Stable release and
-LTS] for detailed info regarding the policies and maintenance of stable
+[Stable release and LTS](https://wiki.yoctoproject.org/wiki/Stable_Release_and_LTS)
+for detailed info regarding the policies and maintenance of stable
 branches.
 
-The [https://wiki.yoctoproject.org/wiki/Releases Release page] contains a list of all
+The [Release page](https://wiki.yoctoproject.org/wiki/Releases) contains a list of all
 releases of the Yocto Project. Versions in grey are no longer actively maintained with
 security patches, but well-tested patches may still be accepted for them for
 significant issues.
+
+
+# Disclaimer
+
+Arm reference solutions are Arm public example software projects that track and
+pull upstream components, incorporating their respective security fixes
+published over time. Arm partners are responsible for ensuring that the
+components they use contain all the required security fixes, if and when they
+deploy a product derived from Arm reference solutions.

ci/arm-systemready-ir-acs.yml

@@ -16,3 +16,4 @@ target:
   - arm-systemready-ir-acs
   - arm-systemready-linux-distros-debian
   - arm-systemready-linux-distros-opensuse
+  - arm-systemready-linux-distros-fedora

ci/base.yml

@@ -7,7 +7,7 @@ distro: poky
 
 defaults:
   repos:
-    branch: scarthgap
+    branch: walnascar
 
 repos:
   meta-arm:
@@ -17,14 +17,10 @@ repos:
       meta-arm-toolchain:
 
   poky:
-    url: https://git.yoctoproject.org/git/poky
+    url: https://git.yoctoproject.org/poky
     layers:
       meta:
       meta-poky:
-    patches:
-      procps:
-        path: 0001-procps-fix-build-with-new-glibc-but-old-kernel-heade.patch
-        repo: meta-arm
 
 env:
   BB_LOGCONFIG: ""
@@ -33,6 +29,7 @@ env:
 local_conf_header:
   base: |
     CONF_VERSION = "2"
+    BB_SERVER_TIMEOUT = "300"
   setup: |
     PACKAGE_CLASSES = "package_ipk"
     PACKAGECONFIG:remove:pn-qemu-system-native = "gtk+ sdl"

ci/clang.yml

@@ -10,12 +10,3 @@ repos:
 local_conf_header:
   toolchain: |
     TOOLCHAIN = "clang"
-    PREFERRED_PROVIDER_llvm = "clang"
-    PREFERRED_PROVIDER_llvm-native = "clang-native"
-    PREFERRED_PROVIDER_nativesdk-llvm = "nativesdk-clang"
-    PROVIDES:pn-clang = "llvm"
-    PROVIDES:pn-clang-native = "llvm-native"
-    PROVIDES:pn-nativesdk-clang = "nativesdk-llvm"
-    # This is needed to stop bitbake getting confused about what clang/llvm is
-    # being used, see https://github.com/kraj/meta-clang/pull/766
-    BBMASK += "/meta/recipes-devtools/llvm/llvm.*\.bb"

ci/debug.yml

@@ -5,5 +5,5 @@ header:
 
 # Add universally helpful features when testing boards
 local_conf_header:
-  debug: |
-    EXTRA_IMAGE_FEATURES:append = " debug-tweaks"
+  rootlogin: |
+    EXTRA_IMAGE_FEATURES:append = " allow-empty-password empty-root-password allow-root-login"

ci/edk2.yml

@@ -15,5 +15,3 @@ local_conf_header:
 
     QB_DEFAULT_BIOS = "QEMU_EFI.fd"
     WKS_FILE ?= "efi-disk.wks.in"
-  failing_tests: |
-    TEST_SUITES:remove = "xorg"

ci/external-gccarm.yml

@@ -1,13 +0,0 @@
-# yaml-language-server: $schema=https://raw.githubusercontent.com/siemens/kas/master/kas/schema-kas.json
-
-header:
-  version: 14
-
-local_conf_header:
-  cc: |
-    SKIP_RECIPE[gcc-cross-arm] = "Using external toolchain"
-    TCMODE = "external-arm"
-    EXTERNAL_TOOLCHAIN = "${TOPDIR}/toolchains/${TARGET_ARCH}"
-    # Disable ptest as this pulls target compilers, which don't
-    # work with external toolchain currently
-    DISTRO_FEATURES:remove = "ptest"

ci/fvp-base.yml

@@ -9,5 +9,5 @@ header:
 machine: fvp-base
 
 target:
-  - core-image-sato
+  - core-image-full-cmdline
   - boot-wrapper-aarch64

ci/fvp.yml

@@ -7,8 +7,3 @@ local_conf_header:
   testimagefvp: |
     LICENSE_FLAGS_ACCEPTED += "Arm-FVP-EULA"
     IMAGE_CLASSES += "fvpboot"
-  failing_tests: |
-    # This fails but we can't add to the ignorelist from meta-arm yet
-    # https://bugzilla.yoctoproject.org/show_bug.cgi?id=14604
-    TEST_SUITES:remove = "parselogs"
-    TEST_SUITES:remove = "xorg"

ci/fvps.yml

@@ -19,8 +19,13 @@ target:
   # Target packages to test aarch64
   - fvp-base-a-aem
   - fvp-corstone1000
+  - fvp-rd1-ae
+  - fvp-v3-r1
   # Nativesdk to test x86-64
   - nativesdk-fvp-base-a-aem
   - nativesdk-fvp-corstone1000
-  - nativesdk-fvp-n1-edge
+  - nativesdk-fvp-rd1-ae
+  - nativesdk-fvp-v3-r1
+  # These are x86 only... :(
   - nativesdk-fvp-sgi575
+  - nativesdk-fvp-tc3

ci/genericarm64.yml

@@ -14,5 +14,8 @@ local_conf_header:
   bootloader: |
     # If running genericarm64 in a qemu we need to manually build the bootloader
     EXTRA_IMAGEDEPENDS += "virtual/bootloader"
+  sshpregen: |
+    # Allow the use of the pregen keys as this is CI so safe
+    COMPATIBLE_MACHINE:pn-ssh-pregen-hostkeys:genericarm64 = "genericarm64"
 
 machine: genericarm64

ci/get-binary-toolchains

@@ -1,51 +0,0 @@
-#!/bin/bash
-set -u -e
-
-BASENAME=arm-gnu-toolchain
-VER=${VER:-13.2.Rel1}
-HOST_ARCH=${HOST_ARCH:-$(uname -m)}
-
-# Use the standard kas container locations if nothing is passed into the script
-DOWNLOAD_DIR="${1:-/builds/persist/downloads/}"
-TOOLCHAIN_DIR="${2:-/builds/persist//toolchains/}"
-TOOLCHAIN_LINK_DIR="${3:-build/toolchains/}"
-
-# These should be already created by .gitlab-ci.yml, but do here if run outside of that env
-mkdir -p $DOWNLOAD_DIR $TOOLCHAIN_DIR $TOOLCHAIN_LINK_DIR
-
-download() {
-	TRIPLE=$1
-	URL=https://developer.arm.com/-/media/Files/downloads/gnu/$VER/binrel/$BASENAME-$VER-$HOST_ARCH-$TRIPLE.tar.xz
-	wget -P $DOWNLOAD_DIR -nc $URL
-}
-
-if [ $HOST_ARCH = "aarch64" ]; then
-	# AArch64 Linux hosted cross compilers
-
-	# AArch32 target with hard float
-	download arm-none-linux-gnueabihf
-elif [ $HOST_ARCH = "x86_64" ]; then
-	# x86_64 Linux hosted cross compilers
-
-	# AArch32 target with hard float
-	download arm-none-linux-gnueabihf
-
-	# AArch64 GNU/Linux target
-	download aarch64-none-linux-gnu
-else
-	echo "ERROR - Unknown build arch of $HOST_ARCH"
-	exit 1
-fi
-
-for i in arm aarch64; do
-	if [ ! -d $TOOLCHAIN_DIR/$BASENAME-$VER-$HOST_ARCH-$i-none-linux-gnu*/ ]; then
-		if [ ! -f $DOWNLOAD_DIR/$BASENAME-$VER-$HOST_ARCH-$i-none-linux-gnu*.tar.xz ]; then
-			continue
-		fi
-
-		tar -C $TOOLCHAIN_DIR -axvf $DOWNLOAD_DIR/$BASENAME-$VER-$HOST_ARCH-$i-none-linux-gnu*.tar.xz
-	fi
-
-	# Setup a link for the toolchain to use local to the building machine (e.g., not in a shared location)
-	ln -s $TOOLCHAIN_DIR/$BASENAME-$VER-$HOST_ARCH-$i-none-linux-gnu* $TOOLCHAIN_LINK_DIR/$i
-done

ci/junit.sh

@@ -0,0 +1,15 @@
+#! /bin/bash
+
+# $ ci/junit.sh <build directory>
+#
+# If there is a OEQA test report in JSON format present in the build directory,
+# transform it to JUnit XML using resulttool.
+
+set -e -u
+
+BUILDDIR=$1
+JSON=$BUILDDIR/tmp/log/oeqa/testresults.json
+
+if test -f $JSON; then
+    resulttool junit $JSON
+fi

ci/n1sdp-optee.yml

@@ -1,14 +0,0 @@
-# yaml-language-server: $schema=https://raw.githubusercontent.com/siemens/kas/master/kas/schema-kas.json
-
-header:
-  version: 14
-
-# Config specific for the optee-xtests
-local_conf_header:
-  optee-test: |
-    # Include ARM FFA
-    MACHINE_FEATURES:append = " arm-ffa"
-    # Include trusted services
-    TEST_SUITES:append = " trusted_services"
-    # Include Optee xtests
-    IMAGE_INSTALL:append = " optee-test"

ci/n1sdp-ts.yml

@@ -1,16 +0,0 @@
-# yaml-language-server: $schema=https://raw.githubusercontent.com/siemens/kas/master/kas/schema-kas.json
-
-header:
-  version: 14
-  includes:
-    - ci/meta-openembedded.yml
-
-local_conf_header:
-  trusted_services: |
-    TEST_SUITES:append = " trusted_services"
-    # Include TS Crypto, TS Protected Storage, TS Internal and Trusted Storage SPs into optee-os image
-    MACHINE_FEATURES:append = " arm-ffa ts-crypto ts-storage ts-its"
-    # Include TS demo/test tools into image
-    IMAGE_INSTALL:append = " packagegroup-ts-tests"
-    # Include TS PSA Arch tests into image
-    IMAGE_INSTALL:append = " packagegroup-ts-tests-psa"

ci/poky-altcfg.yml

@@ -0,0 +1,4 @@
+header:
+  version: 14
+
+distro: poky-altcfg

ci/qemuarm64-secureboot-ts.yml

@@ -8,8 +8,9 @@ header:
 local_conf_header:
   trusted_services: |
     TEST_SUITES:append = " trusted_services"
-    # Include TS Crypto, TS Protected Storage, TS Internal Trusted Storage and SMM-Gateway SPs into optee-os image
-    MACHINE_FEATURES:append = " arm-ffa ts-crypto ts-storage ts-its ts-smm-gateway"
+    # Include TS Crypto, TS Protected Storage, and TS Internal Trusted Storage and SPs into optee-os image
+    # FIXME - remove TS SMM Gateway due to QEMU v9.0.0 test failures
+    MACHINE_FEATURES:append = " arm-ffa ts-crypto ts-storage ts-its"
     # Include TS demo/test tools into image
     IMAGE_INSTALL:append = " packagegroup-ts-tests"
     # Include TS PSA Arch tests into image

ci/secure-debug.yml

@@ -2,11 +2,7 @@
 
 header:
   version: 14
-  includes:
-    - ci/base.yml
-
-machine: n1sdp
 
 local_conf_header:
-  unsupported_trusted_services: |
-    MACHINE_FEATURES:remove = "ts-smm-gateway"
+  secure-debug: |
+    MACHINE_FEATURES += "secure-debug"

ci/sgi575.yml

@@ -4,5 +4,11 @@ header:
   version: 14
   includes:
     - ci/base.yml
+    - ci/fvp.yml
+
+local_conf_header:
+  sshpregen: |
+    # Allow the use of the pregen keys as this is CI so safe
+    COMPATIBLE_MACHINE:pn-ssh-pregen-hostkeys:sgi575 = "sgi575"
 
 machine: sgi575

ci/sstate-mirror.yml

@@ -5,7 +5,7 @@ header:
 
 local_conf_header:
   sstate_mirror: |
-    BB_HASHSERVE_UPSTREAM = "hashserv.yocto.io:8687"
+    BB_HASHSERVE_UPSTREAM = "wss://hashserv.yoctoproject.org/ws"
     SSTATE_MIRRORS = "file://.* http://cdn.jsdelivr.net/yocto/sstate/all/PATH;downloadfilename=PATH"
     BB_HASHSERVE = "auto"
     BB_SIGNATURE_HANDLER = "OEEquivHash"

ci/uefi-secureboot.yml

@@ -0,0 +1,51 @@
+# yaml-language-server: $schema=https://raw.githubusercontent.com/siemens/kas/master/kas/schema-kas.json
+
+# UEFI Secure Boot: A mechanism to ensure that only trusted software is executed
+# during the boot process.
+
+header:
+  version: 14
+  includes:
+    - ci/meta-openembedded.yml
+    - ci/meta-secure-core.yml
+
+local_conf_header:
+  uefi_secureboot: |
+    SBSIGN_KEYS_DIR = "${TOPDIR}/sbkeys"
+    BB_ENV_PASSTHROUGH_ADDITIONS = "SBSIGN_KEYS_DIR"
+
+    # Detected by passing kernel parameter
+    QB_KERNEL_ROOT = ""
+
+    # kernel is in the image, should not be loaded separately
+    QB_DEFAULT_KERNEL = "none"
+
+    WKS_FILE = "efi-disk.wks.in"
+    KERNEL_IMAGETYPE = "Image"
+
+    MACHINE_FEATURES:append = " efi uefi-secureboot uefi-http-boot uefi-capsule-updates"
+
+    EFI_PROVIDER = "systemd-boot"
+
+    # Use systemd as the init system
+    INIT_MANAGER = "systemd"
+
+    IMAGE_INSTALL:append = " systemd systemd-boot util-linux coreutils"
+
+    TEST_SUITES:append = " uefi_secureboot uki"
+
+    IMAGE_CLASSES += "uki"
+
+    IMAGE_CLASSES += "sbsign"
+    UKI_SB_KEY = "${SBSIGN_KEY}"
+    UKI_SB_CERT = "${SBSIGN_CERT}"
+    QB_KERNEL_ROOT = ""
+    IMAGE_BOOT_FILES:remove = "Image"
+
+    INITRAMFS_IMAGE = "core-image-initramfs-boot"
+    # not for initramfs image recipe
+    IMAGE_CLASSES:remove:pn-core-image-initramfs-boot = "uki"
+    IMAGE_CLASSES:remove:pn-core-image-initramfs-boot = "sbsign"
+    IMAGE_CLASSES:remove:pn-core-image-initramfs-boot = "testimage"
+    IMAGE_FEATURES:remove:pn-core-image-initramfs-boot = "ssh-server-dropbear"
+    CORE_IMAGE_EXTRA_INSTALL:remove:pn-core-image-initramfs-boot = "ssh-pregen-hostkeys"

ci/update-repos

@@ -20,9 +20,9 @@ def repo_shortname(url):
             .replace('*', '.'))
 
 repositories = (
-    "https://git.yoctoproject.org/git/poky",
+    "https://git.yoctoproject.org/poky",
     "https://git.openembedded.org/meta-openembedded",
-    "https://git.yoctoproject.org/git/meta-virtualization",
+    "https://git.yoctoproject.org/meta-virtualization",
     "https://github.com/kraj/meta-clang",
 )
 
@@ -44,7 +44,7 @@ if __name__ == "__main__":
         if repodir.exists():
             try:
                 print("Updating %s..." % repo)
-                subprocess.run(["git", "-C", repodir, "-c", "gc.autoDetach=false", "fetch"], check=True)
+                subprocess.run(["git", "-C", repodir, "-c", "gc.autoDetach=false", "fetch", repo], check=True)
             except subprocess.CalledProcessError as e:
                 print(e)
                 failed = True

ci/xen.yml

@@ -4,10 +4,13 @@ header:
   version: 14
   includes:
     - ci/meta-virtualization.yml
+    - ci/poky-altcfg.yml
 
 local_conf_header:
   meta-virt: |
     DISTRO_FEATURES:append = " virtualization xen"
+  sshd: |
+    IMAGE_FEATURES:append = " ssh-server-openssh"
 
 target:
   - xen-image-minimal

documentation/continuous-integration-and-kas.md

@@ -0,0 +1,67 @@
+# **CI for Yocto Project and meta-arm**
+# **CI for Yocto Project**
+The Yocto Project has an autobuilder that performs nightly builds and image tests on all of the defined QEMU machines, including qemuarm and qemuarm64  Also, it currently runs builds on the hardware reference platforms including genericarm64 and meta-arm mahines fvp-base and sbsa-ref.  More information on the autobuilder can be found at <https://autobuilder.yoctoproject.org/>.
+
+More information on the image tests can be found at <https://wiki.yoctoproject.org/wiki/Image_tests>.
+
+The Yocto Project also has the ability to have individual package tests, ptests.  For more information on those, go to <https://wiki.yoctoproject.org/wiki/Ptest>.
+# **CI for meta-arm**
+meta-arm is using the Gitlab CI infrastructure.  This is currently being done internal to Arm, but an external version can be seen at <https://gitlab.com/jonmason00/meta-arm/-/pipelines>.
+
+This CI is constantly being expanded to provide increased coverage of the software and hardware supported in meta-arm.  All platforms are required to add a kas file and `.gitlab-ci.yml` entry as part of the initial patch series.  More information on kas can be found at <https://github.com/siemens/kas>.
+
+To this end, it would be wise to run kas locally to verify everything works prior to pushing to the CI build system.
+## **Running kas locally**
+### **Install kas**
+kas can be installed with pip, for example:
+```
+$ pip3 install --user kas
+```
+
+See <https://kas.readthedocs.io/en/latest/userguide/getting-started.html> for information on the dependencies and more.
+
+This assumes that the kas path ($HOME/.local/bin) is in $PATH.  If not, the user will need to manually add this or the kas command will not be found.
+
+### **Run kas locally**
+```
+$ cd ~/meta-arm/
+$ kas build kas/juno.yml
+```
+
+By default kas will create a build directory under meta-arm to contain the checked out layers, build directory, and downloads.  You can change this by setting environment variables.  DL\_DIR and SSTATE\_DIR are respected so these can point at existing directories, and setting KAS\_WORK\_DIR to the directory where repositories are already cloned will save having to re-fetch.  This can look something like:
+```
+$ SSTATE_DIR=/builds/persist/sstate DL_DIR=/builds/persist/downloads kas build ci/qemuarm64.yml:ci/testimage.yml
+```
+
+See the [quick start guide](/documentation/quick-start.md) for more information on how to set this up.
+
+## **Locked Revisions in CI with lockfiles**
+The CI in meta-arm will generate a kas "lock file" when it starts to ensure that all of the builds checkout the same revision of the various different layers that are used. If this isn't done then there's a chance that a layer will be modified upstream during the CI, which results in some builds failing and some builds passing.
+
+This lock file is saved as an artefact of the update-repos job by the CI, and only generated if it doesn't already exist in the repository.  This can be used to force specific revisions of layers to be used instead of HEAD, which can be useful if upstream changes are causing problems in development.
+
+The lockfile.yml can be downloaded manually, but there's a script in meta-arm to fetch the lock file for the latest successful build of the specified branch:
+
+```
+$ ./ci/download-lockfile.py --help
+usage: download-lockfile.py [-h] server project refspec
+
+positional arguments:
+  server      GitLab server name
+  project     meta-arm project name
+  refspec     Branch/commit
+
+$ ./ci/download-lockfile.py https://gitlab.com/jonmason00/meta-arm master
+Fetched lockfile.yml
+Commit this lockfile.yml to the top-level of the meta-arm repository and the CI will use it automatically.
+```
+# **Relevant Links for kas, CI, and testing**
+<https://github.com/siemens/kas.git>
+
+<https://wiki.yoctoproject.org/wiki/Oe-selftest>
+
+<https://wiki.yoctoproject.org/wiki/Image_tests>
+
+<https://wiki.yoctoproject.org/wiki/Ptest>
+
+<https://wiki.yoctoproject.org/wiki/BSP_Test_Plan>

documentation/quick-start.md

@@ -0,0 +1,105 @@
+# **Yocto Project quick start for Arm system software developers**
+If you want to read the The Yocto Project official quick start documentation, go to <https://docs.yoctoproject.org/brief-yoctoprojectqs/index.html>
+
+If that looks like too much reading, then here is how to do it even faster!
+# **Step 0: Install build deps and kas**
+```
+$ sudo apt install gawk wget git diffstat unzip texinfo gcc build-essential chrpath socat cpio python3 python3-pip python3-pexpect xz-utils debianutils iputils-ping python3-git python3-jinja2 libegl1-mesa libsdl1.2-dev python3-subunit mesa-common-dev zstd liblz4-tool file locales libacl1
+
+$ pip install kas
+```
+OR, if you prefer to use a docker will all that stuff already installed:
+
+```
+$ sudo docker run -it --name kas-test --volume /mnt/yocto/:/builds/persist ghcr.io/siemens/kas/kas /bin/bash
+```
+
+> **_NOTE:_**
+> the “--volume” is the directory where your persistent stuff (like downloads and build artifacts) will go to help speed up your builds and can be sharable amongst your builds/containers.  If you want to go completely clean-room, feel free to remove it
+# **Step 1: clone meta-arm and build meta-arm**
+```
+$ git clone https://git.yoctoproject.org/meta-arm
+$ cd meta-arm/
+$ SSTATE_DIR=/builds/persist/sstate DL_DIR=/builds/persist/downloads kas build ci/fvp-base.yml:ci/testimage.yml
+```
+> **_NOTE:_**
+> “ci/testimage.yml” will cause the build to run some basic system tests.  If you don’t care about verifying basic functionality, then remove it and it should be faster (a few less programs will be added to the system image and the 2-3mins that it takes to run the test will not happen).
+
+> **_NOTE:_**
+> You may wish to add the Yocto Project SSTATE Mirror (especially the first time) to speed up the build by downloading the build fragments (built by the Yocto Project autobuilder) from the internet.  This can be done by adding "ci/sstate-mirror.yml" in kas or adding the relevant lines to your local.conf.  Using the above example:
+
+```
+$ SSTATE_DIR=/builds/persist/sstate DL_DIR=/builds/persist/downloads kas build ci/fvp-base.yml:ci/sstate-mirror.yml
+```
+
+> **_NOTE:_**
+> This only fetches the parts necessary for your build and may take several minutes depending on your internet connection speed.  Also, it only fetches what is available.  There may still be a need to build things depending on your configuration.
+
+For more information on kas and various commands, please reference <https://kas.readthedocs.io/en/latest/>.
+
+Depending on what software you are building, fvp-base might not be the machine you want to build for.
+The following website provides an EXTREMELY rough way to tell what software is in what machines, and what versions are being run:
+<https://gitlab.com/jonmason00/meta-arm/-/jobs/artifacts/master/file/update-report/index.html?job=pending-updates>
+
+If, as an example, we’re wanting to develop trusted-firmware-a; then fvp-base will work for us. 
+
+### **Okay, you are done!  VICTORY!**
+### **Oh, you actually wanted to mess around with the system software source code?**
+# **Step 2: use devtool to get your source**
+Setup your environment via the (non-kas) Yocto Project tools
+
+```
+$ source poky/oe-init-build-env
+```
+
+Use devtool to checkout the version of software being used on the machine above (in the above example, this will be trusted-firmware-a for fvp-base).
+
+```
+$ devtool modify trusted-firmware-a
+```
+
+This will download the source, hopefully in git (depending on how the Yocto Project recipe was written), and should print a path at the end where the source code was checked out.  In the trusted-firmware-a example, I got:
+
+> /builder/meta-arm/build/workspace/sources/trusted-firmware-a
+
+Inside of that directory, you should see the relevant source code.  In this example, it is a standard git tree.  So, you can add remotes, checkout different SHAs, etc
+
+Ok, so you are set with your changes and want to build them.
+
+```
+$ devtool build trusted-firmware-a
+```
+
+This should build the software in question, but it is not yet integrated into a system image.  To do that, run:
+
+```
+$ devtool build-image core-image-sato
+```
+
+The image should match the image being used on your machine above.  Most of them in meta-arm are set to core-image-sato.  
+
+Also, if you used testimage above, it will run testimage now
+### **Okay, you are done!  VICTORY!**
+# **Step 3.  Testing your patches outside of devtool**
+At this point I will assume you have a patch and want to add it to the base recipe.  Using the above example, in the devtool directory:
+```
+$ git format-patch -1
+0001-example.patch
+$ mv 0001-example.patch ~/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/files/
+$ cd ~/meta-arm
+$ devtool reset trusted-firmware-a
+$ echo ‘SRC_URI:append = " file://0001-example.patch" >> meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.10.3.bb
+```
+
+> **_NOTE:_**
+> there is a space before the “file” and yes it matters very much
+
+At this point, you can go back using kas and verify that the patch works in a clean-ish tree.
+
+```
+$ SSTATE_DIR=/builds/persist/sstate DL_DIR=/builds/persist/downloads kas build ci/fvp-base.yml:ci/testimage.yml
+```
+
+There is obviously much more that can be done and other ways to do similar things.
+
+## **If there are issues or questions then please ask them on the #meta-arm irc channel on libera.chat**

documentation/releases.md

@@ -0,0 +1,43 @@
+# **meta-arm Releases and Branching**
+## **Release and Branching background**
+The Yocto Project releases twice a year (April and October): "stable" releases are made every six months and have a lifetime of seven months to allow for migration, while "long term support" (LTS) releases are picked every two years starting from Dunfell in April 2020. The standard practice for all Yocto Compatible layers is to create a "named" branch consistent with the code name of that release. For example, the “dunfell” release of the Yocto Project will have a branch named “dunfell” in the official git repository, and layers compatible with dunfell will have a branch named “dunfell”. Thus, a customer can easily organize a collection of appropriate layers to make a product.
+
+In the Yocto Project, these named branches are “stable”, and only take bug fixes or security-critical upgrades. Active development occurs on the master branch. However, this methodology can be problematic if mimicked with the compatible layers. Companies, like Arm, may not wish to release a snapshot of the relevant “master” branches under active development, due to the amount of testing, fixing, and hardening necessary to make a product from a non-stable release. Also, changes to keep the master branch of a layer working with the upstream master branch of the Yocto Project may result in that branch no longer being compatible with named branches (e.g., it might not be possible to mix and match master and dunfell). So, a decision must be made on the branching policy of meta-arm.
+
+## **Adding new Hardware or Software features**
+There are many different ways to resolve this issue. After some discussion, the best solution for us is to allow new hardware enablement (and relevant software features) to be included in LTS named branches (not just bug fixes). This will allow for a more stable software platform for software to be developed, tested, and released. Also, the single branch allows for focused testing (limiting the amount of resources needed for CI/CD), lessens/eliminates code diverging on various branches, and lessens confusion on which branch to use. The risk of making this choice is a potentially non-stable branch which will require more frequent testing to lessen the risk, and not following the “stable” methodology of the core Yocto Project layers (though it is not uncommon for BSP layers to behave this way).
+
+## **Process**
+The process for patches intended on being integrated into only the master branch is the normal internal process of pushing for code review and CI, approval and integration into upstream meta-arm master branch. 
+For patches intended on being included in an LTS named branch, the preferred process is to upstream via the master branch, rebase the patch (or series against the intended LTS branch) and send email with the release name in the subject line after the "PATCH" (e.g., "[PATCH dunfell] Add foo to bar").
+
+If there is a time crunch and the preferred way above cannot be completed in time, upstreaming via the LTS branch can occur. This follows the normal process above but without the master integration step.  However, any patches upstreamed in this manner must be pushed to master in a timely fashion (after the time crunch). Nagging emails will be sent and managers will be involved as the time grows.
+
+## **Testing**
+See [continuous-integration-and-kas.md](/documentation/continuous-integration-and-kas.md) for information how the layer is tested and what tests are run. It is presumed that all code will be compiled as part of the CI process of the gerrit code review. Also, testing on virtual platforms and code conformity checks will be run when enabled in the process.
+
+## **Branching strategy and releases**
+Named branches for meta-arm will be released as close as possible to the release of the YP LTS release. Meta-arm named branches will be created from the meta-arm master branch.
+
+To minimize the additional work of maintaining multiple branches it is assumed that there will only be two active development branches at any given time: master and the most recent Long Term Stable (LTS) as the named branch. All previous named LTS branches will be EOLed when a new LTS has been released. Any branches that are EOLed will still exist in the meta-arm, but bug fix patches will be accepted. Limited to no testing will occur on EOL’ed branches. Exceptions to this can be made, but must be sized appropriately and agreed to by the relevant parties.
+
+Named branch release will coincide with Yocto Project releases. These non-LTS branches will be bug fix only and will be EOLed on the next release (similar to the YP branching behavior).
+
+### **Branch transitions**
+When YP is approaching release, meta-arm will attempt to stabilize master so that the releases can coincide. 
+* T-6 weeks - Email is sent to meta-arm mailing list notifying of upcoming code freeze of features to meta-arm
+* T-4 weeks - Code freeze to meta-arm. Only bug fixes are taken at this point.
+* T-0 - Official upstream release occurs. With no outstanding critical bugs, a new named branch is created based on the current meta-arm master branch. Previous named branches are now frozen and will not accept new patches (but will continue to be present for reference and legacy usage).
+
+## **Tagging**
+### **Branch Tagging**
+When each branch is released, a git tag with the Yocto Project version number will be added.  For example, `4.3`.  Also, this tag version number will be prepended with "yocto" in a duplicate tag (e.g., "yocto-4.3").
+
+Conciding with the Yocto Project release schedule, every branch which has one or more changes added to it in the previous 6 months will get a minor versioned tag (e.g., "4.3.1" and "yocto-4.3.1").
+
+### **BSP Release Tagging**
+BSP releases for those boards supported in meta-arm-bsp maybe have an additional tag to denote their software releases.  The tag will consist of the board name (in all capital letters), year, and month.  For example, "CORSTONE1000-2023.11".
+The release schedule for this is outside the standard Yocto Project release candence, but is generally encouraged to be as close to these releases as possible.  Similarily, it is recommended the BSP releases be based on the latest LTS branch.
+
+# **Relevant Links**
+<https://wiki.yoctoproject.org/wiki/Releases>

documentation/runfvp.md

@@ -4,10 +4,10 @@ The `runfvp` tool in meta-arm makes it easy to run Yocto Project disk images ins
 
 ## Running images with `runfvp`
 
-To build images with the FVP integration, the `fvpboot` class needs to be inherited.  If the machine does not do this explicitly it can be done in `local.conf`:
+To build images with the FVP integration, the `fvpboot` image class needs to be inherited.  If the machine does not do this explicitly it can be done in `local.conf`:
 
 ```
-INHERIT += "fvpboot"
+IMAGE_CLASSES += "fvpboot"
 ```
 
 The class will download the correct FVP and write a `.fvpconf` configuration file when an image is built.

documentation/trusted-services.md

@@ -37,13 +37,11 @@ Other steps depend on your machine/platform definition:
 
 2. optee-os might require platform specific OP-TEE build parameters (for example what SEL the SPM Core is implemented at).
    You can find examples in `meta-arm/recipes-security/optee/optee-os_%.bbappend` for qemuarm64-secureboot machine
-   and in `meta-arm-bsp/recipes-security/optee/optee-os-n1sdp.inc` and `meta-arm-bsp/recipes-security/optee/optee-os-corstone1000-common.inc`
-   for N1SDP and Corstone1000 platforms accordingly.
+   and in `meta-arm-bsp/recipes-security/optee/optee-os-corstone1000-common.inc` for the Corstone1000 platform.
 
 3. trusted-firmware-a might require platform specific TF-A build parameters (SPD and SPMC details on the platform).
    See `meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_%.bbappend` for qemuarm64-secureboot machine
-   and in `meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-n1sdp.inc` and
-   `meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc` for N1SDP and Corstone1000 platforms.
+   and in `meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc` for theCorstone1000 platform.
 
 4. Trusted Services supports an SPMC agonistic binary format. To build SPs to this format the `TS_ENV` variable is to be
    set to `sp`. The resulting SP binaries should be able to boot under any FF-A v1.1 compliant SPMC implementation.

kas/arm-systemready-linux-distros-debian.yml

@@ -2,6 +2,7 @@ header:
   version: 13
   includes:
     - kas/arm-systemready-firmware.yml
+    - kas/arm-systemready-linux-distros-unattended-installation.yml
 
 target:
   - arm-systemready-linux-distros-debian

kas/arm-systemready-linux-distros-fedora.yml

@@ -0,0 +1,8 @@
+header:
+  version: 16
+  includes:
+    - kas/arm-systemready-firmware.yml
+    - kas/arm-systemready-linux-distros-unattended-installation.yml
+
+target:
+  - arm-systemready-linux-distros-fedora

kas/arm-systemready-linux-distros-opensuse.yml

@@ -2,6 +2,7 @@ header:
   version: 13
   includes:
     - kas/arm-systemready-firmware.yml
+    - kas/arm-systemready-linux-distros-unattended-installation.yml
 
 target:
   - arm-systemready-linux-distros-opensuse

kas/arm-systemready-linux-distros-unattended-installation.yml

@@ -0,0 +1,11 @@
+header:
+  version: 16
+
+env:
+  DISTRO_UNATTENDED_INST_TESTS:
+  # The full testimage run typically takes around 12-24h on fvp-base.
+  TEST_OVERALL_TIMEOUT: "${@ 24*60*60}"
+  
+local_conf_header:
+  systemready-unattended-inst: |
+    TESTIMAGE_AUTO = "${@oe.utils.vartrue("DISTRO_UNATTENDED_INST_TESTS", "1", "", d)}"

kas/corstone1000-base.yml

@@ -5,7 +5,7 @@ distro: poky
 
 defaults:
   repos:
-    branch: master
+    branch: walnascar
 
 repos:
   meta-arm:
@@ -16,14 +16,14 @@ repos:
 
   poky:
     url: https://git.yoctoproject.org/git/poky
-    # commit: 2e9c2a2381105f1306bcbcb54816cbc5d8110eff
+    commit: ee0d8d8a61d8e22a3dd00c32cde58ee6e8ec458f
     layers:
       meta:
       meta-poky:
 
   meta-openembedded:
     url: https://git.openembedded.org/meta-openembedded
-    # commit: 1750c66ae8e4268c472c0b2b94748a59d6ef866d
+    commit: 2169c9afcc0945045bea49f58011080942d4ddb4
     layers:
       meta-oe:
       meta-python:
@@ -31,7 +31,7 @@ repos:
 
   meta-secure-core:
     url: https://github.com/wind-river/meta-secure-core.git
-    # commit: e29165a1031dcf601edbed1733cedd64826672a5
+    commit: 423bc85b050594cc42fe3f2e0d0229960e70b94e
     layers:
       meta-secure-core-common:
       meta-signing-key:

kas/corstone1000-extsys.yml

@@ -0,0 +1,6 @@
+header:
+  version: 14
+
+local_conf_header:
+  extsys: |
+    MACHINE_FEATURES += "corstone1000-extsys"

kas/corstone1000-fvp-multicore.yml

@@ -0,0 +1,8 @@
+# yaml-language-server: $schema=https://raw.githubusercontent.com/siemens/kas/master/kas/schema-kas.json
+
+header:
+  version: 14
+
+local_conf_header:
+  fvp-multicore: |
+    MACHINE_FEATURES += "corstone1000_fvp_smp"

kas/corstone1000-fvp.yml

@@ -13,7 +13,6 @@ env:
 
 local_conf_header:
   testimagefvp: |
-    LICENSE_FLAGS_ACCEPTED += "Arm-FVP-EULA"
     IMAGE_CLASSES += "fvpboot"
 
   mass-storage: |

meta-arm-bsp/conf/layer.conf

@@ -9,7 +9,7 @@ BBFILE_COLLECTIONS += "meta-arm-bsp"
 BBFILE_PATTERN_meta-arm-bsp = "^${LAYERDIR}/"
 BBFILE_PRIORITY_meta-arm-bsp = "5"
 
-LAYERSERIES_COMPAT_meta-arm-bsp = "nanbield scarthgap"
+LAYERSERIES_COMPAT_meta-arm-bsp = "styhead walnascar"
 
 LAYERDEPENDS_meta-arm-bsp = "core meta-arm"
 # This won't be used by layerindex-fetch, but works everywhere else
@@ -28,3 +28,5 @@ BBFILES_DYNAMIC += " \
 WARN_QA:append:layer-meta-arm-bsp = " patch-status"
 
 addpylib ${LAYERDIR}/lib oeqa
+
+IMAGE_ROOTFS_EXTRA_ARGS ?= ""

meta-arm-bsp/conf/machine/corstone1000-fvp.conf

@@ -9,7 +9,8 @@ TFM_PLATFORM_IS_FVP = "TRUE"
 
 # testimage config
 TEST_TARGET = "OEFVPTarget"
-TEST_SUITES = "fvp_boot"
+TEST_TARGET_IP = "127.0.0.1:2222"
+DEFAULT_TEST_SUITES:append = " fvp_boot fvp_devices"
 
 # FVP Config
 FVP_PROVIDER ?= "fvp-corstone1000-native"

meta-arm-bsp/conf/machine/fvp-base.conf

@@ -4,22 +4,25 @@
 #@NAME: Armv8-A Base Platform FVP machine
 #@DESCRIPTION: Machine configuration for Armv8-A Base Platform FVP model
 
-require conf/machine/include/arm/arch-armv8-4a.inc
+require conf/machine/include/arm/arch-armv8-5a.inc
 
 ARM_SYSTEMREADY_FIRMWARE = "trusted-firmware-a:do_deploy"
 ARM_SYSTEMREADY_ACS_CONSOLE = "default"
 EXTRA_IMAGEDEPENDS = "${ARM_SYSTEMREADY_FIRMWARE}"
 
-MACHINE_FEATURES = "efi"
+MACHINE_FEATURES = "efi vfat"
 
 IMAGE_NAME_SUFFIX = ""
 IMAGE_FSTYPES += "wic"
 WKS_FILE ?= "efi-disk.wks.in"
 
 SERIAL_CONSOLES = "115200;ttyAMA0"
+# FIXME -  This is being upstreamed.  Remove once that has occurred.
+KERNEL_CONSOLE ?= "${@','.join(d.getVar('SERIAL_CONSOLES').split(' ')[0].split(';')[::-1]) or 'ttyS0'}"
 
 PREFERRED_PROVIDER_virtual/kernel ?= "linux-yocto"
-KERNEL_DEVICETREE = "arm/fvp-base-revc.dtb"
+KERNEL_DTB_NAME = "fvp-base-revc.dtb"
+KERNEL_DEVICETREE = "arm/${KERNEL_DTB_NAME}"
 KERNEL_IMAGETYPE = "Image"
 
 EXTRA_IMAGEDEPENDS += "trusted-firmware-a"
@@ -27,7 +30,7 @@ EXTRA_IMAGEDEPENDS += "trusted-firmware-a"
 # FVP u-boot configuration
 UBOOT_MACHINE = "vexpress_fvp_defconfig"
 
-EFI_PROVIDER ?= "grub-efi"
+EFI_PROVIDER ?= "${@bb.utils.contains("DISTRO_FEATURES", "systemd", "systemd-boot", "grub-efi", d)}"
 
 # As this is a virtual target that will not be used in the real world there is
 # no need for real SSH keys.
@@ -54,12 +57,12 @@ FVP_CONFIG[cluster1.stage12_tlb_size] ?= "1024"
 FVP_CONFIG[bp.secureflashloader.fname] ?= "bl1-fvp.bin"
 FVP_CONFIG[bp.flashloader0.fname] ?= "fip-fvp.bin"
 FVP_CONFIG[bp.virtioblockdevice.image_path] ?= "${IMAGE_NAME}.wic"
-# Set the baseline to ARMv8.4, as the default is 8.0.
-FVP_CONFIG[cluster0.has_arm_v8-4] = "1"
-FVP_CONFIG[cluster1.has_arm_v8-4] = "1"
+# Set the baseline to ARMv8.5, as the default is 8.0.
+FVP_CONFIG[cluster0.has_arm_v8-5] = "1"
+FVP_CONFIG[cluster1.has_arm_v8-5] = "1"
 FVP_CONSOLES[default] = "terminal_0"
 FVP_TERMINALS[bp.terminal_0] ?= "Console"
 FVP_TERMINALS[bp.terminal_1] ?= ""
 FVP_TERMINALS[bp.terminal_2] ?= ""
 FVP_TERMINALS[bp.terminal_3] ?= ""
-FVP_CONFIG[bp.secure_memory] ?= "1"
+FVP_CONFIG[bp.secure_memory] ?= "1"

meta-arm-bsp/conf/machine/include/corstone1000.inc

@@ -3,18 +3,19 @@ require conf/machine/include/arm/armv8a/tune-cortexa35.inc
 MACHINEOVERRIDES =. "corstone1000:"
 
 # TF-M
-PREFERRED_VERSION_trusted-firmware-m ?= "2.0.%"
+PREFERRED_VERSION_trusted-firmware-m ?= "2.1.%"
 
 # TF-A
 TFA_PLATFORM = "corstone1000"
-PREFERRED_VERSION_trusted-firmware-a ?= "2.10.%"
+PREFERRED_VERSION_trusted-firmware-a ?= "2.11.%"
 PREFERRED_VERSION_tf-a-tests ?= "2.10.%"
 
 TFA_BL2_BINARY = "bl2-corstone1000.bin"
 TFA_FIP_BINARY = "fip-corstone1000.bin"
 
 # optee
-PREFERRED_VERSION_optee-os ?= "4.1.%"
+PREFERRED_VERSION_optee-os ?= "4.4.%"
+PREFERRED_VERSION_optee-client ?= "4.4.%"
 
 # Trusted Services
 TS_PLATFORM = "arm/corstone1000"
@@ -34,7 +35,7 @@ IMAGE_CMD:wic[vardeps] += "GRUB_LINUX_APPEND"
 
 # Linux kernel
 PREFERRED_PROVIDER_virtual/kernel ?= "linux-yocto"
-PREFERRED_VERSION_linux-yocto ?= "6.6.%"
+PREFERRED_VERSION_linux-yocto ?= "6.12.%"
 KERNEL_IMAGETYPE = "Image"
 KERNEL_IMAGETYPE:firmware = "Image.gz"
 # add FF-A support in the kernel
@@ -63,3 +64,6 @@ ARM_SYSTEMREADY_FIRMWARE = "${FIRMWARE_DEPLOYMENT}:do_deploy \
                             corstone1000-esp-image:do_image_complete \
                            "
 ARM_SYSTEMREADY_ACS_CONSOLE ?= "default"
+
+# Workaround IMAGE_ROOTFS_EXTRA_SPACE being ignored when images are repacked
+IMAGE_ROOTFS_EXTRA_ARGS += "--extra-space ${@${IMAGE_ROOTFS_EXTRA_SPACE}}K"

meta-arm-bsp/conf/machine/n1sdp.conf

@@ -1,51 +0,0 @@
-# Configuration for Arm N1SDP development board
-
-#@TYPE: Machine
-#@NAME: N1SDP machine
-#@DESCRIPTION: Machine configuration for N1SDP
-
-require conf/machine/include/arm/armv8-2a/tune-neoversen1.inc
-
-KERNEL_IMAGETYPE = "Image"
-
-IMAGE_FSTYPES += "wic wic.gz wic.bmap tar.bz2 ext4"
-
-SERIAL_CONSOLES = "115200;ttyAMA0"
-
-# Set default WKS
-WKS_FILE ?= "n1sdp-efidisk.wks"
-IMAGE_EFI_BOOT_FILES ?= "n1sdp-multi-chip.dtb n1sdp-single-chip.dtb"
-WKS_FILE_DEPENDS:append = " ${EXTRA_IMAGEDEPENDS}"
-
-# Use kernel provided by yocto
-PREFERRED_PROVIDER_virtual/kernel ?= "linux-yocto"
-PREFERRED_VERSION_linux-yocto ?= "6.6%"
-
-# RTL8168E Gigabit Ethernet Controller is attached to the PCIe interface
-MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "linux-firmware-rtl8168"
-
-# TF-A
-EXTRA_IMAGEDEPENDS += "trusted-firmware-a"
-TFA_PLATFORM = "n1sdp"
-PREFERRED_VERSION_trusted-firmware-a ?= "2.10.%"
-PREFERRED_VERSION_tf-a-tests ?= "2.10.%"
-
-# SCP
-EXTRA_IMAGEDEPENDS += "virtual/control-processor-firmware"
-
-#UEFI EDK2 firmware
-EXTRA_IMAGEDEPENDS += "edk2-firmware"
-PREFERRED_VERSION_edk2-firmware ?= "202311"
-
-#optee
-PREFERRED_VERSION_optee-os ?= "4.1.%"
-PREFERRED_VERSION_optee-os-tadevkit ?= "4.1.%"
-PREFERRED_VERSION_optee-test ?= "4.1.%"
-PREFERRED_VERSION_optee-client ?= "4.1.%"
-
-#grub-efi
-EFI_PROVIDER ?= "grub-efi"
-MACHINE_FEATURES += "efi"
-
-# SD-Card firmware
-EXTRA_IMAGEDEPENDS += "sdcard-image-n1sdp"

meta-arm-bsp/conf/machine/sbsa-ref.conf

@@ -26,6 +26,10 @@ EFI_PROVIDER ?= "${@bb.utils.contains("DISTRO_FEATURES", "systemd", "systemd-boo
 SERIAL_CONSOLES ?= "115200;ttyAMA0 115200;hvc0"
 
 EXTRA_IMAGEDEPENDS += "edk2-firmware"
+# FIXME - Currently seeing a kernel warning for the CPU topology when bumping
+# the version past this.  The issue is being tracked in
+# https://github.com/tianocore/edk2-platforms/issues/752
+PREFERRED_VERSION_edk2-firmware ?= "202408%"
 
 QB_SYSTEM_NAME = "qemu-system-aarch64"
 QB_MACHINE = "-machine sbsa-ref"

meta-arm-bsp/conf/machine/sgi575.conf

@@ -7,18 +7,56 @@
 require conf/machine/include/arm/armv8-2a/tune-cortexa75.inc
 
 EXTRA_IMAGEDEPENDS += "virtual/control-processor-firmware"
-
 EXTRA_IMAGEDEPENDS += "trusted-firmware-a"
 
 KERNEL_IMAGETYPE ?= "Image"
 PREFERRED_PROVIDER_virtual/kernel ?= "linux-yocto"
 SERIAL_CONSOLES = "115200;ttyAMA0"
 
-#grub-efi
-EFI_PROVIDER ?= "grub-efi"
+EFI_PROVIDER ?= "${@bb.utils.contains("DISTRO_FEATURES", "systemd", "systemd-boot", "grub-efi", d)}"
 MACHINE_FEATURES += "efi"
 
 IMAGE_FSTYPES += "cpio.gz wic"
+IMAGE_NAME_SUFFIX = ""
+IMAGE_CLASSES += "fvpboot"
 
-WKS_FILE ?= "sgi575-efidisk.wks"
+WKS_FILE ?= "efi-disk.wks.in"
 WKS_FILE_DEPENDS:append = " ${EXTRA_IMAGEDEPENDS}"
+
+# testimage config
+TEST_TARGET = "OEFVPTarget"
+#TEST_TARGET_IP = "127.0.0.1:222"
+TEST_SUITES = "fvp_boot"
+
+# FVP Config
+FVP_PROVIDER ?= "fvp-sgi575-native"
+FVP_EXE ?= "FVP_CSS_SGI-575"
+
+# Virtio-Net configuration
+FVP_CONFIG[board.virtio_net.enabled] ?= "1"
+FVP_CONFIG[board.virtio_net.hostbridge.userNetworking] ?= "1"
+FVP_CONFIG[board.virtio_net.hostbridge.userNetPorts] = "2222=22"
+FVP_CONFIG[board.virtioblockdevice.image_path] ?= "${IMAGE_NAME}.wic"
+
+#FVP_CONFIG[cache_state_modelled] ?= "0"
+FVP_CONFIG[css.cmn600.mesh_config_file] = "SGI-575_cmn600.yml"
+FVP_CONFIG[css.cmn600.force_rnsam_internal] ?= "false"
+FVP_CONFIG[css.gic_distributor.ITS-device-bits] ?= "20"
+
+FVP_DATA ?= "css.scp.armcortexm7ct=scp_ramfw.bin@0x0BD80000"
+FVP_CONFIG[css.mcp.ROMloader.fname] ?= "mcp_romfw.bin"
+FVP_CONFIG[css.scp.ROMloader.fname] ?= "scp_romfw.bin"
+FVP_CONFIG[css.trustedBootROMloader.fname] ?= "bl1-sgi575.bin"
+FVP_CONFIG[board.flashloader0.fname] ?= "fip-sgi575.bin"
+
+FVP_CONSOLES[default] = "terminal_uart_ap"
+FVP_TERMINALS[css.scp.terminal_uart_aon] ?= "SCP Console"
+FVP_TERMINALS[css.mcp.terminal_uart0] ?= ""
+FVP_TERMINALS[css.mcp.terminal_uart1] ?= ""
+FVP_TERMINALS[css.terminal_uart_ap] ?= "Console"
+FVP_TERMINALS[css.terminal_uart1_ap] ?= ""
+FVP_TERMINALS[soc.terminal_s0] ?= ""
+FVP_TERMINALS[soc.terminal_s1] ?= ""
+FVP_TERMINALS[soc.terminal_mcp] ?= ""
+FVP_TERMINALS[board.terminal_0] ?= ""
+FVP_TERMINALS[board.terminal_1] ?= ""

meta-arm-bsp/documentation/corstone1000/change-log.rst

@@ -1,5 +1,5 @@
 ..
- # Copyright (c) 2022-2023, Arm Limited.
+ # Copyright (c) 2022-2025, Arm Limited.
  #
  # SPDX-License-Identifier: MIT
 
@@ -10,6 +10,205 @@ Change Log
 This document contains a summary of the new features, changes and
 fixes in each release of Corstone-1000 software stack.
 
+***************
+Version 2025.05
+***************
+
+Changes
+=======
+
+- OP-TEE OS: Added support for v4.4
+- Trusted Services: PSA-Crypto structures aligned with TF-M, added protobuf interface to crypto-sp
+- Documentation: fixed typos, added host-level authentication section, enabled fly-out sidebar menu
+- Das U-Boot: Reserved memory for RSS communication-pointer access protocol
+- Linux Kernel: Upgraded kernel to v6.12, updated Upstream-Status notes for remoteproc patches
+- Corstone-1000 image: Implemented IMAGE_ROOTFS_EXTRA_SPACE workaround
+
+Corstone-1000 components versions
+=================================
+
++-------------------------------------------+-------------------+
+| linux-yocto                               | 6.12.30           |
++-------------------------------------------+-------------------+
+| u-boot                                    | 2023.07.02        |
++-------------------------------------------+-------------------+
+| external-system                           | 0.1.0             |
++-------------------------------------------+-------------------+
+| optee-client                              | 4.4.0             |
++-------------------------------------------+-------------------+
+| optee-os                                  | 4.4.0             |
++-------------------------------------------+-------------------+
+| trusted-firmware-a                        | 2.11.0            |
++-------------------------------------------+-------------------+
+| trusted-firmware-m                        | 2.1.1             |
++-------------------------------------------+-------------------+
+| libts                                     | 602be60719        |
++-------------------------------------------+-------------------+
+| ts-newlib                                 | 4.1.0             |
++-------------------------------------------+-------------------+
+| ts-psa-{crypto, iat, its. ps}-api-test    | 74dc6646ff        |
++-------------------------------------------+-------------------+
+| ts-sp-{se-proxy, smm-gateway}             | 602be60719        |
++-------------------------------------------+-------------------+
+
+Yocto distribution components versions
+======================================
+
++-------------------------------------------+----------------+
+| meta-arm                                  | walnascar      |
++-------------------------------------------+----------------+
+| poky                                      | ee0d8d8a61     |
++-------------------------------------------+----------------+
+| meta-openembedded                         | 2169c9afcc     |
++-------------------------------------------+----------------+
+| meta-secure-core                          | 423bc85b05     |
++-------------------------------------------+----------------+
+| busybox                                   | 1.37.0         |
++-------------------------------------------+----------------+
+| musl                                      | 1.2.5          |
++-------------------------------------------+----------------+
+| gcc-arm-none-eabi                         | 13.3.rel1      |
++-------------------------------------------+----------------+
+| gcc-cross-aarch64                         | 14.2.0         |
++-------------------------------------------+----------------+
+| openssl                                   | 3.4.1          |
++-------------------------------------------+----------------+
+
+
+***************
+Version 2024.11
+***************
+
+Changes
+=======
+
+- Implementation of a replication strategy for FWU metadata in TF-M according to the FWU specification.
+- Upgrade to metadata version 2 in TF-M.
+- Increase the ITS and PS memory size in Secure Flash for TF-M.
+- SW components upgrades.
+- Bug fixes.
+
+Corstone-1000 components versions
+=================================
+
++-------------------------------------------+-----------------------------------------------------+
+| linux-yocto                               |                   6.10.14                           |
++-------------------------------------------+-----------------------------------------------------+
+| u-boot                                    |                   2023.07.02                        |
++-------------------------------------------+-----------------------------------------------------+
+| external-system                           |                   0.1.0                             |
++-------------------------------------------+-----------------------------------------------------+
+| optee-client                              |                   4.2.0                             |
++-------------------------------------------+-----------------------------------------------------+
+| optee-os                                  |                   4.2.0                             |
++-------------------------------------------+-----------------------------------------------------+
+| trusted-firmware-a                        |                   2.11.0                            |
++-------------------------------------------+-----------------------------------------------------+
+| trusted-firmware-m                        |                   2.1.0                             |
++-------------------------------------------+-----------------------------------------------------+
+| libts                                     |                   602be60719                        |
++-------------------------------------------+-----------------------------------------------------+
+| ts-newlib                                 |                   4.1.0                             |
++-------------------------------------------+-----------------------------------------------------+
+| ts-psa-{crypto, iat, its. ps}-api-test    |                   74dc6646ff                        |
++-------------------------------------------+-----------------------------------------------------+
+| ts-sp-{se-proxy, smm-gateway}             |                   602be60719                        |
++-------------------------------------------+-----------------------------------------------------+
+
+Yocto distribution components versions
+======================================
+
++-------------------------------------------+------------------------------+
+| meta-arm                                  | styhead                      |
++-------------------------------------------+------------------------------+
+| poky                                      | 5465094be9                   |
++-------------------------------------------+------------------------------+
+| meta-openembedded                         | 461d85a183                   |
++-------------------------------------------+------------------------------+
+| meta-secure-core                          | 59d7e90542                   |
++-------------------------------------------+------------------------------+
+| busybox                                   |                   1.36.1     |
++-------------------------------------------+------------------------------+
+| musl                                      |                   1.2.5      |
++-------------------------------------------+------------------------------+
+| gcc-arm-none-eabi                         |          13.3.rel1           |
++-------------------------------------------+------------------------------+
+| gcc-cross-aarch64                         |                   14.2.0     |
++-------------------------------------------+------------------------------+
+| openssl                                   |                   3.3.1      |
++-------------------------------------------+------------------------------+
+
+***************
+Version 2024.06
+***************
+
+Changes
+=======
+
+- Re-enabling support for the External System using linux remoteproc (only supporting switching on and off the External System)
+- UEFI Secure Boot and Authenticated Variable support
+- RSE Comms replaces OpenAMP
+- The EFI System partition image is now created by the meta-arm build system.
+  This image is mounted on the second MMC card by default in the FVP.
+- The capsule generation script is now part of the meta-arm build system.
+  Corstone1000-flash-firmware-image recipe generates a capsule binary using the U-Boot capsule generation tool that includes
+  all the firmware binaries and recovery kernel image.
+- SW components upgrades
+- Bug fixes
+
+
+Corstone-1000 components versions
+=================================
+
++-------------------------------------------+-----------------------------------------------------+
+| arm-tstee                                 |                   2.0.0                             |
++-------------------------------------------+-----------------------------------------------------+
+| linux-yocto                               |                   6.6.23                            |
++-------------------------------------------+-----------------------------------------------------+
+| u-boot                                    |                   2023.07.02                        |
++-------------------------------------------+-----------------------------------------------------+
+| external-system                           |                   0.1.0                             |
++-------------------------------------------+-----------------------------------------------------+
+| optee-client                              |                   4.1.0                             |
++-------------------------------------------+-----------------------------------------------------+
+| optee-os                                  |                   4.1.0                             |
++-------------------------------------------+-----------------------------------------------------+
+| trusted-firmware-a                        |                   2.10.4                            |
++-------------------------------------------+-----------------------------------------------------+
+| trusted-firmware-m                        |                   2.0.0                             |
++-------------------------------------------+-----------------------------------------------------+
+| libts                                     |                   602be60719                        |
++-------------------------------------------+-----------------------------------------------------+
+| ts-newlib                                 |                   4.1.0                             |
++-------------------------------------------+-----------------------------------------------------+
+| ts-psa-{crypto, iat, its. ps}-api-test    |                   602be60719                        |
++-------------------------------------------+-----------------------------------------------------+
+| ts-sp-{se-proxy, smm-gateway}             |                   602be60719                        |
++-------------------------------------------+-----------------------------------------------------+
+
+Yocto distribution components versions
+======================================
+
++-------------------------------------------+------------------------------+
+| meta-arm                                  | scarthgap                    |
++-------------------------------------------+------------------------------+
+| poky                                      | scarthgap                    |
++-------------------------------------------+------------------------------+
+| meta-openembedded                         | scarthgap                    |
++-------------------------------------------+------------------------------+
+| meta-secure-core                          | scarthgap                    |
++-------------------------------------------+------------------------------+
+| busybox                                   |                   1.36.1     |
++-------------------------------------------+------------------------------+
+| musl                                      |                   1.2.4      |
++-------------------------------------------+------------------------------+
+| gcc-arm-none-eabi                         |          13.2.Rel1           |
++-------------------------------------------+------------------------------+
+| gcc-cross-aarch64                         |                   13.2.0     |
++-------------------------------------------+------------------------------+
+| openssl                                   |                   3.2.1      |
++-------------------------------------------+------------------------------+
+
 ***************
 Version 2023.11
 ***************
@@ -298,4 +497,4 @@ Changes
 
 --------------
 
-*Copyright (c) 2022-2023, Arm Limited. All rights reserved.*
+*Copyright (c) 2022-2024, Arm Limited. All rights reserved.*

meta-arm-bsp/documentation/corstone1000/conf.py

@@ -1,3 +1,8 @@
+# SPDX-FileCopyrightText: <text>Copyright 2020-2024 Arm Limited and/or its
+# affiliates <open-source-office@arm.com></text>
+#
+# SPDX-License-Identifier: MIT
+
 # Configuration file for the Sphinx documentation builder.
 #
 # This file only contains a selection of the most common options. For a full
@@ -10,15 +15,19 @@
 # add these directories to sys.path here. If the directory is relative to the
 # documentation root, use os.path.abspath to make it absolute, like shown here.
 #
-# import os
-# import sys
 # sys.path.insert(0, os.path.abspath('.'))
 
+import os
+import sys
+
+# Append the documentation directory to the path, so we can import variables
+sys.path.append(os.path.dirname(__file__))
+
 
 # -- Project information -----------------------------------------------------
 
 project = 'corstone1000'
-copyright = '2020-2022, Arm Limited'
+copyright = '2020-2024, Arm Limited'
 author = 'Arm Limited'
 
 
@@ -28,6 +37,7 @@ author = 'Arm Limited'
 # extensions coming with Sphinx (named 'sphinx.ext.*') or your custom
 # ones.
 extensions = [
+    'sphinx_rtd_theme',
 ]
 
 # Add any paths that contain templates here, relative to this directory.
@@ -45,6 +55,19 @@ exclude_patterns = ['_build', 'Thumbs.db', '.DS_Store', 'docs/infra']
 # a list of builtin themes.
 #
 html_theme = 'sphinx_rtd_theme'
+html_theme_options = {
+    'flyout_display': 'attached',
+}
+
+# Define the canonical URL if you are using a custom domain on Read the Docs
+html_baseurl = os.environ.get("READTHEDOCS_CANONICAL_URL", "")
+
+# Tell Jinja2 templates the build is running on Read the Docs
+if os.environ.get("READTHEDOCS", "") == "True":
+    if "html_context" not in globals():
+        html_context = {}
+    html_context["READTHEDOCS"] = True
+
 
 # Add any paths that contain custom static files (such as style sheets) here,
 # relative to this directory. They are copied after the builtin static files,

meta-arm-bsp/documentation/corstone1000/release-notes.rst

@@ -1,5 +1,5 @@
 ..
- # Copyright (c) 2022-2023, Arm Limited.
+ # Copyright (c) 2022-2025, Arm Limited.
  #
  # SPDX-License-Identifier: MIT
 
@@ -19,6 +19,57 @@ intended for safety-critical applications. Should Your Software or Your Hardware
 prove defective, you assume the entire cost of all necessary servicing, repair
 or correction.
 
+***********************
+Release notes - 2025.05
+***********************
+
+Known Issues or Limitations
+---------------------------
+
+ - Crypto isolation is not supported in the Secure world of Corstone-1000. Additionally, clients in
+   the Normal world are not isolated from one another.Therefore, if an end user wants to add a new
+   Secure Partition (SP) (such as a software TPM) that accesses the Crypto service via the SE-Proxy,
+   they are responsible for implementing their own isolation mechanisms to ensure proper security boundaries.
+ - DSTREAM debug probe may experience unreliable USB connectivity when used with Arm DS for secure debug.
+   This issue is under active investigation, and we are working to identify and resolve compatibility issues in a future update.
+   As a more stable alternative, the ULINKpro debug probe is recommended for use with Corstone-1000 in secure debug scenarios.
+
+
+***********************
+Release notes - 2024.11
+***********************
+
+The same notes as the 2024.06 release still apply.
+
+***********************
+Release notes - 2024.06
+***********************
+
+Known Issues or Limitations
+---------------------------
+
+ - Use Ethernet over VirtIO due to lan91c111 Ethernet driver support dropped from U-Boot.
+ - Due to the performance uplimit of MPS3 FPGA and FVP, some Linux distros like Fedora Rawhide can not boot on Corstone-1000 (i.e. user may experience timeouts or boot hang).
+ - Corstone-1000 SoC on FVP doesn't have a secure debug peripheral. It does on the MPS3.
+ - See previous release notes for the known limitations regarding ACS tests.
+
+Platform Support
+-----------------
+ - This software release is tested on Corstone-1000 FPGA version AN550_v2
+   https://developer.arm.com/downloads/-/download-fpga-images
+ - This software release is tested on Corstone-1000 Fast Model platform (FVP) version 11.23_25
+   https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
+
+SystemReady IR v2.0 Certification Milestone
+-------------------------------------------
+
+As of this release, Corstone-1000 has achieved `SystemReady IR v2.0 certification <https://www.arm.com/architecture/system-architectures/systemready-certification-program/ve>`__.
+This milestone confirms compliance with the SystemReady IR requirements, ensuring broader compatibility and reliability for deployment.
+
+Applied patch `313ad2a0e600 <https://git.yoctoproject.org/meta-arm/commit/?h=scarthgap&id=313ad2a0e600655d9bfbe53646e356372ff02644>`__ to address compatibility requirements for SystemReady IR v2.0.
+
+This update is included in tag `CORSTONE1000-2024.06-systemready-ir-v2.0 <https://git.yoctoproject.org/meta-arm/tag/?h=CORSTONE1000-2024.06-systemready-ir-v2.0>`__ and builds on the `CORSTONE1000-2024.06` release.
+
 ***********************
 Release notes - 2023.11
 ***********************
@@ -213,7 +264,7 @@ Support
 -------
 For technical support email: support-subsystem-iot@arm.com
 
-For all security issues, contact Arm by email at arm-security@arm.com.
+For all security issues, contact Arm by email at psirt@arm.com.
 
 --------------
 

meta-arm-bsp/documentation/corstone1000/software-architecture.rst

@@ -1,10 +1,10 @@
 ..
- # Copyright (c) 2022-2023, Arm Limited.
+ # Copyright (c) 2022-2025, Arm Limited.
  #
  # SPDX-License-Identifier: MIT
 
 ######################
-Software architecture
+Software Architecture
 ######################
 
 
@@ -16,185 +16,343 @@ Arm Corstone-1000 is a reference solution for IoT devices. It is part of
 Total Solution for IoT which consists of hardware and software reference
 implementation.
 
-Corstone-1000 software plus hardware reference solution is PSA Level-2 ready
-certified (`PSA L2 Ready`_) as well as System Ready IR certified(`SRIR cert`_).
-More information on the Corstone-1000 subsystem product and design can be
-found at:
-`Arm corstone1000 Software`_ and `Arm corstone1000 Technical Overview`_.
+The combination of Corstone-1000 software and hardware reference solution is `PSA Level-2 ready
+certified <psa_l2-ready_>`__ as well as `Arm SystemReady Devicetree certified <systemready-ir-certification_>`__.
 
-This readme explicitly focuses on the software part of the solution and
+More information on the Corstone-1000 subsystems product and design can be
+found on `Arm Developer <arm-developer-cs1000-website_>`__.
+
+This document explicitly focuses on the software part of the solution and
 provides internal details on the software components. The reference
 software package of the platform can be retrieved following instructions
-present in the user-guide document.
+present in the user guide document.
 
 ***************
 Design Overview
 ***************
 
 The software architecture of Corstone-1000 platform is a reference
-implementation of Platform Security Architecture (`PSA`_) which provides
+implementation of `Platform Security Architecture <psa-certified-website_>`__ which provides
 framework to build secure IoT devices.
 
-The base system architecture of the platform is created from three
-different types of systems: Secure Enclave, Host and External System.
-Each subsystem provides different functionality to overall SoC.
+The base system architecture of the platform is created from three different types of subsystems:
+
+    - Secure Enclave
+    - Host System
+    - External System
+
+Each subsystem provides different functionality to the overall system on a chip (SoC).
 
 
 .. image:: images/CorstoneSubsystems.png
    :width: 720
    :alt: CorstoneSubsystems
 
+Secure Enclave
+==============
 
-The Secure Enclave System, provides PSA Root of Trust (RoT) and
-cryptographic functions. It is based on an Cortex-M0+ processor,
-CC312 Cryptographic Accelerator and peripherals, such as watchdog and
-secure flash. Software running on the Secure Enclave is isolated via
-hardware for enhanced security. Communication with the Secure Encalve
-is achieved using Message Handling Units (MHUs) and shared memory.
-On system power on, the Secure Enclave boots first. Its software
-comprises of a  ROM code (TF-M BL1), Mcuboot BL2, and
-TrustedFirmware-M(`TF-M`_) as runtime software. The software design on
-Secure Enclave follows Firmware Framework for M class
-processor (`FF-M`_) specification.
+The Secure Enclave boots first on system power on, it provides `PSA Root of Trust (RoT) <psa-certified-website_>`__ and
+cryptographic functions. It is based on a Cortex-M0+ processor, CC312 Cryptographic Accelerator and
+peripherals such as watchdog and secure flash.
 
-The Host System is based on ARM Cotex-A35 processor with standardized
-peripherals to allow for the booting of a Linux OS. The Cortex-A35 has
-the TrustZone technology that allows secure and non-secure security
-states in the processor. The software design in the Host System follows
-Firmware Framework for A class procseeor (`FF-A`_) specification.
-The boot process follows Trusted Boot Base Requirement (`TBBR`_).
-The Host Subsystem is taken out of reset by the Secure Enclave system
-during its final stages of the initialization. The Host subsystem runs
-FF-A Secure Partitions(based on `Trusted Services`_) and OPTEE-OS
-(`OPTEE-OS`_) in the secure world, and U-Boot(`U-Boot repo`_) and
-linux (`linux repo`_) in the non-secure world. The communication between
-non-secure and the secure world is performed via FF-A messages.
+.. image:: images/Corstone1000SecureFlashMPS3.png
+   :width: 400
+   :alt: Corstone1000SecureFlashMPS3
 
-An external system is intended to implement use-case specific
-functionality. The system is based on Cortex-M3 and run RTX RTOS.
-Communication between the external system and Host (Cortex-A35) is performed
-using MHU as transport mechanism and rpmsg messaging system (the external system
-support in Linux is disabled in this release. More info about this change can be found in the
-release-notes).
+.. image:: images/Corstone1000SecureFlashFVP.png
+   :width: 400
+   :alt: Corstone1000SecureFlashFVP
 
-Overall, the Corstone-1000 architecture is designed to cover a range
-of Power, Performance, and Area (PPA) applications, and enable extension
-for use-case specific applications, for example, sensors, cloud
-connectivitiy, and edge computing.
+Software running on the Secure Enclave is isolated via hardware for enhanced security.
+Communication with the Secure Enclave is achieved using `Message Handling Units (MHUs) <arm-developer-mhu-website_>`__
+and shared memory.
+
+Its software components comprises:
+
+    - `Trusted Firmware-M (TF-M) BL1 <trusted-firmware-m-bl1-website_>`__
+    - `MCUboot <mcuboot-website_>`__
+    - `TrustedFirmware-M <trusted-firmware-m-website_>`__ 
+
+The software design on the Secure Enclave follows `Arm Firmware Framework for M-Profile
+processor <arm-fmw-framework-m-profile-pdf_>`__ (FF-M) specification.
+
+Host System
+===========
+
+The Host System is based on ARM Cortex-A35 processor with standardized
+peripherals to allow booting a Linux-based operating system (OS). The Cortex-A35 has
+the `TrustZone <arm-trustzone-for-cortex-a-website_>`__ technology that allows Secure and Non-secure security
+states in the processor. 
+
+The boot process follows `Trusted Boot Base Requirements Client <trusted-board-boot-requirements-client-pdf_>`__.
+The Host System is taken out of reset by the Secure Enclave system during its final stages of the
+initialization.
+
+In the Secure world, the Host System runs:
+
+    - FF-A Secure Partitions (based on `Trusted Services <trusted-services-website_>`__)
+    - `OP-TEE OS <op-tee-os-repository_>`__
+
+In the Non-secure World, the Host System runs:
+
+    - `U-Boot <das-u-boot-repository_>`__
+    - `Linux kernel <linux-repository_>`__
+
+The software design in the Host System follows `Arm Firmware Framework for Arm A-profile 
+<arm-fmw-framework-a-profile-pdf_>`__ (FF-A) specification.
+The communication between Non-secure and the Secure world is performed via FF-A messages.
+
+External System
+===============
+
+The External System is intended to implement use-case specific functionality.
+
+The system is based on Cortex-M3 and runs `Keil RTX5 <keil-rtx5-website_>`__. 
+
+Communication between the external system and Host (Cortex-A35) can be performed using MHU as transport
+mechanism. The current software release supports switching the External System ON and OFF.
+
+The Corstone-1000 architecture is designed to cover a range of
+`Power, Performance, and Area (PPA) <ppa-website_>`__ applications, and enable extension
+for use-case specific applications, for example, sensors, cloud connectivity, and edge computing.
 
 *****************
 Secure Boot Chain
 *****************
 
 For the security of a device, it is essential that only authorized
-software should run on the device. The Corstone-1000 boot uses a
-Secure Boot Chain process where an already authenticated image verifies
-and loads the following software in the chain. For the boot chain
-process to work, the start of the chain should be trusted, forming the
+software should run on the device.
+
+The Corstone-1000 boot uses a `Secure boot <arm-developer-secureboot-website_>`__ chain process
+where an already authenticated image verifies and loads the following software in the chain.
+
+For the boot chain process to work, the start of the chain should be trusted, forming the
 Root of Trust (RoT) of the device. The RoT of the device is immutable in
-nature and encoded into the device by the device owner before it
-is deployed into the field. In Corstone-1000, the BL1 image of the secure
-enclave and content of the CC312 OTP (One Time Programmable) memory
-forms the RoT. The BL1 image exists in ROM (Read Only Memory).
+nature and encoded into the device by the device manufacturer before it
+is deployed into the field. 
+In Corstone-1000, the content of the ROM and CC312 One Time Programmable (OTP) memory forms the RoT.
+
+Verification of an image can happen either by comparing the computed and stored hashes, or by
+checking the signature of the image if the image is signed.
 
 .. image:: images/SecureBootChain.png
    :width: 870
    :alt: SecureBootChain
 
-It is a lengthy chain to boot the software on Corstone-1000. On power on,
-the secure enclave starts executing BL1 code from the ROM which is the RoT
-of the device. Authentication of an image involves the steps listed below:
+It is a lengthy chain to boot the software on Corstone-1000.
 
-- Load image from flash to dynamic RAM.
-- The public key present in the image header is validated by comparing with the hash.
-  Depending on the image, the hash of the public key is either stored in the OTP or part
-  of the software which is being already verified in the previous stages.
-- The image is validated using the public key.
+TF-M BL1_1
+==========
 
-In the secure enclave, BL1 authenticates the BL2 and passes the execution
-control. BL2 authenticates the initial boot loader of the host (Host TF-A BL2)
-and TF-M. The execution control is now passed to TF-M. TF-M being the run
-time executable of secure enclave which initializes itself and, at the end,
-brings the host CPU out of rest. The host follows the boot standard defined
-in the `TBBR`_ to authenticate the secure and non-secure software.
+On power-up, the Secure Enclave begins execution from TF-M BL1_1, which resides in ROM and serves as
+the Root of Trust (RoT) for the device.
+
+TF-M BL1_1 is the immutable bootloader and is responsible for:
+
+- Provisioning the device during the first boot
+- Performing hardware initialization
+- Verifying the integrity and authenticity of the next stage in the boot chain
+
+At boot time, TF-M BL1_1:
+
+- Copies the TF-M BL1_2 image from OTP to RAM.
+- Verifies the integrity of BL1_2 by comparing its computed hash with the hash stored in OTP.
+
+TF-M BL1_2
+==========
+
+During provisioning, the TF-M BL1_2 binary, along with its hashes and cryptographic keys, is stored
+in One-Time Programmable (OTP) memory.
+
+Once verified, TF-M BL1_2:
+
+- Takes control and verifies the next stage in the boot chain, which is TF-M BL2.
+- Computes the hash of the BL2 image and compares it with the BL2 hash stored in OTP to ensure
+  integrity before transferring execution to BL2.
+
+.. note::
+
+    The TF-M BL1 design details can be found in the `TF-M design documents <trusted-firmware-m-bl1-website_>`_.
+
+    .. important::
+
+        Corstone-1000 has some differences compared to this design due to memory (OTP/ROM)
+        limitations:
+
+        - BL1_1 code size is larger than needed because it handles most of the hardware initialization instead of the BL1_2.
+        - BL1_2 cannot be updated during provisioning time because the provisioning bundle that contains its code is located in the ROM.
+        - BL1_2 does not use the post-quantum LMS verification.
+        - BL2 cannot be updated because it is verified by comparing the computed hash to the hash stored in the OTP.
+
+TF-M BL2
+========
+
+In this system, TF-M BL2 refers to MCUBoot.
+
+On the first boot, MCUBoot can provision additional cryptographic keys. It is responsible for authenticating both:
+
+- TF-M (Trusted Firmware-M), and
+- The initial bootloader of the Host system, `Trusted Firmware-A (TF-A) BL2 <trusted-firmware-a-bl2-website_>`__
+
+This authentication is done by verifying the digital signatures of the respective images.
+
+MCUBoot performs image verification in the following steps:
+
+#. Load the image from non-volatile memory into RAM.
+#. Validate the image's signature using the corresponding public key.
+
+.. note::
+
+   The public key present in the image header is validated by comparing with the hash.
+   Depending on the image, the hash of the public key is either stored in the OTP or part
+   of the software which is being already verified in the previous stages.
+
+
+The execution control is passed to TF-M after the verification.
+As the runtime executable of the Secure Enclave, TF-M initializes itself before
+bringing the Host system out of reset.
+
+
+
+Host System Authentication
+==========================
+
+The Host system follows the boot standard defined in the `Trusted Board Boot Requirements Client <trusted-board-boot-requirements-client-pdf_>`__
+to authenticate the Secure and Non-secure software.
+
+The `Firmware Image Package (FIP) <trusted-firmware-a-fip-guide_>`__ packs bootloader images and
+other payloads into a single archive.
+
+.. image:: images/FIPDiagram.png
+   :alt: FIPDiagram
+
+The FIP for Corstone-1000 contains:
+
+- Trusted firmware-A BL2
+- AP EL3 Runtime firmware, BL31 image
+- AP Secure Payload, BL32 image
+- AP Normal world firmware -U-boot, BL33 image
+- Trusted OS Firmware configuration file used by Trusted OS (BL32), TOS_FW_CONFIG
+- Key certificates
+- Content certificates
+
+
+To load and validate TF-A BL2, TF-M BL2 first parses the GUID Partition Table (GPT)
+to locate the FIP. It then determines the offset of TF-A BL2 within the FIP.
+
+.. note::
+
+    TF-M does not check the FIP signature, it only checks the TF-A BL2's signature in the FIP.
+
+
+.. important::
+
+    The implicitly trusted components are:
+
+    - A SHA-256 hash of the Root of Trust Public Key (ROTPK) - 
+      For development purposes, a development ROTPK is used and its hash embedded into the TF-A BL2 image.
+      This public key is provided by the TF-A source code.
+    - TF-A BL2 image - it can be trusted because it has been verified by TF-M BL2 before starting TF-A.
+
+
+The remaining components in the Chain of Trust (CoT) are either certificates or bootloader images.
+
+Bootloader Authentication
+-------------------------
+
+The FIP contains two types of certificates:
+
+- **Content Certificates** - used to store the hash of a bootloader image.
+- **Key Certificates** - used to verify public keys used to sign Content Certificates.
+
+The Host system bootloader images are authenticated by computing their hash and comparing it to the corresponding hash found in the Content Certificate.
+
+Certificates Verification
+-------------------------
+
+The public keys defined in the Trusted Key Certificate are used to verify the later certificates in
+the CoT process. The Trusted Key Certificate is verified with the Root of Trust Public Key.
+
+
+UEFI Authenticated Variables
+----------------------------
+
+For UEFI Secure Boot, authenticated variables can be accessed from the secure flash.
+The feature has been integrated in U-Boot, which authenticates the images as per the UEFI
+specification before executing them.
 
 ***************
 Secure Services
 ***************
 
-Corstone-1000 is unique in providing a secure environment to run a secure
-workload. The platform has TrustZone technology in the Host subsystem but
-it also has hardware isolated secure enclave environment to run such secure
-workloads. In Corstone-1000, known Secure Services such as Crypto, Protected
-Storage, Internal Trusted Storage and Attestation are available via PSA
-Functional APIs in TF-M. There is no difference for a user communicating to
-these services which are running on a secure enclave instead of the
-secure world of the host subsystem. The below diagram presents the data
-flow path for such calls.
+Corstone-1000 is unique in offering a secure environment for running trusted workloads.
+While the Host system includes TrustZone technology, the platform also features a hardware-isolated
+Secure Enclave, specifically designed to execute these secure workloads.
+
+In Corstone-1000, essential Secure Services—such as Cryptography, Protected Storage,
+Internal Trusted Storage, and Attestation—are provided through PSA Functional APIs implemented in TF-M.
+
+From the user's perspective, there is no difference when communicating with these services,
+whether they run in the Secure Enclave or in the Secure world of the Host system.
+The diagram below illustrates the data flow for such calls.
 
 
 .. image:: images/SecureServices.png
    :width: 930
    :alt: SecureServices
 
+The Secure Enclave Proxy Secure Partition (SE Proxy SP) is a proxy managed by OP-TEE that forwards
+Secure Service calls to the Secure Enclave. This communication uses the `RSE communication protocol <https://tf-m-user-guide.trustedfirmware.org/platform/arm/rse/rse_comms.html>`_.
+While the protocol supports shared memory and MHU interrupts as a doorbell mechanism between cores,
+in Corstone-1000, the entire message is currently transmitted through the MHU channels.
+Corstone-1000 implements Isolation Level 2 using the Cortex-M0+ Memory Protection Unit (MPU).
 
-The SE Proxy SP (Secure Enclave Proxy Secure Partition) is a proxy partition
-managed by OPTEE which forwards such calls to the secure enclave. The
-solution relies on the `RSE communication protocol
-<https://tf-m-user-guide.trustedfirmware.org/platform/arm/rse/rse_comms.html>`_
-which is a lightweight serialization of the psa_call() API. It can use shared
-memory and MHU interrupts as a doorbell for communication between two cores
-but currently the whole message is forwarded through the MHU channels in Corstone-1000.
-Corstone-1000 implements isolation level 2. Cortex-M0+ MPU (Memory Protection
-Unit) is used to implement isolation level 2.
-
-For a user to define its own secure service, both the options of the host
-secure world or secure encalve are available. It's a trade-off between
-lower latency vs higher security. Services running on a secure enclave are
-secure by real hardware isolation but have a higher latency path. In the
-second scenario, the services running on the secure world of the host
-subsystem have lower latency but virtual hardware isolation created by
-TrustZone technology.
+Users can define their own secure services to run either in the Host system's Secure World or in
+the Secure Enclave. This choice involves a trade-off between latency and security.
+Services running in the Secure Enclave benefit from strong, hardware-enforced isolation,
+offering higher security but at the cost of increased latency. In contrast, services running in the
+Host Secure World experience lower latency, but rely on TrustZone technology for virtualized isolation,
+which offers comparatively less robust security.
 
 
 **********************
 Secure Firmware Update
 **********************
 
-Apart from always booting the authorized images, it is also essential that
-the device only accepts the authorized (signed) images in the firmware update
-process. Corstone-1000 supports OTA (Over the Air) firmware updates and
-follows Platform Security Firmware Update specification (`FWU`_).
 
-As standardized into `FWU`_, the external flash is divided into two
-banks of which one bank has currently running images and the other bank is
-used for staging new images.  There are four updatable units, i.e. Secure
-Enclave's BL2 and TF-M, and Host's FIP (Firmware Image Package) and Kernel
-Image (the initramfs bundle). The new images are accepted in the form of a UEFI capsule.
+In addition to always booting authorized images, it is equally important that the device only accepts
+authorized (signed) images during the firmware update process. Corstone-1000 supports over-the-air (OTA)
+firmware updates and complies with the `Platform Security Firmware Update for the A-profile Arm Architecture <platform-security-fwu-for-a-profile-pdf_>`__ 
+specification.
+
+As defined in the specification, the external flash is divided into two banks: one bank holds the
+currently running images, while the other is used to stage new images.
+
+There are four updatable components: **BL2**, **TF-M**, **the FIP** and **the Kernel Image** (the initramfs bundle).
+New images are delivered and accepted in the form of UEFI capsules.
 
 
 .. image:: images/ExternalFlash.png
    :width: 690
    :alt: ExternalFlash
 
-When Firmware update is triggered, u-boot verifies the capsule by checking the
-capsule signature, version number and size. Then it signals the Secure Enclave
-that can start writing UEFI capsule into the flash. Once this operation finishes
-,Secure Enclave resets the entire system.
-The Metadata Block in the flash has the below firmware update state machine.
-TF-M runs an OTA service that is responsible for accepting and updating the
-images in the flash. The communication between the UEFI Capsule update
-subsystem and the OTA service follows the same data path explained above.
-The OTA service writes the new images to the passive bank after successful
-capsule verification. It changes the state of the system to trial state and
-triggers the reset. Boot loaders in Secure Enclave and Host read the Metadata
-block to get the information on the boot bank. In the successful trial stage,
-the acknowledgment from the host moves the state of the system from trial to
-regular. Any failure in the trial stage or system hangs leads to a system
-reset. This is made sure by the use of watchdog hardware. The Secure Enclave's
-BL1 has the logic to identify multiple resets and eventually switch back to the
-previous good bank. The ability to revert to the previous bank is crucial to
-guarantee the availability of the device.
+When a firmware update is triggered, U-Boot begins by verifying the UEFI capsule by checking its signature,
+version number, and size. After successful verification, it signals the Secure Enclave, which then
+starts writing the capsule contents to flash memory.
+
+Once the write operation is complete, the Secure Enclave resets the entire system. The update process
+is tracked using a state machine stored in the Metadata Block within flash. TF-M runs an OTA service
+that is responsible for verifying and updating the images in the passive flash bank. Communication
+between the UEFI capsule update subsystem and the OTA service follows the same data path described
+earlier. After verifying the capsule, the OTA service writes the new images to the passive bank,
+updates the system state to 'trial,' and initiates a reset.
+
+During boot, the bootloaders in both the Secure Enclave and the Host system read the Metadata Block to
+determine which bank to boot from. If the trial boot succeeds, the Host system sends an acknowledgment
+that transitions the system state from 'trial' to 'regular.' If the system fails during the trial phase
+or hangs, a watchdog timer triggers a reset. The Secure Enclave’s BL1 contains logic to detect multiple
+resets and can revert to the previously known-good bank. This fallback mechanism is essential to ensure
+the device remains available and functional.
 
 
 .. image:: images/SecureFirmwareUpdate.png
@@ -207,13 +365,15 @@ guarantee the availability of the device.
 UEFI Runtime Support in U-Boot
 ******************************
 
-Implementation of UEFI boottime and runtime APIs require variable storage.
-In Corstone-1000, these UEFI variables are stored in the Protected Storage
-service. The below diagram presents the data flow to store UEFI variables.
-The U-Boot implementation of the UEFI subsystem uses the U-Boot FF-A driver to
-communicate with the SMM Service in the secure world. The backend of the
-SMM service uses the proxy PS from the SE Proxy SP. From there on, the PS
-calls are forwarded to the secure enclave as explained above.
+The implementation of UEFI boot-time and runtime APIs requires persistent variable storage. In
+Corstone-1000, UEFI variables are stored using the Protected Storage (PS) service.
+
+The diagram below illustrates the data flow for storing UEFI variables. U-Boot’s UEFI subsystem
+communicates with the Secure World using the U-Boot FF-A driver, which interfaces with the `UEFI System Management Mode (SMM) service <trusted-services-uefi-smm-website_>`__.
+
+The SMM service provides support for the UEFI System Management Mode. This support is implemented by the SMM Gateway secure partition.
+The SMM service then uses the Proxy Protected Storage (PS) provided by the SE Proxy SP.
+These PS calls are forwarded to the Secure Enclave, following the communication path described earlier.
 
 
 .. image:: images/UEFISupport.png
@@ -221,30 +381,38 @@ calls are forwarded to the secure enclave as explained above.
    :alt: UEFISupport
 
 
-***************
+**********
 References
-***************
-`ARM corstone1000 Search`_
-
-`Arm security features`_
+**********
+* `Arm Developer <arm-developer-cs1000-search_>`__
+* `Arm Security Architectures <arm-architecture-security-features-platform-security_>`_
 
 --------------
 
-*Copyright (c) 2022-2023, Arm Limited. All rights reserved.*
+*Copyright (c) 2022-2025, Arm Limited. All rights reserved.*
 
-.. _Arm corstone1000 Technical Overview: https://developer.arm.com/documentation/102360/0000
-.. _Arm corstone1000 Software: https://developer.arm.com/Tools%20and%20Software/Corstone-1000%20Software
-.. _Arm corstone1000 Search: https://developer.arm.com/search#q=corstone-1000
-.. _Arm security features: https://www.arm.com/architecture/security-features/platform-security
-.. _linux repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/
-.. _FF-A: https://developer.arm.com/documentation/den0077/latest
-.. _FF-M: https://developer.arm.com/architectures/Firmware%20Framework%20for%20M-Profile
-.. _FWU: https://developer.arm.com/documentation/den0118/a/
-.. _OPTEE-OS: https://github.com/OP-TEE/optee_os
-.. _PSA: https://www.psacertified.org/
-.. _PSA L2 Ready: https://www.psacertified.org/products/corstone-1000/
-.. _SRIR cert: https://armkeil.blob.core.windows.net/developer/Files/pdf/certificate-list/arm-systemready-ir-certification-arm-corstone-1000.pdf
-.. _TBBR: https://developer.arm.com/documentation/den0006/latest
-.. _TF-M: https://www.trustedfirmware.org/projects/tf-m/
-.. _Trusted Services: https://www.trustedfirmware.org/projects/trusted-services/
-.. _U-Boot repo: https://github.com/u-boot/u-boot.git
+.. _arm-developer-cs1000-website: https://developer.arm.com/Tools%20and%20Software/Corstone-1000%20Software
+.. _arm-developer-cs1000-search: https://developer.arm.com/search#q=corstone-1000
+.. _arm-developer-mhu-website: https://developer.arm.com/documentation/ka005129/latest/#:~:text=An%20MHU%20is%20a%20device,that%20a%20message%20is%20available
+.. _arm-developer-secureboot-website: https://developer.arm.com/documentation/PRD29-GENC-009492/c/TrustZone-Software-Architecture/Booting-a-secure-system/Secure-boot
+.. _arm-architecture-security-features-platform-security: https://www.arm.com/architecture/security-features/platform-security
+.. _linux-repository: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/
+.. _arm-trustzone-for-cortex-a-website: https://www.arm.com/technologies/trustzone-for-cortex-a
+.. _arm-fmw-framework-a-profile-pdf: https://developer.arm.com/documentation/den0077/latest
+.. _arm-fmw-framework-m-profile-pdf: https://developer.arm.com/architectures/Firmware%20Framework%20for%20M-Profile
+.. _platform-security-fwu-for-a-profile-pdf: https://developer.arm.com/documentation/den0118/a/
+.. _op-tee-os-repository: https://github.com/OP-TEE/optee_os
+.. _psa-certified-website: https://www.psacertified.org/
+.. _psa_l2-ready: https://www.psacertified.org/products/corstone-1000/
+.. _systemready-ir-certification: https://armkeil.blob.core.windows.net/developer/Files/pdf/certificate-list/arm-systemready-ve-arm-neoverse.pdf
+.. _trusted-board-boot-requirements-client-pdf: https://developer.arm.com/documentation/den0006/latest
+.. _trusted-firmware-m-website: https://www.trustedfirmware.org/projects/tf-m/
+.. _trusted-firmware-m-bl1-website: https://trustedfirmware-m.readthedocs.io/en/latest/design_docs/booting/bl1.html
+.. _trusted-firmware-a-bl2-website: https://developer.arm.com/documentation/108028/0000/RD-TC22-software/Software-components/AP-firmware/Trusted-firmware-A-BL2
+.. _trusted-firmware-a-fip-guide: https://trustedfirmware-a.readthedocs.io/en/latest/design/firmware-design.html#firmware-image-package-fip
+.. _trusted-services-website: https://www.trustedfirmware.org/projects/trusted-services/
+.. _trusted-services-uefi-smm-website: https://trusted-services.readthedocs.io/en/integration/services/uefi-smm-services.html#
+.. _das-u-boot-repository: https://github.com/u-boot/u-boot.git
+.. _keil-rtx5-website: https://developer.arm.com/Tools%20and%20Software/Keil%20MDK/RTX5%20RTOS
+.. _ppa-website: https://developer.arm.com/documentation/102738/0100/Power--performance--and-area-analysis
+.. _mcuboot-website: https://docs.mcuboot.com/

meta-arm-bsp/documentation/n1sdp.md

@@ -1,78 +0,0 @@
-# N1SDP Development Platform Support in meta-arm-bsp
-
-## Overview
-The N1SDP provides access to the Arm Neoverse N1 SoC. The N1SDP enables software development for key enterprise technology
-and general Arm software development. The N1SDP consists of the N1 board containing the N1 SoC.
-The N1 SoC contains two dual-core Arm Neoverse N1 processor clusters.
-
-The system demonstrates Arm technology in the context of Cache-Coherent Interconnect for Accelerators (CCIX) protocol by:
-
-- Running coherent traffic between the N1 SoC and an accelerator card.
-- Coherent communication between two N1 SoCs.
-- Enabling development of CCIX-enabled FPGA accelerators.
-
-Further information on N1SDP can be found at
-https://community.arm.com/developer/tools-software/oss-platforms/w/docs/458/neoverse-n1-sdp
-
-## Configuration:
-In the local.conf file, MACHINE should be set as follow:
-MACHINE ?= "n1sdp"
-
-## Building
-```bash$ bitbake core-image-minimal```
-
-## Running
-
-# Update Firmware on SD card:
-
-(*) To use n1sdp board in single chip mode, flash:
-    n1sdp-board-firmware_primary.tar.gz firmware.
-
-(*) To use n1sdp board in multi chip mode, flash:
-    n1sdp-board-firmware_primary.tar.gz firmware to primary board,
-    n1sdp-board-firmware_secondary.tar.gz firmware to secondary board.
-
-The SD card content is generated during the build here:
-  tmp/deploy/images/n1sdp/n1sdp-board-firmware_primary.tar.gz
-  tmp/deploy/images/n1sdp/n1sdp-board-firmware_secondary.tar.gz
-
-
-Its content must be written on the N1SDP firmware SD card.
-To do this:
-- insert the sdcard of the N1SDP in an SD card reader and mount it:
-```bash$ sudo mount /dev/sdx1 /mnt```
-(replace sdx by the device of the SD card)
-
-- erase its content and put the new one:
-```bash$ sudo rm -rf /mnt/*```
-```bash$ sudo tar --no-same-owner -xzf tmp/deploy/images/n1sdp/n1sdp-board-firmware_primary.tar.gz -C /mnt/```
-```bash$ sudo umount /mnt```
-
-- reinsert the SD card in the N1SDP board
-
-Firmware tarball contains iofpga configuration files, scp and uefi binaries.
-
-**NOTE**:
-If the N1SDP board was manufactured after November 2019 (Serial Number greater
-than 36253xxx), a different PMIC firmware image must be used to prevent
-potential damage to the board. More details can be found in [1].
-The `MB/HBI0316A/io_v123f.txt` file located in the microSD needs to be updated.
-To update it, set the PMIC image (300k_8c2.bin) to be used in the newer models
-by running the following commands on your host PC:
-
-    $ sudo umount /dev/sdx1
-    $ sudo mount /dev/sdx1 /mnt
-    $ sudo sed -i '/^MBPMIC: pms_0V85.bin/s/^/;/g' /mnt/MB/HBI0316A/io_v123f.txt
-    $ sudo sed -i '/^;MBPMIC: 300k_8c2.bin/s/^;//g' /mnt/MB/HBI0316A/io_v123f.txt
-    $ sudo umount /mnt
-
-# Prepare an USB hard drive:
-
-Grub boot partition is placed on first partition of the *.wic image,
-Linux root file system is placed on the second partition of the *.wic image:
-  tmp/deploy/images/n1sdp/core-image-minimal-n1sdp.wic
-
-This *.wic image should be copied to USB stick with simple dd call.
-
-
-[1]: https://community.arm.com/developer/tools-software/oss-platforms/w/docs/604/notice-potential-damage-to-n1sdp-boards-if-using-latest-firmware-release

meta-arm-bsp/documentation/requirements.txt

@@ -1,4 +1,4 @@
-# Copyright (c) 2022, Arm Limited.
+# Copyright (c) 2022-2024, Arm Limited.
 #
 # SPDX-License-Identifier: MIT
 
@@ -6,6 +6,6 @@
 jinja2==3.1.1
 
 # Required to build the documentation
-sphinx~=5.0
-sphinx_rtd_theme~=2.0.0
-docutils==0.17.1
+sphinx==7.1.2
+sphinx_rtd_theme~=3.0.0
+docutils~=0.18.1

meta-arm-bsp/documentation/template.md

@@ -16,4 +16,4 @@
 
 *A summary of how to deploy or execute the image*
 
-*For example, an overview of the N1SDP SD structure, or FVP arguments*
+*For example, an overview of FVP arguments*

meta-arm-bsp/lib/oeqa/runtime/cases/parselogs-ignores-corstone1000-fvp.txt

@@ -0,0 +1,8 @@
+psci: failed to boot CPU1 (-95)
+CPU1: failed to boot: -95
+psci: failed to boot CPU2 (-95)
+CPU2: failed to boot: -95
+psci: failed to boot CPU3 (-95)
+CPU3: failed to boot: -95
+ARM FF-A: Notification setup failed -95, not enabled
+ARM FF-A: Failed to register driver sched callback -95

meta-arm-bsp/lib/oeqa/runtime/cases/parselogs-ignores-fvp-base.txt

@@ -0,0 +1 @@
+basic-mmio-gpio: Failed to locate of_node [id: -2]

meta-arm-bsp/lib/oeqa/runtime/cases/parselogs-ignores-sbsa-ref.txt

@@ -3,3 +3,6 @@ NUMA: Failed to initialise from firmware
 
 # TODO: we should be using bochsdrm over efifb?
 efifb: cannot reserve video memory at 0x80000000
+
+# TODO: debug why this sometimes happens
+failed to find screen to remove

meta-arm-bsp/recipes-bsp/hafnium/hafnium_%.bbappend

@@ -1,6 +1,5 @@
 # Machine specific configurations
 
 MACHINE_HAFNIUM_REQUIRE ?= ""
-MACHINE_HAFNIUM_REQUIRE:tc = "hafnium-tc.inc"
 
 require ${MACHINE_HAFNIUM_REQUIRE}

meta-arm-bsp/recipes-bsp/images/corstone1000-flash-firmware-image.bb

@@ -53,9 +53,11 @@ TFM_SIGN_PRIVATE_KEY = "${libdir}/tfm-scripts/root-RSA-3072_1.pem"
 RE_IMAGE_OFFSET = "0x1000"
 
 # Offsets for the .nopt image generation
-TFM_OFFSET = "102400"
-FIP_OFFSET = "479232"
-KERNEL_OFFSET = "2576384"
+# These offset values have to be aligned with those in
+# meta-arm/meta-arm-bsp/wic/corstone1000-flash-firmware.wks.in
+TFM_OFFSET = "147456"
+FIP_OFFSET = "475136"
+KERNEL_OFFSET = "2572288"
 
 do_sign_images() {
     # Sign TF-A BL2

meta-arm-bsp/recipes-bsp/images/firmware-image-juno.bb

@@ -14,7 +14,7 @@ COMPATIBLE_MACHINE = "juno"
 
 LINARO_RELEASE = "19.06"
 
-SRC_URI = "http://releases.linaro.org/members/arm/platforms/${LINARO_RELEASE}/juno-latest-oe-uboot.zip;subdir=${UNPACK_DIR} \
+SRC_URI = "http://releases.linaro.org/members/arm/platforms/${LINARO_RELEASE}/juno-latest-oe-uboot.zip;subdir=${S} \
     file://images-r0.txt \
     file://images-r1.txt \
     file://images-r2.txt \
@@ -23,7 +23,8 @@ SRC_URI = "http://releases.linaro.org/members/arm/platforms/${LINARO_RELEASE}/ju
 SRC_URI[md5sum] = "01b662b81fa409d55ff298238ad24003"
 SRC_URI[sha256sum] = "b8a3909bb3bc4350a8771b863193a3e33b358e2a727624a77c9ecf13516cec82"
 
-UNPACK_DIR = "juno-firmware-${LINARO_RELEASE}"
+FIRMWARE_DIR = "juno-firmware-${LINARO_RELEASE}"
+S = "${UNPACKDIR}/${FIRMWARE_DIR}"
 
 inherit deploy nopackages
 
@@ -33,23 +34,23 @@ do_compile[noexec] = "1"
 # The ${D} is used as a temporary directory and we don't generate any
 # packages for this recipe.
 do_install() {
-    cp -a ${WORKDIR}/${UNPACK_DIR} ${D}
+    cp -a ${S} ${D}/
     cp -f ${RECIPE_SYSROOT}/firmware/bl1-juno.bin \
-        ${D}/${UNPACK_DIR}/SOFTWARE/bl1.bin
+        ${D}/${FIRMWARE_DIR}/SOFTWARE/bl1.bin
 
     cp -f ${RECIPE_SYSROOT}/firmware/fip-juno.bin \
-        ${D}/${UNPACK_DIR}/SOFTWARE/fip.bin
+        ${D}/${FIRMWARE_DIR}/SOFTWARE/fip.bin
 
     cp -f ${RECIPE_SYSROOT}/firmware/scp_romfw_bypass.bin \
-        ${D}/${UNPACK_DIR}/SOFTWARE/scp_bl1.bin
+        ${D}/${FIRMWARE_DIR}/SOFTWARE/scp_bl1.bin
 
     # u-boot environment file
-    cp -f ${WORKDIR}/uEnv.txt ${D}/${UNPACK_DIR}/SOFTWARE/
+    cp -f ${UNPACKDIR}/uEnv.txt ${D}/${FIRMWARE_DIR}/SOFTWARE/
 
     # Juno images list file
-    cp -f ${WORKDIR}/images-r0.txt ${D}/${UNPACK_DIR}/SITE1/HBI0262B/images.txt
-    cp -f ${WORKDIR}/images-r1.txt ${D}/${UNPACK_DIR}/SITE1/HBI0262C/images.txt
-    cp -f ${WORKDIR}/images-r2.txt ${D}/${UNPACK_DIR}/SITE1/HBI0262D/images.txt
+    cp -f ${UNPACKDIR}/images-r0.txt ${D}/${FIRMWARE_DIR}/SITE1/HBI0262B/images.txt
+    cp -f ${UNPACKDIR}/images-r1.txt ${D}/${FIRMWARE_DIR}/SITE1/HBI0262C/images.txt
+    cp -f ${UNPACKDIR}/images-r2.txt ${D}/${FIRMWARE_DIR}/SITE1/HBI0262D/images.txt
 }
 
 do_deploy() {
@@ -59,18 +60,18 @@ do_deploy() {
     # task.
     for f in ${KERNEL_DEVICETREE}; do
         install -m 755 -c ${DEPLOY_DIR_IMAGE}/$(basename $f) \
-            ${D}/${UNPACK_DIR}/SOFTWARE/.
+            ${D}/${FIRMWARE_DIR}/SOFTWARE/
     done
 
     if [ "${INITRAMFS_IMAGE_BUNDLE}" -eq 1 ]; then
         cp -L -f ${DEPLOY_DIR_IMAGE}/Image.gz-initramfs-juno.bin \
-            ${D}/${UNPACK_DIR}/SOFTWARE/Image
+            ${D}/${FIRMWARE_DIR}/SOFTWARE/Image
     else
-        cp -L -f ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE} ${D}/${UNPACK_DIR}/SOFTWARE/
+        cp -L -f ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE} ${D}/${FIRMWARE_DIR}/SOFTWARE/
     fi
 
     # Compress the files
-    tar -C ${D}/${UNPACK_DIR} -zcvf ${WORKDIR}/${PN}.tar.gz ./
+    tar -C ${D}/${FIRMWARE_DIR} -zcvf ${WORKDIR}/${PN}.tar.gz ./
 
     # Deploy the compressed archive to the deploy folder
     install -D -p -m0644 ${WORKDIR}/${PN}.tar.gz ${DEPLOYDIR}/${PN}.tar.gz

meta-arm-bsp/recipes-bsp/images/n1sdp-board-firmware_2022.06.22.bb

@@ -1,37 +0,0 @@
-SUMMARY = "Board Firmware binaries for N1SDP"
-SECTION = "firmware"
-
-LICENSE = "STM-SLA0044-Rev5"
-LIC_FILES_CHKSUM = "file://LICENSES/MB/STM.TXT;md5=1b74d8c842307d03c116f2d71cbf868a"
-
-inherit deploy
-
-INHIBIT_DEFAULT_DEPS = "1"
-
-PACKAGE_ARCH = "${MACHINE_ARCH}"
-COMPATIBLE_MACHINE = "n1sdp"
-
-SRC_URI = "git://git.gitlab.arm.com/arm-reference-solutions/board-firmware.git;protocol=https;branch=n1sdp"
-
-SRCREV = "70ba494265eee76747faff38264860c19e214540"
-PV .= "+git"
-
-S = "${WORKDIR}/git"
-
-INSTALL_DIR = "/n1sdp-board-firmware_source"
-
-do_install() {
-    rm -rf ${S}/SOFTWARE
-    install -d ${D}${INSTALL_DIR}
-    cp -Rp --no-preserve=ownership ${S}/* ${D}${INSTALL_DIR}
-}
-
-FILES:${PN}-staticdev += " ${INSTALL_DIR}/LIB/sensor.a"
-FILES:${PN} = "${INSTALL_DIR}"
-SYSROOT_DIRS += "${INSTALL_DIR}"
-
-do_deploy() {
-    install -d ${DEPLOYDIR}${INSTALL_DIR}
-    cp -Rp --no-preserve=ownership ${S}/* ${DEPLOYDIR}${INSTALL_DIR}
-}
-addtask deploy after do_install before do_build

meta-arm-bsp/recipes-bsp/images/sdcard-image-n1sdp_0.1.bb

@@ -1,85 +0,0 @@
-SUMMARY = "Firmware image recipe for generating SD-Card artifacts."
-
-inherit deploy nopackages
-
-DEPENDS = "trusted-firmware-a \
-           virtual/control-processor-firmware \
-           n1sdp-board-firmware"
-
-LICENSE = "MIT"
-PACKAGE_ARCH = "${MACHINE_ARCH}"
-COMPATIBLE_MACHINE = "n1sdp"
-RM_WORK_EXCLUDE += "${PN}"
-do_configure[noexec] = "1"
-do_compile[noexec] = "1"
-do_install[noexec] = "1"
-
-FIRMWARE_DIR = "n1sdp-board-firmware_source"
-PRIMARY_DIR = "${WORKDIR}/n1sdp-board-firmware_primary"
-SECONDARY_DIR = "${WORKDIR}/n1sdp-board-firmware_secondary"
-
-SOC_BINARIES = "mcp_fw.bin scp_fw.bin mcp_rom.bin scp_rom.bin"
-
-prepare_package() {
-    cd ${WORKDIR}
-
-    # Master/Primary
-    cp -av ${RECIPE_SYSROOT}/${FIRMWARE_DIR}/* ${PRIMARY_DIR}
-    mkdir -p ${PRIMARY_DIR}/SOFTWARE/
-
-    # Copy FIP binary
-    cp -v ${RECIPE_SYSROOT}/firmware/fip.bin ${PRIMARY_DIR}/SOFTWARE/
-
-    # Copy SOC binaries
-    for f in ${SOC_BINARIES}; do
-        cp -v ${RECIPE_SYSROOT}/firmware/${f} ${PRIMARY_DIR}/SOFTWARE/
-    done
-
-    sed -i -e 's|^C2C_ENABLE.*|C2C_ENABLE: TRUE            ;C2C enable TRUE/FALSE|' \
-        ${PRIMARY_DIR}/MB/HBI0316A/io_v123f.txt
-    sed -i -e 's|^C2C_SIDE.*|C2C_SIDE: MASTER            ;C2C side SLAVE/MASTER|' \
-        ${PRIMARY_DIR}/MB/HBI0316A/io_v123f.txt
-    sed -i -e 's|.*SOCCON: 0x1170.*PLATFORM_CTRL.*|SOCCON: 0x1170 0x00000100   ;SoC SCC PLATFORM_CTRL|' \
-        ${PRIMARY_DIR}/MB/HBI0316A/io_v123f.txt
-
-    # Update load address for trusted boot
-    sed -i -e '/^IMAGE4ADDRESS:/ s|0x60200000|0x64200000|' ${PRIMARY_DIR}/MB/HBI0316A/images.txt
-    sed -i -e '/^IMAGE4UPDATE:/ s|FORCE   |SCP_AUTO|' ${PRIMARY_DIR}/MB/HBI0316A/images.txt
-    sed -i -e '/^IMAGE4FILE: \\SOFTWARE\\/s|uefi.bin|fip.bin |' ${PRIMARY_DIR}/MB/HBI0316A/images.txt
-
-    # Slave/Secondary
-    cp -av ${RECIPE_SYSROOT}/${FIRMWARE_DIR}/* ${SECONDARY_DIR}
-    mkdir -p ${SECONDARY_DIR}/SOFTWARE/
-
-    # Copy SOC binaries
-    for f in ${SOC_BINARIES}; do
-        cp -v ${RECIPE_SYSROOT}/firmware/${f} ${SECONDARY_DIR}/SOFTWARE/
-    done
-
-    sed -i -e 's|^C2C_ENABLE.*|C2C_ENABLE: TRUE            ;C2C enable TRUE/FALSE|' \
-        ${SECONDARY_DIR}/MB/HBI0316A/io_v123f.txt
-    sed -i -e 's|^C2C_SIDE.*|C2C_SIDE: SLAVE             ;C2C side SLAVE/MASTER|' \
-        ${SECONDARY_DIR}/MB/HBI0316A/io_v123f.txt
-    sed -i -e 's|.*SOCCON: 0x1170.*PLATFORM_CTRL.*|SOCCON: 0x1170 0x00000101   ;SoC SCC PLATFORM_CTRL|' \
-        ${SECONDARY_DIR}/MB/HBI0316A/io_v123f.txt
-    sed -i -e '/^TOTALIMAGES:/ s|5|4|' ${SECONDARY_DIR}/MB/HBI0316A/images.txt
-    sed -i -e 's|^IMAGE4|;&|' ${SECONDARY_DIR}/MB/HBI0316A/images.txt
-}
-
-do_deploy() {
-    # prepare Master & Slave packages
-    prepare_package
-
-    for dir in ${PRIMARY_DIR} ${SECONDARY_DIR}; do
-        dir_name=$(basename ${dir})
-        mkdir -p ${D}/${dir_name}
-        cp -av ${dir} ${D}
-
-        # Compress the files
-        tar -C ${D}/${dir_name} -zcvf ${DEPLOYDIR}/${dir_name}.tar.gz ./
-    done
-}
-do_deploy[dirs] += "${PRIMARY_DIR} ${SECONDARY_DIR}"
-do_deploy[cleandirs] += "${PRIMARY_DIR} ${SECONDARY_DIR}"
-do_deploy[umask] = "022"
-addtask deploy after do_prepare_recipe_sysroot

meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware-n1sdp.inc

@@ -1,35 +0,0 @@
-# N1SDP specific SCP configurations and build instructions
-
-COMPATIBLE_MACHINE:n1sdp = "n1sdp"
-
-SCP_LOG_LEVEL = "INFO"
-
-DEPENDS += "fiptool-native"
-DEPENDS += "trusted-firmware-a"
-DEPENDS += "n1sdp-board-firmware"
-
-# The n1sdp sensor library is needed for building SCP N1SDP Platform
-# https://github.com/ARM-software/SCP-firmware/tree/master/product/n1sdp
-EXTRA_OECMAKE:append = " \
-    -DSCP_N1SDP_SENSOR_LIB_PATH=${RECIPE_SYSROOT}/n1sdp-board-firmware_source/LIB/sensor.a \
-"
-
-do_install:append() {
-   fiptool \
-       create \
-       --scp-fw "${D}/firmware/scp_ramfw.bin" \
-       --blob uuid=cfacc2c4-15e8-4668-82be-430a38fad705,file="${RECIPE_SYSROOT}/firmware/bl1.bin" \
-       "scp_fw.bin"
-
-   # This UUID is FIP_UUID_MCP_BL2 in SCP-Firmware.
-   fiptool \
-       create \
-       --blob uuid=54464222-a4cf-4bf8-b1b6-cee7dade539e,file="${D}/firmware/mcp_ramfw.bin" \
-       "mcp_fw.bin"
-
-   install "scp_fw.bin" "${D}/firmware/scp_fw.bin"
-   install "mcp_fw.bin" "${D}/firmware/mcp_fw.bin"
-
-   ln -sf "scp_romfw.bin" "${D}/firmware/scp_rom.bin"
-   ln -sf "mcp_romfw.bin" "${D}/firmware/mcp_rom.bin"
-}

meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware_%.bbappend

@@ -3,8 +3,6 @@
 MACHINE_SCP_REQUIRE ?= ""
 
 MACHINE_SCP_REQUIRE:juno = "scp-firmware-juno.inc"
-MACHINE_SCP_REQUIRE:n1sdp = "scp-firmware-n1sdp.inc"
 MACHINE_SCP_REQUIRE:sgi575 = "scp-firmware-sgi575.inc"
-MACHINE_SCP_REQUIRE:tc = "scp-firmware-tc.inc"
 
 require ${MACHINE_SCP_REQUIRE}

meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/0001-fix-zynqmp-handle-secure-SGI-at-EL1-for-OP-TEE.patch

@@ -0,0 +1,33 @@
+From f5b2fa90e0c0324f31e72429e7a7382f49a25912 Mon Sep 17 00:00:00 2001
+From: Shen Jiamin <shen_jiamin@comp.nus.edu.sg>
+Date: Wed, 24 Jul 2024 18:58:55 +0800
+Subject: [PATCH] fix(zynqmp): handle secure SGI at EL1 for OP-TEE
+
+OP-TEE requires SGIs to be handled at S-EL1. The
+Makefile was not properly setting the flag
+GICV2_G0_FOR_EL3 to 0 when the SPD is OP-TEE.
+
+Change-Id: I256afa37ddf4ad4a154c43d51807de670c3689bb
+Signed-off-by: Shen Jiamin <shen_jiamin@comp.nus.edu.sg>
+---
+ plat/xilinx/zynqmp/platform.mk | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+Upstream-Status: Backport
+
+diff --git a/plat/xilinx/zynqmp/platform.mk b/plat/xilinx/zynqmp/platform.mk
+index c340009d0..22eceb621 100644
+--- a/plat/xilinx/zynqmp/platform.mk
++++ b/plat/xilinx/zynqmp/platform.mk
+@@ -21,7 +21,7 @@ ENABLE_LTO := 1
+ EL3_EXCEPTION_HANDLING := $(SDEI_SUPPORT)
+ 
+ # pncd SPD requires secure SGI to be handled at EL1
+-ifeq (${SPD}, $(filter ${SPD},pncd tspd))
++ifeq (${SPD}, $(filter ${SPD},pncd tspd opteed))
+ ifeq (${ZYNQMP_WDT_RESTART},1)
+ $(error "Error: ZYNQMP_WDT_RESTART and SPD=pncd are incompatible")
+ endif
+-- 
+2.34.1
+

meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/0001-qemu_measured_boot.c-ignore-TPM-error-and-continue-w.patch

@@ -0,0 +1,33 @@
+From b91c651e6d596cfe27448b19c8fb2f1168493827 Mon Sep 17 00:00:00 2001
+From: Mikko Rapeli <mikko.rapeli@linaro.org>
+Date: Mon, 15 Jan 2024 09:26:56 +0000
+Subject: [PATCH] qemu_measured_boot.c: ignore TPM error and continue with boot
+
+If firmware is configured with TPM support but it's missing
+on HW, e.g. swtpm not started and/or configured with qemu,
+then continue booting. Missing TPM is not a fatal error.
+Enables testing boot without TPM device to see that
+missing TPM is detected further up the SW stack and correct
+fallback actions are taken.
+
+Upstream-Status: Pending
+
+Signed-off-by: Mikko Rapeli <mikko.rapeli@linaro.org>
+---
+ plat/qemu/qemu/qemu_measured_boot.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/plat/qemu/qemu/qemu_measured_boot.c b/plat/qemu/qemu/qemu_measured_boot.c
+index 76a4da17e6a9..ec7f44d3720d 100644
+--- a/plat/qemu/qemu/qemu_measured_boot.c
++++ b/plat/qemu/qemu/qemu_measured_boot.c
+@@ -80,7 +80,8 @@ void bl2_plat_mboot_finish(void)
+ 		 * Note: In QEMU platform, OP-TEE uses nt_fw_config to get the
+ 		 * secure Event Log buffer address.
+ 		 */
+-		panic();
++		ERROR("Ignoring TPM errors, continuing without\n");
++		return;
+ 	}
+ 
+ 	/* Copy Event Log to Non-secure memory */

meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0002-fix-corstone1000-pass-spsr-value-explicitly.patch

@@ -6,7 +6,7 @@ Subject: [PATCH] fix(corstone1000): pass spsr value explicitly
 Passes spsr value for BL32 (OPTEE) explicitly between different boot
 stages.
 
-Upstream-Status: Pending
+Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/30116/2]
 Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
 ---
  .../corstone1000/common/corstone1000_bl2_mem_params_desc.c     | 3 ++-

meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0003-fix-corstone1000-remove-unused-NS_SHARED_RAM-region.patch

@@ -9,7 +9,7 @@ for BL32 image, this patch removes NS_SHARED_RAM region which is not currently u
 corstone1000 platform.
 
 Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
-Upstream-Status: Pending
+Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/30117/2]
 ---
  .../corstone1000/common/corstone1000_plat.c   |  1 -
  .../common/include/platform_def.h             | 19 +------------------

meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0003-fix-spmd-remove-EL3-interrupt-registration.patch

@@ -1,54 +0,0 @@
-From 684b8f88238f522b52eb102485762e02e6b1671a Mon Sep 17 00:00:00 2001
-From: Emekcan Aras <Emekcan.Aras@arm.com>
-Date: Fri, 23 Feb 2024 13:17:59 +0000
-Subject: [PATCH] fix(spmd): remove EL3 interrupt registration
-
-This configuration should not be done for corstone1000 and similar
-platforms. GICv2 systems only support EL3 interrupts and can have SEL1 component
-as SPMC.
-
-Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
-Upstream-Status: Inappropriate [Discussions of fixing this in a better way is ongoing in upstream]
----
- services/std_svc/spmd/spmd_main.c | 24 ------------------------
- 1 file changed, 24 deletions(-)
-
-diff --git a/services/std_svc/spmd/spmd_main.c b/services/std_svc/spmd/spmd_main.c
-index 066571e9b..313f05bf3 100644
---- a/services/std_svc/spmd/spmd_main.c
-+++ b/services/std_svc/spmd/spmd_main.c
-@@ -580,30 +580,6 @@ static int spmd_spmc_init(void *pm_addr)
- 		panic();
- 	}
- 
--	/*
--	 * Permit configurations where the SPM resides at S-EL1/2 and upon a
--	 * Group0 interrupt triggering while the normal world runs, the
--	 * interrupt is routed either through the EHF or directly to the SPMD:
--	 *
--	 * EL3_EXCEPTION_HANDLING=0: the Group0 interrupt is routed to the SPMD
--	 *                   for handling by spmd_group0_interrupt_handler_nwd.
--	 *
--	 * EL3_EXCEPTION_HANDLING=1: the Group0 interrupt is routed to the EHF.
--	 *
--	 */
--#if (EL3_EXCEPTION_HANDLING == 0)
--	/*
--	 * Register an interrupt handler routing Group0 interrupts to SPMD
--	 * while the NWd is running.
--	 */
--	rc = register_interrupt_type_handler(INTR_TYPE_EL3,
--					     spmd_group0_interrupt_handler_nwd,
--					     flags);
--	if (rc != 0) {
--		panic();
--	}
--#endif
--
- 	return 0;
- }
- 
--- 
-2.25.1
-
-

meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0004-fix-corstone1000-clean-the-cache-and-disable-interru.patch

@@ -0,0 +1,46 @@
+From 37f92eeb4361626072e690adb3b0bb20db7c2fca Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <Emekcan.Aras@arm.com>
+Date: Wed, 15 May 2024 13:54:51 +0100
+Subject: [PATCH] fix(corstone1000): clean the cache and disable interrupt
+ before system reset
+
+Corstone1000 does not properly clean the cache and disable gic interrupts
+before the reset. This causes a race condition especially in FVP after reset.
+This adds proper sequence before resetting the platform.
+
+Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
+Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/30118/2]
+---
+ plat/arm/board/corstone1000/common/corstone1000_pm.c | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/plat/arm/board/corstone1000/common/corstone1000_pm.c b/plat/arm/board/corstone1000/common/corstone1000_pm.c
+index 4b0a791e7..a52e945bf 100644
+--- a/plat/arm/board/corstone1000/common/corstone1000_pm.c
++++ b/plat/arm/board/corstone1000/common/corstone1000_pm.c
+@@ -7,6 +7,7 @@
+ #include <lib/psci/psci.h>
+ #include <plat/arm/common/plat_arm.h>
+ #include <platform_def.h>
++#include <drivers/arm/gicv2.h>
+ /*******************************************************************************
+  * Export the platform handlers via plat_arm_psci_pm_ops. The ARM Standard
+  * platform layer will take care of registering the handlers with PSCI.
+@@ -18,6 +19,14 @@ static void __dead2 corstone1000_system_reset(void)
+ 	uint32_t volatile * const watchdog_ctrl_reg = (uint32_t *) SECURE_WATCHDOG_ADDR_CTRL_REG;
+ 	uint32_t volatile * const watchdog_val_reg = (uint32_t *) SECURE_WATCHDOG_ADDR_VAL_REG;
+ 
++	/* Flush and invalidate data cache */
++	dcsw_op_all(DCCISW);
++	/*
++	 * Disable GIC CPU interface to prevent pending interrupt
++	 * from waking up the AP from WFI.
++	 */
++	gicv2_cpuif_disable();
++
+ 	*(watchdog_val_reg) = SECURE_WATCHDOG_COUNTDOWN_VAL;
+ 	*watchdog_ctrl_reg = SECURE_WATCHDOG_MASK_ENABLE;
+ 	while (1) {
+-- 
+2.25.1
+

meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0005-feat-corstone1000-Add-multicore-support-for-FVP-plat.patch

@@ -0,0 +1,161 @@
+From dcc9cf5111c41edc691f007bd97548d96f5efddb Mon Sep 17 00:00:00 2001
+From: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>
+Date: Thu, 9 May 2024 16:59:34 +0000
+Subject: [PATCH] feat(corstone1000): add multicore support for fvp
+
+This changeset adds the multicore support for the Corstone-1000 FVP.
+It adds the PSCI CPU_ON and CPU_ON_FINISH power domain functionalities
+for the secondary cores.
+
+Upstream-Status: Backport [https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/29176]
+Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>
+---
+ .../common/corstone1000_helpers.S             | 26 +++++++++++
+ .../corstone1000/common/corstone1000_pm.c     | 43 ++++++++++++++++++-
+ .../common/include/platform_def.h             | 15 ++++++-
+ plat/arm/board/corstone1000/platform.mk       |  7 +++
+ 4 files changed, 89 insertions(+), 2 deletions(-)
+
+diff --git a/plat/arm/board/corstone1000/common/corstone1000_helpers.S b/plat/arm/board/corstone1000/common/corstone1000_helpers.S
+index cbe27c3b5..90dc4fee6 100644
+--- a/plat/arm/board/corstone1000/common/corstone1000_helpers.S
++++ b/plat/arm/board/corstone1000/common/corstone1000_helpers.S
+@@ -21,8 +21,34 @@
+ 	 * --------------------------------------------------------------------
+ 	 */
+ func plat_secondary_cold_boot_setup
++#if defined(CORSTONE1000_FVP_MULTICORE)
++
++	/* Calculate the address of our hold entry */
++	bl	plat_my_core_pos
++	lsl	x0, x0, #CORSTONE1000_SECONDARY_CORE_HOLD_SHIFT
++	mov_imm	x2, CORSTONE1000_SECONDARY_CORE_HOLD_BASE
++	
++	/* Set the wait state for the secondary core */
++	mov_imm	x3, CORSTONE1000_SECONDARY_CORE_STATE_WAIT
++	str	x3, [x2, x0]
++	dmb	ish
++
++	/* Poll until the primary core signals to go  */
++poll_mailbox:
++	ldr	x1, [x2, x0]
++	cmp	x1, #CORSTONE1000_SECONDARY_CORE_STATE_WAIT
++	beq	1f
++	mov_imm	x0, PLAT_ARM_TRUSTED_MAILBOX_BASE
++	ldr	x1, [x0]
++	br	x1
++1:
++	wfe
++	b	poll_mailbox
++#else
+ cb_panic:
+ 	b	cb_panic
++#endif
++
+ endfunc plat_secondary_cold_boot_setup
+ 
+ 	/* ---------------------------------------------------------------------
+diff --git a/plat/arm/board/corstone1000/common/corstone1000_pm.c b/plat/arm/board/corstone1000/common/corstone1000_pm.c
+index a52e945bf..979243317 100644
+--- a/plat/arm/board/corstone1000/common/corstone1000_pm.c
++++ b/plat/arm/board/corstone1000/common/corstone1000_pm.c
+@@ -33,10 +33,51 @@ static void __dead2 corstone1000_system_reset(void)
+ 		wfi();
+ 	}
+ }
++#if defined(CORSTONE1000_FVP_MULTICORE)
++int corstone1000_validate_ns_entrypoint(uintptr_t entrypoint)
++{
++	/*
++	 * Check if the non secure entrypoint lies within the non
++	 * secure DRAM.
++	 */
++	if ((entrypoint >= ARM_NS_DRAM1_BASE) && (entrypoint < (ARM_NS_DRAM1_BASE + ARM_NS_DRAM1_SIZE))) {
++		return PSCI_E_SUCCESS;
++	}
++	return PSCI_E_INVALID_ADDRESS;
++}
++
++int corstone1000_pwr_domain_on(u_register_t mpidr)
++{
++	int core_index = plat_core_pos_by_mpidr(mpidr);
++	uint64_t *secondary_core_hold_base = (uint64_t *)CORSTONE1000_SECONDARY_CORE_HOLD_BASE;
+ 
++	/* Validate the core index */
++	if ((core_index < 0) || (core_index > PLATFORM_CORE_COUNT)) {
++		return PSCI_E_INVALID_PARAMS;
++	}
++	secondary_core_hold_base[core_index] = CORSTONE1000_SECONDARY_CORE_STATE_GO;
++	dsbish();
++	sev();
++
++	return PSCI_E_SUCCESS;
++}
++
++void corstone1000_pwr_domain_on_finish(const psci_power_state_t *target_state)
++{
++	(void)target_state;
++	plat_arm_gic_init();
++}
++#endif
+ plat_psci_ops_t plat_arm_psci_pm_ops = {
++#if defined(CORSTONE1000_FVP_MULTICORE)
++	.pwr_domain_on = corstone1000_pwr_domain_on,
++	.pwr_domain_on_finish = corstone1000_pwr_domain_on_finish,
++	.validate_ns_entrypoint = corstone1000_validate_ns_entrypoint,
++	.system_reset = corstone1000_system_reset,
++#else
++	.validate_ns_entrypoint = NULL,
+ 	.system_reset = corstone1000_system_reset,
+-	.validate_ns_entrypoint = NULL
++#endif
+ };
+ 
+ const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops)
+diff --git a/plat/arm/board/corstone1000/common/include/platform_def.h b/plat/arm/board/corstone1000/common/include/platform_def.h
+index b9a1d43df..c4839ccf3 100644
+--- a/plat/arm/board/corstone1000/common/include/platform_def.h
++++ b/plat/arm/board/corstone1000/common/include/platform_def.h
+@@ -249,7 +249,20 @@
+  */
+ #define ARM_LOCAL_STATE_OFF	U(2)
+ 
+-#define PLAT_ARM_TRUSTED_MAILBOX_BASE	ARM_TRUSTED_SRAM_BASE
++#define PLAT_ARM_TRUSTED_MAILBOX_BASE   ARM_TRUSTED_SRAM_BASE
++
++#if defined(CORSTONE1000_FVP_MULTICORE)
++/* The secondary core entrypoint address points to bl31_warm_entrypoint
++ * and the address size is 8 bytes */
++#define CORSTONE1000_SECONDARY_CORE_ENTRYPOINT_ADDRESS_SIZE 	UL(0x8)
++
++#define CORSTONE1000_SECONDARY_CORE_HOLD_BASE         (PLAT_ARM_TRUSTED_MAILBOX_BASE + \
++						CORSTONE1000_SECONDARY_CORE_ENTRYPOINT_ADDRESS_SIZE)
++#define CORSTONE1000_SECONDARY_CORE_STATE_WAIT ULL(0)
++#define CORSTONE1000_SECONDARY_CORE_STATE_GO   ULL(1)
++#define CORSTONE1000_SECONDARY_CORE_HOLD_SHIFT ULL(3)
++#endif
++
+ #define PLAT_ARM_NSTIMER_FRAME_ID	U(1)
+ 
+ #define PLAT_ARM_NS_IMAGE_BASE		(BL33_BASE)
+diff --git a/plat/arm/board/corstone1000/platform.mk b/plat/arm/board/corstone1000/platform.mk
+index fd08803e8..45092ace9 100644
+--- a/plat/arm/board/corstone1000/platform.mk
++++ b/plat/arm/board/corstone1000/platform.mk
+@@ -31,6 +31,13 @@ override NEED_BL31	:=	yes
+ NEED_BL32		?=	yes
+ override NEED_BL33	:=	yes
+ 
++ENABLE_MULTICORE	:=	0
++ifneq ($(filter ${TARGET_PLATFORM}, fvp),)
++ifeq (${ENABLE_MULTICORE},1)
++$(eval $(call add_define,CORSTONE1000_FVP_MULTICORE))
++endif
++endif
++
+ # Add CORSTONE1000_WITH_BL32 as a preprocessor define (-D option)
+ ifeq (${NEED_BL32},yes)
+ $(eval $(call add_define,CORSTONE1000_WITH_BL32))
+-- 
+2.25.1
+

meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0006-feat-corstone1000-include-platform-header-file.patch

@@ -0,0 +1,28 @@
+From 8070bf4a89492727b6da3fb7bdec61748eae1d7d Mon Sep 17 00:00:00 2001
+From: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>
+Date: Tue, 2 Jul 2024 12:49:12 +0000
+Subject: [PATCH] fix(corstone1000): include platform header file
+
+Include platform.h file in order to remove compiler warnings
+
+Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/29727]
+Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>
+---
+ plat/arm/board/corstone1000/common/corstone1000_pm.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/plat/arm/board/corstone1000/common/corstone1000_pm.c b/plat/arm/board/corstone1000/common/corstone1000_pm.c
+index 979243317..9babe5b11 100644
+--- a/plat/arm/board/corstone1000/common/corstone1000_pm.c
++++ b/plat/arm/board/corstone1000/common/corstone1000_pm.c
+@@ -8,6 +8,7 @@
+ #include <plat/arm/common/plat_arm.h>
+ #include <platform_def.h>
+ #include <drivers/arm/gicv2.h>
++#include <plat/common/platform.h>
+ /*******************************************************************************
+  * Export the platform handlers via plat_arm_psci_pm_ops. The ARM Standard
+  * platform layer will take care of registering the handlers with PSCI.
+-- 
+2.34.1
+

meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/fvp-base/0001-fdts-fvp-base-Add-stdout-path-and-virtio-net-and-rng.patch

@@ -1,64 +0,0 @@
-From b79d3cf319cc5698311ef83247110c93d3c2de2c Mon Sep 17 00:00:00 2001
-Message-Id: <b79d3cf319cc5698311ef83247110c93d3c2de2c.1695834344.git.diego.sueiro@arm.com>
-From: Diego Sueiro <diego.sueiro@arm.com>
-Date: Wed, 27 Sep 2023 18:05:26 +0100
-Subject: [PATCH] fdts/fvp-base: Add stdout-path and virtio net and rng nodes
-
-Upstream-Status: Pending
-Signed-off-by: Diego Sueiro <diego.sueiro@arm.com>
----
- fdts/fvp-base-psci-common.dtsi |  8 ++++++--
- fdts/rtsm_ve-motherboard.dtsi  | 12 ++++++++++++
- 2 files changed, 18 insertions(+), 2 deletions(-)
-
-diff --git a/fdts/fvp-base-psci-common.dtsi b/fdts/fvp-base-psci-common.dtsi
-index 79cf37d3b0..b1ba5ce703 100644
---- a/fdts/fvp-base-psci-common.dtsi
-+++ b/fdts/fvp-base-psci-common.dtsi
-@@ -30,7 +30,9 @@
- #if (ENABLE_RME == 1)
- 	chosen { bootargs = "console=ttyAMA0 earlycon=pl011,0x1c090000 root=/dev/vda ip=on";};
- #else
--	chosen {};
-+	chosen {
-+		stdout-path = &v2m_serial0;
-+	};
- #endif
- 
- 	aliases {
-@@ -243,6 +245,8 @@
- 				<0 0 39 &gic 0 GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
- 				<0 0 40 &gic 0 GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
- 				<0 0 41 &gic 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
--				<0 0 42 &gic 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
-+				<0 0 42 &gic 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
-+				<0 0 44 &gic 0 GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
-+				<0 0 46 &gic 0 GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
- 	};
- };
-diff --git a/fdts/rtsm_ve-motherboard.dtsi b/fdts/rtsm_ve-motherboard.dtsi
-index 0a824b349a..21a083a51a 100644
---- a/fdts/rtsm_ve-motherboard.dtsi
-+++ b/fdts/rtsm_ve-motherboard.dtsi
-@@ -230,6 +230,18 @@
- 					interrupts = <42>;
- 				};
- 
-+				virtio@150000 {
-+					compatible = "virtio,mmio";
-+					reg = <0x150000 0x200>;
-+					interrupts = <44>;
-+				};
-+
-+				virtio@200000 {
-+					compatible = "virtio,mmio";
-+					reg = <0x200000 0x200>;
-+					interrupts = <46>;
-+				};
-+
- 				rtc@170000 {
- 					compatible = "arm,pl031", "arm,primecell";
- 					reg = <0x170000 0x1000>;
--- 
-2.39.1
-

meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/0001-Reserve-OP-TEE-memory-from-nwd.patch

@@ -1,42 +0,0 @@
-From 2d305094f8f500362079e9e7637d46129bf980e4 Mon Sep 17 00:00:00 2001
-From: Adam Johnston <adam.johnston@arm.com>
-Date: Tue, 25 Jul 2023 16:05:51 +0000
-Subject: [PATCH] n1sdp: Reserve OP-TEE memory from NWd
-
-The physical memory which is used to run OP-TEE on the N1SDP is known
-to the secure world via TOS_FW_CONFIG, but it may not be known to the
-normal world.
-
-As a precaution, explicitly reserve this memory via NT_FW_CONFIG to
-prevent the normal world from using it. This is not required on most
-platforms as the Trusted OS is run from secure RAM.
-
-Upstream-Status: Pending (not yet submitted to upstream)
-Signed-off-by: Adam Johnston <adam.johnston@arm.com>
-Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>
----
- plat/arm/board/n1sdp/fdts/n1sdp_nt_fw_config.dts | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
-diff --git a/plat/arm/board/n1sdp/fdts/n1sdp_nt_fw_config.dts b/plat/arm/board/n1sdp/fdts/n1sdp_nt_fw_config.dts
-index da5e04ddb6..b7e2d4e86f 100644
---- a/plat/arm/board/n1sdp/fdts/n1sdp_nt_fw_config.dts
-+++ b/plat/arm/board/n1sdp/fdts/n1sdp_nt_fw_config.dts
-@@ -20,4 +20,16 @@
- 		local-ddr-size = <0x0>;
- 		remote-ddr-size = <0x0>;
- 	};
-+
-+	reserved-memory {
-+		#address-cells = <2>;
-+		#size-cells = <2>;
-+		ranges;
-+
-+		optee@0xDE000000 {
-+			compatible = "removed-dma-pool";
-+			reg = <0x0 0xDE000000 0x0 0x02000000>;
-+			no-map;
-+		};
-+	};
- };
-\ No newline at end of file

meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/0001-n1sdp-tftf-tests-to-skip.patch

@@ -1,46 +0,0 @@
-From cc0153b56d634aa80b740be5afed15bedb94a2c9 Mon Sep 17 00:00:00 2001
-From: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>
-Date: Tue, 23 Jan 2024 14:19:39 +0000
-Subject: [PATCH] n1sdp patch tests to skip
-
-Upstream-Status: Pending
-Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>
----
- plat/arm/n1sdp/tests_to_skip.txt | 15 ++++++++++-----
- 1 file changed, 10 insertions(+), 5 deletions(-)
-
-diff --git a/plat/arm/n1sdp/tests_to_skip.txt b/plat/arm/n1sdp/tests_to_skip.txt
-index b6e87bf..1848408 100644
---- a/plat/arm/n1sdp/tests_to_skip.txt
-+++ b/plat/arm/n1sdp/tests_to_skip.txt
-@@ -11,7 +11,7 @@ SMMUv3 tests
- PSCI CPU Suspend in OSI mode
- 
- # PSCI is enabled but not tested
--PSCI STAT/Stats test cases after system suspend
-+PSCI STAT
- PSCI System Suspend Validation
- 
- # Disable FF-A Interrupt tests as TWDOG is not supported by TC platform
-@@ -25,9 +25,14 @@ FF-A Interrupt
- # files in TFTF, since the port was done purely to test the spectre workaround
- # performance impact. Once that was done no further work was done on the port.
- 
--Timer framework Validation/Target timer to a power down cpu
--Timer framework Validation/Test scenario where multiple CPUs call same timeout
--Timer framework Validation/Stress test the timer framework
-+Timer framework Validation
- PSCI Affinity Info/Affinity info level0 powerdown
- PSCI CPU Suspend
--PSCI STAT/for valid composite state CPU suspend
-+Framework Validation/NVM serialisation
-+Framework Validation/Events API
-+Boot requirement tests
-+CPU Hotplug
-+ARM_ARCH_SVC/SMCCC_ARCH_WORKAROUND_1 test
-+ARM_ARCH_SVC/SMCCC_ARCH_WORKAROUND_2 test
-+ARM_ARCH_SVC/SMCCC_ARCH_WORKAROUND_3 test
-+FF-A Power management
--- 
-2.34.1
-

meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/0002-Modify-BL32-Location-to-DDR4.patch

@@ -1,30 +0,0 @@
-From 15dab90c3cb8e7677c4f953c2269e8ee1afa01b0 Mon Oct 2 13:45:43 2023
-From: Mariam Elshakfy <mariam.elshakfy@arm.com>
-Date: Mon, 2 Oct 2023 13:45:43 +0000
-Subject: [PATCH] Modify BL32 Location to DDR4
-
-Since OP-TEE start address is changed to run
-from DDR4, this patch changes BL32 entrypoint
-to the correct one.
-
-Upstream-Status: Pending (not yet submitted to upstream)
-Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>
----
- plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts b/plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts
-index ed870803c..797dfe3a4 100644
---- a/plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts
-+++ b/plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts
-@@ -22,8 +22,8 @@
- 		maj_ver = <0x1>;
- 		min_ver = <0x0>;
- 		exec_state = <0x0>;
--		load_address = <0x0 0x08000000>;
--		entrypoint = <0x0 0x08000000>;
-+		load_address = <0x0 0xDE000000>;
-+		entrypoint = <0x0 0xDE000000>;
- 		binary_size = <0x2000000>;
- 	};
- 

meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/0003-Modify-SPMC-Base-to-DDR4.patch

@@ -1,28 +0,0 @@
-From 9a1d11b9fbadf740c73aee6dca4fd0370b38e4a8 Tue Oct 3 13:49:13 2023
-From: Mariam Elshakfy <mariam.elshakfy@arm.com>
-Date: Tue, 3 Oct 2023 13:49:13 +0000
-Subject: [PATCH] Modify SPMC Base to DDR4
-
-Since OP-TEE start address is changed to run
-from DDR4, this patch changes SPMC base to 
-the correct one.
-
-Upstream-Status: Pending (not yet submitted to upstream)
-Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>
----
- plat/arm/board/n1sdp/include/platform_def.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/plat/arm/board/n1sdp/include/platform_def.h b/plat/arm/board/n1sdp/include/platform_def.h
-index b3799a7b2..b12c61b61 100644
---- a/plat/arm/board/n1sdp/include/platform_def.h
-+++ b/plat/arm/board/n1sdp/include/platform_def.h
-@@ -118,7 +118,7 @@
- 
- #define PLAT_ARM_MAX_BL31_SIZE		UL(0x40000)
- 
--#define PLAT_ARM_SPMC_BASE		U(0x08000000)
-+#define PLAT_ARM_SPMC_BASE		U(0xDE000000)
- #define PLAT_ARM_SPMC_SIZE		UL(0x02000000)  /* 32 MB */
- 
- 

meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/rwx-segments.patch

@@ -1,45 +0,0 @@
-From 051c723a6463a579b05dcaa81f204516737a3645 Mon Sep 17 00:00:00 2001
-From: Ross Burton <ross.burton@arm.com>
-Date: Wed, 9 Aug 2023 15:56:03 -0400
-Subject: [PATCH] Binutils 2.39 now warns when a segment has RXW
- permissions[1]:
-
-aarch64-none-elf-ld.bfd: warning: bl31.elf has a LOAD segment with RWX
-permissions
-
-However, TF-A passes --fatal-warnings to LD, so this is a build failure.
-
-There is a ticket filed upstream[2], so until that is resolved just
-remove --fatal-warnings.
-
-[1] https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=ba951afb99912da01a6e8434126b8fac7aa75107
-[2] https://developer.trustedfirmware.org/T996
-
-Upstream-Status: Inappropriate
-Signed-off-by: Ross Burton <ross.burton@arm.com>
----
- Makefile | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/Makefile b/Makefile
-index 1ddb7b84417d..9eae30c923ec 100644
---- a/Makefile
-+++ b/Makefile
-@@ -425,7 +425,7 @@ TF_LDFLAGS		+=	$(TF_LDFLAGS_$(ARCH))
- # LD = gcc (used when GCC LTO is enabled)
- else ifneq ($(findstring gcc,$(notdir $(LD))),)
- # Pass ld options with Wl or Xlinker switches
--TF_LDFLAGS		+=	-Wl,--fatal-warnings -O1
-+TF_LDFLAGS		+=	-O1
- TF_LDFLAGS		+=	-Wl,--gc-sections
- ifeq ($(ENABLE_LTO),1)
- 	ifeq (${ARCH},aarch64)
-@@ -442,7 +442,7 @@ TF_LDFLAGS		+=	$(subst --,-Xlinker --,$(TF_LDFLAGS_$(ARCH)))
- 
- # LD = gcc-ld (ld) or llvm-ld (ld.lld) or other
- else
--TF_LDFLAGS		+=	--fatal-warnings -O1
-+TF_LDFLAGS		+=	-O1
- TF_LDFLAGS		+=	--gc-sections
- # ld.lld doesn't recognize the errata flags,
- # therefore don't add those in that case

meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tf-a-tests-no-warn-rwx-segments.patch

@@ -1,33 +0,0 @@
-From 6635341615a5bcb36ce71479ee30dae1599081e2 Mon Sep 17 00:00:00 2001
-From: Anton Antonov <anrton.antonov@arm.com>
-Date: Wed, 9 Aug 2023 15:56:03 -0400
-Subject: [PATCH] Binutils 2.39 now warns when a segment has RXW
- permissions[1]:
-
-aarch64-poky-linux-musl-ld: tftf.elf has a LOAD segment with RWX permissions
-
-There is a ticket filed upstream[2], so until that is resolved just
-disable the warning
-
-[1] https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=ba951afb99912da01a6e8434126b8fac7aa75107
-[2] https://developer.trustedfirmware.org/T996
-
-Upstream-Status: Inappropriate
-Signed-off-by: Anton Antonov <anrton.antonov@arm.com>
----
- Makefile | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/Makefile b/Makefile
-index 286a47c7d454..3481187b62cf 100644
---- a/Makefile
-+++ b/Makefile
-@@ -246,7 +246,7 @@ TFTF_SOURCES		:= ${FRAMEWORK_SOURCES}	${TESTS_SOURCES} ${PLAT_SOURCES} ${LIBC_SR
- TFTF_INCLUDES		+= ${PLAT_INCLUDES}
- TFTF_CFLAGS		+= ${COMMON_CFLAGS}
- TFTF_ASFLAGS		+= ${COMMON_ASFLAGS}
--TFTF_LDFLAGS		+= ${COMMON_LDFLAGS}
-+TFTF_LDFLAGS		+= ${COMMON_LDFLAGS} --no-warn-rwx-segments
- TFTF_EXTRA_OBJS 	:=
- 
- ifneq (${BP_OPTION},none)

meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_%.bbappend

@@ -1,16 +1,6 @@
 # Machine specific TFAs
 
-FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
-
 COMPATIBLE_MACHINE:corstone1000 = "corstone1000"
 EXTRA_OEMAKE:append:corstone1000 = " DEBUG=0"
 EXTRA_OEMAKE:append:corstone1000 = " LOG_LEVEL=30"
 TFTF_MODE:corstone1000 = "release"
-
-COMPATIBLE_MACHINE:n1sdp = "n1sdp"
-EXTRA_OEMAKE:append:n1sdp = " DEBUG=1"
-EXTRA_OEMAKE:append:n1sdp = " LOG_LEVEL=50"
-TFTF_MODE:n1sdp = "debug"
-SRC_URI:append:n1sdp = " \
-			file://0001-n1sdp-tftf-tests-to-skip.patch \
-			"

meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc

@@ -6,8 +6,10 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files/corstone1000:"
 SRC_URI:append = " \
 	file://0001-Fix-FF-A-version-in-SPMC-manifest.patch \
 	file://0002-fix-corstone1000-pass-spsr-value-explicitly.patch \
-	file://0003-fix-spmd-remove-EL3-interrupt-registration.patch \
-	file://0004-fix-corstone1000-remove-unused-NS_SHARED_RAM-region.patch \
+	file://0003-fix-corstone1000-remove-unused-NS_SHARED_RAM-region.patch \
+	file://0004-fix-corstone1000-clean-the-cache-and-disable-interru.patch \
+	file://0005-feat-corstone1000-Add-multicore-support-for-FVP-plat.patch \
+	file://0006-feat-corstone1000-include-platform-header-file.patch \
        "
 
 TFA_DEBUG = "1"
@@ -24,13 +26,13 @@ TFA_SPMD_SPM_AT_SEL2 = "0"
 # BL2 loads BL32 (optee). So, optee needs to be built first:
 DEPENDS += "optee-os"
 
-# Note: Regarding the build option: LOG_LEVEL. 
+# Note: Regarding the build option: LOG_LEVEL.
 # There seems to be an issue when setting it
-# to 50 (LOG_LEVEL_VERBOSE), where the kernel 
+# to 50 (LOG_LEVEL_VERBOSE), where the kernel
 # tee driver sends yielding requests to OP-TEE
 # at a faster pace than OP-TEE processes them,
-# as the processing time is consumed by logging 
-# in TF-A. When this issue occurs, booting halts 
+# as the processing time is consumed by logging
+# in TF-A. When this issue occurs, booting halts
 # as soon as optee driver starts initialization.
 # Therefore, it's not currently recommended to
 # set LOG_LEVEL to 50 at all.
@@ -53,3 +55,4 @@ EXTRA_OEMAKE:append = " \
                         BL32=${RECIPE_SYSROOT}/${nonarch_base_libdir}/firmware/tee-pager_v2.bin \
                         FVP_USE_GIC_DRIVER=FVP_GICV2 \
                         "
+EXTRA_OEMAKE:append:corstone1000-fvp = "${@bb.utils.contains('MACHINE_FEATURES', 'corstone1000_fvp_smp', ' ENABLE_MULTICORE=1', '', d)}"

meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-fvp-base.inc

@@ -7,7 +7,6 @@
 FILESEXTRAPATHS:prepend := "${THISDIR}/files/:${THISDIR}/files/fvp-base"
 
 SRC_URI:append = " \
-    file://0001-fdts-fvp-base-Add-stdout-path-and-virtio-net-and-rng.patch \
     file://optee_spmc_maifest.dts;subdir=git/plat/arm/board/fvp/fdts \
 "
 
@@ -63,3 +62,9 @@ EXTRA_OEMAKE += "FVP_DT_PREFIX=fvp-base-gicv3-psci-1t FVP_USE_GIC_DRIVER=FVP_GIC
 
 # Our fvp-base machine explicitly has v8.4 cores
 EXTRA_OEMAKE += "ARM_ARCH_MAJOR=8 ARM_ARCH_MINOR=4"
+
+# If GENERATE_COT is set, then tf-a will try to use local poetry install
+# to run the python cot-dt2c command.  Disable the local poetry and use
+# the provided cot-dt2c.
+EXTRA_OEMAKE += "POETRY=''"
+DEPENDS += "cot-dt2c-native"

meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-n1sdp.inc

@@ -1,41 +0,0 @@
-# N1SDP specific TFA support
-
-# Align with N1SDP-2023.06.22 Manifest
-SRCREV_tfa  = "31f60a968347497562b0129134928d7ac4767710"
-PV .= "+git"
-
-COMPATIBLE_MACHINE = "n1sdp"
-TFA_BUILD_TARGET   = "all fip"
-TFA_INSTALL_TARGET = "bl1 bl2 bl31 n1sdp-multi-chip n1sdp-single-chip n1sdp_fw_config n1sdp_tb_fw_config fip"
-TFA_DEBUG          = "1"
-TFA_MBEDTLS        = "1"
-TFA_UBOOT          = "0"
-TFA_UEFI          ?= "1"
-
-FILESEXTRAPATHS:prepend := "${THISDIR}/files/n1sdp:"
-
-SRC_URI:append = " \
-    file://0001-Reserve-OP-TEE-memory-from-nwd.patch \
-    file://0002-Modify-BL32-Location-to-DDR4.patch \
-    file://0003-Modify-SPMC-Base-to-DDR4.patch \
-    "
-
-TFA_ROT_KEY= "plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem"
-
-# Enabling Secure-EL1 Payload Dispatcher (SPD)
-TFA_SPD = "spmd"
-# Cortex-A35 supports Armv8.0-A (no S-EL2 execution state).
-# So, the SPD SPMC component should run at the S-EL1 execution state
-TFA_SPMD_SPM_AT_SEL2 = "0"
-
-# BL2 loads BL32 (optee). So, optee needs to be built first:
-DEPENDS += "optee-os"
-
-EXTRA_OEMAKE:append = "\
-                    TRUSTED_BOARD_BOOT=1 \
-		    GENERATE_COT=1 \
-		    CREATE_KEYS=1 \
-		    ARM_ROTPK_LOCATION="devel_rsa" \
-		    ROT_KEY="${TFA_ROT_KEY}" \
-		    BL32=${RECIPE_SYSROOT}/${nonarch_base_libdir}/firmware/tee-pager_v2.bin \
-		    "

meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-sgi575.inc

@@ -11,3 +11,9 @@ TFA_UEFI           = "1"
 
 EXTRA_OEMAKE += "TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 ARM_ROTPK_LOCATION=devel_rsa \
                      ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem"
+
+# If GENERATE_COT is set, then tf-a will try to use local poetry install
+# to run the python cot-dt2c command.  Disable the local poetry and use
+# the provided cot-dt2c.
+EXTRA_OEMAKE += "POETRY=''"
+DEPENDS += "cot-dt2c-native"

meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_%.bbappend

@@ -6,9 +6,7 @@ MACHINE_TFA_REQUIRE ?= ""
 MACHINE_TFA_REQUIRE:corstone1000 = "trusted-firmware-a-corstone1000.inc"
 MACHINE_TFA_REQUIRE:fvp-base = "trusted-firmware-a-fvp-base.inc"
 MACHINE_TFA_REQUIRE:juno = "trusted-firmware-a-juno.inc"
-MACHINE_TFA_REQUIRE:n1sdp = "trusted-firmware-a-n1sdp.inc"
 MACHINE_TFA_REQUIRE:sbsa-ref = "trusted-firmware-a-sbsa-ref.inc"
 MACHINE_TFA_REQUIRE:sgi575 = "trusted-firmware-a-sgi575.inc"
-MACHINE_TFA_REQUIRE:tc = "trusted-firmware-a-tc.inc"
 
 require ${MACHINE_TFA_REQUIRE}

meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.11.0.bb

@@ -0,0 +1,20 @@
+require recipes-bsp/trusted-firmware-a/trusted-firmware-a.inc
+
+# TF-A v2.11.0
+SRCREV_tfa = "f2735ebccf5173f74c0458736ec526276106097e"
+SRCBRANCH = "master"
+
+LIC_FILES_CHKSUM += "file://docs/license.rst;md5=b5fbfdeb6855162dded31fadcd5d4dc5"
+
+# in TF-A src, docs/getting_started/prerequisites.rst lists the expected version mbedtls
+# mbedtls-3.6.0
+SRC_URI_MBEDTLS = "git://github.com/ARMmbed/mbedtls.git;name=mbedtls;protocol=https;destsuffix=git/mbedtls;branch=main"
+SRCREV_mbedtls = "2ca6c285a0dd3f33982dd57299012dacab1ff206"
+
+LIC_FILES_CHKSUM_MBEDTLS = "file://mbedtls/LICENSE;md5=379d5819937a6c2f1ef1630d341e026d"
+
+# continue to boot also without TPM
+SRC_URI += "\
+    file://0001-qemu_measured_boot.c-ignore-TPM-error-and-continue-w.patch \
+    file://0001-fix-zynqmp-handle-secure-SGI-at-EL1-for-OP-TEE.patch \
+"

meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0001-Platform-Corstone1000-Align-capsule-UEFI-structs.patch

@@ -0,0 +1,97 @@
+From 6ac0d4ce58c1a957c5f086e8c32268fdfc3ea531 Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <emekcan.aras@arm.com>
+Date: Thu, 26 Oct 2023 11:46:04 +0100
+Subject: [PATCH 1/9] Platform: Corstone1000: Align capsule UEFI structs
+
+The UEFI capsules are generated using the U-Boot mkeficapsule tool.
+U-Boot uses packed struct for the UEFI and FMP structures, see [1].
+The structs have to be aligned in the TF-M side parser to avoid
+crashes.
+
+[1] https://github.com/u-boot/u-boot/blob/u-boot-2023.07.y/include/efi_api.h#L245
+
+Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
+Signed-off-by: Bence Balogh <bence.balogh@arm.com>
+Upstream-Status: Backport [6ac0d4ce58c1a957c5f086e8c32268fdfc3ea531]
+---
+ .../fw_update_agent/uefi_capsule_parser.c       | 17 +++++++++--------
+ 1 file changed, 9 insertions(+), 8 deletions(-)
+
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.c b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.c
+index c706c040a..44566e08d 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.c
++++ b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.c
+@@ -1,10 +1,11 @@
+ /*
+- * Copyright (c) 2021, Arm Limited. All rights reserved.
++ * Copyright (c) 2021-2024, Arm Limited. All rights reserved.
+  *
+  * SPDX-License-Identifier: BSD-3-Clause
+  *
+  */
+ 
++#include "cmsis_compiler.h"
+ #include "uefi_capsule_parser.h"
+ #include "fwu_agent.h"
+ #include <string.h>
+@@ -29,21 +30,21 @@ Update Capsule Structure (UEFI spec 2.9 1004)
+             Payload n (item_offset[embedded_driver_count + payload_item_count -1])
+ */
+ 
+-typedef struct {
++typedef __PACKED_STRUCT {
+     struct efi_guid         capsule_guid;
+     uint32_t                header_size;
+     uint32_t                flags;
+     uint32_t                capsule_image_size;
+ } efi_capsule_header_t;
+ 
+-typedef struct {
++typedef __PACKED_STRUCT {
+     uint32_t                version;
+     uint16_t                embedded_driver_count;
+     uint16_t                payload_item_count;
+     uint64_t                item_offset_list[];
+ } efi_firmware_management_capsule_header_t;
+ 
+-typedef struct {
++typedef __PACKED_STRUCT {
+     uint32_t                version;
+     struct efi_guid         update_image_type_id;
+     uint8_t                 update_image_index;
+@@ -54,7 +55,7 @@ typedef struct {
+     uint64_t                image_capsule_support; //introduced in v3
+ } efi_firmware_management_capsule_image_header_t;
+ 
+-typedef struct {
++typedef __PACKED_STRUCT {
+     uint32_t                signature;
+     uint32_t                header_size;
+     uint32_t                fw_version;
+@@ -63,20 +64,20 @@ typedef struct {
+ 
+ #define ANYSIZE_ARRAY 0
+ 
+-typedef struct {
++typedef __PACKED_STRUCT {
+     uint32_t                dwLength;
+     uint16_t                wRevision;
+     uint16_t                wCertificateType;
+     uint8_t                 bCertificate[ANYSIZE_ARRAY];
+ } WIN_CERTIFICATE;
+ 
+-typedef struct {
++typedef __PACKED_STRUCT {
+     WIN_CERTIFICATE         hdr;
+     struct efi_guid         cert_type;
+     uint8_t                 cert_data[ANYSIZE_ARRAY];
+ } win_certificate_uefi_guid_t;
+ 
+-typedef struct {
++typedef __PACKED_STRUCT {
+     uint64_t                    monotonic_count;
+     win_certificate_uefi_guid_t   auth_info;
+ } efi_firmware_image_authentication_t;
+-- 
+2.25.1
+

meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0001-platform-corstone1000-Update-MPU-configuration.patch

@@ -1,274 +0,0 @@
-From eb096e4c03b80f9f31e5d15ca06e5a38e4112664 Mon Sep 17 00:00:00 2001
-From: Bence Balogh <bence.balogh@arm.com>
-Date: Tue, 7 Nov 2023 20:25:49 +0100
-Subject: [PATCH 1/2] platform: corstone1000: Update MPU configuration
-
-In Armv6-M the MPU requires the regions to be aligned with
-region sizes.
-The commit aligns the different code/data sections using the
-alignment macros. The code/data sections can be covered by
-multiple MPU regions in order to save memory.
-
-Small adjustments had to be made in the memory layout in order to
-not overflow the flash:
-- Decreased TFM_PARTITION_SIZE
-- Increased S_UNPRIV_DATA_SIZE
-
-Added checks to the MPU configuration function for checking the
-MPU constraints:
-- Base address has to be aligned to the size
-- The minimum MPU region size is 0x100
-- The MPU can have 8 regions at most
-
-Change-Id: I059468e8aba0822bb354fd1cd4987ac2bb1f34d1
-Signed-off-by: Bence Balogh <bence.balogh@arm.com>
-Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/25393]
-
----
- .../target/arm/corstone1000/CMakeLists.txt    | 19 +++++
- .../arm/corstone1000/create-flash-image.sh    |  8 +-
- .../arm/corstone1000/partition/flash_layout.h |  2 +-
- .../arm/corstone1000/partition/region_defs.h  |  6 +-
- .../arm/corstone1000/tfm_hal_isolation.c      | 83 +++++++++++++++----
- 5 files changed, 93 insertions(+), 25 deletions(-)
-
-diff --git a/platform/ext/target/arm/corstone1000/CMakeLists.txt b/platform/ext/target/arm/corstone1000/CMakeLists.txt
-index e6cf15b11..8817f514c 100644
---- a/platform/ext/target/arm/corstone1000/CMakeLists.txt
-+++ b/platform/ext/target/arm/corstone1000/CMakeLists.txt
-@@ -22,6 +22,25 @@ target_compile_definitions(platform_region_defs
-     INTERFACE
-         $<$<BOOL:${TFM_S_REG_TEST}>:TFM_S_REG_TEST>
- )
-+
-+# The Armv6-M MPU requires that the MPU regions be aligned to the region sizes.
-+# The minimal region size is 0x100 bytes.
-+#
-+# The alignments have to be a power of two and ideally bigger than the section size (which
-+# can be checked in the map file).
-+# In some cases the alignment value is smaller than the actual section
-+# size to save memory. In that case, multiple MPU region has to be configured to cover it.
-+#
-+# To save memory, the attributes are set to XN_EXEC_OK and AP_RO_PRIV_UNPRIV for
-+# the SRAM so the PSA_ROT_LINKER_CODE, TFM_UNPRIV_CODE and APP_ROT_LINKER_CODE don't have to
-+# be aligned. The higher-priority regions will overwrite these attributes if needed.
-+# The RAM is also located in the SRAM so it has to be configured to overwrite these default
-+# attributes.
-+target_compile_definitions(platform_region_defs
-+    INTERFACE
-+        TFM_LINKER_APP_ROT_LINKER_DATA_ALIGNMENT=0x2000
-+        TFM_LINKER_SP_META_PTR_ALIGNMENT=0x100
-+)
- #========================= Platform common defs ===============================#
- 
- # Specify the location of platform specific build dependencies.
-diff --git a/platform/ext/target/arm/corstone1000/create-flash-image.sh b/platform/ext/target/arm/corstone1000/create-flash-image.sh
-index 2522d3674..a6be61384 100755
---- a/platform/ext/target/arm/corstone1000/create-flash-image.sh
-+++ b/platform/ext/target/arm/corstone1000/create-flash-image.sh
-@@ -8,7 +8,7 @@
- 
- ######################################################################
- # This script is to create a flash gpt image for corstone platform
--# 
-+#
- #  Flash image layout:
- #       |------------------------------|
- #       |        Protective MBR        |
-@@ -82,15 +82,15 @@ sgdisk  --mbrtogpt \
-         --new=4:56:+4K --typecode=4:$PRIVATE_METADATA_TYPE_UUID --partition-guid=4:$(uuidgen) --change-name=4:'private_metadata_replica_1' \
-         --new=5:64:+4k --typecode=5:$PRIVATE_METADATA_TYPE_UUID --partition-guid=5:$(uuidgen) --change-name=5:'private_metadata_replica_2' \
-         --new=6:72:+100k --typecode=6:$SE_BL2_TYPE_UUID --partition-guid=6:$(uuidgen) --change-name=6:'bl2_primary' \
--        --new=7:272:+376K --typecode=7:$TFM_TYPE_UUID --partition-guid=7:$(uuidgen) --change-name=7:'tfm_primary' \
-+        --new=7:272:+368K --typecode=7:$TFM_TYPE_UUID --partition-guid=7:$(uuidgen) --change-name=7:'tfm_primary' \
-         --new=8:32784:+100k --typecode=8:$SE_BL2_TYPE_UUID --partition-guid=8:$(uuidgen) --change-name=8:'bl2_secondary' \
--        --new=9:32984:+376K --typecode=9:$TFM_TYPE_UUID --partition-guid=9:$(uuidgen) --change-name=9:'tfm_secondary' \
-+        --new=9:32984:+368K --typecode=9:$TFM_TYPE_UUID --partition-guid=9:$(uuidgen) --change-name=9:'tfm_secondary' \
-         --new=10:65496:65501  --partition-guid=10:$(uuidgen) --change-name=10:'reserved_2' \
-         $IMAGE
- 
- [ $? -ne 0 ] && echo "Error occurs while writing the GPT layout" && exit 1
- 
--# Write partitions 
-+# Write partitions
- # conv=notrunc avoids truncation to keep the geometry of the image.
- dd if=$BIN_DIR/bl2_signed.bin of=${IMAGE}  seek=72 conv=notrunc
- dd if=$BIN_DIR/tfm_s_signed.bin of=${IMAGE} seek=272 conv=notrunc
-diff --git a/platform/ext/target/arm/corstone1000/partition/flash_layout.h b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
-index 568c8de28..7fffd94c6 100644
---- a/platform/ext/target/arm/corstone1000/partition/flash_layout.h
-+++ b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
-@@ -134,7 +134,7 @@
- 
- /* Bank configurations */
- #define BANK_PARTITION_SIZE             (0xFE0000)   /* 15.875 MB */
--#define TFM_PARTITION_SIZE              (0x5E000)    /* 376 KB */
-+#define TFM_PARTITION_SIZE              (0x5C000)    /* 368 KB */
- 
- /************************************************************/
- /* Bank : Images flash offsets are with respect to the bank */
-diff --git a/platform/ext/target/arm/corstone1000/partition/region_defs.h b/platform/ext/target/arm/corstone1000/partition/region_defs.h
-index 99e822f51..64ab786e5 100644
---- a/platform/ext/target/arm/corstone1000/partition/region_defs.h
-+++ b/platform/ext/target/arm/corstone1000/partition/region_defs.h
-@@ -1,8 +1,10 @@
- /*
-- * Copyright (c) 2017-2022 Arm Limited. All rights reserved.
-+ * Copyright (c) 2017-2023 Arm Limited. All rights reserved.
-  * Copyright (c) 2021-2023 Cypress Semiconductor Corporation (an Infineon company)
-  * or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
-  *
-+ * SPDX-License-Identifier: Apache-2.0
-+ *
-  * Licensed under the Apache License, Version 2.0 (the "License");
-  * you may not use this file except in compliance with the License.
-  * You may obtain a copy of the License at
-@@ -53,7 +55,7 @@
- 
- #define S_DATA_START            (SRAM_BASE + TFM_PARTITION_SIZE)
- #define S_DATA_SIZE             (SRAM_SIZE - TFM_PARTITION_SIZE)
--#define S_UNPRIV_DATA_SIZE      (0x2160)
-+#define S_UNPRIV_DATA_SIZE      (0x4000)
- #define S_DATA_LIMIT            (S_DATA_START + S_DATA_SIZE - 1)
- #define S_DATA_PRIV_START       (S_DATA_START + S_UNPRIV_DATA_SIZE)
- 
-diff --git a/platform/ext/target/arm/corstone1000/tfm_hal_isolation.c b/platform/ext/target/arm/corstone1000/tfm_hal_isolation.c
-index 01f7687bc..98e795dde 100644
---- a/platform/ext/target/arm/corstone1000/tfm_hal_isolation.c
-+++ b/platform/ext/target/arm/corstone1000/tfm_hal_isolation.c
-@@ -1,5 +1,5 @@
- /*
-- * Copyright (c) 2020-2022, Arm Limited. All rights reserved.
-+ * Copyright (c) 2020-2023, Arm Limited. All rights reserved.
-  * Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon
-  * company) or an affiliate of Cypress Semiconductor Corporation. All rights
-  * reserved.
-@@ -14,9 +14,11 @@
- #include "tfm_hal_isolation.h"
- #include "mpu_config.h"
- #include "mmio_defs.h"
-+#include "flash_layout.h"
- 
- #define PROT_BOUNDARY_VAL \
-     ((1U << HANDLE_ATTR_PRIV_POS) & HANDLE_ATTR_PRIV_MASK)
-+#define MPU_REGION_MIN_SIZE (0x100)
- 
- #ifdef CONFIG_TFM_ENABLE_MEMORY_PROTECT
- 
-@@ -31,20 +33,38 @@ REGION_DECLARE(Image$$, TFM_SP_META_PTR, $$ZI$$Base);
- REGION_DECLARE(Image$$, TFM_SP_META_PTR, $$ZI$$Limit);
- #endif /* CONFIG_TFM_PARTITION_META */
- 
--static void configure_mpu(uint32_t rnr, uint32_t base, uint32_t limit,
--                          uint32_t is_xn_exec, uint32_t ap_permissions)
-+static enum tfm_hal_status_t configure_mpu(uint32_t rnr, uint32_t base,
-+                          uint32_t limit, uint32_t is_xn_exec, uint32_t ap_permissions)
- {
--    uint32_t size; /* region size */
-+    uint32_t rbar_size_field; /* region size as it is used in the RBAR */
-     uint32_t rasr; /* region attribute and size register */
-     uint32_t rbar; /* region base address register */
- 
--    size = get_rbar_size_field(limit - base);
-+    rbar_size_field = get_rbar_size_field(limit - base);
-+
-+    /* The MPU region's base address has to be aligned to the region
-+     * size for a valid MPU configuration */
-+    if ((base % (1 << (rbar_size_field + 1))) != 0) {
-+        return TFM_HAL_ERROR_INVALID_INPUT;
-+    }
-+
-+    /* The MPU supports only 8 memory regions */
-+    if (rnr > 7) {
-+        return TFM_HAL_ERROR_INVALID_INPUT;
-+    }
-+
-+    /* The minimum size for a region is 0x100 bytes */
-+    if((limit - base) < MPU_REGION_MIN_SIZE) {
-+        return TFM_HAL_ERROR_INVALID_INPUT;
-+    }
- 
-     rasr = ARM_MPU_RASR(is_xn_exec, ap_permissions, TEX, NOT_SHAREABLE,
--            NOT_CACHEABLE, NOT_BUFFERABLE, SUB_REGION_DISABLE, size);
-+            NOT_CACHEABLE, NOT_BUFFERABLE, SUB_REGION_DISABLE, rbar_size_field);
-     rbar = base & MPU_RBAR_ADDR_Msk;
- 
-     ARM_MPU_SetRegionEx(rnr, rbar, rasr);
-+
-+    return TFM_HAL_SUCCESS;
- }
- 
- #endif /* CONFIG_TFM_ENABLE_MEMORY_PROTECT */
-@@ -56,33 +76,60 @@ enum tfm_hal_status_t tfm_hal_set_up_static_boundaries(
-     uint32_t rnr = TFM_ISOLATION_REGION_START_NUMBER; /* current region number */
-     uint32_t base; /* start address */
-     uint32_t limit; /* end address */
-+    enum tfm_hal_status_t ret;
- 
-     ARM_MPU_Disable();
- 
--    /* TFM Core unprivileged code region */
--    base = (uint32_t)&REGION_NAME(Image$$, TFM_UNPRIV_CODE_START, $$RO$$Base);
--    limit = (uint32_t)&REGION_NAME(Image$$, TFM_UNPRIV_CODE_END, $$RO$$Limit);
--
--    configure_mpu(rnr++, base, limit, XN_EXEC_OK, AP_RO_PRIV_UNPRIV);
--
--    /* RO region */
--    base = (uint32_t)&REGION_NAME(Image$$, TFM_APP_CODE_START, $$Base);
--    limit = (uint32_t)&REGION_NAME(Image$$, TFM_APP_CODE_END, $$Base);
-+    /* Armv6-M MPU allows region overlapping. The region with the higher RNR
-+     * will decide the attributes.
-+     *
-+     * The default attributes are set to XN_EXEC_OK and AP_RO_PRIV_UNPRIV for the
-+     * whole SRAM so the PSA_ROT_LINKER_CODE, TFM_UNPRIV_CODE and APP_ROT_LINKER_CODE
-+     * don't have to be aligned and memory space can be saved.
-+     * This region has the lowest RNR so the next regions can overwrite these
-+     * attributes if it's needed.
-+     */
-+    base = SRAM_BASE;
-+    limit = SRAM_BASE + SRAM_SIZE;
-+
-+    ret = configure_mpu(rnr++, base, limit,
-+                            XN_EXEC_OK, AP_RW_PRIV_UNPRIV);
-+    if (ret != TFM_HAL_SUCCESS) {
-+        return ret;
-+    }
- 
--    configure_mpu(rnr++, base, limit, XN_EXEC_OK, AP_RO_PRIV_UNPRIV);
- 
-     /* RW, ZI and stack as one region */
-     base = (uint32_t)&REGION_NAME(Image$$, TFM_APP_RW_STACK_START, $$Base);
-     limit = (uint32_t)&REGION_NAME(Image$$, TFM_APP_RW_STACK_END, $$Base);
- 
--    configure_mpu(rnr++, base, limit, XN_EXEC_NOT_OK, AP_RW_PRIV_UNPRIV);
-+    /* The section size can be bigger than the alignment size, else the code would
-+     * not fit into the memory. Because of this, the sections can use multiple MPU
-+     * regions. */
-+    do {
-+        ret = configure_mpu(rnr++, base, base + TFM_LINKER_APP_ROT_LINKER_DATA_ALIGNMENT,
-+                                XN_EXEC_NOT_OK, AP_RW_PRIV_UNPRIV);
-+        if (ret != TFM_HAL_SUCCESS) {
-+            return ret;
-+        }
-+        base += TFM_LINKER_APP_ROT_LINKER_DATA_ALIGNMENT;
-+    } while (base < limit);
-+
- 
- #ifdef CONFIG_TFM_PARTITION_META
-     /* TFM partition metadata pointer region */
-     base = (uint32_t)&REGION_NAME(Image$$, TFM_SP_META_PTR, $$ZI$$Base);
-     limit = (uint32_t)&REGION_NAME(Image$$, TFM_SP_META_PTR, $$ZI$$Limit);
- 
--    configure_mpu(rnr++, base, limit, XN_EXEC_NOT_OK, AP_RW_PRIV_UNPRIV);
-+    do {
-+        ret = configure_mpu(rnr++, base, base + TFM_LINKER_SP_META_PTR_ALIGNMENT,
-+                                XN_EXEC_NOT_OK, AP_RW_PRIV_UNPRIV);
-+        if (ret != TFM_HAL_SUCCESS) {
-+            return ret;
-+        }
-+        base += TFM_LINKER_SP_META_PTR_ALIGNMENT;
-+    } while (base < limit);
-+
- #endif
- 
-     arm_mpu_enable();

meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0002-Platform-Corstone1000-Fix-NV-counter-writing.patch

@@ -0,0 +1,69 @@
+From 47c54e8e79df52f40057c3d4be9411447d2787c2 Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <Emekcan.Aras@arm.com>
+Date: Wed, 21 Feb 2024 07:44:25 +0000
+Subject: [PATCH 2/9] Platform: Corstone1000: Fix NV counter writing
+
+The BL1 writes the PLAT_NV_COUNTER_BL1_0 NV counter directly without
+updating the private metadata. Because of this the update_nv_counters()
+function should not update the PLAT_NV_COUNTER_BL1_0 from the metadata.
+
+The tfm_plat_set_nv_counter() had a typo and wrote the
+priv_metadata->nv_counter[FWU_BL2_NV_COUNTER] to every NV counter.
+
+Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
+Signed-off-by: Bence Balogh <bence.balogh@arm.com>
+Upstream-Status: Backport [47c54e8e79df52f40057c3d4be9411447d2787c2]
+---
+ .../corstone1000/fw_update_agent/fwu_agent.c   | 18 +++++++++++-------
+ 1 file changed, 11 insertions(+), 7 deletions(-)
+
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+index 9a9926a3d..b2f31e166 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
++++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c
+@@ -1120,12 +1120,13 @@ static enum fwu_agent_error_t update_nv_counters(
+ 
+     FWU_LOG_MSG("%s: enter\n\r", __func__);
+ 
+-    for (int i = 0; i <= FWU_MAX_NV_COUNTER_INDEX; i++) {
++    /* The FWU_BL2_NV_COUNTER (0) is not mirrored in the private metadata. It is
++     * directly updated in the bl1_2_validate_image_at_addr() function, in
++     * tfm/bl1/bl1_2/main.c.
++     * Because of this, the index starts from FWU_TFM_NV_COUNTER (1). */
++    for (int i = FWU_TFM_NV_COUNTER; i <= FWU_MAX_NV_COUNTER_INDEX; i++) {
+ 
+         switch (i) {
+-            case FWU_BL2_NV_COUNTER:
+-                tfm_nv_counter_i = PLAT_NV_COUNTER_BL1_0;
+-                break;
+             case FWU_TFM_NV_COUNTER:
+                 tfm_nv_counter_i = PLAT_NV_COUNTER_BL2_0;
+                 break;
+@@ -1140,18 +1141,21 @@ static enum fwu_agent_error_t update_nv_counters(
+         err = tfm_plat_read_nv_counter(tfm_nv_counter_i,
+                         sizeof(security_cnt), (uint8_t *)&security_cnt);
+         if (err != TFM_PLAT_ERR_SUCCESS) {
++            FWU_LOG_MSG("%s: couldn't read NV counter\n\r", __func__);
+             return FWU_AGENT_ERROR;
+         }
+ 
+         if (priv_metadata->nv_counter[i] < security_cnt) {
++            FWU_LOG_MSG("%s: staged NV counter is smaller than current value\n\r", __func__);
+             return FWU_AGENT_ERROR;
+         } else if (priv_metadata->nv_counter[i] > security_cnt) {
+-            FWU_LOG_MSG("%s: updaing index = %u nv counter = %u->%u\n\r",
++            FWU_LOG_MSG("%s: updating index = %u nv counter = %u->%u\n\r",
+                         __func__, i, security_cnt,
+-                        priv_metadata->nv_counter[FWU_BL2_NV_COUNTER]);
++                        priv_metadata->nv_counter[i]);
+             err = tfm_plat_set_nv_counter(tfm_nv_counter_i,
+-                                    priv_metadata->nv_counter[FWU_BL2_NV_COUNTER]);
++                                    priv_metadata->nv_counter[i]);
+             if (err != TFM_PLAT_ERR_SUCCESS) {
++                FWU_LOG_MSG("%s: couldn't write NV counter\n\r", __func__);
+                 return FWU_AGENT_ERROR;
+             }
+         }
+-- 
+2.25.1
+

meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0002-platform-corstone1000-Cover-S_DATA-with-MPU.patch

@@ -1,76 +0,0 @@
-From ca7696bca357cfd71a34582c65a7c7c08828b6dc Mon Sep 17 00:00:00 2001
-From: Bence Balogh <bence.balogh@arm.com>
-Date: Mon, 18 Dec 2023 14:00:14 +0100
-Subject: [PATCH 2/2] platform: corstone1000: Cover S_DATA with MPU
-
-The S_DATA has to be covered with MPU regions to override the
-other MPU regions with smaller RNR values.
-
-Change-Id: I45fec65f51241939314941e25d287e6fdc82777c
-Signed-off-by: Bence Balogh <bence.balogh@arm.com>
-Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/25583]
-
----
- .../target/arm/corstone1000/CMakeLists.txt    |  8 +++++++
- .../arm/corstone1000/tfm_hal_isolation.c      | 22 +++++++++++++++++++
- 2 files changed, 30 insertions(+)
-
-diff --git a/platform/ext/target/arm/corstone1000/CMakeLists.txt b/platform/ext/target/arm/corstone1000/CMakeLists.txt
-index 8817f514c..541504368 100644
---- a/platform/ext/target/arm/corstone1000/CMakeLists.txt
-+++ b/platform/ext/target/arm/corstone1000/CMakeLists.txt
-@@ -40,6 +40,14 @@ target_compile_definitions(platform_region_defs
-     INTERFACE
-         TFM_LINKER_APP_ROT_LINKER_DATA_ALIGNMENT=0x2000
-         TFM_LINKER_SP_META_PTR_ALIGNMENT=0x100
-+
-+        # The RAM MPU Region block sizes are calculated manually. The RAM has to be covered
-+        # with the MPU regions. These regions also have to be the power of 2 and
-+        # the start addresses have to be aligned to these sizes. The sizes can be calculated
-+        # from the S_DATA_START and S_DATA_SIZE defines.
-+        RAM_MPU_REGION_BLOCK_1_SIZE=0x4000
-+        RAM_MPU_REGION_BLOCK_2_SIZE=0x20000
-+
- )
- #========================= Platform common defs ===============================#
- 
-diff --git a/platform/ext/target/arm/corstone1000/tfm_hal_isolation.c b/platform/ext/target/arm/corstone1000/tfm_hal_isolation.c
-index 98e795dde..39b19c535 100644
---- a/platform/ext/target/arm/corstone1000/tfm_hal_isolation.c
-+++ b/platform/ext/target/arm/corstone1000/tfm_hal_isolation.c
-@@ -15,6 +15,7 @@
- #include "mpu_config.h"
- #include "mmio_defs.h"
- #include "flash_layout.h"
-+#include "region_defs.h"
- 
- #define PROT_BOUNDARY_VAL \
-     ((1U << HANDLE_ATTR_PRIV_POS) & HANDLE_ATTR_PRIV_MASK)
-@@ -132,6 +133,27 @@ enum tfm_hal_status_t tfm_hal_set_up_static_boundaries(
- 
- #endif
- 
-+    /* Set the RAM attributes. It is needed because the first region overlaps the whole
-+     * SRAM and it has to be overridden.
-+     * The RAM_MPU_REGION_BLOCK_1_SIZE and RAM_MPU_REGION_BLOCK_2_SIZE are calculated manually
-+     * and added to the platform_region_defs compile definitions.
-+     */
-+    base = S_DATA_START;
-+    limit = S_DATA_START + RAM_MPU_REGION_BLOCK_1_SIZE;
-+    ret = configure_mpu(rnr++, base, limit,
-+                            XN_EXEC_NOT_OK, AP_RW_PRIV_UNPRIV);
-+    if (ret != TFM_HAL_SUCCESS) {
-+        return ret;
-+    }
-+
-+    base = S_DATA_START + RAM_MPU_REGION_BLOCK_1_SIZE;
-+    limit = S_DATA_START + RAM_MPU_REGION_BLOCK_1_SIZE + RAM_MPU_REGION_BLOCK_2_SIZE;
-+    ret = configure_mpu(rnr++, base, limit,
-+                            XN_EXEC_NOT_OK, AP_RW_PRIV_UNPRIV);
-+    if (ret != TFM_HAL_SUCCESS) {
-+        return ret;
-+    }
-+
-     arm_mpu_enable();
- 
- #endif /* CONFIG_TFM_ENABLE_MEMORY_PROTECT */

meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0003-Platform-Corstone1000-Enable-firewall-in-FVP.patch

@@ -1,14 +1,15 @@
-From 1410dc5504d60219279581b1cf6442f81551cfe7 Mon Sep 17 00:00:00 2001
+From 4b5a9546205e484ac7f53cee369b1db9a7bf2279 Mon Sep 17 00:00:00 2001
 From: Emekcan Aras <Emekcan.Aras@arm.com>
 Date: Wed, 3 Apr 2024 13:37:40 +0100
-Subject: [PATCH] Platform: Corstone1000: Enable host firewall in FVP
+Subject: [PATCH 3/9] Platform: Corstone1000: Enable firewall in FVP
 
-Enables host firewall and mpu setup for FVP. It also fixes secure-ram
-configuration and disable access rights to secure ram from both normal world
-for both mps3 and fvp.
+Enables host firewall and MPU setup for FVP. It also fixes secure RAM
+configuration and disables access rights to secure RAM from normal world
+for both MPS3 and FVP.
 
 Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
-Upstream-Status: Pending [Not submitted to upstream yet]
+Signed-off-by: Bence Balogh <bence.balogh@arm.com>
+Upstream-Status: Backport [4b5a9546205e484ac7f53cee369b1db9a7bf2279]
 ---
  .../Device/Include/platform_base_address.h    |  2 +-
  .../arm/corstone1000/bl1/boot_hal_bl1_1.c     | 42 ++++---------------
@@ -16,7 +17,7 @@ Upstream-Status: Pending [Not submitted to upstream yet]
  3 files changed, 11 insertions(+), 35 deletions(-)
 
 diff --git a/platform/ext/target/arm/corstone1000/Device/Include/platform_base_address.h b/platform/ext/target/arm/corstone1000/Device/Include/platform_base_address.h
-index 416f0ebcd..101cad9e7 100644
+index 416f0ebcdb..101cad9e7c 100644
 --- a/platform/ext/target/arm/corstone1000/Device/Include/platform_base_address.h
 +++ b/platform/ext/target/arm/corstone1000/Device/Include/platform_base_address.h
 @@ -67,7 +67,7 @@
@@ -29,7 +30,7 @@ index 416f0ebcd..101cad9e7 100644
  #define CORSTONE1000_HOST_BASE_SYSTEM_CONTROL_BASE (0x7A010000U) /* Host SCB                          */
  #define CORSTONE1000_EXT_SYS_RESET_REG             (0x7A010310U) /* external system (cortex-M3)       */
 diff --git a/platform/ext/target/arm/corstone1000/bl1/boot_hal_bl1_1.c b/platform/ext/target/arm/corstone1000/bl1/boot_hal_bl1_1.c
-index a5fee66af..7988c2392 100644
+index 45d6768215..2f693d2b1b 100644
 --- a/platform/ext/target/arm/corstone1000/bl1/boot_hal_bl1_1.c
 +++ b/platform/ext/target/arm/corstone1000/bl1/boot_hal_bl1_1.c
 @@ -35,7 +35,7 @@ REGION_DECLARE(Image$$, ER_DATA, $$Base)[];
@@ -159,7 +160,7 @@ index a5fee66af..7988c2392 100644
  #if defined(TFM_BL1_LOGGING) || defined(TEST_BL1_1) || defined(TEST_BL1_2)
      stdio_init();
 diff --git a/platform/ext/target/arm/corstone1000/bl2/flash_map_bl2.c b/platform/ext/target/arm/corstone1000/bl2/flash_map_bl2.c
-index 2b1cdfa19..06cc3f0f5 100644
+index 2b1cdfa199..06cc3f0f52 100644
 --- a/platform/ext/target/arm/corstone1000/bl2/flash_map_bl2.c
 +++ b/platform/ext/target/arm/corstone1000/bl2/flash_map_bl2.c
 @@ -70,7 +70,7 @@ int boot_get_image_exec_ram_info(uint32_t image_id,
@@ -174,4 +175,3 @@ index 2b1cdfa19..06cc3f0f5 100644
 -- 
 2.25.1
 
-

meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0003-platform-corstone1000-align-capsule-update-structs.patch

@@ -1,78 +0,0 @@
-From 6807d4b30f7d4ed32d3c54dfcaf3ace63eaa4f02 Mon Sep 17 00:00:00 2001
-From: Emekcan Aras <emekcan.aras@arm.com>
-Date: Thu, 26 Oct 2023 11:46:04 +0100
-Subject: [PATCH] platform: corstone1000: align capsule update structs
-
-U-boot mkefitool creates capsule image without packed and byte-aligned
-structs. This patch aligns the capsule-update structures and avoids
-crashes in case of unaligned pointer access.
-
-Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
-Upstream-Status: Pending
----
- .../fw_update_agent/uefi_capsule_parser.c          | 14 +++++++-------
- 1 file changed, 7 insertions(+), 7 deletions(-)
-
-diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.c b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.c
-index c706c040ac..9f8d12ad4e 100644
---- a/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.c
-+++ b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.c
-@@ -34,14 +34,14 @@ typedef struct {
-     uint32_t                header_size;
-     uint32_t                flags;
-     uint32_t                capsule_image_size;
--} efi_capsule_header_t;
-+} efi_capsule_header_t __attribute__((packed, aligned(1)));
-
- typedef struct {
-     uint32_t                version;
-     uint16_t                embedded_driver_count;
-     uint16_t                payload_item_count;
-     uint64_t                item_offset_list[];
--} efi_firmware_management_capsule_header_t;
-+} efi_firmware_management_capsule_header_t __attribute__((packed, aligned(1)));
-
- typedef struct {
-     uint32_t                version;
-@@ -52,14 +52,14 @@ typedef struct {
-     uint32_t                update_vendorcode_size;
-     uint64_t                update_hardware_instance; //introduced in v2
-     uint64_t                image_capsule_support; //introduced in v3
--} efi_firmware_management_capsule_image_header_t;
-+} efi_firmware_management_capsule_image_header_t __attribute__((packed, aligned(1)));
-
- typedef struct {
-     uint32_t                signature;
-     uint32_t                header_size;
-     uint32_t                fw_version;
-     uint32_t                lowest_supported_version;
--} fmp_payload_header_t;
-+} fmp_payload_header_t __attribute__((packed, aligned(1)));
-
- #define ANYSIZE_ARRAY 0
-
-@@ -68,18 +68,18 @@ typedef struct {
-     uint16_t                wRevision;
-     uint16_t                wCertificateType;
-     uint8_t                 bCertificate[ANYSIZE_ARRAY];
--} WIN_CERTIFICATE;
-+} WIN_CERTIFICATE __attribute__((packed, aligned(1)));
-
- typedef struct {
-     WIN_CERTIFICATE         hdr;
-     struct efi_guid         cert_type;
-     uint8_t                 cert_data[ANYSIZE_ARRAY];
--} win_certificate_uefi_guid_t;
-+} win_certificate_uefi_guid_t __attribute__((packed, aligned(1)));
-
- typedef struct {
-     uint64_t                    monotonic_count;
-     win_certificate_uefi_guid_t   auth_info;
--} efi_firmware_image_authentication_t;
-+} efi_firmware_image_authentication_t __attribute__((packed, aligned(1)));
-
-
- enum uefi_capsule_error_t uefi_capsule_retrieve_images(void* capsule_ptr,
---
-2.25.1
-

meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0004-Platform-CS1000-Increase-ITS-max-asset-size.patch

@@ -0,0 +1,41 @@
+From 2a7e418afc96a9c897d3511fd47dbe596f880074 Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <emekcan.aras@arm.com>
+Date: Wed, 17 Apr 2024 11:34:45 +0000
+Subject: [PATCH 4/9] Platform: CS1000: Increase ITS max asset size
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Increases the max asset size for ITS to enable Parsec services and
+tests.
+​
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+Signed-off-by: Vikas Katariya <vikas.katariya@arm.com>
+Signed-off-by: Bence Balogh <bence.balogh@arm.com>
+Upstream-Status: Backport [2a7e418afc96a9c897d3511fd47dbe596f880074]
+---
+ platform/ext/target/arm/corstone1000/config_tfm_target.h | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/platform/ext/target/arm/corstone1000/config_tfm_target.h b/platform/ext/target/arm/corstone1000/config_tfm_target.h
+index 2c7341afd..9522379cd 100644
+--- a/platform/ext/target/arm/corstone1000/config_tfm_target.h
++++ b/platform/ext/target/arm/corstone1000/config_tfm_target.h
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2022, Arm Limited. All rights reserved.
++ * Copyright (c) 2022-2024, Arm Limited. All rights reserved.
+  *
+  * SPDX-License-Identifier: BSD-3-Clause
+  *
+@@ -20,4 +20,7 @@
+ /* The maximum number of assets to be stored in the Protected Storage area. */
+ #define PS_NUM_ASSETS        20
+ 
++/* The maximum size of asset to be stored in the Internal Trusted Storage area. */
++#define ITS_MAX_ASSET_SIZE   2048
++
+ #endif /* __CONFIG_TFM_TARGET_H__ */
+-- 
+2.25.1
+